From: Yu'an Wang wangyuan46@huawei.com
driver inclusion category: bugfix bugzilla: NA CVE: NA
In this patch, we try to optimize the way to set the maximum number of VF, which is designed for compation with next hardware standards. Then we remove invalid address parameter definition and assignment. Meanwhile, the return code judgment of debugfs related functions is deleted, because this does not affect the main function of driver.
Signed-off-by: Yu'an Wang wangyuan46@huawei.com Reviewed-by: Cheng Hu hucheng.hu@huawei.com Reviewed-by: Guangwei Zhou zhouguangwei5@huawei.com Reviewed-by: Junxian Liu liujunxian3@huawei.com Signed-off-by: Yang Yingliang yangyingliang@huawei.com --- drivers/crypto/hisilicon/hpre/hpre.h | 1 - drivers/crypto/hisilicon/hpre/hpre_main.c | 54 ++++++++++++++----------------- drivers/crypto/hisilicon/qm.c | 22 ++++--------- drivers/crypto/hisilicon/qm.h | 6 ++-- drivers/crypto/hisilicon/rde/rde_main.c | 2 ++ drivers/crypto/hisilicon/zip/zip_main.c | 2 ++ 6 files changed, 38 insertions(+), 49 deletions(-)
diff --git a/drivers/crypto/hisilicon/hpre/hpre.h b/drivers/crypto/hisilicon/hpre/hpre.h index 3ac02ef..42b2f2a 100644 --- a/drivers/crypto/hisilicon/hpre/hpre.h +++ b/drivers/crypto/hisilicon/hpre/hpre.h @@ -18,7 +18,6 @@ enum { HPRE_CLUSTERS_NUM, };
- enum hpre_ctrl_dbgfs_file { HPRE_CURRENT_QM, HPRE_CLEAR_ENABLE, diff --git a/drivers/crypto/hisilicon/hpre/hpre_main.c b/drivers/crypto/hisilicon/hpre/hpre_main.c index 4dc0d3e..f727158 100644 --- a/drivers/crypto/hisilicon/hpre/hpre_main.c +++ b/drivers/crypto/hisilicon/hpre/hpre_main.c @@ -435,8 +435,7 @@ static int hpre_current_qm_write(struct hpre_debugfs_file *file, u32 val) vfq_num = (qm->ctrl_q_num - qm->qp_num) / num_vfs; if (val == num_vfs) { qm->debug.curr_qm_qp_num = - qm->ctrl_q_num - qm->qp_num - - (num_vfs - 1) * vfq_num; + qm->ctrl_q_num - qm->qp_num - (num_vfs - 1) * vfq_num; } else { qm->debug.curr_qm_qp_num = vfq_num; } @@ -592,7 +591,7 @@ static ssize_t hpre_ctrl_debug_write(struct file *filp, const char __user *buf, static int hpre_create_debugfs_file(struct hpre_debug *dbg, struct dentry *dir, enum hpre_ctrl_dbgfs_file type, int indx) { - struct dentry *tmp, *file_dir; + struct dentry *file_dir; struct hpre *hpre;
if (dir) { @@ -609,10 +608,9 @@ static int hpre_create_debugfs_file(struct hpre_debug *dbg, struct dentry *dir, dbg->files[indx].debug = dbg; dbg->files[indx].type = type; dbg->files[indx].index = indx; - tmp = debugfs_create_file(hpre_debug_file_name[type], 0600, file_dir, - dbg->files + indx, &hpre_ctrl_debug_fops); - if (!tmp) - return -ENOENT; + + debugfs_create_file(hpre_debug_file_name[type], 0600, file_dir, + dbg->files + indx, &hpre_ctrl_debug_fops);
return 0; } @@ -623,7 +621,6 @@ static int hpre_pf_comm_regs_debugfs_init(struct hpre_debug *debug) struct hisi_qm *qm = &hpre->qm; struct device *dev = &qm->pdev->dev; struct debugfs_regset32 *regset; - struct dentry *tmp;
regset = devm_kzalloc(dev, sizeof(*regset), GFP_KERNEL); if (!regset) @@ -633,11 +630,7 @@ static int hpre_pf_comm_regs_debugfs_init(struct hpre_debug *debug) regset->nregs = ARRAY_SIZE(hpre_com_dfx_regs); regset->base = qm->io_base;
- tmp = debugfs_create_regset32("regs", 0444, qm->debug.debug_root, - regset); - if (!tmp) - return -ENOENT; - + debugfs_create_regset32("regs", 0444, qm->debug.debug_root, regset); return 0; }
@@ -648,7 +641,7 @@ static int hpre_cluster_debugfs_init(struct hpre_debug *debug) struct device *dev = &qm->pdev->dev; char buf[HPRE_DBGFS_VAL_MAX_LEN]; struct debugfs_regset32 *regset; - struct dentry *tmp_d, *tmp; + struct dentry *tmp_d; int i, ret;
for (i = 0; i < HPRE_CLUSTERS_NUM; i++) { @@ -657,8 +650,6 @@ static int hpre_cluster_debugfs_init(struct hpre_debug *debug) return -EINVAL;
tmp_d = debugfs_create_dir(buf, qm->debug.debug_root); - if (!tmp_d) - return -ENOENT;
regset = devm_kzalloc(dev, sizeof(*regset), GFP_KERNEL); if (!regset) @@ -668,9 +659,8 @@ static int hpre_cluster_debugfs_init(struct hpre_debug *debug) regset->nregs = ARRAY_SIZE(hpre_cluster_dfx_regs); regset->base = qm->io_base + hpre_cluster_offsets[i];
- tmp = debugfs_create_regset32("regs", 0444, tmp_d, regset); - if (!tmp) - return -ENOENT; + debugfs_create_regset32("regs", 0444, tmp_d, regset); + ret = hpre_create_debugfs_file(debug, tmp_d, HPRE_CLUSTER_CTRL, i + HPRE_CLUSTER_CTRL); if (ret) @@ -705,14 +695,10 @@ static int hpre_debugfs_init(struct hisi_qm *qm) { struct hpre *hpre = container_of(qm, struct hpre, qm); struct device *dev = &qm->pdev->dev; - struct dentry *dir; int ret;
- dir = debugfs_create_dir(dev_name(dev), hpre_debugfs_root); - if (!dir) - return -ENOENT; - - qm->debug.debug_root = dir; + qm->debug.debug_root = debugfs_create_dir(dev_name(dev), + hpre_debugfs_root);
ret = hisi_qm_debug_init(qm); if (ret) @@ -730,6 +716,11 @@ static int hpre_debugfs_init(struct hisi_qm *qm) return ret; }
+static void hpre_debugfs_exit(struct hisi_qm *qm) +{ + debugfs_remove_recursive(qm->debug.debug_root); +} + static int hpre_qm_pre_init(struct hisi_qm *qm, struct pci_dev *pdev) { int ret; @@ -929,7 +920,8 @@ static void hpre_remove(struct pci_dev *pdev) hpre_cnt_regs_clear(qm); qm->debug.curr_qm_qp_num = 0; } - debugfs_remove_recursive(qm->debug.debug_root); + + hpre_debugfs_exit(qm); hisi_qm_stop(qm, QM_NORMAL);
if (qm->fun_type == QM_HW_PF) @@ -967,19 +959,23 @@ static void hpre_register_debugfs(void) hpre_debugfs_root = NULL; }
+static void hpre_unregister_debugfs(void) +{ + debugfs_remove_recursive(hpre_debugfs_root); +} + static int __init hpre_init(void) { int ret;
INIT_LIST_HEAD(&hpre_devices.list); mutex_init(&hpre_devices.lock); - hpre_devices.check = NULL;
hpre_register_debugfs();
ret = pci_register_driver(&hpre_pci_driver); if (ret) { - debugfs_remove_recursive(hpre_debugfs_root); + hpre_unregister_debugfs(); pr_err("hpre: can't register hisi hpre driver.\n"); }
@@ -989,7 +985,7 @@ static int __init hpre_init(void) static void __exit hpre_exit(void) { pci_unregister_driver(&hpre_pci_driver); - debugfs_remove_recursive(hpre_debugfs_root); + hpre_unregister_debugfs(); }
module_init(hpre_init); diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index 6a5337a..d3429e7 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -1428,6 +1428,7 @@ static int qm_cq_ctx_cfg(struct hisi_qp *qp, int qp_id, int pasid) qp->c_flag << QM_CQ_FLAG_SHIFT);
ret = qm_mb(qm, QM_MB_CMD_CQC, cqc_dma, qp_id, 0); + dma_unmap_single(dev, cqc_dma, sizeof(struct qm_cqc), DMA_TO_DEVICE); kfree(cqc);
@@ -2330,6 +2331,7 @@ static int qm_aeq_ctx_cfg(struct hisi_qm *qm) aeqc->base_h = cpu_to_le32(upper_32_bits(qm->aeqe_dma)); aeqc->dw6 = cpu_to_le32((QM_Q_DEPTH - 1) | (1 << QM_EQC_PHASE_SHIFT)); ret = qm_mb(qm, QM_MB_CMD_AEQC, aeqc_dma, 0, 0); + dma_unmap_single(dev, aeqc_dma, sizeof(struct qm_aeqc), DMA_TO_DEVICE); kfree(aeqc);
@@ -2384,13 +2386,6 @@ static int __hisi_qm_start(struct hisi_qm *qm) QM_INIT_BUF(qm, sqc, qm->qp_num); QM_INIT_BUF(qm, cqc, qm->qp_num);
-#ifdef CONFIG_CRYPTO_QM_UACCE - /* get reserved dma memory */ - qm->reserve = qm->qdma.va + off; - qm->reserve_dma = qm->qdma.dma + off; - off += PAGE_SIZE; -#endif - ret = qm_eq_aeq_ctx_cfg(qm); if (ret) return ret; @@ -2681,7 +2676,7 @@ void hisi_qm_debug_regs_clear(struct hisi_qm *qm) */ int hisi_qm_debug_init(struct hisi_qm *qm) { - struct dentry *qm_d, *qm_regs; + struct dentry *qm_d; int i, ret;
qm_d = debugfs_create_dir("qm", qm->debug.debug_root); @@ -2697,12 +2692,7 @@ int hisi_qm_debug_init(struct hisi_qm *qm) goto failed_to_create; }
- qm_regs = debugfs_create_file("regs", 0444, qm->debug.qm_d, qm, - &qm_regs_fops); - if (IS_ERR(qm_regs)) { - ret = -ENOENT; - goto failed_to_create; - } + debugfs_create_file("regs", 0444, qm->debug.qm_d, qm, &qm_regs_fops);
return 0;
@@ -3038,7 +3028,9 @@ int hisi_qm_sriov_enable(struct pci_dev *pdev, int max_vfs) { struct hisi_qm *qm = pci_get_drvdata(pdev); int pre_existing_vfs, num_vfs, ret; + int total_vfs;
+ total_vfs = pci_sriov_get_totalvfs(pdev); pre_existing_vfs = pci_num_vf(pdev); if (pre_existing_vfs) { pci_err(pdev, @@ -3046,7 +3038,7 @@ int hisi_qm_sriov_enable(struct pci_dev *pdev, int max_vfs) return 0; }
- num_vfs = min_t(int, max_vfs, QM_MAX_VFS_NUM); + num_vfs = min_t(int, max_vfs, total_vfs); ret = qm_vf_q_assign(qm, num_vfs); if (ret) { pci_err(pdev, "Can't assign queues for VF!\n"); diff --git a/drivers/crypto/hisilicon/qm.h b/drivers/crypto/hisilicon/qm.h index 36e888f..79e29ee 100644 --- a/drivers/crypto/hisilicon/qm.h +++ b/drivers/crypto/hisilicon/qm.h @@ -19,7 +19,7 @@
#define QNUM_V1 4096 #define QNUM_V2 1024 -#define QM_MAX_VFS_NUM 63 +#define QM_MAX_VFS_NUM_V2 63 /* qm user domain */ #define QM_ARUSER_M_CFG_1 0x100088 #define AXUSER_SNOOP_ENABLE BIT(30) @@ -322,9 +322,7 @@ struct hisi_qm { resource_size_t size; struct uacce uacce; const char *algs; - void *reserve; int uacce_mode; - dma_addr_t reserve_dma; #endif struct workqueue_struct *wq; struct work_struct work; @@ -423,7 +421,7 @@ static inline int vf_num_set(const char *val, const struct kernel_param *kp) if (ret < 0) return ret;
- if (n > QM_MAX_VFS_NUM) + if (n > QM_MAX_VFS_NUM_V2) return -ERANGE;
return param_set_int(val, kp); diff --git a/drivers/crypto/hisilicon/rde/rde_main.c b/drivers/crypto/hisilicon/rde/rde_main.c index 318d4a0..946532f 100644 --- a/drivers/crypto/hisilicon/rde/rde_main.c +++ b/drivers/crypto/hisilicon/rde/rde_main.c @@ -13,6 +13,7 @@ #include <linux/bitops.h> #include <linux/debugfs.h> #include <linux/init.h> +#include <linux/iommu.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> @@ -20,6 +21,7 @@ #include <linux/seq_file.h> #include <linux/topology.h> #include <linux/uacce.h> + #include "rde.h"
#define HRDE_QUEUE_NUM_V1 4096 diff --git a/drivers/crypto/hisilicon/zip/zip_main.c b/drivers/crypto/hisilicon/zip/zip_main.c index 54681dc..83e2869 100644 --- a/drivers/crypto/hisilicon/zip/zip_main.c +++ b/drivers/crypto/hisilicon/zip/zip_main.c @@ -858,8 +858,10 @@ static void hisi_zip_remove(struct pci_dev *pdev) { struct hisi_qm *qm = pci_get_drvdata(pdev);
+#ifdef CONFIG_CRYPTO_QM_UACCE if (uacce_mode != UACCE_MODE_NOUACCE) hisi_qm_remove_wait_delay(qm, &zip_devices); +#endif
if (qm->fun_type == QM_HW_PF && qm->vfs_num) hisi_qm_sriov_disable(pdev, NULL);
From: Vladimir Murzin vladimir.murzin@arm.com
mainline inclusion from mainline-v5.6-rc1 commit 98346023365931948b78436ae761544b09035b3b category: bugfix bugzilla: 28680 CVE: NA
-------------------------------------------------------------------------
arm64 provides always working implementation of futex_atomic_cmpxchg_inatomic(), so there is no need to check it runtime.
Reported-by: Piyush swami Piyush.swami@arm.com Signed-off-by: Vladimir Murzin vladimir.murzin@arm.com Signed-off-by: Will Deacon will@kernel.org Conflicts: arch/arm64/Kconfig
Signed-off-by: Zhen Lei thunder.leizhen@huawei.com Reviewed-by: Hanjun Guo guohanjun@huawei.com Signed-off-by: Yang Yingliang yangyingliang@huawei.com --- arch/arm64/Kconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 95f8b6b..8ef0c73 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -143,6 +143,7 @@ config ARM64 select HAVE_PERF_REGS select HAVE_PERF_USER_STACK_DUMP select HAVE_REGS_AND_STACK_ACCESS_API + select HAVE_FUTEX_CMPXCHG if FUTEX select HAVE_RCU_TABLE_FREE select HAVE_RCU_TABLE_INVALIDATE select HAVE_RSEQ