From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.11-rc1 commit 4689f56796f8 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Process the JSONs to find support for "system" events, which are not tied to a specific CPUID.

A "COMPAT" property is now used to match against the namespace ID from the kernel PMU driver.

The generated pmu-events.c will now have 2 tables:

a. CPU events, as before. b. New pmu_sys_event_tables[] table, which will have events matched to specific SoCs.

It will look like this:

struct pmu_event pme_hisilicon_hip09_sys[] = { { .name = "cycles", .compat = "0x00030736", .event = "event=0", .desc = "Clock cycles", .topic = "smmu v3 pmcg", .long_desc = "Clock cycles", }, { .name = "smmuv3_pmcg.l1_tlb", .compat = "0x00030736", .event = "event=0x8a", .desc = "SMMUv3 PMCG l1_tlb. Unit: smmuv3_pmcg ", .topic = "smmu v3 pmcg", .long_desc = "SMMUv3 PMCG l1_tlb", .pmu = "smmuv3_pmcg", }, ... };

struct pmu_event pme_arm_cortex_a53[] = { { .name = "ext_mem_req", .event = "event=0xc0", .desc = "External memory request", .topic = "memory", }, { .name = "ext_mem_req_nc", .event = "event=0xc1", .desc = "Non-cacheable external memory request", .topic = "memory", }, ... };

struct pmu_event pme_hisilicon_hip09_cpu[] = { { .name = "l2d_cache_refill_wr", .event = "event=0x53", .desc = "L2D cache refill, write", .topic = "core imp def", .long_desc = "Attributable Level 2 data cache refill, write", }, ... };

struct pmu_events_map pmu_events_map[] = { { .cpuid = "0x00000000410fd030", .version = "v1", .type = "core", .table = pme_arm_cortex_a53 }, { .cpuid = "0x00000000480fd010", .version = "v1", .type = "core", .table = pme_hisilicon_hip09_cpu }, { .table = 0 }, };

struct pmu_event pme_hisilicon_hip09_cpu[] = { { .name = "uncore_hisi_l3c.rd_cpipe", .event = "event=0", .desc = "Total read accesses. Unit: hisi_sccl,l3c ", .topic = "uncore l3c", .long_desc = "Total read accesses", .pmu = "hisi_sccl,l3c", }, { .name = "uncore_hisi_l3c.wr_cpipe", .event = "event=0x1", .desc = "Total write accesses. Unit: hisi_sccl,l3c ", .topic = "uncore l3c", .long_desc = "Total write accesses", .pmu = "hisi_sccl,l3c", }, ... };

struct pmu_sys_events pmu_sys_event_tables[] = { { .table = pme_hisilicon_hip09_sys, }, ... };

Committer notes:

Added the fix for architectures without PMU events, provided by John after I reported the build failing in such systems.

Link: https://lore.kernel.org/lkml/650baaf2-36b6-a9e2-ff49-963ef864c1f3@huawei.com...

Signed-off-by: John Garry john.garry@huawei.com Acked-by: Kajol Jain kjain@linux.ibm.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Andi Kleen ak@linux.intel.com Cc: Ian Rogers irogers@google.com Cc: Jiri Olsa jolsa@redhat.com Cc: Joakim Zhang qiangqing.zhang@nxp.com Cc: Kan Liang kan.liang@linux.intel.com Cc: Kim Phillips kim.phillips@amd.com Cc: Leo Yan leo.yan@linaro.org Cc: Mark Rutland mark.rutland@arm.com Cc: Mathieu Poirier mathieu.poirier@linaro.org Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: Shaokun Zhang zhangshaokun@hisilicon.com Cc: Will Deacon will@kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@huawei.com Link: http://lore.kernel.org/lkml/1607080216-36968-3-git-send-email-john.garry@hua... Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/pmu-events/jevents.c | 86 +++++++++++++++++++++++++++++- tools/perf/pmu-events/pmu-events.h | 6 +++ 2 files changed, 91 insertions(+), 1 deletion(-)

diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index ce43fa4c85f4..7dde6ad007ea 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -55,6 +55,7 @@ char *prog;

struct json_event { char *name; + char *compat; char *event; char *desc; char *long_desc; @@ -82,6 +83,23 @@ enum aggr_mode_class convert(const char *aggr_mode)

typedef int (*func)(void *data, struct json_event *je);

+static LIST_HEAD(sys_event_tables); + +struct sys_event_table { + struct list_head list; + char *soc_id; +}; + +static void free_sys_event_tables(void) +{ + struct sys_event_table *et, *next; + + list_for_each_entry_safe(et, next, &sys_event_tables, list) { + free(et->soc_id); + free(et); + } +} + int eprintf(int level, int var, const char *fmt, ...) {

@@ -360,6 +378,8 @@ static int print_events_table_entry(void *data, struct json_event *je) if (je->event) fprintf(outfp, "\t.event = "%s",\n", je->event); fprintf(outfp, "\t.desc = "%s",\n", je->desc); + if (je->compat) + fprintf(outfp, "\t.compat = "%s",\n", je->compat); fprintf(outfp, "\t.topic = "%s",\n", topic); if (je->long_desc && je->long_desc[0]) fprintf(outfp, "\t.long_desc = "%s",\n", je->long_desc); @@ -390,6 +410,7 @@ struct event_struct { struct list_head list; char *name; char *event; + char *compat; char *desc; char *long_desc; char *pmu; @@ -583,6 +604,8 @@ static int json_events(const char *fn, free(code); } else if (json_streq(map, field, "EventName")) { addfield(map, &je.name, "", "", val); + } else if (json_streq(map, field, "Compat")) { + addfield(map, &je.compat, "", "", val); } else if (json_streq(map, field, "BriefDescription")) { addfield(map, &je.desc, "", "", val); fixdesc(je.desc); @@ -683,6 +706,7 @@ static int json_events(const char *fn, free(event); free(je.desc); free(je.name); + free(je.compat); free(je.long_desc); free(extra_desc); free(je.pmu); @@ -747,6 +771,15 @@ static char *file_name_to_table_name(char *fname) return tblname; }

+static bool is_sys_dir(char *fname) +{ + size_t len = strlen(fname), len2 = strlen("/sys"); + + if (len2 > len) + return false; + return !strcmp(fname+len-len2, "/sys"); +} + static void print_mapping_table_prefix(FILE *outfp) { fprintf(outfp, "struct pmu_events_map pmu_events_map[] = {\n"); @@ -781,6 +814,33 @@ static void print_mapping_test_table(FILE *outfp) fprintf(outfp, "},\n"); }

+static void print_system_event_mapping_table_prefix(FILE *outfp) +{ + fprintf(outfp, "\nstruct pmu_sys_events pmu_sys_event_tables[] = {"); +} + +static void print_system_event_mapping_table_suffix(FILE *outfp) +{ + fprintf(outfp, "\n\t{\n\t\t.table = 0\n\t},"); + fprintf(outfp, "\n};\n"); +} + +static int process_system_event_tables(FILE *outfp) +{ + struct sys_event_table *sys_event_table; + + print_system_event_mapping_table_prefix(outfp); + + list_for_each_entry(sys_event_table, &sys_event_tables, list) { + fprintf(outfp, "\n\t{\n\t\t.table = %s,\n\t},", + sys_event_table->soc_id); + } + + print_system_event_mapping_table_suffix(outfp); + + return 0; +} + static int process_mapfile(FILE *outfp, char *fpath) { int n = 16384; @@ -886,6 +946,8 @@ static void create_empty_mapping(const char *output_file) fprintf(outfp, "#include "pmu-events/pmu-events.h"\n"); print_mapping_table_prefix(outfp); print_mapping_table_suffix(outfp); + print_system_event_mapping_table_prefix(outfp); + print_system_event_mapping_table_suffix(outfp); fclose(outfp); }

@@ -1026,6 +1088,22 @@ static int process_one_file(const char *fpath, const struct stat *sb, return -1; }

+ if (is_sys_dir(bname)) { + struct sys_event_table *sys_event_table; + + sys_event_table = malloc(sizeof(*sys_event_table)); + if (!sys_event_table) + return -1; + + sys_event_table->soc_id = strdup(tblname); + if (!sys_event_table->soc_id) { + free(sys_event_table); + return -1; + } + list_add_tail(&sys_event_table->list, + &sys_event_tables); + } + print_events_table_prefix(eventsfp, tblname); return 0; } @@ -1181,10 +1259,16 @@ int main(int argc, char *argv[]) }

rc = process_mapfile(eventsfp, mapfile); - fclose(eventsfp); if (rc) { pr_info("%s: Error processing mapfile %s\n", prog, mapfile); /* Make build fail */ + ret = 1; + goto err_close_eventsfp; + } + + rc = process_system_event_tables(eventsfp); + fclose(eventsfp); + if (rc) { ret = 1; goto err_out; } diff --git a/tools/perf/pmu-events/pmu-events.h b/tools/perf/pmu-events/pmu-events.h index 7da1a3743b77..d1172f6aebf1 100644 --- a/tools/perf/pmu-events/pmu-events.h +++ b/tools/perf/pmu-events/pmu-events.h @@ -12,6 +12,7 @@ enum aggr_mode_class { */ struct pmu_event { const char *name; + const char *compat; const char *event; const char *desc; const char *topic; @@ -43,10 +44,15 @@ struct pmu_events_map { struct pmu_event *table; };

+struct pmu_sys_events { + struct pmu_event *table; +}; + /* * Global table mapping each known CPU for the architecture to its * table of PMU events. */ extern struct pmu_events_map pmu_events_map[]; +extern struct pmu_sys_events pmu_sys_event_tables[];

#endif

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.11-rc1 commit 4513c719c6f1 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Add pmu_add_sys_aliases() to add system PMU events aliases.

For adding system PMU events, iterate through all the events for all SoC event tables in pmu_sys_event_tables[].

Matches must satisfy both: - PMU identifier matches event "compat" value - event "Unit" member must match, same as uncore event aliases matched by CPUID

Signed-off-by: John Garry john.garry@huawei.com Acked-by: Kajol Jain kjain@linux.ibm.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Andi Kleen ak@linux.intel.com Cc: Ian Rogers irogers@google.com Cc: Jiri Olsa jolsa@redhat.com Cc: Joakim Zhang qiangqing.zhang@nxp.com Cc: Kan Liang kan.liang@linux.intel.com Cc: Kim Phillips kim.phillips@amd.com Cc: Leo Yan leo.yan@linaro.org Cc: Mark Rutland mark.rutland@arm.com Cc: Mathieu Poirier mathieu.poirier@linaro.org Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: Shaokun Zhang zhangshaokun@hisilicon.com Cc: Will Deacon will@kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@huawei.com Link: http://lore.kernel.org/lkml/1607080216-36968-5-git-send-email-john.garry@hua... Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/util/pmu.c | 78 +++++++++++++++++++++++++++++++++++++++++++ tools/perf/util/pmu.h | 2 ++ 2 files changed, 80 insertions(+)

diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 26fde8e25259..ad57c2259893 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -817,6 +817,83 @@ static void pmu_add_cpu_aliases(struct list_head *head, struct perf_pmu *pmu) pmu_add_cpu_aliases_map(head, pmu, map); }

+void pmu_for_each_sys_event(pmu_sys_event_iter_fn fn, void *data) +{ + int i = 0; + + while (1) { + struct pmu_sys_events *event_table; + int j = 0; + + event_table = &pmu_sys_event_tables[i++]; + + if (!event_table->table) + break; + + while (1) { + struct pmu_event *pe = &event_table->table[j++]; + int ret; + + if (!pe->name && !pe->metric_group && !pe->metric_name) + break; + + ret = fn(pe, data); + if (ret) + break; + } + } +} + +struct pmu_sys_event_iter_data { + struct list_head *head; + struct perf_pmu *pmu; +}; + +static int pmu_add_sys_aliases_iter_fn(struct pmu_event *pe, void *data) +{ + struct pmu_sys_event_iter_data *idata = data; + struct perf_pmu *pmu = idata->pmu; + + if (!pe->name) { + if (pe->metric_group || pe->metric_name) + return 0; + return -EINVAL; + } + + if (!pe->compat || !pe->pmu) + return 0; + + if (!strcmp(pmu->id, pe->compat) && + pmu_uncore_alias_match(pe->pmu, pmu->name)) { + __perf_pmu__new_alias(idata->head, NULL, + (char *)pe->name, + (char *)pe->desc, + (char *)pe->event, + (char *)pe->long_desc, + (char *)pe->topic, + (char *)pe->unit, + (char *)pe->perpkg, + (char *)pe->metric_expr, + (char *)pe->metric_name, + (char *)pe->deprecated); + } + + return 0; +} + +static void pmu_add_sys_aliases(struct list_head *head, struct perf_pmu *pmu) +{ + struct pmu_sys_event_iter_data idata = { + .head = head, + .pmu = pmu, + }; + + if (!pmu->id) + return; + + pmu_for_each_sys_event(pmu_add_sys_aliases_iter_fn, &idata); +} + struct perf_event_attr * __weak perf_pmu__get_default_config(struct perf_pmu *pmu __maybe_unused) { @@ -872,6 +949,7 @@ static struct perf_pmu *pmu_lookup(const char *name) pmu->id = pmu_id(name); pmu->max_precise = pmu_max_precise(name); pmu_add_cpu_aliases(&aliases, pmu); + pmu_add_sys_aliases(&aliases, pmu);

INIT_LIST_HEAD(&pmu->format); INIT_LIST_HEAD(&pmu->aliases); diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h index d7e84331d9b9..012317229488 100644 --- a/tools/perf/util/pmu.h +++ b/tools/perf/util/pmu.h @@ -118,6 +118,8 @@ struct pmu_events_map *pmu_events_map__find(void); bool pmu_uncore_alias_match(const char *pmu_name, const char *name); void perf_pmu_free_alias(struct perf_pmu_alias *alias);

+typedef int (*pmu_sys_event_iter_fn)(struct pmu_event *pe, void *data); +void pmu_for_each_sys_event(pmu_sys_event_iter_fn fn, void *data); int perf_pmu__convert_scale(const char *scale, char **end, double *sval);

int perf_pmu__caps_parse(struct perf_pmu *pmu);

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.11-rc1 commit c2337d67199a category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Support for metric expressions using aliases which cover multiple PMUs is broken. Consider the following test metric expression:

"MetricExpr": "UNC_CBO_XSNP_RESPONSE.MISS_XCORE * UNC_CBO_XSNP_RESPONSE.MISS_EVICTION"

When used on my broadwell, "perf stat" gives:

unc_cbo_xsnp_response.miss_eviction -> uncore_cbox_1/umask=0x81,event=0x22/ unc_cbo_xsnp_response.miss_eviction -> uncore_cbox_0/umask=0x81,event=0x22/ unc_cbo_xsnp_response.miss_xcore -> uncore_cbox_1/umask=0x41,event=0x22/ unc_cbo_xsnp_response.miss_xcore -> uncore_cbox_0/umask=0x41,event=0x22/ Control descriptor is not initialized unc_cbo_xsnp_response.miss_eviction: 3645925 1000850523 1000850523 unc_cbo_xsnp_response.miss_xcore: 106850 1000850523 1000850523

Performance counter stats for 'system wide':

3,645,925 unc_cbo_xsnp_response.miss_eviction # 389567086250.00 test_metric_inc 106,850 unc_cbo_xsnp_response.miss_xcore

1.000883096 seconds time elapsed

Notice that only the results from one PMU are included. Fix the logic of find_evsel_group() to enable events which apply to multiple PMUs, by checking if the event pmu_name matches that of the metric event.

With that, "perf stat" now gives:

unc_cbo_xsnp_response.miss_eviction -> uncore_cbox_1/umask=0x81,event=0x22/ unc_cbo_xsnp_response.miss_eviction -> uncore_cbox_0/umask=0x81,event=0x22/ unc_cbo_xsnp_response.miss_xcore -> uncore_cbox_1/umask=0x41,event=0x22/ unc_cbo_xsnp_response.miss_xcore -> uncore_cbox_0/umask=0x41,event=0x22/ Control descriptor is not initialized unc_cbo_xsnp_response.miss_eviction: 4237983 1000904100 1000904100 unc_cbo_xsnp_response.miss_xcore: 218643 1000904100 1000904100 unc_cbo_xsnp_response.miss_eviction: 4254148 1000902629 1000902629 unc_cbo_xsnp_response.miss_xcore: 213352 1000902629 1000902629

Performance counter stats for 'system wide':

4,237,983 unc_cbo_xsnp_response.miss_eviction # 3668558131345.00 test_metric_inc 218,643 unc_cbo_xsnp_response.miss_xcore 4,254,148 unc_cbo_xsnp_response.miss_eviction 213,352 unc_cbo_xsnp_response.miss_xcore

1.000938151 seconds time elapsed

Signed-off-by: John Garry john.garry@huawei.com Acked-by: Kajol Jain kjain@linux.ibm.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Andi Kleen ak@linux.intel.com Cc: Ian Rogers irogers@google.com Cc: Jiri Olsa jolsa@redhat.com Cc: Joakim Zhang qiangqing.zhang@nxp.com Cc: Kan Liang kan.liang@linux.intel.com Cc: Kim Phillips kim.phillips@amd.com Cc: Leo Yan leo.yan@linaro.org Cc: Mark Rutland mark.rutland@arm.com Cc: Mathieu Poirier mathieu.poirier@linaro.org Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: Shaokun Zhang zhangshaokun@hisilicon.com Cc: Will Deacon will@kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@huawei.com Link: http://lore.kernel.org/lkml/1607080216-36968-7-git-send-email-john.garry@hua... Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/util/metricgroup.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c index 52a3e528f431..ceb09715cecf 100644 --- a/tools/perf/util/metricgroup.c +++ b/tools/perf/util/metricgroup.c @@ -279,7 +279,9 @@ static struct evsel *find_evsel_group(struct evlist *perf_evlist, * when then group is left. */ if (!has_constraint && - ev->leader != metric_events[i]->leader) + ev->leader != metric_events[i]->leader && + !strcmp(ev->leader->pmu_name, + metric_events[i]->leader->pmu_name)) break; if (!strcmp(metric_events[i]->name, ev->name)) { set_bit(ev->idx, evlist_used);

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.11-rc1 commit a36fadb17c27 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Currently printing metricgroups for core- or uncore-based events matched by CPUID is supported.

Extend this for system events.

Signed-off-by: John Garry john.garry@huawei.com Acked-by: Kajol Jain kjain@linux.ibm.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Andi Kleen ak@linux.intel.com Cc: Ian Rogers irogers@google.com Cc: Jiri Olsa jolsa@redhat.com Cc: Joakim Zhang qiangqing.zhang@nxp.com Cc: Kan Liang kan.liang@linux.intel.com Cc: Kim Phillips kim.phillips@amd.com Cc: Leo Yan leo.yan@linaro.org Cc: Mark Rutland mark.rutland@arm.com Cc: Mathieu Poirier mathieu.poirier@linaro.org Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: Shaokun Zhang zhangshaokun@hisilicon.com Cc: Will Deacon will@kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@huawei.com Link: http://lore.kernel.org/lkml/1607080216-36968-9-git-send-email-john.garry@hua... [ Reorder 'struct metricgroup_print_sys_idata' field to avoid alignment holes ] Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/util/metricgroup.c | 64 ++++++++++++++++++++++++++++++++--- 1 file changed, 60 insertions(+), 4 deletions(-)

diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c index 82d6c9936e1e..5df4cf4711da 100644 --- a/tools/perf/util/metricgroup.c +++ b/tools/perf/util/metricgroup.c @@ -559,6 +559,49 @@ static int metricgroup__print_pmu_event(struct pmu_event *pe, return 0; }

+struct metricgroup_print_sys_idata { + struct strlist *metriclist; + char *filter; + struct rblist *groups; + bool metricgroups; + bool raw; + bool details; +}; + +typedef int (*metricgroup_sys_event_iter_fn)(struct pmu_event *pe, void *); + +struct metricgroup_iter_data { + metricgroup_sys_event_iter_fn fn; + void *data; +}; + +static int metricgroup__sys_event_iter(struct pmu_event *pe, void *data) +{ + struct metricgroup_iter_data *d = data; + struct perf_pmu *pmu = NULL; + + if (!pe->metric_expr || !pe->compat) + return 0; + + while ((pmu = perf_pmu__scan(pmu))) { + + if (!pmu->id || strcmp(pmu->id, pe->compat)) + continue; + + return d->fn(pe, d->data); + } + + return 0; +} + +static int metricgroup__print_sys_event_iter(struct pmu_event *pe, void *data) +{ + struct metricgroup_print_sys_idata *d = data; + + return metricgroup__print_pmu_event(pe, d->metricgroups, d->filter, d->raw, + d->details, d->groups, d->metriclist); +} + void metricgroup__print(bool metrics, bool metricgroups, char *filter, bool raw, bool details) { @@ -569,9 +612,6 @@ void metricgroup__print(bool metrics, bool metricgroups, char *filter, struct rb_node *node, *next; struct strlist *metriclist = NULL;

- if (!map) - return; - if (!metricgroups) { metriclist = strlist__new(NULL, NULL); if (!metriclist) @@ -582,7 +622,7 @@ void metricgroup__print(bool metrics, bool metricgroups, char *filter, groups.node_new = mep_new; groups.node_cmp = mep_cmp; groups.node_delete = mep_delete; - for (i = 0; ; i++) { + for (i = 0; map; i++) { pe = &map->table[i];

if (!pe->name && !pe->metric_group && !pe->metric_name) @@ -595,6 +635,22 @@ void metricgroup__print(bool metrics, bool metricgroups, char *filter, return; }

+ { + struct metricgroup_iter_data data = { + .fn = metricgroup__print_sys_event_iter, + .data = (void *) &(struct metricgroup_print_sys_idata){ + .metriclist = metriclist, + .metricgroups = metricgroups, + .filter = filter, + .raw = raw, + .details = details, + .groups = &groups, + }, + }; + + pmu_for_each_sys_event(metricgroup__sys_event_iter, &data); + } + if (!filter || !rblist__empty(&groups)) { if (metricgroups && !raw) printf("\nMetric Groups:\n\n");

From: Jin Yao yao.jin@linux.intel.com

mainline inclusion from mainline-v5.14-rc1 commit c47a5599eda3 category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Some different PMU types may have the same substring. For example, on Icelake server we have PMU types "uncore_imc" and "uncore_imc_free_running". Both PMU types have the substring "uncore_imc". But the parser wrongly thinks they are the same PMU type.

We enable an imc event, perf stat -e uncore_imc/event=0xe3/ -a -- sleep 1

Perf actually expands the event to:

uncore_imc_0/event=0xe3/ uncore_imc_1/event=0xe3/ uncore_imc_2/event=0xe3/ uncore_imc_3/event=0xe3/ uncore_imc_4/event=0xe3/ uncore_imc_5/event=0xe3/ uncore_imc_6/event=0xe3/ uncore_imc_7/event=0xe3/ uncore_imc_free_running_0/event=0xe3/ uncore_imc_free_running_1/event=0xe3/ uncore_imc_free_running_3/event=0xe3/ uncore_imc_free_running_4/event=0xe3/

That's because the "uncore_imc_free_running" matches the pattern "uncore_imc*".

Now we check that the last characters of PMU name is '_<digit>'.

For example, for pattern "uncore_imc*", "uncore_imc_0" is parsed ok, but "uncore_imc_free_running_0" fails.

Fixes: b2b9d3a3f0211c5d ("perf pmu: Support wildcards on pmu name in dynamic pmu events") Signed-off-by: Jin Yao yao.jin@linux.intel.com Reviewed-by: Kan Liang kan.liang@linux.intel.com Acked-by: Jiri Olsa jolsa@redhat.com Cc: Agustin Vega-Frias agustinv@codeaurora.org Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Andi Kleen ak@linux.intel.com Cc: Peter Zijlstra peterz@infradead.org Link: http://lore.kernel.org/lkml/20210701064253.1175-1-yao.jin@linux.intel.com Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/util/parse-events.y | 2 +- tools/perf/util/pmu.c | 36 +++++++++++++++++++++++++++++++++- tools/perf/util/pmu.h | 2 ++ 3 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/tools/perf/util/parse-events.y b/tools/perf/util/parse-events.y index d5b6aff82f21..3adbd2049c88 100644 --- a/tools/perf/util/parse-events.y +++ b/tools/perf/util/parse-events.y @@ -312,7 +312,7 @@ PE_NAME opt_pmu_config if (!strncmp(name, "uncore_", 7) && strncmp($1, "uncore_", 7)) name += 7; - if (!fnmatch(pattern, name, 0)) { + if (!perf_pmu__match(pattern, name, $1)) { if (parse_events_copy_term_list(orig_terms, &terms)) CLEANUP_YYABORT; if (!parse_events_add_pmu(_parse_state, list, pmu->name, terms, true, false)) diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index ad57c2259893..59ff23aeca7e 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -3,6 +3,7 @@ #include <linux/compiler.h> #include <linux/string.h> #include <linux/zalloc.h> +#include <linux/ctype.h> #include <subcmd/pager.h> #include <sys/types.h> #include <errno.h> @@ -17,6 +18,7 @@ #include <locale.h> #include <regex.h> #include <perf/cpumap.h> +#include <fnmatch.h> #include "debug.h" #include "evsel.h" #include "pmu.h" @@ -717,6 +719,27 @@ struct pmu_events_map *perf_pmu__find_map(struct perf_pmu *pmu) return map; }

+static bool perf_pmu__valid_suffix(char *pmu_name, char *tok) +{ + char *p; + + if (strncmp(pmu_name, tok, strlen(tok))) + return false; + + p = pmu_name + strlen(tok); + if (*p == 0) + return true; + + if (*p != '_') + return false; + + ++p; + if (*p == 0 || !isdigit(*p)) + return false; + + return true; +} + struct pmu_events_map *__weak pmu_events_map__find(void) { return perf_pmu__find_map(NULL); @@ -750,7 +773,7 @@ bool pmu_uncore_alias_match(const char *pmu_name, const char *name) */ for (; tok; name += strlen(tok), tok = strtok_r(NULL, ",", &tmp)) { name = strstr(name, tok); - if (!name) { + if (!name || !perf_pmu__valid_suffix((char *)name, tok)) { res = false; goto out; } @@ -1817,3 +1840,14 @@ int perf_pmu__caps_parse(struct perf_pmu *pmu)

return nr_caps; } + +int perf_pmu__match(char *pattern, char *name, char *tok) +{ + if (fnmatch(pattern, name, 0)) + return -1; + + if (tok && !perf_pmu__valid_suffix(name, tok)) + return -1; + + return 0; +} diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h index 012317229488..cf3d06e85469 100644 --- a/tools/perf/util/pmu.h +++ b/tools/perf/util/pmu.h @@ -124,4 +124,6 @@ int perf_pmu__convert_scale(const char *scale, char **end, double *sval);

int perf_pmu__caps_parse(struct perf_pmu *pmu);

+int perf_pmu__match(char *pattern, char *name, char *tok); + #endif /* __PMU_H */

From: Qi Liu liuqi115@huawei.com

driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5

--------------------------------------------------------------------------

pmu_name of DDRC PMU on Hip09 platform is set as "hisi_sllcX_ddrcY_Z", current match method of pmu_name cannot fit DDRC pmu, so modify the method.

Signed-off-by: Qi Liu liuqi115@huawei.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/util/pmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 7d86dcc941d9..8bc3e93292b1 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -739,7 +739,7 @@ static bool perf_pmu__valid_suffix(const char *pmu_name, char *tok)

/* Ensure we end in a number */ while (1) { - if (!isdigit(*p)) + if (!isdigit(*p) && (*p != '_')) return false; if (*(++p) == 0) break;

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.11-rc1 commit 644bf4b0f7ac category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Recently there was an undetected breakage for std arch event support.

Add support in "PMU events" testcase to detect such breakages.

For this, the "test" arch needs has support added to process std arch events. And a test event is added for the test, ifself.

Also add a few code comments to help understand the code a bit better.

Committer testing:

Before:

# perf test -vv pmu |& grep l3_cache_rd #

After:

# perf test -vv pmu |& grep l3_cache_rd testing event table l3_cache_rd: pass testing aliases PMU cpu: matched event l3_cache_rd #

Signed-off-by: John Garry john.garry@huawei.com Reviewed-By: Kajol Jainkjain@linux.ibm.com Tested-by: Arnaldo Carvalho de Melo acme@redhat.com Link: https://lore.kernel.org/r/1603364547-197086-3-git-send-email-john.garry@huaw... Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/pmu-events/arch/test/arch-std-events.json | 8 ++++++++ tools/perf/pmu-events/arch/test/test_cpu/cache.json | 5 +++++ tools/perf/pmu-events/jevents.c | 4 ++++ tools/perf/tests/pmu-events.c | 12 ++++++++++++ 4 files changed, 29 insertions(+) create mode 100644 tools/perf/pmu-events/arch/test/arch-std-events.json create mode 100644 tools/perf/pmu-events/arch/test/test_cpu/cache.json

diff --git a/tools/perf/pmu-events/arch/test/arch-std-events.json b/tools/perf/pmu-events/arch/test/arch-std-events.json new file mode 100644 index 000000000000..43f6f729d6ae --- /dev/null +++ b/tools/perf/pmu-events/arch/test/arch-std-events.json @@ -0,0 +1,8 @@ +[ + { + "PublicDescription": "Attributable Level 3 cache access, read", + "EventCode": "0x40", + "EventName": "L3_CACHE_RD", + "BriefDescription": "L3 cache access, read" + } +] diff --git a/tools/perf/pmu-events/arch/test/test_cpu/cache.json b/tools/perf/pmu-events/arch/test/test_cpu/cache.json new file mode 100644 index 000000000000..036d0efdb2bb --- /dev/null +++ b/tools/perf/pmu-events/arch/test/test_cpu/cache.json @@ -0,0 +1,5 @@ +[ + { + "ArchStdEvent": "L3_CACHE_RD" + } +] \ No newline at end of file diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 7dde6ad007ea..9c067a853013 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -1245,6 +1245,10 @@ int main(int argc, char *argv[])

sprintf(ldirname, "%s/test", start_dirname);

+ rc = nftw(ldirname, preprocess_arch_std_files, maxfds, 0); + if (rc) + goto err_processing_std_arch_event_dir; + rc = nftw(ldirname, process_one_file, maxfds, 0); if (rc) goto err_processing_dir; diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c index d2908f41de57..aab154fe9485 100644 --- a/tools/perf/tests/pmu-events.c +++ b/tools/perf/tests/pmu-events.c @@ -79,6 +79,17 @@ static struct perf_pmu_test_event test_cpu_events[] = { .alias_str = "umask=0,(null)=0x30d40,event=0x3a", .alias_long_desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions", }, + { + .event = { + .name = "l3_cache_rd", + .event = "event=0x40", + .desc = "L3 cache access, read", + .long_desc = "Attributable Level 3 cache access, read", + .topic = "cache", + }, + .alias_str = "event=0x40", + .alias_long_desc = "Attributable Level 3 cache access, read", + }, { /* sentinel */ .event = { .name = NULL, @@ -358,6 +369,7 @@ static int __test__pmu_event_aliases(char *pmu_name, int *count) }

+/* Test that aliases generated are as expected */ static int test_aliases(void) { struct perf_pmu *pmu = NULL;

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.15-rc1 commit 19ac3df32f88 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Factor out event comparison which will be used in multiple places.

Also test "pmu" and "compat" fields.

Signed-off-by: John Garry john.garry@huawei.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Ian Rogers irogers@google.com Cc: Ingo Molnar mingo@redhat.com Cc: Jin Yao yao.jin@linux.intel.com Cc: Jiri Olsa jolsa@redhat.com Cc: Mark Rutland mark.rutland@arm.com Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: linuxarm@huawei.com Link: https //lore.kernel.org/r/1627566986-30605-2-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/tests/pmu-events.c | 119 +++++++++++++++++++--------------- 1 file changed, 66 insertions(+), 53 deletions(-)

diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c index aab154fe9485..735e90dfbec0 100644 --- a/tools/perf/tests/pmu-events.c +++ b/tools/perf/tests/pmu-events.c @@ -159,6 +159,71 @@ static struct pmu_events_map *__test_pmu_get_events_map(void) return NULL; }

+static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2) +{ + if (!is_same(e1->desc, e2->desc)) { + pr_debug2("testing event e1 %s: mismatched desc, %s vs %s\n", + e1->name, e1->desc, e2->desc); + return -1; + } + + if (!is_same(e1->topic, e2->topic)) { + pr_debug2("testing event e1 %s: mismatched topic, %s vs %s\n", + e1->name, e1->topic, e2->topic); + return -1; + } + + if (!is_same(e1->long_desc, e2->long_desc)) { + pr_debug2("testing event e1 %s: mismatched long_desc, %s vs %s\n", + e1->name, e1->long_desc, e2->long_desc); + return -1; + } + + if (!is_same(e1->unit, e2->unit)) { + pr_debug2("testing event e1 %s: mismatched unit, %s vs %s\n", + e1->name, e1->unit, e2->unit); + return -1; + } + + if (!is_same(e1->perpkg, e2->perpkg)) { + pr_debug2("testing event e1 %s: mismatched perpkg, %s vs %s\n", + e1->name, e1->perpkg, e2->perpkg); + return -1; + } + + if (!is_same(e1->metric_expr, e2->metric_expr)) { + pr_debug2("testing event e1 %s: mismatched metric_expr, %s vs %s\n", + e1->name, e1->metric_expr, e2->metric_expr); + return -1; + } + + if (!is_same(e1->metric_name, e2->metric_name)) { + pr_debug2("testing event e1 %s: mismatched metric_name, %s vs %s\n", + e1->name, e1->metric_name, e2->metric_name); + return -1; + } + + if (!is_same(e1->deprecated, e2->deprecated)) { + pr_debug2("testing event e1 %s: mismatched deprecated, %s vs %s\n", + e1->name, e1->deprecated, e2->deprecated); + return -1; + } + + if (!is_same(e1->pmu, e2->pmu)) { + pr_debug2("testing event e1 %s: mismatched pmu string, %s vs %s\n", + e1->name, e1->pmu, e2->pmu); + return -1; + } + + if (!is_same(e1->compat, e2->compat)) { + pr_debug2("testing event e1 %s: mismatched compat string, %s vs %s\n", + e1->name, e1->compat, e2->compat); + return -1; + } + + return 0; +} + /* Verify generated events from pmu-events.c is as expected */ static int test_pmu_event_table(void) { @@ -191,60 +256,8 @@ static int test_pmu_event_table(void) found = true; map_events++;

- if (!is_same(table->desc, te->desc)) { - pr_debug2("testing event table %s: mismatched desc, %s vs %s\n", - table->name, table->desc, te->desc); - return -1; - } - - if (!is_same(table->topic, te->topic)) { - pr_debug2("testing event table %s: mismatched topic, %s vs %s\n", - table->name, table->topic, - te->topic); - return -1; - } - - if (!is_same(table->long_desc, te->long_desc)) { - pr_debug2("testing event table %s: mismatched long_desc, %s vs %s\n", - table->name, table->long_desc, - te->long_desc); - return -1; - } - - if (!is_same(table->unit, te->unit)) { - pr_debug2("testing event table %s: mismatched unit, %s vs %s\n", - table->name, table->unit, - te->unit); - return -1; - } - - if (!is_same(table->perpkg, te->perpkg)) { - pr_debug2("testing event table %s: mismatched perpkg, %s vs %s\n", - table->name, table->perpkg, - te->perpkg); - return -1; - } - - if (!is_same(table->metric_expr, te->metric_expr)) { - pr_debug2("testing event table %s: mismatched metric_expr, %s vs %s\n", - table->name, table->metric_expr, - te->metric_expr); + if (compare_pmu_events(table, te)) return -1; - } - - if (!is_same(table->metric_name, te->metric_name)) { - pr_debug2("testing event table %s: mismatched metric_name, %s vs %s\n", - table->name, table->metric_name, - te->metric_name); - return -1; - } - - if (!is_same(table->deprecated, te->deprecated)) { - pr_debug2("testing event table %s: mismatched deprecated, %s vs %s\n", - table->name, table->deprecated, - te->deprecated); - return -1; - }

pr_debug("testing event table %s: pass\n", table->name); }

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.15-rc1 commit c81e823ff866 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Currently all test events are put into arrays of test events.

Create pointer arrays of test events instead, so the test events may be referenced later for tighter alias verification.

Signed-off-by: John Garry john.garry@huawei.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Ian Rogers irogers@google.com Cc: Ingo Molnar mingo@redhat.com Cc: Jin Yao yao.jin@linux.intel.com Cc: Jiri Olsa jolsa@redhat.com Cc: Mark Rutland mark.rutland@arm.com Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: linuxarm@huawei.com Link: https //lore.kernel.org/r/1627566986-30605-4-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/tests/pmu-events.c | 244 ++++++++++++++++++---------------- 1 file changed, 126 insertions(+), 118 deletions(-)

diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c index 735e90dfbec0..96398a0b8e63 100644 --- a/tools/perf/tests/pmu-events.c +++ b/tools/perf/tests/pmu-events.c @@ -28,108 +28,114 @@ struct perf_pmu_test_event { const char *alias_long_desc; };

-static struct perf_pmu_test_event test_cpu_events[] = { - { - .event = { - .name = "bp_l1_btb_correct", - .event = "event=0x8a", - .desc = "L1 BTB Correction", - .topic = "branch", - }, - .alias_str = "event=0x8a", - .alias_long_desc = "L1 BTB Correction", - }, - { - .event = { - .name = "bp_l2_btb_correct", - .event = "event=0x8b", - .desc = "L2 BTB Correction", - .topic = "branch", - }, - .alias_str = "event=0x8b", - .alias_long_desc = "L2 BTB Correction", +static const struct perf_pmu_test_event bp_l1_btb_correct = { + .event = { + .name = "bp_l1_btb_correct", + .event = "event=0x8a", + .desc = "L1 BTB Correction", + .topic = "branch", }, - { - .event = { - .name = "segment_reg_loads.any", - .event = "umask=0x80,period=200000,event=0x6", - .desc = "Number of segment register loads", - .topic = "other", - }, - .alias_str = "umask=0x80,(null)=0x30d40,event=0x6", - .alias_long_desc = "Number of segment register loads", + .alias_str = "event=0x8a", + .alias_long_desc = "L1 BTB Correction", +}; + +static const struct perf_pmu_test_event bp_l2_btb_correct = { + .event = { + .name = "bp_l2_btb_correct", + .event = "event=0x8b", + .desc = "L2 BTB Correction", + .topic = "branch", }, - { - .event = { - .name = "dispatch_blocked.any", - .event = "umask=0x20,period=200000,event=0x9", - .desc = "Memory cluster signals to block micro-op dispatch for any reason", - .topic = "other", - }, - .alias_str = "umask=0x20,(null)=0x30d40,event=0x9", - .alias_long_desc = "Memory cluster signals to block micro-op dispatch for any reason", + .alias_str = "event=0x8b", + .alias_long_desc = "L2 BTB Correction", +}; + +static const struct perf_pmu_test_event segment_reg_loads_any = { + .event = { + .name = "segment_reg_loads.any", + .event = "umask=0x80,period=200000,event=0x6", + .desc = "Number of segment register loads", + .topic = "other", }, - { - .event = { - .name = "eist_trans", - .event = "umask=0x0,period=200000,event=0x3a", - .desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions", - .topic = "other", - }, - .alias_str = "umask=0,(null)=0x30d40,event=0x3a", - .alias_long_desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions", + .alias_str = "umask=0x80,(null)=0x30d40,event=0x6", + .alias_long_desc = "Number of segment register loads", +}; + +static const struct perf_pmu_test_event dispatch_blocked_any = { + .event = { + .name = "dispatch_blocked.any", + .event = "umask=0x20,period=200000,event=0x9", + .desc = "Memory cluster signals to block micro-op dispatch for any reason", + .topic = "other", }, - { - .event = { - .name = "l3_cache_rd", - .event = "event=0x40", - .desc = "L3 cache access, read", - .long_desc = "Attributable Level 3 cache access, read", - .topic = "cache", - }, - .alias_str = "event=0x40", - .alias_long_desc = "Attributable Level 3 cache access, read", + .alias_str = "umask=0x20,(null)=0x30d40,event=0x9", + .alias_long_desc = "Memory cluster signals to block micro-op dispatch for any reason", +}; + +static const struct perf_pmu_test_event eist_trans = { + .event = { + .name = "eist_trans", + .event = "umask=0x0,period=200000,event=0x3a", + .desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions", + .topic = "other", }, - { /* sentinel */ - .event = { - .name = NULL, - }, + .alias_str = "umask=0,(null)=0x30d40,event=0x3a", + .alias_long_desc = "Number of Enhanced Intel SpeedStep(R) Technology (EIST) transitions", +}; + +static const struct perf_pmu_test_event l3_cache_rd = { + .event = { + .name = "l3_cache_rd", + .event = "event=0x40", + .desc = "L3 cache access, read", + .long_desc = "Attributable Level 3 cache access, read", + .topic = "cache", }, + .alias_str = "event=0x40", + .alias_long_desc = "Attributable Level 3 cache access, read", };

-static struct perf_pmu_test_event test_uncore_events[] = { - { - .event = { - .name = "uncore_hisi_ddrc.flux_wcmd", - .event = "event=0x2", - .desc = "DDRC write commands. Unit: hisi_sccl,ddrc ", - .topic = "uncore", - .long_desc = "DDRC write commands", - .pmu = "hisi_sccl,ddrc", - }, - .alias_str = "event=0x2", - .alias_long_desc = "DDRC write commands", +static const struct perf_pmu_test_event *core_events[] = { + &bp_l1_btb_correct, + &bp_l2_btb_correct, + &segment_reg_loads_any, + &dispatch_blocked_any, + &eist_trans, + &l3_cache_rd, + NULL +}; + +static const struct perf_pmu_test_event uncore_hisi_ddrc_flux_wcmd = { + .event = { + .name = "uncore_hisi_ddrc.flux_wcmd", + .event = "event=0x2", + .desc = "DDRC write commands. Unit: hisi_sccl,ddrc ", + .topic = "uncore", + .long_desc = "DDRC write commands", + .pmu = "hisi_sccl,ddrc", }, - { - .event = { - .name = "unc_cbo_xsnp_response.miss_eviction", - .event = "umask=0x81,event=0x22", - .desc = "Unit: uncore_cbox A cross-core snoop resulted from L3 Eviction which misses in some processor core", - .topic = "uncore", - .long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core", - .pmu = "uncore_cbox", - }, - .alias_str = "umask=0x81,event=0x22", - .alias_long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core", + .alias_str = "event=0x2", + .alias_long_desc = "DDRC write commands", +}; + +static const struct perf_pmu_test_event unc_cbo_xsnp_response_miss_eviction = { + .event = { + .name = "unc_cbo_xsnp_response.miss_eviction", + .event = "umask=0x81,event=0x22", + .desc = "Unit: uncore_cbox A cross-core snoop resulted from L3 Eviction which misses in some processor core", + .topic = "uncore", + .long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core", + .pmu = "uncore_cbox", }, - { /* sentinel */ - .event = { - .name = NULL, - }, - } + .alias_str = "umask=0x81,event=0x22", + .alias_long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core", };

-const int total_test_events_size = ARRAY_SIZE(test_uncore_events); +static const struct perf_pmu_test_event *uncore_events[] = { + &uncore_hisi_ddrc_flux_wcmd, + &unc_cbo_xsnp_response_miss_eviction, + NULL +};

static bool is_same(const char *reference, const char *test) { @@ -224,7 +230,7 @@ static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2) return 0; }

-/* Verify generated events from pmu-events.c is as expected */ +/* Verify generated events from pmu-events.c are as expected */ static int test_pmu_event_table(void) { struct pmu_events_map *map = __test_pmu_get_events_map(); @@ -232,31 +238,31 @@ static int test_pmu_event_table(void) int map_events = 0, expected_events;

/* ignore 2x sentinels */ - expected_events = ARRAY_SIZE(test_cpu_events) + - ARRAY_SIZE(test_uncore_events) - 2; + expected_events = ARRAY_SIZE(core_events) + + ARRAY_SIZE(uncore_events) - 2;

if (!map) return -1;

for (table = map->table; table->name; table++) { - struct perf_pmu_test_event *test; - struct pmu_event *te; + struct perf_pmu_test_event const **test_event_table; bool found = false;

if (table->pmu) - test = &test_uncore_events[0]; + test_event_table = &uncore_events[0]; else - test = &test_cpu_events[0]; + test_event_table = &core_events[0];

- te = &test->event; + for (; *test_event_table; test_event_table++) { + struct perf_pmu_test_event const *test_event = *test_event_table; + struct pmu_event const *event = &test_event->event;

- for (; te->name; test++, te = &test->event) { - if (strcmp(table->name, te->name)) + if (strcmp(table->name, event->name)) continue; found = true; map_events++;

- if (compare_pmu_events(table, te)) + if (compare_pmu_events(table, event)) return -1;

pr_debug("testing event table %s: pass\n", table->name); @@ -292,8 +298,7 @@ static struct perf_pmu_alias *find_alias(const char *test_event, struct list_hea /* Verify aliases are as expected */ static int __test__pmu_event_aliases(char *pmu_name, int *count) { - struct perf_pmu_test_event *test; - struct pmu_event *te; + struct perf_pmu_test_event const **test_event_table; struct perf_pmu *pmu; LIST_HEAD(aliases); int res = 0; @@ -305,10 +310,10 @@ static int __test__pmu_event_aliases(char *pmu_name, int *count) return -1;

if (is_pmu_core(pmu_name)) { - test = &test_cpu_events[0]; + test_event_table = &core_events[0]; use_uncore_table = false; } else { - test = &test_uncore_events[0]; + test_event_table = &uncore_events[0]; use_uncore_table = true; }

@@ -320,50 +325,53 @@ static int __test__pmu_event_aliases(char *pmu_name, int *count)

pmu_add_cpu_aliases_map(&aliases, pmu, map);

- for (te = &test->event; te->name; test++, te = &test->event) { - struct perf_pmu_alias *alias = find_alias(te->name, &aliases); + for (; *test_event_table; test_event_table++) { + struct perf_pmu_test_event const *test_event = *test_event_table; + struct pmu_event const *event = &test_event->event; + + struct perf_pmu_alias *alias = find_alias(event->name, &aliases);

if (!alias) { bool uncore_match = pmu_uncore_alias_match(pmu_name, - te->pmu); + event->pmu);

if (use_uncore_table && !uncore_match) { pr_debug3("testing aliases PMU %s: skip matching alias %s\n", - pmu_name, te->name); + pmu_name, event->name); continue; }

pr_debug2("testing aliases PMU %s: no alias, alias_table->name=%s\n", - pmu_name, te->name); + pmu_name, event->name); res = -1; break; }

- if (!is_same(alias->desc, te->desc)) { + if (!is_same(alias->desc, event->desc)) { pr_debug2("testing aliases PMU %s: mismatched desc, %s vs %s\n", - pmu_name, alias->desc, te->desc); + pmu_name, alias->desc, event->desc); res = -1; break; }

- if (!is_same(alias->long_desc, test->alias_long_desc)) { + if (!is_same(alias->long_desc, test_event->alias_long_desc)) { pr_debug2("testing aliases PMU %s: mismatched long_desc, %s vs %s\n", pmu_name, alias->long_desc, - test->alias_long_desc); + test_event->alias_long_desc); res = -1; break; }

- if (!is_same(alias->str, test->alias_str)) { + if (!is_same(alias->str, test_event->alias_str)) { pr_debug2("testing aliases PMU %s: mismatched str, %s vs %s\n", - pmu_name, alias->str, test->alias_str); + pmu_name, alias->str, test_event->alias_str); res = -1; break; }

- if (!is_same(alias->topic, te->topic)) { + if (!is_same(alias->topic, event->topic)) { pr_debug2("testing aliases PMU %s: mismatched topic, %s vs %s\n", - pmu_name, alias->topic, te->topic); + pmu_name, alias->topic, event->topic); res = -1; break; }

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.15-rc1 commit 3bc4526b30f1 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

The current method to test uncore event aliasing is limited, as it relies on the uncore PMU being present in the host system to test.

As such, breakages of uncore PMU aliases goes unnoticed. To make this more robust, a new method of testing uncore PMUs with fake PMUs will be used in future. This will be separate to testing core PMU aliases.

So make the current test function core PMU only. Uncore PMU alias support will be re-added later.

Signed-off-by: John Garry john.garry@huawei.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Ian Rogers irogers@google.com Cc: Ingo Molnar mingo@redhat.com Cc: Jin Yao yao.jin@linux.intel.com Cc: Jiri Olsa jolsa@redhat.com Cc: Mark Rutland mark.rutland@arm.com Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: linuxarm@huawei.com Link: https //lore.kernel.org/r/1627566986-30605-6-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/tests/pmu-events.c | 45 +++++++++++++---------------------- 1 file changed, 16 insertions(+), 29 deletions(-)

diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c index 1b3a9b861aa1..7586f8a35fe7 100644 --- a/tools/perf/tests/pmu-events.c +++ b/tools/perf/tests/pmu-events.c @@ -350,26 +350,19 @@ static struct perf_pmu_alias *find_alias(const char *test_event, struct list_hea }

/* Verify aliases are as expected */ -static int __test__pmu_event_aliases(char *pmu_name, int *count) +static int __test_core_pmu_event_aliases(char *pmu_name, int *count) { struct perf_pmu_test_event const **test_event_table; struct perf_pmu *pmu; LIST_HEAD(aliases); int res = 0; - bool use_uncore_table; struct pmu_events_map *map = __test_pmu_get_events_map(); struct perf_pmu_alias *a, *tmp;

if (!map) return -1;

- if (is_pmu_core(pmu_name)) { - test_event_table = &core_events[0]; - use_uncore_table = false; - } else { - test_event_table = &uncore_events[0]; - use_uncore_table = true; - } + test_event_table = &core_events[0];

pmu = zalloc(sizeof(*pmu)); if (!pmu) @@ -382,20 +375,10 @@ static int __test__pmu_event_aliases(char *pmu_name, int *count) for (; *test_event_table; test_event_table++) { struct perf_pmu_test_event const *test_event = *test_event_table; struct pmu_event const *event = &test_event->event; - struct perf_pmu_alias *alias = find_alias(event->name, &aliases);

if (!alias) { - bool uncore_match = pmu_uncore_alias_match(pmu_name, - event->pmu); - - if (use_uncore_table && !uncore_match) { - pr_debug3("testing aliases PMU %s: skip matching alias %s\n", - pmu_name, event->name); - continue; - } - - pr_debug2("testing aliases PMU %s: no alias, alias_table->name=%s\n", + pr_debug("testing aliases core PMU %s: no alias, alias_table->name=%s\n", pmu_name, event->name); res = -1; break; @@ -407,7 +390,7 @@ static int __test__pmu_event_aliases(char *pmu_name, int *count) }

(*count)++; - pr_debug2("testing aliases PMU %s: matched event %s\n", + pr_debug2("testing aliases core PMU %s: matched event %s\n", pmu_name, alias->name); }

@@ -419,7 +402,6 @@ static int __test__pmu_event_aliases(char *pmu_name, int *count) return res; }

- /* Test that aliases generated are as expected */ static int test_aliases(void) { @@ -428,21 +410,26 @@ static int test_aliases(void) while ((pmu = perf_pmu__scan(pmu)) != NULL) { int count = 0;

+ if (!is_pmu_core(pmu->name)) + continue; + if (list_empty(&pmu->format)) { - pr_debug2("skipping testing PMU %s\n", pmu->name); + pr_debug2("skipping testing core PMU %s\n", pmu->name); continue; }

- if (__test__pmu_event_aliases(pmu->name, &count)) { - pr_debug("testing PMU %s aliases: failed\n", pmu->name); + if (__test_core_pmu_event_aliases(pmu->name, &count)) { + pr_debug("testing core PMU %s aliases: failed\n", pmu->name); return -1; }

- if (count == 0) - pr_debug3("testing PMU %s aliases: no events to match\n", + if (count == 0) { + pr_debug("testing core PMU %s aliases: no events to match\n", pmu->name); - else - pr_debug("testing PMU %s aliases: pass\n", pmu->name); + return -1; + } + + pr_debug("testing core PMU %s aliases: pass\n", pmu->name); }

return 0;

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.15-rc1 commit 5a65c0c8f6fd category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Add support to match aliases for uncore PMUs.

Since we cannot rely on the PMUs being present on the host system, use fake PMUs.

The following conditions in the test are ensures:

- Expected count of aliases created

- All aliases can be matched to an expected alias in perf_pmu_test_pmu.aliases

This will catch the condition fixed in commit c47a5599eda3 ("perf tools: Fix pattern matching for same substring in different PMU type"), where excess events were created for a PMU. It will also fix the scenario inadvertently broken there, where no aliases were created for aliases with multiple tokens.

Signed-off-by: John Garry john.garry@huawei.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Ian Rogers irogers@google.com Cc: Ingo Molnar mingo@redhat.com Cc: Jin Yao yao.jin@linux.intel.com Cc: Jiri Olsa jolsa@redhat.com Cc: Mark Rutland mark.rutland@arm.com Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: linuxarm@huawei.com Link: https //lore.kernel.org/r/1627566986-30605-8-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/tests/pmu-events.c | 110 ++++++++++++++++++++++++++++++++++ 1 file changed, 110 insertions(+)

diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c index 7586f8a35fe7..e80a00670374 100644 --- a/tools/perf/tests/pmu-events.c +++ b/tools/perf/tests/pmu-events.c @@ -26,6 +26,14 @@ struct perf_pmu_test_event { * be set in the alias. */ const char *alias_long_desc; + + /* PMU which we should match against */ + const char *matching_pmu; +}; + +struct perf_pmu_test_pmu { + struct perf_pmu pmu; + struct perf_pmu_test_event const *aliases[10]; };

static const struct perf_pmu_test_event bp_l1_btb_correct = { @@ -116,6 +124,7 @@ static const struct perf_pmu_test_event uncore_hisi_ddrc_flux_wcmd = { }, .alias_str = "event=0x2", .alias_long_desc = "DDRC write commands", + .matching_pmu = "hisi_sccl1_ddrc2", };

static const struct perf_pmu_test_event unc_cbo_xsnp_response_miss_eviction = { @@ -129,6 +138,7 @@ static const struct perf_pmu_test_event unc_cbo_xsnp_response_miss_eviction = { }, .alias_str = "umask=0x81,event=0x22", .alias_long_desc = "A cross-core snoop resulted from L3 Eviction which misses in some processor core", + .matching_pmu = "uncore_cbox_0", };

static const struct perf_pmu_test_event *uncore_events[] = { @@ -402,10 +412,103 @@ static int __test_core_pmu_event_aliases(char *pmu_name, int *count) return res; }

+static int __test_uncore_pmu_event_aliases(struct perf_pmu_test_pmu *test_pmu) +{ + int alias_count = 0, to_match_count = 0, matched_count = 0; + struct perf_pmu_test_event const **table; + struct perf_pmu *pmu = &test_pmu->pmu; + const char *pmu_name = pmu->name; + struct perf_pmu_alias *a, *tmp, *alias; + struct pmu_events_map *map; + LIST_HEAD(aliases); + int res = 0; + + map = __test_pmu_get_events_map(); + if (!map) + return -1; + pmu_add_cpu_aliases_map(&aliases, pmu, map); + + /* Count how many aliases we generated */ + list_for_each_entry(alias, &aliases, list) + alias_count++; + + /* Count how many aliases we expect from the known table */ + for (table = &test_pmu->aliases[0]; *table; table++) + to_match_count++; + + if (alias_count != to_match_count) { + pr_debug("testing aliases uncore PMU %s: mismatch expected aliases (%d) vs found (%d)\n", + pmu_name, to_match_count, alias_count); + res = -1; + goto out; + } + + list_for_each_entry(alias, &aliases, list) { + bool matched = false; + + for (table = &test_pmu->aliases[0]; *table; table++) { + struct perf_pmu_test_event const *test_event = *table; + struct pmu_event const *event = &test_event->event; + + if (!strcmp(event->name, alias->name)) { + if (compare_alias_to_test_event(alias, + test_event, + pmu_name)) { + continue; + } + matched = true; + matched_count++; + } + } + + if (matched == false) { + pr_debug("testing aliases uncore PMU %s: could not match alias %s\n", + pmu_name, alias->name); + res = -1; + goto out; + } + } + + if (alias_count != matched_count) { + pr_debug("testing aliases uncore PMU %s: mismatch found aliases (%d) vs matched (%d)\n", + pmu_name, matched_count, alias_count); + res = -1; + } + +out: + list_for_each_entry_safe(a, tmp, &aliases, list) { + list_del(&a->list); + perf_pmu_free_alias(a); + } + return res; +} + +static struct perf_pmu_test_pmu test_pmus[] = { + { + .pmu = { + .name = (char *)"hisi_sccl1_ddrc2", + .is_uncore = 1, + }, + .aliases = { + &uncore_hisi_ddrc_flux_wcmd, + }, + }, + { + .pmu = { + .name = (char *)"uncore_cbox_0", + .is_uncore = 1, + }, + .aliases = { + &unc_cbo_xsnp_response_miss_eviction, + }, + }, +}; + /* Test that aliases generated are as expected */ static int test_aliases(void) { struct perf_pmu *pmu = NULL; + unsigned long i;

while ((pmu = perf_pmu__scan(pmu)) != NULL) { int count = 0; @@ -432,6 +535,13 @@ static int test_aliases(void) pr_debug("testing core PMU %s aliases: pass\n", pmu->name); }

+ for (i = 0; i < ARRAY_SIZE(test_pmus); i++) { + int res = __test_uncore_pmu_event_aliases(&test_pmus[i]); + + if (res) + return res; + } + return 0; }

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.15-rc1 commit e199f47f159d category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Function pmu_add_sys_aliases() will be required for the PMU events test for system events aliases, so make it public.

Signed-off-by: John Garry john.garry@huawei.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Ian Rogers irogers@google.com Cc: Ingo Molnar mingo@redhat.com Cc: Jin Yao yao.jin@linux.intel.com Cc: Jiri Olsa jolsa@redhat.com Cc: Mark Rutland mark.rutland@arm.com Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: linuxarm@huawei.com Link: https //lore.kernel.org/r/1627566986-30605-10-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/util/pmu.c | 2 +- tools/perf/util/pmu.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 57093e5c5507..b0bede80356b 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -924,7 +924,7 @@ static int pmu_add_sys_aliases_iter_fn(struct pmu_event *pe, void *data) return 0; }

-static void pmu_add_sys_aliases(struct list_head *head, struct perf_pmu *pmu) +void pmu_add_sys_aliases(struct list_head *head, struct perf_pmu *pmu) { struct pmu_sys_event_iter_data idata = { .head = head, diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h index 4539a8b78b35..85927b14cd2d 100644 --- a/tools/perf/util/pmu.h +++ b/tools/perf/util/pmu.h @@ -77,6 +77,7 @@ struct perf_pmu_alias {

struct perf_pmu *perf_pmu__find(const char *name); struct perf_pmu *perf_pmu__find_by_type(unsigned int type); +void pmu_add_sys_aliases(struct list_head *head, struct perf_pmu *pmu); int perf_pmu__config(struct perf_pmu *pmu, struct perf_event_attr *attr, struct list_head *head_terms, struct parse_events_error *error);

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.15-rc1 commit 8ee465a181d0 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Add support for system events, along with core and uncore events.

Support for a sample PMU is also added.

Signed-off-by: John Garry john.garry@huawei.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Ian Rogers irogers@google.com Cc: Ingo Molnar mingo@redhat.com Cc: Jin Yao yao.jin@linux.intel.com Cc: Jiri Olsa jolsa@redhat.com Cc: Mark Rutland mark.rutland@arm.com Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: linuxarm@huawei.com Link: https //lore.kernel.org/r/1627566986-30605-12-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- .../arch/test/test_soc/sys/uncore.json | 9 +++ tools/perf/tests/pmu-events.c | 77 ++++++++++++++++++- 2 files changed, 83 insertions(+), 3 deletions(-) create mode 100644 tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json

diff --git a/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json b/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json new file mode 100644 index 000000000000..0f681a6e10ea --- /dev/null +++ b/tools/perf/pmu-events/arch/test/test_soc/sys/uncore.json @@ -0,0 +1,9 @@ +[ + { + "BriefDescription": "ddr write-cycles event", + "EventCode": "0x2b", + "EventName": "sys_ddr_pmu.write_cycles", + "Unit": "sys_ddr_pmu", + "Compat": "v8" + }, +] diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c index 2db823203c58..2279ebec892f 100644 --- a/tools/perf/tests/pmu-events.c +++ b/tools/perf/tests/pmu-events.c @@ -192,6 +192,25 @@ static const struct perf_pmu_test_event *uncore_events[] = { NULL };

+static const struct perf_pmu_test_event sys_ddr_pmu_write_cycles = { + .event = { + .name = "sys_ddr_pmu.write_cycles", + .event = "event=0x2b", + .desc = "ddr write-cycles event. Unit: uncore_sys_ddr_pmu ", + .topic = "uncore", + .pmu = "uncore_sys_ddr_pmu", + .compat = "v8", + }, + .alias_str = "event=0x2b", + .alias_long_desc = "ddr write-cycles event. Unit: uncore_sys_ddr_pmu ", + .matching_pmu = "uncore_sys_ddr_pmu", +}; + +static const struct perf_pmu_test_event *sys_events[] = { + &sys_ddr_pmu_write_cycles, + NULL +}; + static bool is_same(const char *reference, const char *test) { if (!reference && !test) @@ -220,6 +239,18 @@ static struct pmu_events_map *__test_pmu_get_events_map(void) return NULL; }

+static struct pmu_event *__test_pmu_get_sys_events_table(void) +{ + struct pmu_sys_events *tables = &pmu_sys_event_tables[0]; + + for ( ; tables->name; tables++) { + if (!strcmp("pme_test_soc_sys", tables->name)) + return tables->table; + } + + return NULL; +} + static int compare_pmu_events(struct pmu_event *e1, const struct pmu_event *e2) { if (!is_same(e1->desc, e2->desc)) { @@ -342,15 +373,17 @@ static int compare_alias_to_test_event(struct perf_pmu_alias *alias, /* Verify generated events from pmu-events.c are as expected */ static int test_pmu_event_table(void) { + struct pmu_event *sys_event_tables = __test_pmu_get_sys_events_table(); struct pmu_events_map *map = __test_pmu_get_events_map(); struct pmu_event *table; int map_events = 0, expected_events;

- /* ignore 2x sentinels */ + /* ignore 3x sentinels */ expected_events = ARRAY_SIZE(core_events) + - ARRAY_SIZE(uncore_events) - 2; + ARRAY_SIZE(uncore_events) + + ARRAY_SIZE(sys_events) - 3;

- if (!map) + if (!map || !sys_event_tables) return -1;

for (table = map->table; table->name; table++) { @@ -384,6 +417,33 @@ static int test_pmu_event_table(void) } }

+ for (table = sys_event_tables; table->name; table++) { + struct perf_pmu_test_event const **test_event_table; + bool found = false; + + test_event_table = &sys_events[0]; + + for (; *test_event_table; test_event_table++) { + struct perf_pmu_test_event const *test_event = *test_event_table; + struct pmu_event const *event = &test_event->event; + + if (strcmp(table->name, event->name)) + continue; + found = true; + map_events++; + + if (compare_pmu_events(table, event)) + return -1; + + pr_debug("testing sys event table %s: pass\n", table->name); + } + if (!found) { + pr_debug("testing event table: could not find event %s\n", + table->name); + return -1; + } + } + if (map_events != expected_events) { pr_err("testing event table: found %d, but expected %d\n", map_events, expected_events); @@ -472,6 +532,7 @@ static int __test_uncore_pmu_event_aliases(struct perf_pmu_test_pmu *test_pmu) if (!map) return -1; pmu_add_cpu_aliases_map(&aliases, pmu, map); + pmu_add_sys_aliases(&aliases, pmu);

/* Count how many aliases we generated */ list_for_each_entry(alias, &aliases, list) @@ -574,6 +635,16 @@ static struct perf_pmu_test_pmu test_pmus[] = { &uncore_imc_cache_hits, }, }, + { + .pmu = { + .name = (char *)"uncore_sys_ddr_pmu0", + .is_uncore = 1, + .id = (char *)"v8", + }, + .aliases = { + &sys_ddr_pmu_write_cycles, + }, + }, };

/* Test that aliases generated are as expected */

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.16-rc1 commit d60bad10c4ae category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

Some PMUs use "config=XXX" for eventcodes, like:

more /sys/bus/event_source/devices/hisi_sccl1_ddrc3/events/act_cmd config=0x5

However jevents would give an alias with .event field "event=0x5" for this event. This is handled without issue by the parse events code, but the pmu alias code gets a bit confused, as it warns about assigning "event=0x5" over "config=0x5" in perf_pmu_assign_str() when merging aliases: ./perf stat -v -e act_cmd ... alias act_cmd differs in field 'value' ...

To make things a bit more straightforward, allow jevents to support "config=XXX" as well, by supporting a "ConfigCode" field.

Signed-off-by: John Garry john.garry@huawei.com Acked-by: Ian Rogers irogers@google.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Ingo Molnar mingo@redhat.com Cc: Jiri Olsa jolsa@redhat.com Cc: Leo Yan leo.yan@linaro.org Cc: Mark Rutland mark.rutland@arm.com Cc: Mathieu Poirier mathieu.poirier@linaro.org Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: Shaokun Zhang zhangshaokun@hisilicon.com Cc: Will Deacon will@kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@huawei.com Cc: liuqi115@huawei.com Link: https://lore.kernel.org/r/1631795665-240946-3-git-send-email-john.garry@huaw... Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- tools/perf/pmu-events/jevents.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index 01df8cad7b28..a2cad84563a0 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -571,10 +571,12 @@ static int json_events(const char *fn, struct json_event je = {}; char *arch_std = NULL; unsigned long long eventcode = 0; + unsigned long long configcode = 0; struct msrmap *msr = NULL; jsmntok_t *msrval = NULL; jsmntok_t *precise = NULL; jsmntok_t *obj = tok++; + bool configcode_present = false;

EXPECT(obj->type == JSMN_OBJECT, obj, "expected object"); for (j = 0; j < obj->size; j += 2) { @@ -597,6 +599,12 @@ static int json_events(const char *fn, addfield(map, &code, "", "", val); eventcode |= strtoul(code, NULL, 0); free(code); + } else if (json_streq(map, field, "ConfigCode")) { + char *code = NULL; + addfield(map, &code, "", "", val); + configcode |= strtoul(code, NULL, 0); + free(code); + configcode_present = true; } else if (json_streq(map, field, "ExtSel")) { char *code = NULL; addfield(map, &code, "", "", val); @@ -678,7 +686,10 @@ static int json_events(const char *fn, addfield(map, &extra_desc, " ", "(Precise event)", NULL); } - snprintf(buf, sizeof buf, "event=%#llx", eventcode); + if (configcode_present) + snprintf(buf, sizeof buf, "config=%#llx", configcode); + else + snprintf(buf, sizeof buf, "event=%#llx", eventcode); addfield(map, &event, ",", buf, NULL); if (je.desc && extra_desc) addfield(map, &je.desc, " ", extra_desc, NULL);

From: John Garry john.garry@huawei.com

mainline inclusion from mainline-v5.16-rc1 commit c80161287590 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5 CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=...

--------------------------------------------------------------------------

To improve alias matching, remove the PMU name prefix from the EventName. This will mean that the pmu code will merge aliases, such that we no longer get a huge list of per-PMU events - see perf_pmu_merge_alias().

Also make the following associated changes:

- Use "ConfigCode" rather than "EventCode", so the pmu code is not so disagreeable about inconsistent event codes

- Add undocumented HHA event codes to allow alias merging (for those events)

Signed-off-by: John Garry john.garry@huawei.com Acked-by: Ian Rogers irogers@google.com Cc: Alexander Shishkin alexander.shishkin@linux.intel.com Cc: Ingo Molnar mingo@redhat.com Cc: Jiri Olsa jolsa@redhat.com Cc: Leo Yan leo.yan@linaro.org Cc: Mark Rutland mark.rutland@arm.com Cc: Mathieu Poirier mathieu.poirier@linaro.org Cc: Namhyung Kim namhyung@kernel.org Cc: Peter Zijlstra peterz@infradead.org Cc: Shaokun Zhang zhangshaokun@hisilicon.com Cc: Will Deacon will@kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@huawei.com Cc: liuqi115@huawei.com Link: https://lore.kernel.org/r/1631795665-240946-6-git-send-email-john.garry@huaw... Signed-off-by: Arnaldo Carvalho de Melo acme@redhat.com Signed-off-by: Junhao He hejunhao3@huawei.com --- .../arm64/hisilicon/hip08/uncore-ddrc.json | 32 ++--- .../arm64/hisilicon/hip08/uncore-hha.json | 120 +++++++++++++++--- .../arm64/hisilicon/hip08/uncore-l3c.json | 52 ++++---- 3 files changed, 142 insertions(+), 62 deletions(-)

diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json index 61514d38601b..2b3cb55df288 100644 --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-ddrc.json @@ -1,56 +1,56 @@ [ { - "EventCode": "0x00", - "EventName": "uncore_hisi_ddrc.flux_wr", + "ConfigCode": "0x00", + "EventName": "flux_wr", "BriefDescription": "DDRC total write operations", "PublicDescription": "DDRC total write operations", "Unit": "hisi_sccl,ddrc" }, { - "EventCode": "0x01", - "EventName": "uncore_hisi_ddrc.flux_rd", + "ConfigCode": "0x01", + "EventName": "flux_rd", "BriefDescription": "DDRC total read operations", "PublicDescription": "DDRC total read operations", "Unit": "hisi_sccl,ddrc" }, { - "EventCode": "0x02", - "EventName": "uncore_hisi_ddrc.flux_wcmd", + "ConfigCode": "0x02", + "EventName": "flux_wcmd", "BriefDescription": "DDRC write commands", "PublicDescription": "DDRC write commands", "Unit": "hisi_sccl,ddrc" }, { - "EventCode": "0x03", - "EventName": "uncore_hisi_ddrc.flux_rcmd", + "ConfigCode": "0x03", + "EventName": "flux_rcmd", "BriefDescription": "DDRC read commands", "PublicDescription": "DDRC read commands", "Unit": "hisi_sccl,ddrc" }, { - "EventCode": "0x04", - "EventName": "uncore_hisi_ddrc.pre_cmd", + "ConfigCode": "0x04", + "EventName": "pre_cmd", "BriefDescription": "DDRC precharge commands", "PublicDescription": "DDRC precharge commands", "Unit": "hisi_sccl,ddrc" }, { - "EventCode": "0x05", - "EventName": "uncore_hisi_ddrc.act_cmd", + "ConfigCode": "0x05", + "EventName": "act_cmd", "BriefDescription": "DDRC active commands", "PublicDescription": "DDRC active commands", "Unit": "hisi_sccl,ddrc" }, { - "EventCode": "0x06", - "EventName": "uncore_hisi_ddrc.rnk_chg", + "ConfigCode": "0x06", + "EventName": "rnk_chg", "BriefDescription": "DDRC rank commands", "PublicDescription": "DDRC rank commands", "Unit": "hisi_sccl,ddrc" }, { - "EventCode": "0x07", - "EventName": "uncore_hisi_ddrc.rw_chg", + "ConfigCode": "0x07", + "EventName": "rw_chg", "BriefDescription": "DDRC read and write changes", "PublicDescription": "DDRC read and write changes", "Unit": "hisi_sccl,ddrc" diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json index ada86782933f..9a7ec7af2060 100644 --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-hha.json @@ -1,72 +1,152 @@ [ { - "EventCode": "0x00", - "EventName": "uncore_hisi_hha.rx_ops_num", + "ConfigCode": "0x00", + "EventName": "rx_ops_num", "BriefDescription": "The number of all operations received by the HHA", "PublicDescription": "The number of all operations received by the HHA", "Unit": "hisi_sccl,hha" }, { - "EventCode": "0x01", - "EventName": "uncore_hisi_hha.rx_outer", + "ConfigCode": "0x01", + "EventName": "rx_outer", "BriefDescription": "The number of all operations received by the HHA from another socket", "PublicDescription": "The number of all operations received by the HHA from another socket", "Unit": "hisi_sccl,hha" }, { - "EventCode": "0x02", - "EventName": "uncore_hisi_hha.rx_sccl", + "ConfigCode": "0x02", + "EventName": "rx_sccl", "BriefDescription": "The number of all operations received by the HHA from another SCCL in this socket", "PublicDescription": "The number of all operations received by the HHA from another SCCL in this socket", "Unit": "hisi_sccl,hha" }, { - "EventCode": "0x03", - "EventName": "uncore_hisi_hha.rx_ccix", + "ConfigCode": "0x03", + "EventName": "rx_ccix", "BriefDescription": "Count of the number of operations that HHA has received from CCIX", "PublicDescription": "Count of the number of operations that HHA has received from CCIX", "Unit": "hisi_sccl,hha" }, { - "EventCode": "0x1c", - "EventName": "uncore_hisi_hha.rd_ddr_64b", + "ConfigCode": "0x4", + "EventName": "rx_wbi", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x5", + "EventName": "rx_wbip", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x11", + "EventName": "rx_wtistash", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x1c", + "EventName": "rd_ddr_64b", "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes", "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 64bytes", "Unit": "hisi_sccl,hha" }, { - "EventCode": "0x1d", - "EventName": "uncore_hisi_hha.wr_ddr_64b", + "ConfigCode": "0x1d", + "EventName": "wr_ddr_64b", "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes", "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes", "Unit": "hisi_sccl,hha" }, { - "EventCode": "0x1e", - "EventName": "uncore_hisi_hha.rd_ddr_128b", + "ConfigCode": "0x1e", + "EventName": "rd_ddr_128b", "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes", "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes", "Unit": "hisi_sccl,hha" }, { - "EventCode": "0x1f", - "EventName": "uncore_hisi_hha.wr_ddr_128b", + "ConfigCode": "0x1f", + "EventName": "wr_ddr_128b", "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes", "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes", "Unit": "hisi_sccl,hha" }, { - "EventCode": "0x20", - "EventName": "uncore_hisi_hha.spill_num", + "ConfigCode": "0x20", + "EventName": "spill_num", "BriefDescription": "Count of the number of spill operations that the HHA has sent", "PublicDescription": "Count of the number of spill operations that the HHA has sent", "Unit": "hisi_sccl,hha" }, { - "EventCode": "0x21", - "EventName": "uncore_hisi_hha.spill_success", + "ConfigCode": "0x21", + "EventName": "spill_success", "BriefDescription": "Count of the number of successful spill operations that the HHA has sent", "PublicDescription": "Count of the number of successful spill operations that the HHA has sent", "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x23", + "EventName": "bi_num", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x32", + "EventName": "mediated_num", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x33", + "EventName": "tx_snp_num", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x34", + "EventName": "tx_snp_outer", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x35", + "EventName": "tx_snp_ccix", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x38", + "EventName": "rx_snprspdata", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x3c", + "EventName": "rx_snprsp_outer", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x40", + "EventName": "sdir-lookup", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x41", + "EventName": "edir-lookup", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x42", + "EventName": "sdir-hit", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x43", + "EventName": "edir-hit", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x4c", + "EventName": "sdir-home-migrate", + "Unit": "hisi_sccl,hha" + }, + { + "ConfigCode": "0x4d", + "EventName": "edir-home-migrate", + "Unit": "hisi_sccl,hha" } ] diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json index 67ab19e8cf3a..e3479b65be9a 100644 --- a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json @@ -1,91 +1,91 @@ [ { - "EventCode": "0x00", - "EventName": "uncore_hisi_l3c.rd_cpipe", + "ConfigCode": "0x00", + "EventName": "rd_cpipe", "BriefDescription": "Total read accesses", "PublicDescription": "Total read accesses", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x01", - "EventName": "uncore_hisi_l3c.wr_cpipe", + "ConfigCode": "0x01", + "EventName": "wr_cpipe", "BriefDescription": "Total write accesses", "PublicDescription": "Total write accesses", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x02", - "EventName": "uncore_hisi_l3c.rd_hit_cpipe", + "ConfigCode": "0x02", + "EventName": "rd_hit_cpipe", "BriefDescription": "Total read hits", "PublicDescription": "Total read hits", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x03", - "EventName": "uncore_hisi_l3c.wr_hit_cpipe", + "ConfigCode": "0x03", + "EventName": "wr_hit_cpipe", "BriefDescription": "Total write hits", "PublicDescription": "Total write hits", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x04", - "EventName": "uncore_hisi_l3c.victim_num", + "ConfigCode": "0x04", + "EventName": "victim_num", "BriefDescription": "l3c precharge commands", "PublicDescription": "l3c precharge commands", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x20", - "EventName": "uncore_hisi_l3c.rd_spipe", + "ConfigCode": "0x20", + "EventName": "rd_spipe", "BriefDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe", "PublicDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x21", - "EventName": "uncore_hisi_l3c.wr_spipe", + "ConfigCode": "0x21", + "EventName": "wr_spipe", "BriefDescription": "Count of the number of write lines that come from this cluster of CPU core in spipe", "PublicDescription": "Count of the number of write lines that come from this cluster of CPU core in spipe", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x22", - "EventName": "uncore_hisi_l3c.rd_hit_spipe", + "ConfigCode": "0x22", + "EventName": "rd_hit_spipe", "BriefDescription": "Count of the number of read lines that hits in spipe of this L3C", "PublicDescription": "Count of the number of read lines that hits in spipe of this L3C", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x23", - "EventName": "uncore_hisi_l3c.wr_hit_spipe", + "ConfigCode": "0x23", + "EventName": "wr_hit_spipe", "BriefDescription": "Count of the number of write lines that hits in spipe of this L3C", "PublicDescription": "Count of the number of write lines that hits in spipe of this L3C", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x29", - "EventName": "uncore_hisi_l3c.back_invalid", + "ConfigCode": "0x29", + "EventName": "back_invalid", "BriefDescription": "Count of the number of L3C back invalid operations", "PublicDescription": "Count of the number of L3C back invalid operations", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x40", - "EventName": "uncore_hisi_l3c.retry_cpu", + "ConfigCode": "0x40", + "EventName": "retry_cpu", "BriefDescription": "Count of the number of retry that L3C suppresses the CPU operations", "PublicDescription": "Count of the number of retry that L3C suppresses the CPU operations", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x41", - "EventName": "uncore_hisi_l3c.retry_ring", + "ConfigCode": "0x41", + "EventName": "retry_ring", "BriefDescription": "Count of the number of retry that L3C suppresses the ring operations", "PublicDescription": "Count of the number of retry that L3C suppresses the ring operations", "Unit": "hisi_sccl,l3c" }, { - "EventCode": "0x42", - "EventName": "uncore_hisi_l3c.prefetch_drop", + "ConfigCode": "0x42", + "EventName": "prefetch_drop", "BriefDescription": "Count of the number of prefetch drops from this L3C", "PublicDescription": "Count of the number of prefetch drops from this L3C", "Unit": "hisi_sccl,l3c"

From: Qi Liu liuqi115@huawei.com

driver inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5

--------------------------------------------------------------------------

Add support for HiSilicon L3C PMU aliasing on Hip09 platform.

Signed-off-by: Qi Liu liuqi115@huawei.com Signed-off-by: Junhao He hejunhao3@huawei.com --- .../arm64/hisilicon/hip09/sys/uncore-l3c.json | 125 ++++++++++++++++++ 1 file changed, 125 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-l3c.json

diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-l3c.json new file mode 100644 index 000000000000..46167a2eec51 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-l3c.json @@ -0,0 +1,125 @@ +[ + { + "EventCode": "0x00", + "EventName": "rd_cpipe", + "BriefDescription": "Total read accesses", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x02", + "EventName": "rd_hit_cpipe", + "BriefDescription": "Total read hits", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x20", + "EventName": "rd_spipe", + "BriefDescription": "Count of the number of read lines that come from this cluster of CPU core in spipe", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x22", + "EventName": "rd_hit_spipe", + "BriefDescription": "Count of the number of read lines that hits in spipe of this L3C", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x29", + "EventName": "back_invalid", + "BriefDescription": "Count of the number of L3C back invalid operations", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x40", + "EventName": "retry_cpu", + "BriefDescription": "Count of the number of retry that L3C suppresses the CPU operations", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x41", + "EventName": "retry_ring", + "BriefDescription": "Count of the number of retry that L3C suppresses the ring operations", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x48", + "EventName": "l3c_hit", + "BriefDescription": "Count of the total number of L3C hit", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x80", + "EventName": "read_sum", + "Filter": "tt_core=0xff", + "BriefDescription": "total time taken by CPU to read L3C", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0xb8", + "EventName": "l3c_ref", + "BriefDescription": "Count of the total number of CPU accessed L3C", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0xb9", + "EventName": "dat_access", + "BriefDescription": "Count of the total number of CPU accessed L3C", + "Filter": "tt_core=0xff", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0xc0", + "EventName": "read_alloc", + "Filter": "tt_core=0xff", + "BriefDescription": "Count of the requests issued by CPU received by L3C", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0xce", + "EventName": "retry_alloc", + "Filter": "tt_core=0xff", + "BriefDescription": "Count of the L3C retry CPU", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventCode": "0x7f", + "EventName": "l3c_cycles", + "BriefDescription": "Count of L3C cycles", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "EventName": "cycles", + "Compat": "0x00000030", + "Unit": "hisi_sccl,l3c" + }, + { + "MetricExpr": "l3c_hit / l3c_ref", + "BriefDescription": "hit rate of L3C", + "Compat": "0x00000030", + "MetricGroup": "L3Cache", + "MetricName": "l3c_hit_rate", + "Unit": "hisi_sccl,l3c" + }, + { + "MetricExpr": "read_sum / (l3c_ref - retry_alloc)", + "BriefDescription": "Average latency of CPU reading L3", + "Compat": "0x00000030", + "MetricGroup": "L3Cache", + "MetricName": "l3c_latency", + "Unit": "hisi_sccl,l3c" + } +] \ No newline at end of file

From: Qi Liu liuqi115@huawei.com

driver inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5

--------------------------------------------------------------------------

Add support for HiSilicon HHA PMU aliasing on Hip09 platform.

Signed-off-by: Qi Liu liuqi115@huawei.com Signed-off-by: Junhao He hejunhao3@huawei.com --- .../arm64/hisilicon/hip09/sys/uncore-hha.json | 102 ++++++++++++++++++ 1 file changed, 102 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-hha.json

diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-hha.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-hha.json new file mode 100644 index 000000000000..e49dceeaa263 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-hha.json @@ -0,0 +1,102 @@ +[ + { + "EventCode": "0x00", + "EventName": "rx_ops_num", + "BriefDescription": "The number of all operations received by the HHA", + "Compat": "0x00000030", + "Unit": "hisi_sccl,hha" + }, + { + "EventCode": "0x01", + "EventName": "rx_outer", + "BriefDescription": "The number of all operations received by the HHA from another socket", + "Compat": "0x00000030", + "Unit": "hisi_sccl,hha" + }, + { + "EventCode": "0x02", + "EventName": "rx_sccl", + "BriefDescription": "The number of all operations received by the HHA from another SCCL in this socket", + "Compat": "0x00000030", + "Unit": "hisi_sccl,hha" + }, + { + "EventCode": "0x1c", + "EventName": "rd_ddr_64b", + "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes", + "Compat": "0x00000030", + "Unit": "hisi_sccl,hha" + }, + { + "EventCode": "0x1d", + "EventName": "wr_ddr_64b", + "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes", + "Compat": "0x00000030", + "Unit": "hisi_sccl,hha" + }, + { + "EventCode": "0x1e", + "EventName": "rd_ddr_128b", + "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 128 bytes", + "Compat": "0x00000030", + "Unit": "hisi_sccl,hha" + }, + { + "EventCode": "0x1f", + "EventName": "wr_ddr_128b", + "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 128 bytes", + "Compat": "0x00000030", + "Unit": "hisi_sccl,hha" + }, + { + "EventCode": "0x2e", + "EventName": "hha_retry", + "BriefDescription": "Count of the HHA retry", + "Compat": "0x00000030", + "Unit": "hisi_sccl,hha" + }, + { + "EventCode": "0x55", + "EventName": "hha_cycles", + "BriefDescription": "Count of the HHA cycles", + "Compat": "0x00000030", + "Unit": "hisi_sccl,hha" + }, + { + "EventName": "cycles", + "Compat": "0x00000030", + "Unit": "hisi_sccl,hha" + }, + { + "MetricExpr": "(rd_ddr_64b * 64 + rd_ddr_128b *128) / duration_time", + "BriefDescription": "Average bandwidth of reading DDRC(Byte/s)", + "Compat": "0x00000030", + "MetricGroup": "HHA", + "MetricName": "hha_read_ddrc_bw", + "Unit": "hisi_sccl,hha" + }, + { + "MetricExpr": "(wr_ddr_64b * 64 + wr_ddr_128b *128) / duration_time", + "BriefDescription": "Average bandwidth of writing DDRC(Byte/s)", + "Compat": "0x00000030", + "MetricGroup": "HHA", + "MetricName": "hha_write_ddrc_bw", + "Unit": "hisi_sccl,hha" + }, + { + "MetricExpr": "rx_outer / rx_ops_num", + "BriefDescription": "Rate of cross-chip operations received by HHA", + "Compat": "0x00000030", + "MetricGroup": "HHA", + "MetricName": "cross_chip_ops_rate", + "Unit": "hisi_sccl,hha" + }, + { + "MetricExpr": "rx_sccl / rx_ops_num", + "BriefDescription": "Rate of cross-die operations received by HHA", + "Compat": "0x00000030", + "MetricGroup": "HHA", + "MetricName": "cross_die_ops_rate", + "Unit": "hisi_sccl,hha" + } +] \ No newline at end of file

From: Qi Liu liuqi115@huawei.com

driver inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I63VF5

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Add support for HiSilicon PA PMU aliasing on Hip09 platform.

Signed-off-by: Qi Liu liuqi115@huawei.com Signed-off-by: Junhao He hejunhao3@huawei.com --- .../arm64/hisilicon/hip09/sys/uncore-pa.json | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-pa.json

diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-pa.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-pa.json new file mode 100644 index 000000000000..6ddc9b4ffa16 --- /dev/null +++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip09/sys/uncore-pa.json @@ -0,0 +1,86 @@ +[ + { + "EventCode": "0x78", + "EventName": "pa_cycles", + "BriefDescription": "Count of PA cycles", + "Compat": "0x00000030", + "Unit": "hisi_sicl,pa" + }, + { + "EventName": "cycle", + "Compat": "0x00000030", + "Unit": "hisi_sicl,pa" + }, + { + "EventCode": "0x40", + "EventName": "rx_req", + "BriefDescription": "Count of the requests received by PA link0", + "Compat": "0x00000030", + "Unit": "hisi_sicl,pa" + }, + { + "EventCode": "0x41", + "EventName": "rx_req_link1", + "BriefDescription": "Count of the requests received by PA link1", + "Compat": "0x00000030", + "Unit": "hisi_sicl,pa" + }, + { + "EventCode": "0x42", + "EventName": "rx_req_link2", + "BriefDescription": "Count of the requests received by PA link2", + "Compat": "0x00000030", + "Unit": "hisi_sicl,pa" + }, + { + "EventCode": "0x43", + "EventName": "rx_req_link3", + "BriefDescription": "Count of the requests received by PA link3", + "Compat": "0x00000030", + "Unit": "hisi_sicl,pa" + }, + { + "EventCode": "0x5c", + "EventName": "tx_req", + "BriefDescription": "Count of the requests transmitted by PA link0", + "Compat": "0x00000030", + "Unit": "hisi_sicl,pa" + }, + { + "EventCode": "0x5d", + "EventName": "tx_req_link1", + "BriefDescription": "Count of the requests transmitted by PA link1", + "Compat": "0x00000030", + "Unit": "hisi_sicl,pa" + }, + { + "EventCode": "0x5e", + "EventName": "tx_req_link2", + "BriefDescription": "Count of the requests transmitted by PA link2", + "Compat": "0x00000030", + "Unit": "hisi_sicl,pa" + }, + { + "EventCode": "0x5f", + "EventName": "tx_req_link3", + "BriefDescription": "Count of the requests transmitted by PA link3", + "Compat": "0x00000030", + "Unit": "hisi_sicl,pa" + }, + { + "MetricExpr": "(rx_req + rx_req_link1 + rx_req_link2 + rx_req_link3) / duration_time", + "BriefDescription": "Average bandwidth of PA receive requests", + "Compat": "0x00000030", + "MetricGroup": "PA", + "MetricName": "pa_rx_req_bw", + "Unit": "hisi_sicl,pa" + }, + { + "MetricExpr": "(tx_req + tx_req_link1 + tx_req_link2 + tx_req_link3) / duration_time", + "BriefDescription": "Average bandwidth of PA transmitted requests", + "Compat": "0x00000030", + "MetricGroup": "PA", + "MetricName": "pa_tx_req_bw", + "Unit": "hisi_sicl,pa" + } +] \ No newline at end of file