Zhaoxin newer CPUs support MCE, CMCI and LMCE that compatible with Intel's "Machine-Check Architecture".
To enable the supports of Linux kernel to Zhaoxin's MCA, add specific patches for Zhaoxin's MCE, CMCI and LMCE. patches about Zhaoxin's CMCI, LMCE use 3 functions in mce/intel.c, so make these functions non-static.
Some Zhaoxin's CPUs have MCA bank 8, that only has one error called SVAD (System View Address Decoder) which be controlled by IA32_MC8.CTL.0. If enabled, the prefetch on these CPUs will cause SVAD machine check exception when virtual machine startup and cause system panic. Add a quirk for these Zhaoxin CPUs MCA bank 8.
LeoLiu-oc (3): x86/mce: Add Zhaoxin MCE support x86/mce: Add Zhaoxin CMCI support x86/mce: Add Zhaoxin LMCE support
arch/x86/kernel/cpu/mce/core.c | 97 +++++++++++++++++++++++------- arch/x86/kernel/cpu/mce/intel.c | 11 ++-- arch/x86/kernel/cpu/mce/internal.h | 6 ++ 3 files changed, 87 insertions(+), 27 deletions(-)
On 2021/3/25 18:07, LeoLiu-oc wrote:
Zhaoxin newer CPUs support MCE, CMCI and LMCE that compatible with Intel's "Machine-Check Architecture".
To enable the supports of Linux kernel to Zhaoxin's MCA, add specific patches for Zhaoxin's MCE, CMCI and LMCE. patches about Zhaoxin's CMCI, LMCE use 3 functions in mce/intel.c, so make these functions non-static.
Some Zhaoxin's CPUs have MCA bank 8, that only has one error called SVAD (System View Address Decoder) which be controlled by IA32_MC8.CTL.0. If enabled, the prefetch on these CPUs will cause SVAD machine check exception when virtual machine startup and cause system panic. Add a quirk for these Zhaoxin CPUs MCA bank 8.
LeoLiu-oc (3): x86/mce: Add Zhaoxin MCE support x86/mce: Add Zhaoxin CMCI support x86/mce: Add Zhaoxin LMCE support
arch/x86/kernel/cpu/mce/core.c | 97 +++++++++++++++++++++++------- arch/x86/kernel/cpu/mce/intel.c | 11 ++-- arch/x86/kernel/cpu/mce/internal.h | 6 ++ 3 files changed, 87 insertions(+), 27 deletions(-)
Reviewed-by: Hanjun Guo guohanjun@huawei.com
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Hanjun Guo -
LeoLiu-oc