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Jiangtian Feng (3): Author: geruijun geruijun@huawei.com Date: Mon Dec 27 19:43:22 2021 +0800 Author: Bo Wu wubo40@huawei.com Date: Mon Dec 27 19:43:24 2021 +0800 Author: Ruijun Ge geruijun@huawei.com Date: Mon Dec 27 19:43:25 2021 +0800
drivers/pci/quirks.c | 27 +++++++++++++++++++++++++++ include/linux/pci_ids.h | 3 +++ 2 files changed, 30 insertions(+)
PCI: Add support of port isolation for QLogic HBA card 26
euleros inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8URPA?from=project-issue CVE: NA
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Add support of port isolation for QLogic HBA card 26
Signed-off-by: geruijun geruijun@huawei.com Signed-off-by: Hongxiang Lou louhongxiang@huawei.com Signed-off-by: Jiangtian Feng fengjiangtian@huawei.com
Signed-off-by: Jiangtian Feng fengjiangtian@huawei.com --- drivers/pci/quirks.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index ae95d0950772..9d521e16de44 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5050,6 +5050,8 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs }, { 0x19a2, 0x710, pci_quirk_mf_endpoint_acs }, /* Emulex BE3-R */ { 0x10df, 0x720, pci_quirk_mf_endpoint_acs }, /* Emulex Skyhawk-R */ + { 0x1077, 0x2532, pci_quirk_mf_endpoint_acs}, /* QLogic QL2562 */ + { 0x1077, 0x2261, pci_quirk_mf_endpoint_acs}, /* QLogic QL2692 */ /* Cavium ThunderX */ { PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs }, /* Cavium multi-function devices */
PCI: Fix SD5896 NP init failure
euleros inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8URYL?from=project-issue CVE: NA
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SD5896 NP init failed, when some unused BAR is enabled. The unused BAR should be disabled to fix this problem.
Signed-off-by: geruijun geruijun@huawei.com Signed-off-by: Yeqing Peng pengyeqing@huawei.com Signed-off-by: Jiangtian Feng fengjiangtian@huawei.com
Signed-off-by: Jiangtian Feng fengjiangtian@huawei.com --- drivers/pci/quirks.c | 25 +++++++++++++++++++++++++ include/linux/pci_ids.h | 3 +++ 2 files changed, 28 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 9d521e16de44..e19055d879e5 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5833,6 +5833,31 @@ static void quirk_switchtec_ntb_dma_alias(struct pci_dev *pdev) pci_iounmap(pdev, mmio); pci_disable_device(pdev); } + +static void pci_quirk_hisi_fixup_class(struct pci_dev *dev) +{ + dev->class = PCI_BASE_CLASS_NETWORK << 8; + pci_info(dev, "force hisi class type to network\n"); +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_HUAWEI, PCIE_DEVICE_ID_HISI_5896, + pci_quirk_hisi_fixup_class); + +static void pci_quirk_hisi_fixup_bar(struct pci_dev *dev) +{ + int i, start = 3; + + for (i = start; i < PCI_NUM_RESOURCES; i++) { + dev->resource[i].start = 0; + dev->resource[i].end = 0; + dev->resource[i].flags = 0; + } + + pci_info(dev, "force disable hisilicon np bar\n"); +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HUAWEI, PCIE_DEVICE_ID_HISI_5896, + pci_quirk_hisi_fixup_bar); + + #define SWITCHTEC_QUIRK(vid) \ DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_MICROSEMI, vid, \ PCI_CLASS_BRIDGE_OTHER, 8, quirk_switchtec_ntb_dma_alias) diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index fe4a3589bb3f..866f0cb674f9 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2564,6 +2564,9 @@ #define PCI_DEVICE_ID_HUAWEI_SEC_VF 0xa256 #define PCI_DEVICE_ID_HUAWEI_HPRE_VF 0xa259
+/* Hisilicon PCIe NP devices */ +#define PCIE_DEVICE_ID_HISI_5896 0x5896 + #define PCI_VENDOR_ID_NETRONOME 0x19ee #define PCI_DEVICE_ID_NETRONOME_NFP3800 0x3800 #define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000
PCI: fix the wrong class type for HiSilicon NP 5896
hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8US9L?from=project-issue CVE: NA
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The following patch set the class type as 'PCI_BASE_CLASS_NETWORK'. But 'PCI_BASE_CLASS_NETWORK' is actually the higher 8 bits of the class type of a network device. We should set it as 'PCI_CLASS_NETWORK_ETHERNET'. This patch fixes it.
Fixes: ba8bc9c15d20 ("PCI: Add quirk for hisilicon NP devices 5896")
Signed-off-by: Xiongfeng Wang wangxiongfeng2@huawei.com Signed-off-by: Yang Yingliang yangyingliang@huawei.com Signed-off-by: Xie XiuQi xiexiuqi@huawei.com Signed-off-by: Ruijun Ge geruijun@huawei.com Signed-off-by: Jiangtian Feng fengjiangtian@huawei.com
Signed-off-by: Jiangtian Feng fengjiangtian@huawei.com --- drivers/pci/quirks.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index e19055d879e5..e37ffcb5f47d 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5836,7 +5836,7 @@ static void quirk_switchtec_ntb_dma_alias(struct pci_dev *pdev)
static void pci_quirk_hisi_fixup_class(struct pci_dev *dev) { - dev->class = PCI_BASE_CLASS_NETWORK << 8; + dev->class = PCI_CLASS_NETWORK_ETHERNET << 8; pci_info(dev, "force hisi class type to network\n"); } DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_HUAWEI, PCIE_DEVICE_ID_HISI_5896,
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