From: Weilong Chen chenweilong@huawei.com

ascend inclusion category: feature bugzilla: 46922 CVE: NA

------------------------------------- Patch "cache: Workaround HiSilicon Taishan DC CVAU" breaks the kabi symbols: cpu_hwcaps cpu_hwcap_keys

Patch "arm64: Errata: fix kabi changed by cpu_errata" try to fix it but incomplete. Eable IDC on platform TSV{110,200}.

Signed-off-by: Weilong Chen chenweilong@huawei.com Reviewed-by: Kefeng Wang wangkefeng.wang@huawei.com Reviewed-by: Hanjun Guo guohanjun@huawei.com Signed-off-by: Yang Yingliang yangyingliang@huawei.com --- arch/arm64/kernel/cpufeature.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 822e6a2c0af1d..1bf9d84265de2 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -912,6 +912,19 @@ static bool has_cache_idc(const struct arm64_cpu_capabilities *entry, { u64 ctr;

+#ifndef CONFIG_HISILICON_ERRATUM_1980005 + /* Fix kABI compatible for CONFIG_HISILICON_ERRATUM_1980005 */ + static const struct midr_range idc_support_list[] = { + MIDR_ALL_VERSIONS(MIDR_HISI_TSV110), + MIDR_REV(MIDR_HISI_TSV200, 1, 0), + { /* sentinel */ } + }; + if (is_midr_in_range_list(read_cpuid_id(), idc_support_list)) { + pr_info("CPU features: detected: Taishan IDC coherence workaround\n"); + return true; + } +#endif + if (scope == SCOPE_SYSTEM) ctr = arm64_ftr_reg_ctrel0.sys_val; else