From: Alexander Graf graf@amazon.com

mainline inclusion from mainline-v5.9 commit 731532176716e2775a5d21115bb9c5c61e0cb704 category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I5O7IH CVE: NA

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PENDBASER and PROPBASER define the outer caching mode for LPI tables. The memory backing them may not be outer sharable, so we mark them as nC by default. This however, breaks Windows on ARM which only accepts SameAsInner or RaWaWb as values for outer cachability.

We do today already allow the outer mode to be set to SameAsInner explicitly, so the easy fix is to default to that instead of nC for situations when an OS asks for a not fulfillable cachability request.

This fixes booting Windows in KVM with vgicv3 and ITS enabled for me.

Signed-off-by: Alexander Graf graf@amazon.com Signed-off-by: Marc Zyngier maz@kernel.org Link: https://lore.kernel.org/r/20200701140206.8664-1-graf@amazon.com Signed-off-by: Zengruan Ye yezengruan@huawei.com Reviewed-by: Zenghui Yu yuzenghui@huawei.com Signed-off-by: Laibin Qiu qiulaibin@huawei.com --- virt/kvm/arm/vgic/vgic-mmio-v3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/virt/kvm/arm/vgic/vgic-mmio-v3.c b/virt/kvm/arm/vgic/vgic-mmio-v3.c index 11ba1b036b82..795ebd385dcf 100644 --- a/virt/kvm/arm/vgic/vgic-mmio-v3.c +++ b/virt/kvm/arm/vgic/vgic-mmio-v3.c @@ -337,7 +337,7 @@ u64 vgic_sanitise_outer_cacheability(u64 field) case GIC_BASER_CACHE_nC: return field; default: - return GIC_BASER_CACHE_nC; + return GIC_BASER_CACHE_SameAsInner; } }