Patch#1: add erratum 162200803 for hip10c and exclude GICv4.1 for hip10/hip10c erratum 162200803. Patch#2: replace 'is_pending' with 'val' and change hisi cpu type hip09 to hip10. Patch#3: fix the bug that a large-specification VM fails to be created.
Kunkun Jiang (2): KVM: arm64: vgic-v3: Fix a issue of hip10 erratum 162200806 irqchip/gic-v4.1:Check whether indirect table is supported in allocate_vpe_l1_table
Zhou Wang (1): irqchip/gic-v3: Exclude GICv4.1 for hip10 erratum 162200803
Documentation/arch/arm64/silicon-errata.rst | 4 +-- arch/arm64/kvm/vgic/vgic-mmio-v3.c | 2 +- arch/arm64/kvm/vgic/vgic-mmio.c | 15 ++++---- arch/arm64/kvm/vgic/vgic-mmio.h | 4 +-- drivers/irqchip/irq-gic-v3-its.c | 8 +++-- drivers/irqchip/irq-gic-v3.c | 38 +++++++++++++-------- 6 files changed, 42 insertions(+), 29 deletions(-)
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driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I9KBKD
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Add erratum 162200803 for hip10c and exclude GICv4.1 for hip10/hip10c erratum 162200803.
Fixes: 12e11032205e ("irqchip: gicv3: Add workaround for hip09 erratum 162200803") Signed-off-by: caijian caijian11@h-partners.com Signed-off-by: Zhou Wang wangzhou1@hisilicon.com --- Documentation/arch/arm64/silicon-errata.rst | 2 +- arch/arm64/kvm/vgic/vgic-mmio-v3.c | 2 +- arch/arm64/kvm/vgic/vgic-mmio.h | 2 +- drivers/irqchip/irq-gic-v3.c | 24 +++++++++++++-------- 4 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst index efd57b87f096..db761bb448b1 100644 --- a/Documentation/arch/arm64/silicon-errata.rst +++ b/Documentation/arch/arm64/silicon-errata.rst @@ -216,7 +216,7 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | Hisilicon | SMMUv3 | #162100602 | HISILICON_ERRATUM_162100602 | +----------------+-----------------+-----------------+-----------------------------+ -| Hisilicon | Hip09 | #162200803 | N/A | +| Hisilicon | Hip{10,10C} | #162200803 | N/A | +----------------+-----------------+-----------------+-----------------------------+ | Hisilicon | Hip09 | #162200806 | N/A | +----------------+-----------------+-----------------+-----------------------------+ diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c b/arch/arm64/kvm/vgic/vgic-mmio-v3.c index c29c0b5669a6..909584cd21c7 100644 --- a/arch/arm64/kvm/vgic/vgic-mmio-v3.c +++ b/arch/arm64/kvm/vgic/vgic-mmio-v3.c @@ -84,7 +84,7 @@ static unsigned long vgic_mmio_read_v3_misc(struct kvm_vcpu *vcpu, value |= (INTERRUPT_ID_BITS_ITS - 1) << 19; value |= GICD_TYPER_LPIS; /* Limit the number of vlpis to 4096 */ - if (kvm_vgic_global_state.flags & FLAGS_WORKAROUND_HIP09_ERRATUM_162200803) + if (kvm_vgic_global_state.flags & FLAGS_WORKAROUND_HIP10_ERRATUM_162200803) value |= 11 << GICD_TYPER_NUM_LPIS_SHIFT;
} else { diff --git a/arch/arm64/kvm/vgic/vgic-mmio.h b/arch/arm64/kvm/vgic/vgic-mmio.h index 0477ec95e96c..b50235ffb002 100644 --- a/arch/arm64/kvm/vgic/vgic-mmio.h +++ b/arch/arm64/kvm/vgic/vgic-mmio.h @@ -5,7 +5,7 @@ #ifndef __KVM_ARM_VGIC_MMIO_H__ #define __KVM_ARM_VGIC_MMIO_H__
-#define FLAGS_WORKAROUND_HIP09_ERRATUM_162200803 (1ULL << 4) +#define FLAGS_WORKAROUND_HIP10_ERRATUM_162200803 (1ULL << 4) #define FLAGS_WORKAROUND_HIP09_ERRATUM_162200806 (1ULL << 5)
struct vgic_register_region { diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 7b450c1dc616..9a7a710aa281 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -45,7 +45,7 @@ #define FLAGS_WORKAROUND_CAVIUM_ERRATUM_38539 (1ULL << 1) #define FLAGS_WORKAROUND_MTK_GICR_SAVE (1ULL << 2) #define FLAGS_WORKAROUND_ASR_ERRATUM_8601001 (1ULL << 3) -#define FLAGS_WORKAROUND_HIP09_ERRATUM_162200803 (1ULL << 4) +#define FLAGS_WORKAROUND_HIP10_ERRATUM_162200803 (1ULL << 4) #define FLAGS_WORKAROUND_HIP09_ERRATUM_162200806 (1ULL << 5)
#define GIC_IRQ_TYPE_PARTITION (GIC_IRQ_TYPE_LPI + 1) @@ -2116,11 +2116,11 @@ static bool rd_set_non_coherent(void *data) return true; }
-static bool gic_enable_quirk_hip09_162200803(void *data) +static bool gic_enable_quirk_hip10_10c_162200803(void *data) { struct gic_chip_data *d = data;
- d->flags |= FLAGS_WORKAROUND_HIP09_ERRATUM_162200803; + d->flags |= FLAGS_WORKAROUND_HIP10_ERRATUM_162200803;
return true; } @@ -2206,10 +2206,16 @@ static const struct gic_quirk gic_quirks[] = { .init = rd_set_non_coherent, }, { - .desc = "GICv3: HIP09 erratum 162200803", + .desc = "GICv3: HIP10 erratum 162200803", .iidr = 0x01050736, .mask = 0xffffffff, - .init = gic_enable_quirk_hip09_162200803, + .init = gic_enable_quirk_hip10_10c_162200803, + }, + { + .desc = "GICv3: HIP10C erratum 162200803", + .iidr = 0x00061736, + .mask = 0xffffffff, + .init = gic_enable_quirk_hip10_10c_162200803, }, { .desc = "GICv3: HIP09 erratum 162200806", @@ -2528,8 +2534,8 @@ static void __init gic_of_setup_kvm_info(struct device_node *node) #ifdef CONFIG_VIRT_VTIMER_IRQ_BYPASS gic_v3_kvm_info.has_vtimer = gic_data.rdists.has_vtimer; #endif - if (gic_v3_kvm_info.has_v4) - gic_v3_kvm_info.flags = gic_data.flags; + if (gic_v3_kvm_info.has_v4 && !gic_v3_kvm_info.has_v4_1) + gic_v3_kvm_info.flags |= gic_data.flags & FLAGS_WORKAROUND_HIP10_ERRATUM_162200803; vgic_set_kvm_info(&gic_v3_kvm_info); }
@@ -2882,8 +2888,8 @@ static void __init gic_acpi_setup_kvm_info(void) #ifdef CONFIG_VIRT_VTIMER_IRQ_BYPASS gic_v3_kvm_info.has_vtimer = gic_data.rdists.has_vtimer; #endif - if (gic_v3_kvm_info.has_v4) - gic_v3_kvm_info.flags = gic_data.flags; + if (gic_v3_kvm_info.has_v4 && !gic_v3_kvm_info.has_v4_1) + gic_v3_kvm_info.flags |= gic_data.flags & FLAGS_WORKAROUND_HIP10_ERRATUM_162200803; vgic_set_kvm_info(&gic_v3_kvm_info); }
From: Kunkun Jiang jiangkunkun@huawei.com
driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I9KBKD
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The variable 'is_pending' is ineffective, and replace it with 'val' to fix the issue. Change the hisi cpu type hip09 to hip10.
Fixes: cb0003ae0500 ("irqchip: gicv3: Add workaround for hip09 erratum 162200806") Signed-off-by: Kunkun Jiang jiangkunkun@huawei.com --- Documentation/arch/arm64/silicon-errata.rst | 2 +- arch/arm64/kvm/vgic/vgic-mmio.c | 15 +++++++-------- arch/arm64/kvm/vgic/vgic-mmio.h | 2 +- drivers/irqchip/irq-gic-v3.c | 14 +++++++++----- 4 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst index db761bb448b1..a79b22be9eb2 100644 --- a/Documentation/arch/arm64/silicon-errata.rst +++ b/Documentation/arch/arm64/silicon-errata.rst @@ -218,7 +218,7 @@ stable kernels. +----------------+-----------------+-----------------+-----------------------------+ | Hisilicon | Hip{10,10C} | #162200803 | N/A | +----------------+-----------------+-----------------+-----------------------------+ -| Hisilicon | Hip09 | #162200806 | N/A | +| Hisilicon | Hip10 | #162200806 | N/A | +----------------+-----------------+-----------------+-----------------------------+ | Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 | +----------------+-----------------+-----------------+-----------------------------+ diff --git a/arch/arm64/kvm/vgic/vgic-mmio.c b/arch/arm64/kvm/vgic/vgic-mmio.c index 56549ee4313c..1b4a959601af 100644 --- a/arch/arm64/kvm/vgic/vgic-mmio.c +++ b/arch/arm64/kvm/vgic/vgic-mmio.c @@ -259,24 +259,23 @@ static unsigned long __read_pending(struct kvm_vcpu *vcpu,
if (irq->hw && vgic_irq_is_sgi(irq->intid) && (kvm_vgic_global_state.flags & - FLAGS_WORKAROUND_HIP09_ERRATUM_162200806)) { + FLAGS_WORKAROUND_HIP10_ERRATUM_162200806)) { void *va; u8 *ptr; int mask; - bool is_pending;
mask = BIT(irq->intid % BITS_PER_BYTE); va = page_address(vpe->vpt_page); ptr = va + VIRTUAL_SGI_PENDING_OFFSET + irq->intid / BITS_PER_BYTE; - is_pending = *ptr & mask; - } - - val = false; - err = irq_get_irqchip_state(irq->host_irq, + val = *ptr & mask; + } else { + val = false; + err = irq_get_irqchip_state(irq->host_irq, IRQCHIP_STATE_PENDING, &val); - WARN_RATELIMIT(err, "IRQ %d", irq->host_irq); + WARN_RATELIMIT(err, "IRQ %d", irq->host_irq); + } } else if (!is_user && vgic_irq_is_mapped_level(irq)) { val = vgic_get_phys_line_level(irq); } else { diff --git a/arch/arm64/kvm/vgic/vgic-mmio.h b/arch/arm64/kvm/vgic/vgic-mmio.h index b50235ffb002..bc6046b0fbbb 100644 --- a/arch/arm64/kvm/vgic/vgic-mmio.h +++ b/arch/arm64/kvm/vgic/vgic-mmio.h @@ -6,7 +6,7 @@ #define __KVM_ARM_VGIC_MMIO_H__
#define FLAGS_WORKAROUND_HIP10_ERRATUM_162200803 (1ULL << 4) -#define FLAGS_WORKAROUND_HIP09_ERRATUM_162200806 (1ULL << 5) +#define FLAGS_WORKAROUND_HIP10_ERRATUM_162200806 (1ULL << 5)
struct vgic_register_region { unsigned int reg_offset; diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 9a7a710aa281..4cc8b95d533f 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -46,7 +46,7 @@ #define FLAGS_WORKAROUND_MTK_GICR_SAVE (1ULL << 2) #define FLAGS_WORKAROUND_ASR_ERRATUM_8601001 (1ULL << 3) #define FLAGS_WORKAROUND_HIP10_ERRATUM_162200803 (1ULL << 4) -#define FLAGS_WORKAROUND_HIP09_ERRATUM_162200806 (1ULL << 5) +#define FLAGS_WORKAROUND_HIP10_ERRATUM_162200806 (1ULL << 5)
#define GIC_IRQ_TYPE_PARTITION (GIC_IRQ_TYPE_LPI + 1)
@@ -2125,11 +2125,11 @@ static bool gic_enable_quirk_hip10_10c_162200803(void *data) return true; }
-static bool __maybe_unused gic_enable_quirk_hip09_162200806(void *data) +static bool __maybe_unused gic_enable_quirk_hip10_162200806(void *data) { struct gic_chip_data *d = data;
- d->flags |= FLAGS_WORKAROUND_HIP09_ERRATUM_162200806; + d->flags |= FLAGS_WORKAROUND_HIP10_ERRATUM_162200806;
return true; } @@ -2218,10 +2218,10 @@ static const struct gic_quirk gic_quirks[] = { .init = gic_enable_quirk_hip10_10c_162200803, }, { - .desc = "GICv3: HIP09 erratum 162200806", + .desc = "GICv3: HIP10 erratum 162200806", .iidr = 0x01050736, .mask = 0xffffffff, - .init = gic_enable_quirk_hip09_162200806, + .init = gic_enable_quirk_hip10_162200806, }, { } @@ -2536,6 +2536,8 @@ static void __init gic_of_setup_kvm_info(struct device_node *node) #endif if (gic_v3_kvm_info.has_v4 && !gic_v3_kvm_info.has_v4_1) gic_v3_kvm_info.flags |= gic_data.flags & FLAGS_WORKAROUND_HIP10_ERRATUM_162200803; + if (gic_v3_kvm_info.has_v4_1) + gic_v3_kvm_info.flags |= gic_data.flags & FLAGS_WORKAROUND_HIP10_ERRATUM_162200806; vgic_set_kvm_info(&gic_v3_kvm_info); }
@@ -2890,6 +2892,8 @@ static void __init gic_acpi_setup_kvm_info(void) #endif if (gic_v3_kvm_info.has_v4 && !gic_v3_kvm_info.has_v4_1) gic_v3_kvm_info.flags |= gic_data.flags & FLAGS_WORKAROUND_HIP10_ERRATUM_162200803; + if (gic_v3_kvm_info.has_v4_1) + gic_v3_kvm_info.flags |= gic_data.flags & FLAGS_WORKAROUND_HIP10_ERRATUM_162200806; vgic_set_kvm_info(&gic_v3_kvm_info); }
From: Kunkun Jiang jiangkunkun@huawei.com
virt inclusion category: other bugzilla: https://gitee.com/openeuler/kernel/issues/I9SGLA
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In allocate_vpe_l1_table, when we fail to inherit VPE table from other redistributors or ITSs, and we allocate a new vpe table for current common affinity field without checking whether indirect table is supported. Let's fix it.
Signed-off-by: Nianyao Tang tangnianyao@huawei.com Signed-off-by: Marc Zyngier maz@kernel.org Signed-off-by: Kunkun Jiang jiangkunkun@huawei.com --- drivers/irqchip/irq-gic-v3-its.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 4e3907bedbd9..256d53cd5d6b 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -3190,6 +3190,7 @@ static int allocate_vpe_l1_table(void) unsigned int psz = SZ_64K; unsigned int np, epp, esz; struct page *page; + bool indirect;
if (!gic_rdists->has_rvpeid) return 0; @@ -3224,10 +3225,12 @@ static int allocate_vpe_l1_table(void)
/* First probe the page size */ val = FIELD_PREP(GICR_VPROPBASER_4_1_PAGE_SIZE, GIC_PAGE_SIZE_64K); + val |= GICR_VPROPBASER_4_1_INDIRECT; gicr_write_vpropbaser(val, vlpi_base + GICR_VPROPBASER); val = gicr_read_vpropbaser(vlpi_base + GICR_VPROPBASER); gpsz = FIELD_GET(GICR_VPROPBASER_4_1_PAGE_SIZE, val); esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val); + indirect = !!(val & GICR_VPROPBASER_4_1_INDIRECT);
switch (gpsz) { default: @@ -3260,7 +3263,7 @@ static int allocate_vpe_l1_table(void) * If we need more than just a single L1 page, flag the table * as indirect and compute the number of required L1 pages. */ - if (epp < ITS_MAX_VPEID) { + if (epp < ITS_MAX_VPEID && indirect) { int nl2;
val |= GICR_VPROPBASER_4_1_INDIRECT; @@ -3271,7 +3274,8 @@ static int allocate_vpe_l1_table(void) /* Number of L1 pages to point to the L2 pages */ npg = DIV_ROUND_UP(nl2 * SZ_8, psz); } else { - npg = 1; + npg = DIV_ROUND_UP(ITS_MAX_VPEID, epp); + npg = clamp_val(npg, 1, (GICR_VPROPBASER_4_1_SIZE + 1)); }
val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1);
-
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