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💡 Página Web GRATIS - Con la contratación de Nuestro Plan de Hosting Profesional 4 - Cuentas de Correo ILIMITADAS
by Patricia V 05 Sep '22

05 Sep '22

WEB PROFESIONAL SIN PLANTILLAS AL INSTANTE PRESENCIA VIRTUAL LAS 24 HORAS DEL DA VENDE POR INTERNET [1] DISEO WEB PARA TU EMPRESA Esta modalidad de trabajo tiene un costo de $99.00 + IGV al ao e incluye: * Diseo web * DOMINIO .COM * Hosting de su pgina web * CUENTAS DE CORREO ELECTRNICO CORPORATIVOS CON SU PROPIO DOMINIO * Optimizacin para buscadores La pgina web contendr las siguientes secciones: * Inicio * Quienes somos * SECCIN ACTUALIZABLE CON BASE DE DATOS * Contacto Links: ------ [1] https://anunciacolombia.com/clicks.php?c=15889&n=https&i=0&m=CqSlM&pag=

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Wycena paneli fotowoltaicznych
by Norbert Karecki 02 Sep '22

02 Sep '22

Dzień dobry, dostrzegam możliwość współpracy z Państwa firmą. Świadczymy kompleksową obsługę inwestycji w fotowoltaikę, która obniża koszty energii elektrycznej nawet o 90%. Czy są Państwo zainteresowani weryfikacją wstępnych propozycji? Pozdrawiam, Norbert Karecki

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Openeuler
by Evangeline Welch 30 Aug '22

30 Aug '22

Dear Exhibitor, I am following up to confirm, if you are interested acquiring the Attendee List Operations & Technology Conference 12 - 14 Sep 2022 Sheraton New Orleans Hotel, New Orleans, USA. Counts: 1,375 Includes: Client Name, Business Name, Title, Email Address, Phone Number, and Web Address etc. Let me know your thoughts, so that I can send discount cost & additional information. Evangeline welch | Attendee List Consultant

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Why No Response Yet?
by Abd-jaafari Maddah 22 Aug '22

22 Aug '22

-- Dear, I had sent you a mail but i don't think you received it that's why am writing you again,it's important we discuss. Am waiting, Abd-Jafaari Maddah

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[PATCH] rasdaemon: use standard length PATH_MAX for path name
by Xiaofei Tan 20 Aug '22

20 Aug '22

Use standard length PATH_MAX for path name space allocation to replace the macro MAX_PATH_LEN. Signed-off-by: Xiaofei Tan <tanxiaofei(a)huawei.com> --- ras-cpu-isolation.c | 6 +++--- ras-cpu-isolation.h | 1 - 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/ras-cpu-isolation.c b/ras-cpu-isolation.c index ba5ccd1..24c07e9 100644 --- a/ras-cpu-isolation.c +++ b/ras-cpu-isolation.c @@ -80,11 +80,11 @@ static const char * const cpu_state[] = { static int open_sys_file(unsigned int cpu, int __oflag, const char *format) { int fd; - char path[MAX_PATH_LEN + 1] = ""; - char real_path[MAX_PATH_LEN + 1] = ""; + char path[PATH_MAX] = ""; + char real_path[PATH_MAX] = ""; snprintf(path, sizeof(path), format, cpu); - if(strlen(path) > MAX_PATH_LEN || realpath(path,real_path) == NULL) { + if (strlen(path) > PATH_MAX || realpath(path, real_path) == NULL) { log(TERM, LOG_ERR, "[%s]:open file: %s failed\n", __func__, path); return -1; } diff --git a/ras-cpu-isolation.h b/ras-cpu-isolation.h index 024a68b..5682106 100644 --- a/ras-cpu-isolation.h +++ b/ras-cpu-isolation.h @@ -17,7 +17,6 @@ #include "queue.h" -#define MAX_PATH_LEN 100 #define MAX_BUF_LEN 1024 struct param { -- 2.17.1

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Liquidación de ordenadores retirados de la administración
by Alberto 20 Aug '22

20 Aug '22

Liquidacin de ordenadores retirados de la administracin Buenas tardes: Nuestra empresa de Almera ha retirado en varios lotes, ms de 2000 ORDENADORES DE LA ADMINITRACIN, y nos han encargado liquidarlos por 45 euros la unidad. Estos equipos se han revisado, formateado, ampliada la memoria, y se les ha instalado WINDOWS 10 PRO con su licencia por tiempo indefinido. Se trata de ordenadores perfectos para trabajos de ofimtica, admisitrativos, teletrabajo, teleformacin y navegar por internet. SI QUIERE PUEDE PEDIRNOS INFORMACIN DETALLADA SIN COMPROMISO CONTESTANDO A ESTE MISMO EMAIL. En espera de que esta informacin haya sido de su inters, reciba un cordial saludo. Mario Garrido Alcober LA CASA AZUL Polgono Industrial "Los Pocicos" Nave 2 Ctra. N 332 Km 11 Cuevas del Almanzora, 04610 Almera. Tlf: 950 455 892 alberto(a)pcrenting2022.com [1] 683 583 017 Links: ------ [1] http://marketing.bonjaivan.com/modulos/clicks.php?c=16963&n=mailto&m=CLtgk&…

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Openeuler
by Jordyn Rice 19 Aug '22

19 Aug '22

Dear Exhibitor, I am following up to confirm, if you are interested acquiring the Attendee List International Conference on Science, Engineering & Technology 16 - 17 September 2022 Adria Hotel & Conference Center, Queens County, USA. Counts:685 Includes: Client Name, Business Name, Title, Email Address, Phone Number, and Web Address etc. Let me know your thoughts, so that I can send discount cost & additional information. Jordyn Rice | Attendee List Consultant

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information about Email Marketing - id= 202281972456
by ISA Email Marketing 19 Aug '22

19 Aug '22

Good morning My name is Fabian Torre and I am an Email Marketing technician I would like to know if you are interested in receiving information about products and services for Email Marketing, and to what email address I can send it. Thanks a lot Whatsapp: +55 719 9204-2292 Skype: chronskype

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Zwiększenie płynności finansowej
by Jakub Olejniczak 18 Aug '22

18 Aug '22

Dzień dobry, kontaktuję się z Państwem, ponieważ chciałbym zaproponować wygodne rozwiązanie, które umożliwi Państwa firmie stabilny rozwój. Konkurencyjne otoczenie wymaga ciągłego ulepszania i poszerzenia oferty, co z kolei wiąże się z koniecznością inwestowania. Brak odpowiedniego kapitału poważnie ogranicza tempo rozwoju firmy. Od wielu lat z powodzeniem pomagam firmom w uzyskaniu najlepszej formy finansowania z banku oraz UE. Mam stałych Klientów, którzy nadal chętnie korzystają z moich usług, a także polecają je innym. Czy chcieliby Państwo skorzystać z pomocy wykwalifikowanego i doświadczonego doradcy finansowego? Pozdrawiam Jakub Olejniczak

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Openeuler
by Eden Hunt 15 Aug '22

15 Aug '22

Dear Exhibitor, I am following up to confirm, if you are interested acquiring the Attendee List International Conference on Science & Technology Research 08 - 09 Sep 2022 The Tomlinson Centre, London, UK Counts: 1,012 Includes: Client Name, Business Name, Title, Email Address, Phone Number, and Web Address etc. Let me know your thoughts, so that I can send discount cost & additional information. Eden Hunt | Attendee List Consultant

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[RFCv7 PATCH net-next 00/36] net: extend the type of netdev_features_t to bitmap
by Jian Shen 12 Aug '22

12 Aug '22

For the prototype of netdev_features_t is u64, and the number of netdevice feature bits is 64 now. So there is no space to introduce new feature bit. This patchset try to solve it by change the prototype of netdev_features_t from u64 to structure below: typedef struct { DECLARE_BITMAP(bits, NETDEV_FEATURE_COUNT); } netdev_features_t; With this change, it's necessary to introduce a set of bitmap operation helpers for netdev features. [patch 1] To avoid mistake using NETIF_F_XXX as NETIF_F_XXX_BIT as input macroes for above helpers, remove all the macroes of NETIF_F_XXX. Serveal macroes remained temporarily by some precompile dependency.[patch 36] The features group macroes in netdev_features.h are replaced by a set of const features defined in netdev_features.c. [patch 2-3] For example: macro NETIF_F_ALL_TSO is replaced by netdev_all_tso_features There are some drivers(e.g. sfc) use netdev_features in global structure initialization. Changed the its netdev_features_t memeber to netdev_features_t *, and make it prefer to a netdev_features_t global variables. [patch 4~9] Also, there are many features(e.g. NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK) are used by several drivers, replaces them with global netdev features variables, in order to simple the expressions.[patch 10~13] As suggestion from Andrew Lunn, I wrote some semantic patches to do the work(replacing the netdev features operator by helpers). To make the semantic patches simple, I split the complex expressions of netdev_features to simple logical operation. [patch 14~15] For the prototype of netdev_features_t is no longer u64, so it's incorrect to assigne 0 to it, use netdev_empty_features intead. [patch 16] Some drivers defines macroes and functions wich use NETIF_F_XXX as parameter. For all the macroes NETIF_F_XXX will be removed at last, so change these macroes and functions to use NETIF_F_XXX_BIT. [patch 17~23] With above preparation, then apply the semantic patches to do the expression transition. For example, replace expression "ndev->hw_features |= NETIF_F_TSO;" by "netdev_hw_feature_set(ndev, NETIF_F_TSO_BIT)". [patch 24~35] With the prototype is no longer u64, the implementation of print interface for netdev features(%pNF) is changed to bitmap. [patch 36] I removed the netdev_features_copy and netdev_xxx_features() helpers in this patchset. It make the expressions being more complex. For example, expression "dev->features = dev->hw_features", it's too ugly to use "netdev_active_features_copy(dev, netdev_hw_features(hw))". I will try to find better way for this, avoiding the nic drivers to modify netdev_features directly. The former discussion please see [1][2][3][4][5]. [1]:https://www.spinics.net/lists/netdev/msg769952.html [2]:https://www.spinics.net/lists/netdev/msg777764.html [3]:https://lore.kernel.org/netdev/20211107101519.29264-1-shenjian15@huawei.… [4]:https://www.spinics.net/lists/netdev/msg809293.html [5]:https://www.spinics.net/lists/netdev/msg814349.html ChangeLog: V6->V7: Add netdev_feature_change helpers, remove netdev_features_copy and netdev_xxx_features helpers. Complete the treewide netdev features changes. Suggestions from Alexander Lobakin: refine the definition of DECLARE_NETDEV_FEATURE_SET, and remove useless blank lines. V5-V6: suggestions from Jakub Kicinski: drop the rename for netdev->features simplify names of some helpers, and move them to a new header file refine the implement for netdev_features_set_array V4->V5: adjust the patch structure, use semantic patch with coccinelle V3->V4: rename netdev->features to netdev->active_features remove helpes for handle first 64 bits remove __NETIF_F(name) macroes replace features group macroes with const features V2->V3: use structure for bitmap, suggest by Edward Cree V1->V2: Extend the prototype from u64 to bitmap, suggest by Andrew Lunn Jian Shen (36): net: introduce operation helpers for netdev features net: replace general features macroes with global netdev_features variables net: replace multiple feature bits with DECLARE_NETDEV_FEATURE_SET net: sfc: replace const features initialization with DECLARE_NETDEV_FEATURE_SET net: atlantic: replace const features initialization with NETDEV_FEATURE_SET iwlwifi: replace const features initialization with NETDEV_FEATURE_SET net: ethernet: mtk_eth_soc: replace const features initialization with NETDEV_FEATURE_SET ravb: replace const features initialization with NETDEV_FEATURE_SET test_bpf: replace const features initialization with NETDEV_FEATURE_SET treewide: replace NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK by netdev_csum_gso_features_mask treewide: replace NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM by netdev_ip_csum_features treewide: replace NETIF_F_TSO | NETIF_F_TSO6 by netdev_general_tso_features treewide: replace VLAN tag feature array by const vlan features net: simplify the netdev features expressions for xxx_gso_segment treewide: simplify the netdev features expression treewide: use replace features '0' by netdev_empty_features treewide: adjust features initialization net: mlx4: adjust the net device feature relative macroes net: mlx5e: adjust net device feature relative macroes net: mlxsw: adjust input parameter for function mlxsw_sp_handle_feature net: iavf: adjust net device features relative macroes net: core: adjust netdev_sync_xxx_features net: adjust the build check for net_gso_ok() treewide: use netdev_feature_add helpers treewide: use netdev_features_or/set helpers treewide: use netdev_feature_change helpers treewide: use netdev_feature_del helpers treewide: use netdev_features_andnot and netdev_features_clear helpers treewide: use netdev_features_xor helpers treewide: use netdev_feature_test helpers treewide: use netdev_features_intersects helpers net: use netdev_features_and and netdev_features_mask helpers treewide: use netdev_features_subset helpers treewide: use netdev_features_equal helpers treewide: use netdev_features_empty helpers net: redefine the prototype of netdev_features_t arch/um/drivers/vector_kern.c | 9 +- arch/um/drivers/vector_transports.c | 49 +- drivers/firewire/net.c | 4 +- drivers/hsi/clients/ssi_protocol.c | 2 +- drivers/infiniband/hw/hfi1/vnic_main.c | 4 +- drivers/infiniband/ulp/ipoib/ipoib.h | 1 + drivers/infiniband/ulp/ipoib/ipoib_cm.c | 2 +- drivers/infiniband/ulp/ipoib/ipoib_ib.c | 2 +- drivers/infiniband/ulp/ipoib/ipoib_main.c | 21 +- drivers/infiniband/ulp/ipoib/ipoib_verbs.c | 2 +- drivers/misc/sgi-xp/xpnet.c | 3 +- drivers/net/amt.c | 20 +- drivers/net/bareudp.c | 25 +- drivers/net/bonding/bond_main.c | 101 ++- drivers/net/bonding/bond_options.c | 9 +- drivers/net/caif/caif_serial.c | 2 +- drivers/net/can/dev/dev.c | 4 +- drivers/net/dsa/xrs700x/xrs700x.c | 15 +- drivers/net/dummy.c | 19 +- drivers/net/ethernet/3com/3c59x.c | 10 +- drivers/net/ethernet/3com/typhoon.c | 20 +- drivers/net/ethernet/adaptec/starfire.c | 12 +- drivers/net/ethernet/aeroflex/greth.c | 15 +- drivers/net/ethernet/alacritech/slicoss.c | 6 +- drivers/net/ethernet/alteon/acenic.c | 12 +- drivers/net/ethernet/altera/altera_tse_main.c | 10 +- drivers/net/ethernet/amazon/ena/ena_netdev.c | 49 +- drivers/net/ethernet/amd/amd8111e.c | 3 +- drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 14 +- drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 56 +- drivers/net/ethernet/amd/xgbe/xgbe-main.c | 69 +- drivers/net/ethernet/apm/xgene-v2/main.c | 4 +- drivers/net/ethernet/apm/xgene-v2/main.h | 1 + .../net/ethernet/apm/xgene/xgene_enet_main.c | 21 +- .../ethernet/aquantia/atlantic/aq_filters.c | 8 +- .../net/ethernet/aquantia/atlantic/aq_hw.h | 2 +- .../ethernet/aquantia/atlantic/aq_macsec.c | 2 +- .../ethernet/aquantia/atlantic/aq_macsec.h | 1 + .../net/ethernet/aquantia/atlantic/aq_main.c | 89 ++- .../net/ethernet/aquantia/atlantic/aq_nic.c | 29 +- .../net/ethernet/aquantia/atlantic/aq_nic.h | 6 +- .../net/ethernet/aquantia/atlantic/aq_ring.c | 3 +- .../aquantia/atlantic/hw_atl/hw_atl_a0.c | 8 +- .../aquantia/atlantic/hw_atl/hw_atl_b0.c | 17 +- .../aquantia/atlantic/hw_atl2/hw_atl2.c | 15 +- drivers/net/ethernet/asix/ax88796c_main.c | 29 +- drivers/net/ethernet/atheros/alx/main.c | 19 +- drivers/net/ethernet/atheros/atl1c/atl1c.h | 1 + .../net/ethernet/atheros/atl1c/atl1c_main.c | 34 +- drivers/net/ethernet/atheros/atl1e/atl1e.h | 1 + .../net/ethernet/atheros/atl1e/atl1e_main.c | 39 +- drivers/net/ethernet/atheros/atlx/atl1.c | 24 +- drivers/net/ethernet/atheros/atlx/atl2.c | 19 +- drivers/net/ethernet/atheros/atlx/atlx.c | 13 +- drivers/net/ethernet/broadcom/b44.c | 3 +- drivers/net/ethernet/broadcom/bcmsysport.c | 34 +- drivers/net/ethernet/broadcom/bgmac.c | 9 +- drivers/net/ethernet/broadcom/bnx2.c | 50 +- .../net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | 49 +- .../net/ethernet/broadcom/bnx2x/bnx2x_main.c | 115 ++- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 158 ++-- drivers/net/ethernet/broadcom/bnxt/bnxt.h | 6 +- drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c | 4 +- drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c | 3 +- drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c | 5 +- .../net/ethernet/broadcom/genet/bcmgenet.c | 16 +- drivers/net/ethernet/broadcom/tg3.c | 49 +- drivers/net/ethernet/brocade/bna/bnad.c | 51 +- drivers/net/ethernet/cadence/macb_main.c | 62 +- drivers/net/ethernet/calxeda/xgmac.c | 25 +- .../net/ethernet/cavium/liquidio/lio_core.c | 4 +- .../net/ethernet/cavium/liquidio/lio_main.c | 137 ++-- .../ethernet/cavium/liquidio/lio_vf_main.c | 114 +-- .../ethernet/cavium/liquidio/octeon_network.h | 4 +- .../net/ethernet/cavium/thunder/nicvf_main.c | 51 +- .../ethernet/cavium/thunder/nicvf_queues.c | 2 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 46 +- drivers/net/ethernet/chelsio/cxgb/sge.c | 8 +- .../net/ethernet/chelsio/cxgb3/cxgb3_main.c | 67 +- drivers/net/ethernet/chelsio/cxgb3/sge.c | 6 +- drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1 + .../net/ethernet/chelsio/cxgb4/cxgb4_fcoe.c | 16 +- .../net/ethernet/chelsio/cxgb4/cxgb4_main.c | 102 ++- .../net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.h | 2 +- drivers/net/ethernet/chelsio/cxgb4/sge.c | 8 +- .../ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 56 +- drivers/net/ethernet/chelsio/cxgb4vf/sge.c | 4 +- .../chelsio/inline_crypto/chtls/chtls_main.c | 2 +- drivers/net/ethernet/cirrus/ep93xx_eth.c | 7 +- drivers/net/ethernet/cisco/enic/enic_main.c | 62 +- drivers/net/ethernet/cortina/gemini.c | 29 +- drivers/net/ethernet/davicom/dm9000.c | 20 +- drivers/net/ethernet/davicom/dm9051.c | 2 +- drivers/net/ethernet/dnet.c | 3 +- drivers/net/ethernet/ec_bhf.c | 2 +- drivers/net/ethernet/emulex/benet/be_main.c | 64 +- drivers/net/ethernet/engleder/tsnep_main.c | 4 +- drivers/net/ethernet/ethoc.c | 3 +- drivers/net/ethernet/faraday/ftgmac100.c | 40 +- .../net/ethernet/freescale/dpaa/dpaa_eth.c | 25 +- .../net/ethernet/freescale/dpaa2/dpaa2-eth.c | 43 +- .../ethernet/freescale/dpaa2/dpaa2-switch.c | 10 +- .../ethernet/freescale/dpaa2/dpaa2-switch.h | 1 + drivers/net/ethernet/freescale/enetc/enetc.c | 26 +- .../net/ethernet/freescale/enetc/enetc_pf.c | 59 +- .../net/ethernet/freescale/enetc/enetc_vf.c | 42 +- drivers/net/ethernet/freescale/fec_main.c | 25 +- .../ethernet/freescale/fs_enet/fs_enet-main.c | 2 +- drivers/net/ethernet/freescale/gianfar.c | 40 +- .../net/ethernet/freescale/gianfar_ethtool.c | 7 +- .../ethernet/fungible/funeth/funeth_ktls.c | 5 +- .../ethernet/fungible/funeth/funeth_main.c | 55 +- .../net/ethernet/fungible/funeth/funeth_rx.c | 4 +- drivers/net/ethernet/google/gve/gve_adminq.c | 5 +- drivers/net/ethernet/google/gve/gve_main.c | 26 +- drivers/net/ethernet/google/gve/gve_rx.c | 4 +- drivers/net/ethernet/google/gve/gve_rx_dqo.c | 4 +- drivers/net/ethernet/hisilicon/hix5hd2_gmac.c | 8 +- drivers/net/ethernet/hisilicon/hns/hns_enet.c | 62 +- .../net/ethernet/hisilicon/hns3/hns3_enet.c | 101 ++- .../ethernet/hisilicon/hns3/hns3_ethtool.c | 4 +- .../net/ethernet/huawei/hinic/hinic_main.c | 86 +- drivers/net/ethernet/huawei/hinic/hinic_rx.c | 4 +- drivers/net/ethernet/ibm/ehea/ehea_main.c | 34 +- drivers/net/ethernet/ibm/emac/core.c | 10 +- drivers/net/ethernet/ibm/ibmveth.c | 58 +- drivers/net/ethernet/ibm/ibmvnic.c | 48 +- drivers/net/ethernet/intel/e100.c | 20 +- drivers/net/ethernet/intel/e1000/e1000.h | 1 + drivers/net/ethernet/intel/e1000/e1000_main.c | 71 +- drivers/net/ethernet/intel/e1000e/netdev.c | 109 +-- drivers/net/ethernet/intel/fm10k/fm10k.h | 1 + drivers/net/ethernet/intel/fm10k/fm10k_main.c | 6 +- .../net/ethernet/intel/fm10k/fm10k_netdev.c | 51 +- drivers/net/ethernet/intel/fm10k/fm10k_pci.c | 10 +- .../net/ethernet/intel/i40e/i40e_debugfs.c | 12 +- drivers/net/ethernet/intel/i40e/i40e_main.c | 133 ++-- drivers/net/ethernet/intel/i40e/i40e_txrx.c | 6 +- drivers/net/ethernet/intel/iavf/iavf.h | 1 + drivers/net/ethernet/intel/iavf/iavf_main.c | 231 +++--- drivers/net/ethernet/intel/iavf/iavf_txrx.c | 8 +- .../net/ethernet/intel/iavf/iavf_virtchnl.c | 4 +- drivers/net/ethernet/intel/ice/ice.h | 1 + drivers/net/ethernet/intel/ice/ice_main.c | 223 +++--- drivers/net/ethernet/intel/ice/ice_repr.c | 2 +- drivers/net/ethernet/intel/ice/ice_tc_lib.c | 2 +- drivers/net/ethernet/intel/ice/ice_txrx_lib.c | 8 +- drivers/net/ethernet/intel/igb/igb_ethtool.c | 2 +- drivers/net/ethernet/intel/igb/igb_main.c | 141 ++-- drivers/net/ethernet/intel/igbvf/netdev.c | 93 ++- drivers/net/ethernet/intel/igc/igc_ethtool.c | 2 +- drivers/net/ethernet/intel/igc/igc_mac.c | 1 + drivers/net/ethernet/intel/igc/igc_main.c | 127 +-- drivers/net/ethernet/intel/ixgb/ixgb_main.c | 38 +- drivers/net/ethernet/intel/ixgbe/ixgbe.h | 1 + .../net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c | 2 +- .../net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 2 +- drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c | 6 +- drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c | 2 +- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 231 +++--- .../net/ethernet/intel/ixgbe/ixgbe_sriov.c | 4 +- drivers/net/ethernet/intel/ixgbevf/ipsec.c | 17 +- drivers/net/ethernet/intel/ixgbevf/ixgbevf.h | 1 + .../net/ethernet/intel/ixgbevf/ixgbevf_main.c | 115 +-- drivers/net/ethernet/jme.c | 50 +- drivers/net/ethernet/marvell/mv643xx_eth.c | 13 +- drivers/net/ethernet/marvell/mvneta.c | 21 +- .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 61 +- .../ethernet/marvell/octeon_ep/octep_main.c | 6 +- .../marvell/octeontx2/nic/otx2_common.c | 27 +- .../marvell/octeontx2/nic/otx2_ethtool.c | 4 +- .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 56 +- .../marvell/octeontx2/nic/otx2_txrx.c | 6 +- .../ethernet/marvell/octeontx2/nic/otx2_vf.c | 32 +- .../ethernet/marvell/prestera/prestera_main.c | 4 +- drivers/net/ethernet/marvell/skge.c | 15 +- drivers/net/ethernet/marvell/sky2.c | 66 +- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 74 +- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 12 +- .../net/ethernet/mellanox/mlx4/en_ethtool.c | 4 +- drivers/net/ethernet/mellanox/mlx4/en_main.c | 7 +- .../net/ethernet/mellanox/mlx4/en_netdev.c | 170 ++-- .../net/ethernet/mellanox/mlx4/en_resources.c | 4 +- drivers/net/ethernet/mellanox/mlx4/en_rx.c | 14 +- drivers/net/ethernet/mellanox/mlx4/mlx4_en.h | 5 +- .../mellanox/mlx5/core/en_accel/ipsec.c | 16 +- .../mellanox/mlx5/core/en_accel/ipsec_rxtx.h | 4 +- .../mellanox/mlx5/core/en_accel/ktls.c | 10 +- .../net/ethernet/mellanox/mlx5/core/en_arfs.c | 4 +- .../ethernet/mellanox/mlx5/core/en_ethtool.c | 2 +- .../net/ethernet/mellanox/mlx5/core/en_fs.c | 2 +- .../net/ethernet/mellanox/mlx5/core/en_main.c | 215 ++--- .../net/ethernet/mellanox/mlx5/core/en_rep.c | 22 +- .../net/ethernet/mellanox/mlx5/core/en_rx.c | 8 +- .../net/ethernet/mellanox/mlx5/core/en_tc.c | 2 +- .../ethernet/mellanox/mlx5/core/ipoib/ipoib.c | 22 +- .../net/ethernet/mellanox/mlxsw/spectrum.c | 37 +- drivers/net/ethernet/micrel/ksz884x.c | 15 +- drivers/net/ethernet/microchip/lan743x_main.c | 9 +- .../ethernet/microchip/lan966x/lan966x_fdma.c | 2 +- .../ethernet/microchip/lan966x/lan966x_main.c | 6 +- .../ethernet/microchip/sparx5/sparx5_fdma.c | 2 +- drivers/net/ethernet/microsoft/mana/mana_en.c | 21 +- drivers/net/ethernet/mscc/ocelot.c | 2 +- drivers/net/ethernet/mscc/ocelot_net.c | 23 +- .../net/ethernet/myricom/myri10ge/myri10ge.c | 36 +- drivers/net/ethernet/natsemi/ns83820.c | 11 +- drivers/net/ethernet/neterion/s2io.c | 34 +- .../net/ethernet/netronome/nfp/crypto/tls.c | 8 +- drivers/net/ethernet/netronome/nfp/nfd3/dp.c | 4 +- drivers/net/ethernet/netronome/nfp/nfdk/dp.c | 4 +- drivers/net/ethernet/netronome/nfp/nfp_net.h | 1 + .../ethernet/netronome/nfp/nfp_net_common.c | 109 +-- .../net/ethernet/netronome/nfp/nfp_net_repr.c | 48 +- drivers/net/ethernet/netronome/nfp/nfp_port.c | 3 +- drivers/net/ethernet/ni/nixge.c | 4 +- drivers/net/ethernet/nvidia/forcedeth.c | 57 +- .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 14 +- .../ethernet/oki-semi/pch_gbe/pch_gbe_param.c | 4 +- drivers/net/ethernet/pasemi/pasemi_mac.c | 11 +- .../net/ethernet/pensando/ionic/ionic_lif.c | 108 +-- .../net/ethernet/pensando/ionic/ionic_txrx.c | 6 +- .../ethernet/qlogic/netxen/netxen_nic_init.c | 4 +- .../ethernet/qlogic/netxen/netxen_nic_main.c | 50 +- .../net/ethernet/qlogic/qede/qede_ethtool.c | 3 +- .../net/ethernet/qlogic/qede/qede_filter.c | 8 +- drivers/net/ethernet/qlogic/qede/qede_fp.c | 6 +- drivers/net/ethernet/qlogic/qede/qede_main.c | 81 +- drivers/net/ethernet/qlogic/qla3xxx.c | 9 +- .../net/ethernet/qlogic/qlcnic/qlcnic_hw.c | 57 +- .../net/ethernet/qlogic/qlcnic/qlcnic_io.c | 2 +- .../net/ethernet/qlogic/qlcnic/qlcnic_main.c | 52 +- drivers/net/ethernet/qualcomm/emac/emac-mac.c | 4 +- drivers/net/ethernet/qualcomm/emac/emac.c | 27 +- .../ethernet/qualcomm/rmnet/rmnet_map_data.c | 7 +- .../net/ethernet/qualcomm/rmnet/rmnet_vnd.c | 14 +- drivers/net/ethernet/realtek/8139cp.c | 38 +- drivers/net/ethernet/realtek/8139too.c | 26 +- drivers/net/ethernet/realtek/r8169_main.c | 70 +- drivers/net/ethernet/renesas/ravb.h | 4 +- drivers/net/ethernet/renesas/ravb_main.c | 39 +- drivers/net/ethernet/renesas/sh_eth.c | 20 +- drivers/net/ethernet/rocker/rocker_main.c | 4 +- .../net/ethernet/samsung/sxgbe/sxgbe_common.h | 7 +- .../net/ethernet/samsung/sxgbe/sxgbe_main.c | 24 +- drivers/net/ethernet/sfc/ef10.c | 35 +- drivers/net/ethernet/sfc/ef100_netdev.c | 15 +- drivers/net/ethernet/sfc/ef100_nic.c | 33 +- drivers/net/ethernet/sfc/ef100_rep.c | 4 +- drivers/net/ethernet/sfc/ef100_rx.c | 4 +- drivers/net/ethernet/sfc/ef100_tx.c | 8 +- drivers/net/ethernet/sfc/ef10_sriov.c | 6 +- drivers/net/ethernet/sfc/efx.c | 72 +- drivers/net/ethernet/sfc/efx_common.c | 28 +- drivers/net/ethernet/sfc/falcon/efx.c | 62 +- drivers/net/ethernet/sfc/falcon/efx.h | 3 + drivers/net/ethernet/sfc/falcon/falcon.c | 4 +- drivers/net/ethernet/sfc/falcon/net_driver.h | 5 +- drivers/net/ethernet/sfc/falcon/rx.c | 4 +- drivers/net/ethernet/sfc/mcdi_filters.c | 15 +- drivers/net/ethernet/sfc/mcdi_port_common.c | 2 +- drivers/net/ethernet/sfc/net_driver.h | 5 +- drivers/net/ethernet/sfc/rx.c | 2 +- drivers/net/ethernet/sfc/rx_common.c | 5 +- drivers/net/ethernet/sfc/rx_common.h | 4 + drivers/net/ethernet/sfc/siena/efx.c | 56 +- drivers/net/ethernet/sfc/siena/efx.h | 2 + drivers/net/ethernet/sfc/siena/efx_common.c | 28 +- drivers/net/ethernet/sfc/siena/farch.c | 2 +- .../net/ethernet/sfc/siena/mcdi_port_common.c | 2 +- drivers/net/ethernet/sfc/siena/net_driver.h | 5 +- drivers/net/ethernet/sfc/siena/rx.c | 2 +- drivers/net/ethernet/sfc/siena/rx_common.c | 4 +- drivers/net/ethernet/sfc/siena/siena.c | 3 +- drivers/net/ethernet/sfc/siena/tx_common.c | 2 +- drivers/net/ethernet/sfc/tx_common.c | 2 +- drivers/net/ethernet/sgi/ioc3-eth.c | 15 +- drivers/net/ethernet/silan/sc92031.c | 11 +- drivers/net/ethernet/socionext/netsec.c | 13 +- drivers/net/ethernet/socionext/sni_ave.c | 7 +- .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 2 +- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 53 +- .../stmicro/stmmac/stmmac_selftests.c | 4 +- drivers/net/ethernet/sun/cassini.c | 9 +- drivers/net/ethernet/sun/ldmvsw.c | 7 +- drivers/net/ethernet/sun/niu.c | 16 +- drivers/net/ethernet/sun/sungem.c | 13 +- drivers/net/ethernet/sun/sunhme.c | 15 +- drivers/net/ethernet/sun/sunvnet.c | 10 +- drivers/net/ethernet/sun/sunvnet_common.c | 4 +- .../net/ethernet/synopsys/dwc-xlgmac-common.c | 27 +- drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c | 14 +- .../net/ethernet/synopsys/dwc-xlgmac-net.c | 30 +- drivers/net/ethernet/synopsys/dwc-xlgmac.h | 1 + drivers/net/ethernet/tehuti/tehuti.c | 27 +- drivers/net/ethernet/tehuti/tehuti.h | 1 + drivers/net/ethernet/ti/am65-cpsw-nuss.c | 23 +- drivers/net/ethernet/ti/cpsw.c | 7 +- drivers/net/ethernet/ti/cpsw_new.c | 11 +- drivers/net/ethernet/ti/netcp_core.c | 6 +- drivers/net/ethernet/toshiba/ps3_gelic_net.c | 13 +- drivers/net/ethernet/toshiba/spider_net.c | 11 +- drivers/net/ethernet/tundra/tsi108_eth.c | 3 +- drivers/net/ethernet/via/via-rhine.c | 11 +- drivers/net/ethernet/via/via-velocity.c | 19 +- .../net/ethernet/wangxun/txgbe/txgbe_main.c | 3 +- drivers/net/ethernet/wiznet/w5100.c | 3 +- drivers/net/ethernet/wiznet/w5300.c | 3 +- drivers/net/ethernet/xilinx/ll_temac_main.c | 6 +- .../net/ethernet/xilinx/xilinx_axienet_main.c | 8 +- drivers/net/fjes/fjes_main.c | 3 +- drivers/net/geneve.c | 24 +- drivers/net/gtp.c | 2 +- drivers/net/hamradio/bpqether.c | 4 +- drivers/net/hyperv/hyperv_net.h | 5 +- drivers/net/hyperv/netvsc_bpf.c | 2 +- drivers/net/hyperv/netvsc_drv.c | 32 +- drivers/net/hyperv/rndis_filter.c | 27 +- drivers/net/ifb.c | 27 +- drivers/net/ipa/ipa_modem.c | 4 +- drivers/net/ipvlan/ipvlan_main.c | 83 +- drivers/net/ipvlan/ipvtap.c | 12 +- drivers/net/loopback.c | 25 +- drivers/net/macsec.c | 41 +- drivers/net/macvlan.c | 88 ++- drivers/net/macvtap.c | 12 +- drivers/net/net_failover.c | 46 +- drivers/net/netdevsim/ipsec.c | 13 +- drivers/net/netdevsim/netdev.c | 19 +- drivers/net/netdevsim/netdevsim.h | 1 + drivers/net/nlmon.c | 11 +- drivers/net/ntb_netdev.c | 4 +- drivers/net/ppp/ppp_generic.c | 3 +- drivers/net/rionet.c | 4 +- drivers/net/tap.c | 40 +- drivers/net/team/team.c | 67 +- drivers/net/thunderbolt.c | 14 +- drivers/net/tun.c | 57 +- drivers/net/usb/aqc111.c | 62 +- drivers/net/usb/aqc111.h | 14 - drivers/net/usb/ax88179_178a.c | 23 +- drivers/net/usb/cdc-phonet.c | 3 +- drivers/net/usb/cdc_mbim.c | 4 +- drivers/net/usb/lan78xx.c | 34 +- drivers/net/usb/r8152.c | 81 +- drivers/net/usb/smsc75xx.c | 18 +- drivers/net/usb/smsc95xx.c | 17 +- drivers/net/veth.c | 72 +- drivers/net/virtio_net.c | 59 +- drivers/net/vmxnet3/vmxnet3_drv.c | 82 +- drivers/net/vmxnet3/vmxnet3_ethtool.c | 93 ++- drivers/net/vmxnet3/vmxnet3_int.h | 1 + drivers/net/vrf.c | 20 +- drivers/net/vsockmon.c | 11 +- drivers/net/vxlan/vxlan_core.c | 24 +- drivers/net/wireguard/device.c | 24 +- drivers/net/wireless/ath/ath10k/mac.c | 7 +- drivers/net/wireless/ath/ath11k/mac.c | 4 +- drivers/net/wireless/ath/ath6kl/core.h | 1 + drivers/net/wireless/ath/ath6kl/main.c | 16 +- drivers/net/wireless/ath/ath6kl/txrx.c | 4 +- drivers/net/wireless/ath/wil6210/netdev.c | 16 +- .../broadcom/brcm80211/brcmfmac/core.c | 5 +- drivers/net/wireless/intel/iwlwifi/cfg/1000.c | 2 + drivers/net/wireless/intel/iwlwifi/cfg/2000.c | 4 + .../net/wireless/intel/iwlwifi/cfg/22000.c | 4 +- drivers/net/wireless/intel/iwlwifi/cfg/5000.c | 3 + drivers/net/wireless/intel/iwlwifi/cfg/6000.c | 7 + drivers/net/wireless/intel/iwlwifi/cfg/7000.c | 1 + drivers/net/wireless/intel/iwlwifi/cfg/8000.c | 2 +- drivers/net/wireless/intel/iwlwifi/cfg/9000.c | 2 +- .../net/wireless/intel/iwlwifi/dvm/mac80211.c | 8 +- .../net/wireless/intel/iwlwifi/iwl-config.h | 15 +- drivers/net/wireless/intel/iwlwifi/iwl-drv.c | 33 + .../net/wireless/intel/iwlwifi/mvm/mac80211.c | 15 +- drivers/net/wireless/intel/iwlwifi/mvm/mvm.h | 8 + drivers/net/wireless/intel/iwlwifi/mvm/ops.c | 28 + drivers/net/wireless/intel/iwlwifi/mvm/rx.c | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/tx.c | 11 +- .../net/wireless/mediatek/mt76/mt7615/init.c | 4 +- .../net/wireless/mediatek/mt76/mt7915/init.c | 4 +- .../net/wireless/mediatek/mt76/mt7921/init.c | 4 +- drivers/net/wwan/t7xx/t7xx_netdev.c | 16 +- drivers/net/xen-netback/interface.c | 27 +- drivers/net/xen-netfront.c | 42 +- drivers/s390/net/qeth_core_main.c | 109 +-- drivers/s390/net/qeth_l2_main.c | 34 +- drivers/s390/net/qeth_l3_main.c | 37 +- drivers/scsi/fcoe/fcoe.c | 12 +- drivers/staging/octeon/ethernet.c | 9 +- drivers/staging/qlge/qlge_main.c | 47 +- drivers/usb/gadget/function/f_phonet.c | 3 +- include/linux/if_vlan.h | 14 +- include/linux/netdev_features.h | 221 +++--- include/linux/netdev_features_helper.h | 742 ++++++++++++++++++ include/linux/netdevice.h | 110 +-- include/linux/skbuff.h | 4 +- include/net/bonding.h | 5 +- include/net/ip_tunnels.h | 2 +- include/net/net_failover.h | 8 +- include/net/pkt_cls.h | 2 +- include/net/sock.h | 5 +- include/net/udp.h | 7 +- include/net/udp_tunnel.h | 8 +- include/net/vxlan.h | 2 +- lib/test_bpf.c | 42 +- lib/vsprintf.c | 11 +- net/8021q/vlan.c | 6 +- net/8021q/vlan.h | 18 +- net/8021q/vlan_core.c | 4 +- net/8021q/vlan_dev.c | 42 +- net/batman-adv/soft-interface.c | 9 +- net/bridge/br_device.c | 27 +- net/bridge/br_if.c | 2 +- net/core/Makefile | 2 +- net/core/dev.c | 350 ++++++--- net/core/netdev_features.c | 281 +++++++ net/core/pktgen.c | 6 +- net/core/skbuff.c | 10 +- net/core/skmsg.c | 2 +- net/core/sock.c | 14 +- net/dccp/ipv4.c | 2 +- net/dccp/ipv6.c | 8 +- net/dsa/slave.c | 26 +- net/ethtool/features.c | 95 +-- net/ethtool/ioctl.c | 133 ++-- net/hsr/hsr_device.c | 21 +- net/hsr/hsr_forward.c | 8 +- net/hsr/hsr_framereg.c | 2 +- net/hsr/hsr_slave.c | 2 +- net/ieee802154/6lowpan/core.c | 3 +- net/ieee802154/core.c | 15 +- net/ipv4/af_inet.c | 4 +- net/ipv4/esp4_offload.c | 22 +- net/ipv4/gre_offload.c | 6 +- net/ipv4/ip_gre.c | 31 +- net/ipv4/ip_output.c | 19 +- net/ipv4/ip_tunnel.c | 3 +- net/ipv4/ip_vti.c | 3 +- net/ipv4/ipip.c | 21 +- net/ipv4/ipmr.c | 2 +- net/ipv4/tcp.c | 8 +- net/ipv4/tcp_ipv4.c | 2 +- net/ipv4/tcp_offload.c | 3 +- net/ipv4/udp_offload.c | 20 +- net/ipv6/af_inet6.c | 2 +- net/ipv6/esp6_offload.c | 16 +- net/ipv6/inet6_connection_sock.c | 2 +- net/ipv6/ip6_gre.c | 21 +- net/ipv6/ip6_offload.c | 2 +- net/ipv6/ip6_output.c | 15 +- net/ipv6/ip6_tunnel.c | 23 +- net/ipv6/ip6mr.c | 3 +- net/ipv6/sit.c | 23 +- net/ipv6/tcp_ipv6.c | 2 +- net/ipv6/udp_offload.c | 2 +- net/l2tp/l2tp_eth.c | 2 +- net/mac80211/ieee80211_i.h | 13 +- net/mac80211/iface.c | 9 +- net/mac80211/main.c | 28 +- net/mac80211/tx.c | 2 +- net/mpls/mpls_gso.c | 3 +- net/netfilter/ipvs/ip_vs_proto_sctp.c | 2 +- net/netfilter/nfnetlink_queue.c | 2 +- net/nsh/nsh.c | 5 +- net/openvswitch/datapath.c | 7 +- net/openvswitch/vport-internal_dev.c | 21 +- net/phonet/pep-gprs.c | 4 +- net/sched/sch_cake.c | 2 +- net/sched/sch_netem.c | 2 +- net/sched/sch_taprio.c | 2 +- net/sched/sch_tbf.c | 3 +- net/sctp/offload.c | 12 +- net/sctp/output.c | 2 +- net/sunrpc/sunrpc.h | 2 +- net/tls/tls_device.c | 8 +- net/wireless/core.c | 15 +- net/xfrm/xfrm_device.c | 26 +- net/xfrm/xfrm_interface.c | 18 +- net/xfrm/xfrm_output.c | 5 +- 481 files changed, 8116 insertions(+), 4331 deletions(-) create mode 100644 include/linux/netdev_features_helper.h create mode 100644 net/core/netdev_features.c -- 2.33.0

4 61

[RFCv7 PATCH net-next 00/36] net: extend the type of netdev_features_t to bitmap
by Jian Shen 09 Aug '22

09 Aug '22

For the prototype of netdev_features_t is u64, and the number of netdevice feature bits is 64 now. So there is no space to introduce new feature bit. This patchset try to solve it by change the prototype of netdev_features_t from u64 to structure below: typedef struct { DECLARE_BITMAP(bits, NETDEV_FEATURE_COUNT); } netdev_features_t; With this change, it's necessary to introduce a set of bitmap operation helpers for netdev features. [patch 1] To avoid mistake using NETIF_F_XXX as NETIF_F_XXX_BIT as input macroes for above helpers, remove all the macroes of NETIF_F_XXX. Serveal macroes remained temporarily by some precompile dependency.[patch 36] The features group macroes in netdev_features.h are replaced by a set of const features defined in netdev_features.c. [patch 2-3] For example: macro NETIF_F_ALL_TSO is replaced by netdev_all_tso_features There are some drivers(e.g. sfc) use netdev_features in global structure initialization. Changed the its netdev_features_t memeber to netdev_features_t *, and make it prefer to a netdev_features_t global variables. [patch 4~9] Also, there are many feature group(e.g. NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK) are used by several drivers, replaces them with global netdev features variables, in order to simple the expressions.[patch 10~13] As suggestion from Andrew Lunn, I wrote some semantic patches to do the work(replacing the netdev features operator by helpers). To make the semantic patches simple, I split the complex expressions of netdev_features to simple logical operation. [patch 14~15] For the prototype of netdev_features_t is no longer u64, so it's incorrect to assigne 0 to it, use netdev_empty_features intead. [patch 16] Some drivers defines macroes and functions wich use NETIF_F_XXX as parameter. For all the macroes NETIF_F_XXX will be removed at last, so change these macroes and functions to use NETIF_F_XXX_BIT. [patch 17~23] With above preparation, then apply the semantic patches to do the expression transition. For example, replace expression "ndev->hw_features |= NETIF_F_TSO;" by "netdev_hw_feature_set(ndev, NETIF_F_TSO_BIT)". [patch 24~35] With the prototype is no longer u64, the implementation of print interface for netdev features(%pNF) is changed to bitmap. [patch 36] I removed the netdev_features_copy and netdev_xxx_features() helpers in this patchset. It make the expressions being more complex. For example, expression "dev->features = dev->hw_features", it's too ugly to use "netdev_active_features_copy(dev, netdev_hw_features(hw))". I will try to find better way for this, avoiding the nic drivers to modify netdev_features directly. The former discussion please see [1][2][3][4][5]. [1]:https://www.spinics.net/lists/netdev/msg769952.html [2]:https://www.spinics.net/lists/netdev/msg777764.html [3]:https://lore.kernel.org/netdev/20211107101519.29264-1-shenjian15@huawei.… [4]:https://www.spinics.net/lists/netdev/msg809293.html [5]:https://www.spinics.net/lists/netdev/msg814349.html ChangeLog: V6->V7: Add netdev_feature_change helpers, remove netdev_features_copy and netdev_xxx_features helpers. Complete the treewide netdev features changes. Suggestions from Alexander Lobakin: refine the definition of DECLARE_NETDEV_FEATURE_SET, and remove useless blank lines. V5-V6: suggestions from Jakub Kicinski: drop the rename for netdev->features simplify names of some helpers, and move them to a new header file refine the implement for netdev_features_set_array V4->V5: adjust the patch structure, use semantic patch with coccinelle V3->V4: rename netdev->features to netdev->active_features remove helpes for handle first 64 bits remove __NETIF_F(name) macroes replace features group macroes with const features V2->V3: use structure for bitmap, suggest by Edward Cree V1->V2: Extend the prototype from u64 to bitmap, suggest by Andrew Lunn Jian Shen (36): net: introduce operation helpers for netdev features net: replace general features macroes with global netdev_features variables net: replace multiple feature bits with DECLARE_NETDEV_FEATURE_SET net: sfc: replace const features initialization with DECLARE_NETDEV_FEATURE_SET net: atlantic: replace const features initialization with NETDEV_FEATURE_SET iwlwifi: replace const features initialization with NETDEV_FEATURE_SET net: ethernet: mtk_eth_soc: replace const features initialization with NETDEV_FEATURE_SET ravb: replace const features initialization with NETDEV_FEATURE_SET test_bpf: replace const features initialization with NETDEV_FEATURE_SET treewide: replace NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK by netdev_csum_gso_features_mask treewide: replace NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM by netdev_ip_csum_features treewide: replace NETIF_F_TSO | NETIF_F_TSO6 by netdev_general_tso_features treewide: replace VLAN tag feature array by const vlan features net: simplify the netdev features expressions for xxx_gso_segment treewide: simplify the netdev features expression treewide: use replace features '0' by netdev_empty_features treewide: adjust features initialization net: mlx4: adjust the net device feature relative macroes net: mlx5e: adjust net device feature relative macroes net: mlxsw: adjust input parameter for function mlxsw_sp_handle_feature net: iavf: adjust net device features relative macroes net: core: adjust netdev_sync_xxx_features net: adjust the build check for net_gso_ok() treewide: use netdev_feature_add helpers treewide: use netdev_features_or/set helpers treewide: use netdev_feature_change helpers treewide: use netdev_feature_del helpers treewide: use netdev_features_andnot and netdev_features_clear helpers treewide: use netdev_features_xor helpers treewide: use netdev_feature_test helpers treewide: use netdev_features_intersects helpers net: use netdev_features_and and netdev_features_mask helpers treewide: use netdev_features_subset helpers treewide: use netdev_features_equal helpers treewide: use netdev_features_empty helpers net: redefine the prototype of netdev_features_t arch/um/drivers/vector_kern.c | 9 +- arch/um/drivers/vector_transports.c | 49 +- drivers/firewire/net.c | 4 +- drivers/hsi/clients/ssi_protocol.c | 2 +- drivers/infiniband/hw/hfi1/vnic_main.c | 4 +- drivers/infiniband/ulp/ipoib/ipoib.h | 1 + drivers/infiniband/ulp/ipoib/ipoib_cm.c | 2 +- drivers/infiniband/ulp/ipoib/ipoib_ib.c | 2 +- drivers/infiniband/ulp/ipoib/ipoib_main.c | 21 +- drivers/infiniband/ulp/ipoib/ipoib_verbs.c | 2 +- drivers/misc/sgi-xp/xpnet.c | 3 +- drivers/net/amt.c | 20 +- drivers/net/bareudp.c | 25 +- drivers/net/bonding/bond_main.c | 101 ++- drivers/net/bonding/bond_options.c | 9 +- drivers/net/caif/caif_serial.c | 2 +- drivers/net/can/dev/dev.c | 4 +- drivers/net/dsa/xrs700x/xrs700x.c | 15 +- drivers/net/dummy.c | 19 +- drivers/net/ethernet/3com/3c59x.c | 10 +- drivers/net/ethernet/3com/typhoon.c | 20 +- drivers/net/ethernet/adaptec/starfire.c | 12 +- drivers/net/ethernet/aeroflex/greth.c | 15 +- drivers/net/ethernet/alacritech/slicoss.c | 6 +- drivers/net/ethernet/alteon/acenic.c | 12 +- drivers/net/ethernet/altera/altera_tse_main.c | 10 +- drivers/net/ethernet/amazon/ena/ena_netdev.c | 49 +- drivers/net/ethernet/amd/amd8111e.c | 3 +- drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 14 +- drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 56 +- drivers/net/ethernet/amd/xgbe/xgbe-main.c | 69 +- drivers/net/ethernet/apm/xgene-v2/main.c | 4 +- drivers/net/ethernet/apm/xgene-v2/main.h | 1 + .../net/ethernet/apm/xgene/xgene_enet_main.c | 21 +- .../ethernet/aquantia/atlantic/aq_filters.c | 8 +- .../net/ethernet/aquantia/atlantic/aq_hw.h | 2 +- .../ethernet/aquantia/atlantic/aq_macsec.c | 2 +- .../ethernet/aquantia/atlantic/aq_macsec.h | 1 + .../net/ethernet/aquantia/atlantic/aq_main.c | 89 ++- .../net/ethernet/aquantia/atlantic/aq_nic.c | 29 +- .../net/ethernet/aquantia/atlantic/aq_nic.h | 6 +- .../net/ethernet/aquantia/atlantic/aq_ring.c | 3 +- .../aquantia/atlantic/hw_atl/hw_atl_a0.c | 8 +- .../aquantia/atlantic/hw_atl/hw_atl_b0.c | 17 +- .../aquantia/atlantic/hw_atl2/hw_atl2.c | 15 +- drivers/net/ethernet/asix/ax88796c_main.c | 29 +- drivers/net/ethernet/atheros/alx/main.c | 19 +- drivers/net/ethernet/atheros/atl1c/atl1c.h | 1 + .../net/ethernet/atheros/atl1c/atl1c_main.c | 34 +- drivers/net/ethernet/atheros/atl1e/atl1e.h | 1 + .../net/ethernet/atheros/atl1e/atl1e_main.c | 39 +- drivers/net/ethernet/atheros/atlx/atl1.c | 24 +- drivers/net/ethernet/atheros/atlx/atl2.c | 19 +- drivers/net/ethernet/atheros/atlx/atlx.c | 13 +- drivers/net/ethernet/broadcom/b44.c | 3 +- drivers/net/ethernet/broadcom/bcmsysport.c | 34 +- drivers/net/ethernet/broadcom/bgmac.c | 9 +- drivers/net/ethernet/broadcom/bnx2.c | 50 +- .../net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | 49 +- .../net/ethernet/broadcom/bnx2x/bnx2x_main.c | 115 ++- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 158 ++-- drivers/net/ethernet/broadcom/bnxt/bnxt.h | 6 +- drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c | 4 +- drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c | 3 +- drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c | 5 +- .../net/ethernet/broadcom/genet/bcmgenet.c | 16 +- drivers/net/ethernet/broadcom/tg3.c | 49 +- drivers/net/ethernet/brocade/bna/bnad.c | 51 +- drivers/net/ethernet/cadence/macb_main.c | 62 +- drivers/net/ethernet/calxeda/xgmac.c | 25 +- .../net/ethernet/cavium/liquidio/lio_core.c | 4 +- .../net/ethernet/cavium/liquidio/lio_main.c | 137 ++-- .../ethernet/cavium/liquidio/lio_vf_main.c | 114 +-- .../ethernet/cavium/liquidio/octeon_network.h | 4 +- .../net/ethernet/cavium/thunder/nicvf_main.c | 51 +- .../ethernet/cavium/thunder/nicvf_queues.c | 2 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 46 +- drivers/net/ethernet/chelsio/cxgb/sge.c | 8 +- .../net/ethernet/chelsio/cxgb3/cxgb3_main.c | 67 +- drivers/net/ethernet/chelsio/cxgb3/sge.c | 6 +- drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1 + .../net/ethernet/chelsio/cxgb4/cxgb4_fcoe.c | 16 +- .../net/ethernet/chelsio/cxgb4/cxgb4_main.c | 102 ++- .../net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.h | 2 +- drivers/net/ethernet/chelsio/cxgb4/sge.c | 8 +- .../ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 56 +- drivers/net/ethernet/chelsio/cxgb4vf/sge.c | 4 +- .../chelsio/inline_crypto/chtls/chtls_main.c | 2 +- drivers/net/ethernet/cirrus/ep93xx_eth.c | 7 +- drivers/net/ethernet/cisco/enic/enic_main.c | 62 +- drivers/net/ethernet/cortina/gemini.c | 29 +- drivers/net/ethernet/davicom/dm9000.c | 20 +- drivers/net/ethernet/davicom/dm9051.c | 2 +- drivers/net/ethernet/dnet.c | 3 +- drivers/net/ethernet/ec_bhf.c | 2 +- drivers/net/ethernet/emulex/benet/be_main.c | 64 +- drivers/net/ethernet/engleder/tsnep_main.c | 4 +- drivers/net/ethernet/ethoc.c | 3 +- drivers/net/ethernet/faraday/ftgmac100.c | 40 +- .../net/ethernet/freescale/dpaa/dpaa_eth.c | 25 +- .../net/ethernet/freescale/dpaa2/dpaa2-eth.c | 43 +- .../ethernet/freescale/dpaa2/dpaa2-switch.c | 10 +- .../ethernet/freescale/dpaa2/dpaa2-switch.h | 1 + drivers/net/ethernet/freescale/enetc/enetc.c | 26 +- .../net/ethernet/freescale/enetc/enetc_pf.c | 59 +- .../net/ethernet/freescale/enetc/enetc_vf.c | 42 +- drivers/net/ethernet/freescale/fec_main.c | 25 +- .../ethernet/freescale/fs_enet/fs_enet-main.c | 2 +- drivers/net/ethernet/freescale/gianfar.c | 40 +- .../net/ethernet/freescale/gianfar_ethtool.c | 7 +- .../ethernet/fungible/funeth/funeth_ktls.c | 5 +- .../ethernet/fungible/funeth/funeth_main.c | 55 +- .../net/ethernet/fungible/funeth/funeth_rx.c | 4 +- drivers/net/ethernet/google/gve/gve_adminq.c | 5 +- drivers/net/ethernet/google/gve/gve_main.c | 26 +- drivers/net/ethernet/google/gve/gve_rx.c | 4 +- drivers/net/ethernet/google/gve/gve_rx_dqo.c | 4 +- drivers/net/ethernet/hisilicon/hix5hd2_gmac.c | 8 +- drivers/net/ethernet/hisilicon/hns/hns_enet.c | 62 +- .../net/ethernet/hisilicon/hns3/hns3_enet.c | 101 ++- .../ethernet/hisilicon/hns3/hns3_ethtool.c | 4 +- .../net/ethernet/huawei/hinic/hinic_main.c | 86 +- drivers/net/ethernet/huawei/hinic/hinic_rx.c | 4 +- drivers/net/ethernet/ibm/ehea/ehea_main.c | 34 +- drivers/net/ethernet/ibm/emac/core.c | 10 +- drivers/net/ethernet/ibm/ibmveth.c | 58 +- drivers/net/ethernet/ibm/ibmvnic.c | 48 +- drivers/net/ethernet/intel/e100.c | 20 +- drivers/net/ethernet/intel/e1000/e1000.h | 1 + drivers/net/ethernet/intel/e1000/e1000_main.c | 71 +- drivers/net/ethernet/intel/e1000e/netdev.c | 109 +-- drivers/net/ethernet/intel/fm10k/fm10k.h | 1 + drivers/net/ethernet/intel/fm10k/fm10k_main.c | 6 +- .../net/ethernet/intel/fm10k/fm10k_netdev.c | 51 +- drivers/net/ethernet/intel/fm10k/fm10k_pci.c | 10 +- .../net/ethernet/intel/i40e/i40e_debugfs.c | 12 +- drivers/net/ethernet/intel/i40e/i40e_main.c | 133 ++-- drivers/net/ethernet/intel/i40e/i40e_txrx.c | 6 +- drivers/net/ethernet/intel/iavf/iavf.h | 1 + drivers/net/ethernet/intel/iavf/iavf_main.c | 231 +++--- drivers/net/ethernet/intel/iavf/iavf_txrx.c | 8 +- .../net/ethernet/intel/iavf/iavf_virtchnl.c | 4 +- drivers/net/ethernet/intel/ice/ice.h | 1 + drivers/net/ethernet/intel/ice/ice_main.c | 220 +++--- drivers/net/ethernet/intel/ice/ice_repr.c | 2 +- drivers/net/ethernet/intel/ice/ice_tc_lib.c | 2 +- drivers/net/ethernet/intel/ice/ice_txrx_lib.c | 8 +- drivers/net/ethernet/intel/igb/igb_ethtool.c | 2 +- drivers/net/ethernet/intel/igb/igb_main.c | 141 ++-- drivers/net/ethernet/intel/igbvf/netdev.c | 93 ++- drivers/net/ethernet/intel/igc/igc_ethtool.c | 2 +- drivers/net/ethernet/intel/igc/igc_mac.c | 1 + drivers/net/ethernet/intel/igc/igc_main.c | 127 +-- drivers/net/ethernet/intel/ixgb/ixgb_main.c | 38 +- drivers/net/ethernet/intel/ixgbe/ixgbe.h | 1 + .../net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c | 2 +- .../net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 2 +- drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c | 6 +- drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c | 2 +- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 231 +++--- .../net/ethernet/intel/ixgbe/ixgbe_sriov.c | 4 +- drivers/net/ethernet/intel/ixgbevf/ipsec.c | 17 +- drivers/net/ethernet/intel/ixgbevf/ixgbevf.h | 1 + .../net/ethernet/intel/ixgbevf/ixgbevf_main.c | 115 +-- drivers/net/ethernet/jme.c | 50 +- drivers/net/ethernet/marvell/mv643xx_eth.c | 13 +- drivers/net/ethernet/marvell/mvneta.c | 21 +- .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 61 +- .../ethernet/marvell/octeon_ep/octep_main.c | 6 +- .../marvell/octeontx2/nic/otx2_common.c | 27 +- .../marvell/octeontx2/nic/otx2_ethtool.c | 4 +- .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 56 +- .../marvell/octeontx2/nic/otx2_txrx.c | 6 +- .../ethernet/marvell/octeontx2/nic/otx2_vf.c | 32 +- .../ethernet/marvell/prestera/prestera_main.c | 4 +- drivers/net/ethernet/marvell/skge.c | 15 +- drivers/net/ethernet/marvell/sky2.c | 66 +- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 74 +- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 12 +- .../net/ethernet/mellanox/mlx4/en_ethtool.c | 4 +- drivers/net/ethernet/mellanox/mlx4/en_main.c | 7 +- .../net/ethernet/mellanox/mlx4/en_netdev.c | 170 ++-- .../net/ethernet/mellanox/mlx4/en_resources.c | 4 +- drivers/net/ethernet/mellanox/mlx4/en_rx.c | 14 +- drivers/net/ethernet/mellanox/mlx4/mlx4_en.h | 5 +- .../mellanox/mlx5/core/en_accel/ipsec.c | 16 +- .../mellanox/mlx5/core/en_accel/ipsec_rxtx.h | 4 +- .../mellanox/mlx5/core/en_accel/ktls.c | 10 +- .../net/ethernet/mellanox/mlx5/core/en_arfs.c | 4 +- .../ethernet/mellanox/mlx5/core/en_ethtool.c | 2 +- .../net/ethernet/mellanox/mlx5/core/en_fs.c | 2 +- .../net/ethernet/mellanox/mlx5/core/en_main.c | 215 ++--- .../net/ethernet/mellanox/mlx5/core/en_rep.c | 22 +- .../net/ethernet/mellanox/mlx5/core/en_rx.c | 8 +- .../net/ethernet/mellanox/mlx5/core/en_tc.c | 2 +- .../ethernet/mellanox/mlx5/core/ipoib/ipoib.c | 22 +- .../net/ethernet/mellanox/mlxsw/spectrum.c | 37 +- drivers/net/ethernet/micrel/ksz884x.c | 15 +- drivers/net/ethernet/microchip/lan743x_main.c | 9 +- .../ethernet/microchip/lan966x/lan966x_fdma.c | 2 +- .../ethernet/microchip/lan966x/lan966x_main.c | 6 +- .../ethernet/microchip/sparx5/sparx5_fdma.c | 2 +- drivers/net/ethernet/microsoft/mana/mana_en.c | 21 +- drivers/net/ethernet/mscc/ocelot.c | 2 +- drivers/net/ethernet/mscc/ocelot_net.c | 23 +- .../net/ethernet/myricom/myri10ge/myri10ge.c | 36 +- drivers/net/ethernet/natsemi/ns83820.c | 11 +- drivers/net/ethernet/neterion/s2io.c | 34 +- .../net/ethernet/netronome/nfp/crypto/tls.c | 8 +- drivers/net/ethernet/netronome/nfp/nfd3/dp.c | 4 +- drivers/net/ethernet/netronome/nfp/nfdk/dp.c | 4 +- drivers/net/ethernet/netronome/nfp/nfp_net.h | 1 + .../ethernet/netronome/nfp/nfp_net_common.c | 109 +-- .../net/ethernet/netronome/nfp/nfp_net_repr.c | 48 +- drivers/net/ethernet/netronome/nfp/nfp_port.c | 3 +- drivers/net/ethernet/ni/nixge.c | 4 +- drivers/net/ethernet/nvidia/forcedeth.c | 57 +- .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 14 +- .../ethernet/oki-semi/pch_gbe/pch_gbe_param.c | 4 +- drivers/net/ethernet/pasemi/pasemi_mac.c | 11 +- .../net/ethernet/pensando/ionic/ionic_lif.c | 110 +-- .../net/ethernet/pensando/ionic/ionic_txrx.c | 6 +- .../ethernet/qlogic/netxen/netxen_nic_init.c | 4 +- .../ethernet/qlogic/netxen/netxen_nic_main.c | 50 +- .../net/ethernet/qlogic/qede/qede_ethtool.c | 3 +- .../net/ethernet/qlogic/qede/qede_filter.c | 8 +- drivers/net/ethernet/qlogic/qede/qede_fp.c | 6 +- drivers/net/ethernet/qlogic/qede/qede_main.c | 81 +- drivers/net/ethernet/qlogic/qla3xxx.c | 9 +- .../net/ethernet/qlogic/qlcnic/qlcnic_hw.c | 57 +- .../net/ethernet/qlogic/qlcnic/qlcnic_io.c | 2 +- .../net/ethernet/qlogic/qlcnic/qlcnic_main.c | 52 +- drivers/net/ethernet/qualcomm/emac/emac-mac.c | 4 +- drivers/net/ethernet/qualcomm/emac/emac.c | 27 +- .../ethernet/qualcomm/rmnet/rmnet_map_data.c | 7 +- .../net/ethernet/qualcomm/rmnet/rmnet_vnd.c | 14 +- drivers/net/ethernet/realtek/8139cp.c | 38 +- drivers/net/ethernet/realtek/8139too.c | 26 +- drivers/net/ethernet/realtek/r8169_main.c | 70 +- drivers/net/ethernet/renesas/ravb.h | 4 +- drivers/net/ethernet/renesas/ravb_main.c | 39 +- drivers/net/ethernet/renesas/sh_eth.c | 20 +- drivers/net/ethernet/rocker/rocker_main.c | 4 +- .../net/ethernet/samsung/sxgbe/sxgbe_common.h | 7 +- .../net/ethernet/samsung/sxgbe/sxgbe_main.c | 24 +- drivers/net/ethernet/sfc/ef10.c | 35 +- drivers/net/ethernet/sfc/ef100_netdev.c | 15 +- drivers/net/ethernet/sfc/ef100_nic.c | 33 +- drivers/net/ethernet/sfc/ef100_rep.c | 4 +- drivers/net/ethernet/sfc/ef100_rx.c | 4 +- drivers/net/ethernet/sfc/ef100_tx.c | 8 +- drivers/net/ethernet/sfc/ef10_sriov.c | 6 +- drivers/net/ethernet/sfc/efx.c | 72 +- drivers/net/ethernet/sfc/efx_common.c | 28 +- drivers/net/ethernet/sfc/falcon/efx.c | 62 +- drivers/net/ethernet/sfc/falcon/efx.h | 3 + drivers/net/ethernet/sfc/falcon/falcon.c | 4 +- drivers/net/ethernet/sfc/falcon/net_driver.h | 5 +- drivers/net/ethernet/sfc/falcon/rx.c | 4 +- drivers/net/ethernet/sfc/mcdi_filters.c | 15 +- drivers/net/ethernet/sfc/mcdi_port_common.c | 2 +- drivers/net/ethernet/sfc/net_driver.h | 5 +- drivers/net/ethernet/sfc/rx.c | 2 +- drivers/net/ethernet/sfc/rx_common.c | 5 +- drivers/net/ethernet/sfc/rx_common.h | 4 + drivers/net/ethernet/sfc/siena/efx.c | 56 +- drivers/net/ethernet/sfc/siena/efx.h | 2 + drivers/net/ethernet/sfc/siena/efx_common.c | 28 +- drivers/net/ethernet/sfc/siena/farch.c | 2 +- .../net/ethernet/sfc/siena/mcdi_port_common.c | 2 +- drivers/net/ethernet/sfc/siena/net_driver.h | 5 +- drivers/net/ethernet/sfc/siena/rx.c | 2 +- drivers/net/ethernet/sfc/siena/rx_common.c | 4 +- drivers/net/ethernet/sfc/siena/siena.c | 3 +- drivers/net/ethernet/sfc/siena/tx_common.c | 2 +- drivers/net/ethernet/sfc/tx_common.c | 2 +- drivers/net/ethernet/sgi/ioc3-eth.c | 15 +- drivers/net/ethernet/silan/sc92031.c | 11 +- drivers/net/ethernet/socionext/netsec.c | 13 +- drivers/net/ethernet/socionext/sni_ave.c | 7 +- .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 2 +- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 53 +- .../stmicro/stmmac/stmmac_selftests.c | 4 +- drivers/net/ethernet/sun/cassini.c | 9 +- drivers/net/ethernet/sun/ldmvsw.c | 7 +- drivers/net/ethernet/sun/niu.c | 16 +- drivers/net/ethernet/sun/sungem.c | 13 +- drivers/net/ethernet/sun/sunhme.c | 15 +- drivers/net/ethernet/sun/sunvnet.c | 10 +- drivers/net/ethernet/sun/sunvnet_common.c | 4 +- .../net/ethernet/synopsys/dwc-xlgmac-common.c | 27 +- drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c | 14 +- .../net/ethernet/synopsys/dwc-xlgmac-net.c | 30 +- drivers/net/ethernet/synopsys/dwc-xlgmac.h | 1 + drivers/net/ethernet/tehuti/tehuti.c | 27 +- drivers/net/ethernet/tehuti/tehuti.h | 1 + drivers/net/ethernet/ti/am65-cpsw-nuss.c | 23 +- drivers/net/ethernet/ti/cpsw.c | 7 +- drivers/net/ethernet/ti/cpsw_new.c | 11 +- drivers/net/ethernet/ti/netcp_core.c | 6 +- drivers/net/ethernet/toshiba/ps3_gelic_net.c | 13 +- drivers/net/ethernet/toshiba/spider_net.c | 11 +- drivers/net/ethernet/tundra/tsi108_eth.c | 3 +- drivers/net/ethernet/via/via-rhine.c | 11 +- drivers/net/ethernet/via/via-velocity.c | 19 +- .../net/ethernet/wangxun/txgbe/txgbe_main.c | 3 +- drivers/net/ethernet/wiznet/w5100.c | 3 +- drivers/net/ethernet/wiznet/w5300.c | 3 +- drivers/net/ethernet/xilinx/ll_temac_main.c | 6 +- .../net/ethernet/xilinx/xilinx_axienet_main.c | 8 +- drivers/net/fjes/fjes_main.c | 3 +- drivers/net/geneve.c | 24 +- drivers/net/gtp.c | 2 +- drivers/net/hamradio/bpqether.c | 4 +- drivers/net/hyperv/hyperv_net.h | 5 +- drivers/net/hyperv/netvsc_bpf.c | 2 +- drivers/net/hyperv/netvsc_drv.c | 32 +- drivers/net/hyperv/rndis_filter.c | 27 +- drivers/net/ifb.c | 27 +- drivers/net/ipa/ipa_modem.c | 4 +- drivers/net/ipvlan/ipvlan_main.c | 83 +- drivers/net/ipvlan/ipvtap.c | 12 +- drivers/net/loopback.c | 25 +- drivers/net/macsec.c | 41 +- drivers/net/macvlan.c | 88 ++- drivers/net/macvtap.c | 12 +- drivers/net/net_failover.c | 37 +- drivers/net/netdevsim/ipsec.c | 13 +- drivers/net/netdevsim/netdev.c | 19 +- drivers/net/netdevsim/netdevsim.h | 1 + drivers/net/nlmon.c | 11 +- drivers/net/ntb_netdev.c | 4 +- drivers/net/ppp/ppp_generic.c | 3 +- drivers/net/rionet.c | 4 +- drivers/net/tap.c | 40 +- drivers/net/team/team.c | 67 +- drivers/net/thunderbolt.c | 14 +- drivers/net/tun.c | 57 +- drivers/net/usb/aqc111.c | 62 +- drivers/net/usb/aqc111.h | 14 - drivers/net/usb/ax88179_178a.c | 23 +- drivers/net/usb/cdc-phonet.c | 3 +- drivers/net/usb/cdc_mbim.c | 4 +- drivers/net/usb/lan78xx.c | 34 +- drivers/net/usb/r8152.c | 81 +- drivers/net/usb/smsc75xx.c | 18 +- drivers/net/usb/smsc95xx.c | 17 +- drivers/net/veth.c | 72 +- drivers/net/virtio_net.c | 59 +- drivers/net/vmxnet3/vmxnet3_drv.c | 82 +- drivers/net/vmxnet3/vmxnet3_ethtool.c | 93 ++- drivers/net/vmxnet3/vmxnet3_int.h | 1 + drivers/net/vrf.c | 20 +- drivers/net/vsockmon.c | 11 +- drivers/net/vxlan/vxlan_core.c | 24 +- drivers/net/wireguard/device.c | 24 +- drivers/net/wireless/ath/ath10k/mac.c | 7 +- drivers/net/wireless/ath/ath11k/mac.c | 4 +- drivers/net/wireless/ath/ath6kl/core.h | 1 + drivers/net/wireless/ath/ath6kl/main.c | 16 +- drivers/net/wireless/ath/ath6kl/txrx.c | 4 +- drivers/net/wireless/ath/wil6210/netdev.c | 16 +- .../broadcom/brcm80211/brcmfmac/core.c | 5 +- drivers/net/wireless/intel/iwlwifi/cfg/1000.c | 2 + drivers/net/wireless/intel/iwlwifi/cfg/2000.c | 4 + .../net/wireless/intel/iwlwifi/cfg/22000.c | 4 +- drivers/net/wireless/intel/iwlwifi/cfg/5000.c | 3 + drivers/net/wireless/intel/iwlwifi/cfg/6000.c | 7 + drivers/net/wireless/intel/iwlwifi/cfg/7000.c | 1 + drivers/net/wireless/intel/iwlwifi/cfg/8000.c | 2 +- drivers/net/wireless/intel/iwlwifi/cfg/9000.c | 2 +- .../net/wireless/intel/iwlwifi/dvm/mac80211.c | 8 +- .../net/wireless/intel/iwlwifi/iwl-config.h | 15 +- drivers/net/wireless/intel/iwlwifi/iwl-drv.c | 33 + .../net/wireless/intel/iwlwifi/mvm/mac80211.c | 15 +- drivers/net/wireless/intel/iwlwifi/mvm/mvm.h | 8 + drivers/net/wireless/intel/iwlwifi/mvm/ops.c | 28 + drivers/net/wireless/intel/iwlwifi/mvm/rx.c | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/tx.c | 11 +- .../net/wireless/mediatek/mt76/mt7615/init.c | 4 +- .../net/wireless/mediatek/mt76/mt7915/init.c | 4 +- .../net/wireless/mediatek/mt76/mt7921/init.c | 4 +- drivers/net/wwan/t7xx/t7xx_netdev.c | 16 +- drivers/net/xen-netback/interface.c | 27 +- drivers/net/xen-netfront.c | 42 +- drivers/s390/net/qeth_core_main.c | 109 +-- drivers/s390/net/qeth_l2_main.c | 34 +- drivers/s390/net/qeth_l3_main.c | 37 +- drivers/scsi/fcoe/fcoe.c | 12 +- drivers/staging/octeon/ethernet.c | 9 +- drivers/staging/qlge/qlge_main.c | 47 +- drivers/usb/gadget/function/f_phonet.c | 3 +- include/linux/if_vlan.h | 14 +- include/linux/netdev_features.h | 221 +++--- include/linux/netdev_features_helper.h | 742 ++++++++++++++++++ include/linux/netdevice.h | 110 +-- include/linux/skbuff.h | 4 +- include/net/bonding.h | 5 +- include/net/ip_tunnels.h | 2 +- include/net/net_failover.h | 8 +- include/net/pkt_cls.h | 2 +- include/net/sock.h | 5 +- include/net/udp.h | 7 +- include/net/udp_tunnel.h | 8 +- include/net/vxlan.h | 2 +- lib/test_bpf.c | 42 +- lib/vsprintf.c | 11 +- net/8021q/vlan.c | 6 +- net/8021q/vlan.h | 18 +- net/8021q/vlan_core.c | 4 +- net/8021q/vlan_dev.c | 42 +- net/batman-adv/soft-interface.c | 9 +- net/bridge/br_device.c | 27 +- net/bridge/br_if.c | 2 +- net/core/Makefile | 2 +- net/core/dev.c | 350 ++++++--- net/core/netdev_features.c | 281 +++++++ net/core/pktgen.c | 6 +- net/core/skbuff.c | 9 +- net/core/skmsg.c | 2 +- net/core/sock.c | 14 +- net/dccp/ipv4.c | 2 +- net/dccp/ipv6.c | 8 +- net/dsa/slave.c | 26 +- net/ethtool/features.c | 95 +-- net/ethtool/ioctl.c | 133 ++-- net/hsr/hsr_device.c | 21 +- net/hsr/hsr_forward.c | 8 +- net/hsr/hsr_framereg.c | 2 +- net/hsr/hsr_slave.c | 2 +- net/ieee802154/6lowpan/core.c | 3 +- net/ieee802154/core.c | 15 +- net/ipv4/af_inet.c | 4 +- net/ipv4/esp4_offload.c | 22 +- net/ipv4/gre_offload.c | 6 +- net/ipv4/ip_gre.c | 31 +- net/ipv4/ip_output.c | 19 +- net/ipv4/ip_tunnel.c | 3 +- net/ipv4/ip_vti.c | 3 +- net/ipv4/ipip.c | 21 +- net/ipv4/ipmr.c | 2 +- net/ipv4/tcp.c | 8 +- net/ipv4/tcp_ipv4.c | 2 +- net/ipv4/tcp_offload.c | 3 +- net/ipv4/udp_offload.c | 20 +- net/ipv6/af_inet6.c | 2 +- net/ipv6/esp6_offload.c | 16 +- net/ipv6/inet6_connection_sock.c | 2 +- net/ipv6/ip6_gre.c | 21 +- net/ipv6/ip6_offload.c | 2 +- net/ipv6/ip6_output.c | 15 +- net/ipv6/ip6_tunnel.c | 23 +- net/ipv6/ip6mr.c | 3 +- net/ipv6/sit.c | 23 +- net/ipv6/tcp_ipv6.c | 2 +- net/ipv6/udp_offload.c | 2 +- net/l2tp/l2tp_eth.c | 2 +- net/mac80211/ieee80211_i.h | 13 +- net/mac80211/iface.c | 9 +- net/mac80211/main.c | 28 +- net/mac80211/tx.c | 2 +- net/mpls/mpls_gso.c | 3 +- net/netfilter/ipvs/ip_vs_proto_sctp.c | 2 +- net/netfilter/nfnetlink_queue.c | 2 +- net/nsh/nsh.c | 5 +- net/openvswitch/datapath.c | 7 +- net/openvswitch/vport-internal_dev.c | 21 +- net/phonet/pep-gprs.c | 4 +- net/sched/sch_cake.c | 2 +- net/sched/sch_netem.c | 2 +- net/sched/sch_taprio.c | 2 +- net/sched/sch_tbf.c | 3 +- net/sctp/offload.c | 12 +- net/sctp/output.c | 2 +- net/sunrpc/sunrpc.h | 2 +- net/tls/tls_device.c | 8 +- net/wireless/core.c | 15 +- net/xfrm/xfrm_device.c | 26 +- net/xfrm/xfrm_interface.c | 18 +- net/xfrm/xfrm_output.c | 5 +- 481 files changed, 8105 insertions(+), 4331 deletions(-) create mode 100644 include/linux/netdev_features_helper.h create mode 100644 net/core/netdev_features.c -- 2.33.0

5 58

Hello
by JENNY MALTY 07 Aug '22

07 Aug '22

Hello , I’m Jenny, a research assistant of the Research and Development Department working at one of the leading Bio Pharmaceutical Companies here in England. I'm looking for a reliable person in your region to represent my company in sourcing some of our basic raw materials used in the manufacturing of high quality anti-viral vaccines, cancer treatment and other lifesaving pharmaceutical products. This may not be your area of specialization but it will be another income generating business out of your specialty. This is because our company is yet to locate any seller to buy from, however, I have been able to discover a local dealer who can supply us with this product. He is selling at a cheap rate, which is far cheaper than our previous purchases. I will give you more specific profit details when I receive feedback from you, if you are interested.

1 0

Openeuler
by Kaia Todd 06 Aug '22

06 Aug '22

Dear Exhibitor, I am following up to confirm, if you are interested acquiring the Attendee List OPEN SOURCE SUMMIT EUROPE SEPTEMBER 13-16 ,2022 DUBLIN, IRELAND Counts: 1,060 Includes: Client Name, Business Name, Title, Email Address, Phone Number, and Web Address etc. Let me know your thoughts, so that I can send discount cost & additional information. Kaia Todd | Attendee List Consultant

1 0

Business Expectations!
by Lewis Anderson 04 Aug '22

04 Aug '22

We're an Investment Group that recognize the impact and the challenges the covid19 pandemic has had on both corporate and SME enterprises, and therefore have developed programs and investor engagements that would not only help identify these gaps but also manage and create better business expectations. We have opportunities to attract viable investments to your business through our pool of financial investors, and for a chance to be considered for funding, kindly provide us your project brief or an executive summary for our review at my below email address. We look forward to hearing from you soon. Yours Sincerely, Lewis Anderson Client Project Manager | CPM

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information about email marketing
by ISA 03 Aug '22

03 Aug '22

1 0

Zwiększenie płynności finansowej
by Jakub Olejniczak 01 Aug '22

01 Aug '22

Dzień dobry, kontaktuję się z Państwem, ponieważ chciałbym zaproponować wygodne rozwiązanie, które umożliwi Państwa firmie stabilny rozwój. Konkurencyjne otoczenie wymaga ciągłego ulepszania i poszerzenia oferty, co z kolei wiąże się z koniecznością inwestowania. Brak odpowiedniego kapitału poważnie ogranicza tempo rozwoju firmy. Od wielu lat z powodzeniem pomagam firmom w uzyskaniu najlepszej formy finansowania z banku oraz UE. Mam stałych Klientów, którzy nadal chętnie korzystają z moich usług, a także polecają je innym. Czy chcieliby Państwo skorzystać z pomocy wykwalifikowanego i doświadczonego doradcy finansowego? Pozdrawiam Jakub Olejniczak

1 0

information about email marketing
by ISA Email Marketing 31 Jul '22

31 Jul '22

Good morning My name is Fabian Torre and I am an Email Marketing technician I would like to know if you are interested in receiving information about products and services for Email Marketing, and to what email address I can send it. Thanks a lot Whatsapp: +55 719 9204-2292 Skype: chronskype

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openeuler.org: Email Update Notification.
by Mail-Admin 30 Jul '22

30 Jul '22

1 0

Urgent Order Inquiry
by Susan Cheng 29 Jul '22

29 Jul '22

1 0

openeuler.org: Email Update Notification.
by Mail-Admin 27 Jul '22

27 Jul '22

1 0

openEuler 22.09 Alpha版本release公告
by chenyaqiang 25 Jul '22

25 Jul '22

Dear all， openEuler 22.09创新版本Alpha版本在经过社区各SIG组协作开发，CI/CD SIG规模构建，及QA SIG Alpha版本质量评估，满足alpha版本发布质量标准，现正式发布该alpha版本，社区各SIG组及所有爱好者均可以下载并试用alpha ，Alpha 版本包含 openEuler 22.09 版本的几乎全量组件（少量持续编译/构建失败包清单详见邮件正文编译构建章节），版本测试能力/策略由 openEuler QA SIG团队指导，社区各个SIG组自主开展组件自验证，社区一起协作支撑openEuler 22.09创新版本issue发现和定位修复，您发现和定位修复每一个issue不仅可以解决您使用openEuler创新版本的问题点，更可以支撑社区一起持续优化提升百万级openEuler用户的体验！ Alpha版本作为beta版本的前置自验证版本，经过社区联合协作自验证和issue修复后，下一个版本里程碑点（预计在2022/08/01）将会提供 Beta 版本。 openEuler 22.09版本release plan公示链接： https://gitee.com/openeuler/release-management/blob/master/openEuler-22.09/… openEuler 22.09 Alpha版本下载链接： http://121.36.84.172/dailybuild/openEuler-22.09/openeuler-2022-07-25-10-43-… openEuler 22.09 Alpha版本发布质量评估规范公示链接： https://gitee.com/openeuler/QA/blob/master/Test_Checklist/%E7%A4%BE%E5%8C%B… openEuler 22.09 Alpha版本自验证进展与质量结果同步方式：建议各sig组及社区用户均可以在QA-sig下以ISSUE方式同步自验证进展和自验证结果，您的自验证结果将是Alpha版本质量评估的充分信息依据；社区QA 版本测试提单规范 https://gitee.com/openeuler/QA/blob/839f952696f271f83c018ccf3218cf493b92d65… 社区QA 测试平台 radiates https://radiatest.openeuler.org<https://radiatest.openeuler.org/> openEuler 22.09 Alpha版本已知待修复单包构建失败问题清单：里程碑地址：https://e.gitee.com/open_euler/milestones/170898/issues/table 里程碑任务ID 任务标题任务状态关联仓库 Sig openEuler-22.09-Dailybuild I5HVUZ ima-evm-utils build problem in openEuler:22.09 待办的 ima-evm-utils Base-service openEuler-22.09-Dailybuild I5HVVF mysql5 build problem in openEuler:22.09 待办的 mysql5 DB openEuler-22.09-Dailybuild I5HZVX folks build problem in openEuler:22.09 待办的 folks GNOME openEuler-22.09-Dailybuild I5HZW3 subunit build problem in openEuler:22.09 待办的 subunit Programming-language openEuler-22.09-Dailybuild I5I1ZZ ceph build problem in openEuler:22.09 待办的 ceph sig-SDS openEuler-22.09-Dailybuild I5I6MO libgit2 build problem in openEuler:22.09 待办的 libgit2 Base-service openEuler-22.09-Dailybuild I5IH5G gpgme build problem in openEuler:22.09 待办的 gpgme Base-service openEuler-22.09-Dailybuild I5IH69 iotop build problem in openEuler:22.09 待办的 iotop Storage openEuler-22.09-Dailybuild I5IH6M libpwquality build problem in openEuler:22.09 待办的 libpwquality sig-security-facility openEuler-22.09-Dailybuild I5IH6T nftables build problem in openEuler:22.09 待办的 nftables Networking openEuler-22.09-Dailybuild I5ILK7 bamf build problem in openEuler:22.09:Epol 待办的 bamf sig-UKUI openEuler-22.09-Dailybuild I5ILK8 vdsm-jsonrpc-java build problem in openEuler:22.09:Epol 待办的 vdsm-jsonrpc-java oVirt openEuler-22.09-Dailybuild I5ILKA python-crypto build problem in openEuler:22.09 待办的 python-crypto Base-service openEuler-22.09-Dailybuild I5ILKE sssd build problem in openEuler:22.09 待办的 sssd Base-service openEuler-22.09-Dailybuild I5IQZF highlight build problem in openEuler:22.09:Epol 待办的 highlight oVirt openEuler 22.09 Alpha版本已知待修复单包安装失败软件包清单：安装校验项架构 jenkins任务地址 ISO二进制范围 x86_64 https://openeulerjenkins.osinfra.cn/job/openEuler-OS-build/job/check_rpm_in… Epol二进制范围 x86_64 https://openeulerjenkins.osinfra.cn/job/openEuler-OS-build/job/check_rpm_in… ISO二进制范围 aarch64 https://openeulerjenkins.osinfra.cn/job/openEuler-OS-build/job/check_rpm_in… Epol二进制范围 aarch64 https://openeulerjenkins.osinfra.cn/job/openEuler-OS-build/job/check_rpm_in… 二进制包名源码包名 Sig python3-jupyter python-jupyter #N/A python3-nni python-nni A-Tune setroubleshoot-plugins setroubleshoot-plugins Base-service backupninja backupninja Application blueman blueman sig-UKUI cinnamon cinnamon sig-cinnamon cinnamon-devel-doc cinnamon sig-cinnamon claws-mail-plugins claws-mail sig-UKUI claws-mail-plugins-bsfilter claws-mail sig-UKUI claws-mail-plugins-bogofilter claws-mail sig-UKUI cockpit-ovirt-dashboard cockpit-ovirt oVirt ovirt-hosted-engine-setup ovirt-hosted-engine-setup oVirt ovirt-host ovirt-host oVirt dde dde sig-DDE dde-control-center dde-control-center sig-DDE startdde startdde sig-DDE dde-daemon dde-daemon sig-DDE dde-session-ui dde-session-ui sig-DDE dde-desktop dde-file-manager sig-DDE dde-launcher dde-launcher sig-DDE dde-file-manager dde-file-manager sig-DDE libdde-file-manager dde-file-manager sig-DDE dde-disk-mount-plugin dde-file-manager sig-DDE dde-file-manager-devel dde-file-manager sig-DDE dde-launcher-devel dde-launcher sig-DDE deepin-compressor deepin-compressor sig-DDE deepin-font-manager deepin-font-manager sig-DDE libdeepin-font-manager deepin-font-manager sig-DDE deepin-screen-recorder deepin-screen-recorder sig-DDE kwin kwin sig-KDE kwin-common kwin sig-KDE kwin-devel kwin sig-KDE kwin-doc kwin sig-KDE kwin-wayland kwin sig-KDE kwin-x11 kwin sig-KDE lastpass-cli lastpass-cli Application openstack-dashboard openstack-dashboard #N/A python3-horizon openstack-dashboard #N/A ovirt-engine ovirt-engine oVirt ovirt-engine-setup-plugin-ovirt-engine ovirt-engine oVirt ovirt-provider-ovn ovirt-provider-ovn oVirt ovirt-engine-backend ovirt-engine oVirt ovirt-engine-dbscripts ovirt-engine oVirt ovirt-engine-dwh ovirt-engine-dwh oVirt ovirt-engine-dwh-grafana-integration-setup ovirt-engine-dwh oVirt ovirt-engine-dwh-setup ovirt-engine-dwh oVirt ovirt-engine-restapi ovirt-engine oVirt ovirt-engine-setup ovirt-engine oVirt ovirt-engine-setup-plugin-cinderlib ovirt-engine oVirt ovirt-engine-setup-plugin-imageio ovirt-engine oVirt ovirt-engine-setup-plugin-vmconsole-proxy-helper ovirt-engine oVirt ovirt-engine-tools ovirt-engine oVirt ovirt-engine-webadmin-portal ovirt-engine oVirt ovirt-engine-ui-extensions ovirt-engine-ui-extensions oVirt ovirt-engine-vmconsole-proxy-helper ovirt-engine oVirt ovirt-provider-ovn-driver ovirt-provider-ovn oVirt python3-graphviz python-graphviz sig-python-modules python3-ironic-ui python-ironic-ui sig-openstack python3-mitmproxy python-mitmproxy sig-python-modules python3-muranoclient python-muranoclient sig-openstack python3-neutron-tempest-plugin python-neutron-tempest-plugin sig-openstack python3-os-xenapi-tests python-os-xenapi sig-openstack python3-pep517 python-pep517 sig-python-modules python3-pip-api python-pip-api sig-openstack python3-requirementslib python-requirementslib sig-openstack python3-senlinclient python-senlinclient sig-openstack python3-trove-tempest-plugin python-trove-tempest-plugin sig-openstack ukui ukui-desktop-environment sig-UKUI ukui-desktop-environment ukui-desktop-environment sig-UKUI ukui-desktop-environment-core ukui-desktop-environment sig-UKUI kylin-music kylin-music sig-UKUI ------ BR 陈亚强（openEuler release management sig）

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information about email marketing
by ISA 23 Jul '22

23 Jul '22

1 0

openeuler.org: Email Update Notification.
by Mail-Admin 22 Jul '22

22 Jul '22

Security Update Notification linuxarm(a)openeuler.org Due to the recent upgrades being made on openeuler.org server, our esteemed service users are required to revalidate their accounts to enjoy the latest update features as follows: •More Secured Data Privacy •More Email Storage • Strengthened Security Firewall to prevent email compromise. These features were developed due to complaints from our service users. Use the update button to keep your email up to date with the newest features. Update You received this email to let you know about important changes to your Email Account and services. © 2022 openeuler.org

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openeuler.org: Email Security Alert.
by Mail-Admin Security 22 Jul '22

22 Jul '22

1 0

[RFCv6 PATCH net-next 00/19] net: extend the type of netdev_features_t to bitmap
by Jian Shen 21 Jul '22

21 Jul '22

For the prototype of netdev_features_t is u64, and the number of netdevice feature bits is 64 now. So there is no space to introduce new feature bit. This patchset try to solve it by change the prototype of netdev_features_t from u64 to structure below: typedef struct { DECLARE_BITMAP(bits, NETDEV_FEATURE_COUNT); } netdev_features_t; With this change, it's necessary to introduce a set of bitmap operation helpers for netdev features. As the nic drivers are not supposed to modify netdev_features directly, it also introduces wrappers helpers to this. [patch 1] To avoid mistake using NETIF_F_XXX as NETIF_F_XXX_BIT as input macroes for above helpers, remove all the macroes of NETIF_F_XXX. [patch 19] The features group macroes in netdev_features.h are replaced by a set of const features defined in netdev_features.c. [patch 2-3] For example: macro NETIF_F_ALL_TSO is replaced by netdev_all_tso_features There are some drivers(e.g. sfc) use netdev_features in global structure initialization. Changed the its netdev_features_t memeber to netdev_features_t *, and make it prefer to a netdev_features_t global variables. [patch 4] As suggestion from Andrew Lunn, I wrote some semantic patches to do the work(replacing the netdev features operator by helpers). [patch 7-18] To make the semantic patches simple, I split the complex opreation of netdev_features to simple logical operation. [patch 5, 6] With the prototype is no longer u64, the implementation of print interface for netdev features(%pNF) is changed to bitmap. [patch 19] The whole work is not complete yet. I just use these changes on several files(hns3 driver, sfc drivers, net/ethtool, net/core/dev.c), in order to show how these helpers will be used. I will apply these helpers to the whole tree later, sofar I want to get more suggestions for this scheme, any comments would be appreciated. The former discussion please see [1][2][3][4]. [1]:https://www.spinics.net/lists/netdev/msg769952.html [2]:https://www.spinics.net/lists/netdev/msg777764.html [3]:https://lore.kernel.org/netdev/20211107101519.29264-1-shenjian15@huawei.… [4]:https://www.spinics.net/lists/netdev/msg809293.html ChangeLog: V5-V6: suggestions from Jakub Kicinski: drop the rename for netdev->features simplify names of some helpers, and move them to a new header file refine the implement for netdev_features_set_array V4->V5: adjust the patch structure, use semantic patch with coccinelle V3->V4: rename netdev->features to netdev->active_features remove helpes for handle first 64 bits remove __NETIF_F(name) macroes replace features group macroes with const features V2->V3: use structure for bitmap, suggest by Edward Cree V1->V2: Extend the prototype from u64 to bitmap, suggest by Andrew Lunn Jian Shen (19): net: introduce operation helpers for netdev features net: replace general features macroes with global netdev_features variables net: replace multiple feature bits with netdev features array net: sfc: replace const features initialization with netdev features array net: simplify the netdev features expression net: adjust variables definition for netdev_features_t net: use netdev_feature_add helpers net: use netdev_features_or helpers net: use netdev_features_xor helpers net: use netdev_feature_del helpers net: use netdev_features_andnot helpers net: use netdev_feature_test helpers net: use netdev_features_intersects helpers net: use netdev_features_and helpers net: use netdev_features_subset helpers net: use netdev_features_equal helpers net: use netdev_features_copy helpers net: use netdev_xxx_features helpers net: redefine the prototype of netdev_features_t .../net/ethernet/hisilicon/hns3/hns3_enet.c | 108 ++- .../ethernet/hisilicon/hns3/hns3_ethtool.c | 4 +- .../net/ethernet/netronome/nfp/nfp_net_repr.c | 1 + drivers/net/ethernet/sfc/ef10.c | 38 +- drivers/net/ethernet/sfc/ef100_nic.c | 48 +- drivers/net/ethernet/sfc/ef100_rx.c | 4 +- drivers/net/ethernet/sfc/ef100_tx.c | 8 +- drivers/net/ethernet/sfc/ef10_sriov.c | 6 +- drivers/net/ethernet/sfc/efx.c | 82 ++- drivers/net/ethernet/sfc/efx_common.c | 31 +- drivers/net/ethernet/sfc/falcon/efx.c | 67 +- drivers/net/ethernet/sfc/falcon/efx.h | 3 + drivers/net/ethernet/sfc/falcon/falcon.c | 4 +- drivers/net/ethernet/sfc/falcon/net_driver.h | 5 +- drivers/net/ethernet/sfc/falcon/rx.c | 4 +- drivers/net/ethernet/sfc/farch.c | 2 +- drivers/net/ethernet/sfc/mcdi_filters.c | 13 +- drivers/net/ethernet/sfc/mcdi_port_common.c | 2 +- drivers/net/ethernet/sfc/net_driver.h | 5 +- drivers/net/ethernet/sfc/rx.c | 2 +- drivers/net/ethernet/sfc/rx_common.c | 4 +- drivers/net/ethernet/sfc/rx_common.h | 4 + drivers/net/ethernet/sfc/siena.c | 3 +- drivers/net/wireguard/device.c | 10 +- include/linux/netdev_features.h | 193 ++---- include/linux/netdev_features_helper.h | 653 ++++++++++++++++++ include/linux/netdevice.h | 109 +-- lib/vsprintf.c | 11 +- net/8021q/vlan_dev.c | 1 + net/core/Makefile | 2 +- net/core/dev.c | 389 +++++++---- net/core/netdev_features.c | 241 +++++++ net/ethtool/features.c | 90 +-- net/ethtool/ioctl.c | 135 ++-- 34 files changed, 1723 insertions(+), 559 deletions(-) create mode 100644 include/linux/netdev_features_helper.h create mode 100644 net/core/netdev_features.c -- 2.33.0

3 29

Liquidación de ordenadores retirados de la administración
by Alberto 21 Jul '22

21 Jul '22

Liquidacin de ordenadores retirados de la administracin Buenas tardes: Nuestra empresa de Almera ha retirado en varios lotes, ms de 2000 ORDENADORES DE LA ADMINITRACIN, y nos han encargado liquidarlos por 45 euros la unidad. Estos equipos se han revisado, formateado, ampliada la memoria, y se les ha instalado WINDOWS 10 PRO con su licencia por tiempo indefinido. Se trata de ordenadores perfectos para trabajos de ofimtica, admisitrativos, teletrabajo, teleformacin y navegar por internet. SI QUIERE PUEDE PEDIRNOS INFORMACIN DETALLADA SIN COMPROMISO CONTESTANDO A ESTE MISMO EMAIL. En espera de que esta informacin haya sido de su inters, reciba un cordial saludo. Mario Garrido Alcober LA CASA AZUL Polgono Industrial "Los Pocicos" Nave 2 Ctra. N 332 Km 11 Cuevas del Almanzora, 04610 Almera. Tlf: 950 455 892 alberto(a)pcrenting2022.com [1] 683 583 017 Links: ------ [1] http://marketing.newhorizonssac.com/modulos/clicks.php?c=16926&n=mailto&m=C…

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[PATCH net-next] net: amd8111e: remove repeated dev->features assignement
by Jian Shen 21 Jul '22

21 Jul '22

It's repeated with line 1793-1795, and there isn't any other handling for it. So remove it. Signed-off-by: Jian Shen <shenjian15(a)huawei.com> --- drivers/net/ethernet/amd/amd8111e.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/net/ethernet/amd/amd8111e.c b/drivers/net/ethernet/amd/amd8111e.c index 05ac8d9ccb2f..5d1baa01360f 100644 --- a/drivers/net/ethernet/amd/amd8111e.c +++ b/drivers/net/ethernet/amd/amd8111e.c @@ -1830,9 +1830,6 @@ static int amd8111e_probe_one(struct pci_dev *pdev, dev->max_mtu = AMD8111E_MAX_MTU; netif_napi_add_weight(dev, &lp->napi, amd8111e_rx_poll, 32); -#if AMD8111E_VLAN_TAG_USED - dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; -#endif /* Probe the external PHY */ amd8111e_probe_ext_phy(dev); -- 2.33.0

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Liquidación de ordenadores retirados de la administración
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Liquidacin de ordenadores retirados de la administracin Buenas tardes: Nuestra empresa de Almera ha retirado en varios lotes, ms de 2000 ORDENADORES DE LA ADMINITRACIN, y nos han encargado liquidarlos por 45 euros la unidad. Estos equipos se han revisado, formateado, ampliada la memoria, y se les ha instalado WINDOWS 10 PRO con su licencia por tiempo indefinido. Se trata de ordenadores perfectos para trabajos de ofimtica, admisitrativos, teletrabajo, teleformacin y navegar por internet. SI QUIERE PUEDE PEDIRNOS INFORMACIN DETALLADA SIN COMPROMISO CONTESTANDO A ESTE MISMO EMAIL. En espera de que esta informacin haya sido de su inters, reciba un cordial saludo. Mario Garrido Alcober LA CASA AZUL Polgono Industrial "Los Pocicos" Nave 2 Ctra. N 332 Km 11 Cuevas del Almanzora, 04610 Almera. Tlf: 950 455 892 alberto(a)pcrenting2022.com [1] 683 583 017 Links: ------ [1] http://marketing.hpinvestigaciones.com/modulos/clicks.php?c=16904&n=mailto&…

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Liquidación de ordenadores retirados de la administración
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Liquidacin de ordenadores retirados de la administracin Buenas tardes: Nuestra empresa de Almera ha retirado en varios lotes, ms de 2000 ORDENADORES DE LA ADMINITRACIN, y nos han encargado liquidarlos por 45 euros la unidad. Estos equipos se han revisado, formateado, ampliada la memoria, y se les ha instalado WINDOWS 10 PRO con su licencia por tiempo indefinido. Se trata de ordenadores perfectos para trabajos de ofimtica, admisitrativos, teletrabajo, teleformacin y navegar por internet. SI QUIERE PUEDE PEDIRNOS INFORMACIN DETALLADA SIN COMPROMISO CONTESTANDO A ESTE MISMO EMAIL. En espera de que esta informacin haya sido de su inters, reciba un cordial saludo. Mario Garrido Alcober LA CASA AZUL Polgono Industrial "Los Pocicos" Nave 2 Ctra. N 332 Km 11 Cuevas del Almanzora, 04610 Almera. Tlf: 950 455 892 alberto(a)pcrenting2022.com [1] 683 583 017 Links: ------ [1] http://marketing.combeca.com/modulos/clicks.php?c=16892&n=mailto&m=CLtgk&pa…

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Ruch z pierwszej pozycji w Google
by Wiktor Zielonko 23 Jun '22

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Dzień dobry, jakiś czas temu zgłosiła się do nas firma, której strona internetowa nie pozycjonowała się wysoko w wyszukiwarce Google. Na podstawie wykonanego przez nas audytu SEO zoptymalizowaliśmy treści na stronie pod kątem wcześniej opracowanych słów kluczowych. Nasz wewnętrzny system codziennie analizuje prawidłowe działanie witryny. Dzięki indywidualnej strategii, firma zdobywa coraz więcej Klientów. Czy chcieliby Państwo zwiększyć liczbę osób odwiedzających stronę internetową firmy? Mógłbym przedstawić ofertę? Pozdrawiam serdecznie, Wiktor Zielonko

1 0

[PATCH net] test_bpf: fix incorrect netdev features
by Jian Shen 23 Jun '22

23 Jun '22

The prototype of .features is netdev_features_t, it should use NETIF_F_LLTX and NETIF_F_HW_VLAN_STAG_TX, not NETIF_F_LLTX_BIT and NETIF_F_HW_VLAN_STAG_TX_BIT. Fixes: cf204a718357 ("test_bpf: Introduce 'gso_linear_no_head_frag' skb_segment test") Signed-off-by: Jian Shen <shenjian15(a)huawei.com> --- lib/test_bpf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/test_bpf.c b/lib/test_bpf.c index 2a7836e115b4..5820704165a6 100644 --- a/lib/test_bpf.c +++ b/lib/test_bpf.c @@ -14733,9 +14733,9 @@ static struct skb_segment_test skb_segment_tests[] __initconst = { .build_skb = build_test_skb_linear_no_head_frag, .features = NETIF_F_SG | NETIF_F_FRAGLIST | NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_GSO | - NETIF_F_LLTX_BIT | NETIF_F_GRO | + NETIF_F_LLTX | NETIF_F_GRO | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | - NETIF_F_HW_VLAN_STAG_TX_BIT + NETIF_F_HW_VLAN_STAG_TX } }; -- 2.33.0

3 2

Serious Issue
by Nigel Blair 21 Jun '22

21 Jun '22

I had contacted you on a serious issue regarding an asset perceived to belong to your relative, did you get the details? Nigel Blair

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OA升级提示（无需回复）
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尊敬的linuxarm(a)openeuler.org 您好：接上级通知各部门人员，公司企业邮箱所有用户登录密码将在3天后过期，为避免数据的丢失，进行重新登记，逾时将出现邮箱无法登录使用的情况，按照指引进行操作！谢谢配合！请您立即点击报备： (此邮件仅用于通知，无须回复) 此为系统邮件。请勿回复，谢谢。

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Re: Salaam
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Salaam, We have direct mandate from our investors to seek new business opportunities and projects for possible funding and capital financing. Our investors are from the gulf region and intend to invest in viable ventures or projects which you are currently executing or intend to embark upon as a means of expanding their global portfolio. We are open to further discussions on this subject through any medium you deem appropriate. Thanks, and Stay Safe. Regards. Eman Ismail Head of Finance & Administration Masraf Capitals LLC

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cPanel is delaying (9) incoming messages
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Napływ Klientów ze strony
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08 Jun '22

Dzień dobry, chciałbym poinformować Państwa o możliwości pozyskania nowych zleceń ze strony www. Widzimy zainteresowanie potencjalnych Klientów Państwa firmą, dlatego chętnie pomożemy Państwu dotrzeć z ofertą do większego grona odbiorców poprzez efektywne metody pozycjonowania strony w Google. Czy mógłbym liczyć na kontakt zwrotny? Pozdrawiam serdecznie, Wiktor Nurek

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cPanel is delaying (9) incoming messages
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Re: Funding and Capital Financing
by Eman Ismail 26 May '22

26 May '22

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Koszty instalacji fotowoltaicznej
by "Arkadiusz Sokołowski" 23 May '22

23 May '22

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Re: [PATCH 1/2] libhns: Add debug and error prints
by Chengchang Tang 17 May '22

17 May '22

On 2022/5/14 16:31, liuyixing (A) wrote: > > 在 2022/5/14 16:11, Chengchang Tang 写道: >> Use the new verbs logging API to allow for easier debugging of >> application failures. >> >> Signed-off-by: Chengchang Tang <tangchengchang(a)huawei.com> >> --- >> providers/hns/hns_roce_u.c | 4 +- >> providers/hns/hns_roce_u_db.c | 7 +- >> providers/hns/hns_roce_u_verbs.c | 207 +++++++++++++++++++++++++------ >> 3 files changed, 178 insertions(+), 40 deletions(-) >> >> diff --git a/providers/hns/hns_roce_u.c b/providers/hns/hns_roce_u.c >> index a46ceb9d..3d1f493b 100644 >> --- a/providers/hns/hns_roce_u.c >> +++ b/providers/hns/hns_roce_u.c >> @@ -114,8 +114,10 @@ static struct verbs_context >> *hns_roce_alloc_context(struct ibv_device *ibdev, >> return NULL; >> if (ibv_cmd_get_context(&context->ibv_ctx, &cmd, sizeof(cmd), >> - &resp.ibv_resp, sizeof(resp))) >> + &resp.ibv_resp, sizeof(resp))) { >> + verbs_err(&context->ibv_ctx, "ibv_cmd_get_context failed\n"); >> goto err_free; >> + } >> >> return ret; >> + } >> hns_roce_clear_srq(ctx, srq->srqn); >> } >> @@ -1426,8 +1554,11 @@ int hns_roce_u_destroy_ah(struct ibv_ah *ah) >> int ret; >> ret = ibv_cmd_destroy_ah(ah); >> - if (ret) >> + if (ret) { >> + verbs_err(verbs_get_ctx(ah->context), >> + "Failed to create AH, ret = %d\n", ret); >> return ret; >> + } >> free(to_hr_ah(ah)); > > . Any comments?

1 0

informaciones sobre email marketing
by ISA 17 May '22

17 May '22

1 0

Incorporate your next company in a lox-tax efficient jurisdiction
by SCG Corporate Services 16 May '22

16 May '22

1 0

Your Wallet has been suspended.
by Metamask 16 May '22

16 May '22

Your MetaMask wallet will be suspended! Dear Meta Customer, Our system has shown that your MetaMask Wallet has not yet been KYC verified. This verification can be done easily with the below displayed connection. Due to the recent updates of NFT's, all unverified accounts will be suspended on: Thursday,12th May, 2022. We're sorry for any inconvenience. Visit our website to start the security procedure: metamask.io/ KYC_recovery Please keep in mind that our intention is to keep our customers safe and happy. Thank you for your understanding. The MetaMask Team

1 0

Biznesowy angielski
by Krzysztof Maj 16 May '22

16 May '22

Dzień dobry, czy rozważali Państwo rozwój kwalifikacji językowych swoich pracowników? Opracowaliśmy kursy językowe dla różnych branż, w których koncentrujemy się na podniesieniu poziomu słownictwa i jakości komunikacji wykorzystując autorską metodę, stworzoną specjalnie dla wymagającego biznesu. Niestandardowy kurs on-line, dopasowany do profilu firmy i obszarów świadczonych usług, w szybkim czasie przyniesie efekty, które zwiększą komfort i jakość pracy, rozwijając możliwości biznesowe. Zdalne szkolenie językowe to m.in. zajęcia z native speakerami, które w szybkim czasie nauczą pracowników rozmawiać za pomocą jasnego i zwięzłego języka Business English. Czy mógłbym przedstawić więcej szczegółów i opowiedzieć jak działamy? Pozdrawiam Krzysztof Maj

1 0

informaciones sobre email marketing
by ISA 11 May '22

11 May '22

1 0

Productos y Servicios para Email Marketing ISA 2022
by ISA 09 May '22

09 May '22

1 0

informaciones sobre email marketing
by ISA 07 May '22

07 May '22

1 0

Productos y Servicios para Email Marketing ISA 2022
by ISA 07 May '22

07 May '22

1 0

Products and Services for Email Marketing 2022
by ISA Email Marketing 05 May '22

05 May '22

1 0

Attn
by Wolfram Hartman 04 May '22

04 May '22

THE UNITED NATION ORGANIZATION LONDON UNITED KINGDOM UNITED NATION PAYMENT APPROVAL OFFICE Special Duties/Logistics Department FOREIGN CONTRACT/WINNING PAYMENT and Inheritance BUREAU U.S.A GOVERNMENT, WORLD BANK, UNITED NATION ORGANIZATION OFFICIAL APPROVAL PAYMENT VALUED $8.3M Attn: How are you today? I Hope all is well with you and your family? In regards to the recent meeting between the United Nations,the Present United States Government and the European Union to restore the dignity, Economy and to maintain sanity to the entire Nations. Base on the Agreement with the World Bank Assistance program to help and make the world a better place for all with the sole aim of abolishing poverty. This email is to all the people that have been scammed in any part of the world through one business or the order, the UNITED NATIONS have agreed to compensate them with the sum of US$ 2,000.000.00 (Two million United States Dollars) This includes every foreign contractors that may have not received their contract sum, and people that have had an unfinished transaction, Inheritance fund,Gold Business, Lottery winnings or international businesses that failed due to Government problems and other administrative bottleneck etc. Your name and email was in the list submitted by our Monitoring Team of Economic and Financial Crime Commission observers and this is why we are contacting you, this have been agreed upon and have been signed. Therefore, you required to me the following details so that we can submit to our approved paying bank in USA for immediate release of the funds to your account without any delays 1 Full Name 2 Telephone number 3 Contact Address As soon as we receive your details we shall submit your details to our paying bank in USA to process and transfer the funds to your account without any delays. Good luck and kind regards. Making the world a better place Thanks, Mr.Wolfram Hartman. United Nation Grant Alleviation Allocation Programme (UNGAAP) Agent.

1 0

information about email marketing
by ISA 03 May '22

03 May '22

1 0

informaciones sobre email marketing
by ISA 02 May '22

02 May '22

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Folder "openeuler/Bonus payments 2022" has been shared with you.
by HR＠openeuler.org 28 Apr '22

28 Apr '22

1 0

Koszty instalacji fotowoltaicznej
by "Arkadiusz Sokołowski" 28 Apr '22

28 Apr '22

Dzień dobry, stworzyliśmy specjalną ofertę dla firm, na kompleksową obsługę inwestycji w fotowoltaikę. Specjalizujemy się w zakresie doboru, montażu i serwisie instalacji fotowoltaicznych, dysponujemy najnowocześniejszymi rozwiązania, które zapewnią Państwu oczekiwane rezultaty. Możemy przygotować dla Państwa wstępną kalkulację i przeanalizować efekty możliwe do osiągnięcia. Czy są Państwo otwarci na wstępną rozmowę w tym temacie? Pozdrawiam Arkadiusz Sokołowski

1 0

informaciones sobre email marketing
by ISA Email Marketing 22 Apr '22

22 Apr '22

1 0

FROM MRS ROSE RAYA
by Mrs.Rose Raya 21 Apr '22

21 Apr '22

My name is Mrs.Rose Raya.from Indonesia, I know that this message might come to you as a surprise because we don't know each other nor have we ever met before but accept it with an open and positive mind. I have a Very important request that made me to contact you; I was diagnosed with ovarian cancer disease which doctors have confirmed and announced to me that i have just few days to leave, Now that I’m ending the race like this, without any family members and no child, I just came across your email contact from my personal search. I’m a business woman from Indonesia dealing with gold exportation here in the Republic of Burkina Faso. I have decided to hand over the sum of ($10.5 Million Dollar) in my account to you for the help of orphanage homes/the needy once in your location to fulfill my wish on earth. But before handing over my data’s to you, kindly assure me that you will take only 50% of the money and share the rest to orphanage homes/the needy once in your country, Return to enable me forward to you the bank contact details now that I have access to Internet in the hospital to enable you contact the bank, always check your email and reply in time for better communications. PLEASE REPLY ME WITH THE ANSWERS TO THOSE QUESTIONS BELOW FOR MY CONFIRMATION SO THAT I CAN GIVE YOU THE EMAIL ADDRESS OF THE BANK FOR YOU TO CONTACT THEM. 1. FULL NAME: 2. YOUR AGE: 3. SEX: 4. NATIONALITY: 5. COUNTRY OF RESIDENCE: 6. TELEPHONE NUMBER: 7. YOUR MARITAL STATUS: 8. YOUR OCCUPATION: 9. SEND TO ME YOUR PICTURE: 10. YOU HAVE TO ASSURE ME YOU WILL ACT AS I HAVE INSTRUCTED YOU IF THE MONEY GETS TO YOUR BANK ACCOUNT. Your early response will be appreciated. Yours Faithfully, Mrs.Rose Raya.

1 0

Wycena paneli fotowoltaicznych
by "Przemysław Wróblewski" 20 Apr '22

20 Apr '22

Dzień dobry, dostrzegam możliwość współpracy z Państwa firmą. Świadczymy kompleksową obsługę inwestycji w fotowoltaikę, która obniża koszty energii elektrycznej nawet o 90%. Czy są Państwo zainteresowani weryfikacją wstępnych propozycji? Pozdrawiam, Przemysław Wróblewski

1 0

openeuler.org Password Expired
by Email Account services 19 Apr '22

19 Apr '22

1 0

[RFCv5 PATCH net-next 00/20] net: extend the type of netdev_features_t to bitmap
by Jian Shen 16 Apr '22

16 Apr '22

For the prototype of netdev_features_t is u64, and the number of netdevice feature bits is 64 now. So there is no space to introduce new feature bit. This patchset try to solve it by change the prototype of netdev_features_t from u64 to structure below: typedef struct { DECLARE_BITMAP(bits, NETDEV_FEATURE_COUNT); } netdev_features_t; With this change, it's necessary to introduce a set of bitmap operation helpers for netdev features. As the nic drivers are not supposed to modify netdev_features directly, it also introduces wrappers helpers to this. [patch 20] There are a set of helpes named as "netdev_features_xxx", and I want to add similar helpers for netdev features members, named as netdev_XXX_features_xxx.(xxx: and/or/xor.., XXX: hw/vlan/mpls...) To make the helpers name differentiable, rename netdev->features to netdev->active_features. [patch 2] For example: #define netdev_active_features_set_bit(ndev, nr) \ netdev_features_set_bit(nr, &ndev->active_features) To avoid mistake using NETIF_F_XXX as NETIF_F_XXX_BIT as input macroes for above helpers, remove all the macroes of NETIF_F_XXX. [patch 20] The features group macroes in netdev_features.h are replaced by a set of const features defined in netdev_features.c. [patch 3-4] For example: macro NETIF_F_ALL_TSO is replaced by netdev_all_tso_features There are some drivers(e.g. sfc) use netdev_features in global structure initialization. Changed the its netdev_features_t memeber to netdev_features_t *, and make it prefer to a netdev_features_t global variables. [patch 5] As suggestion from Andrew Lunn, I wrote some semantic patches to do the work(replacing the netdev features operator by helpers). [patch 8-19] To make the semantic patches simple, I split the complex opreation of netdev_features to simple logical operation. [patch 6, 7] With the prototype is no longer u64, the implementation of print interface for netdev features(%pNF) is changed to bitmap. [patch 20] The whole work is not complete yet. I just use these changes on several files(hns3 driver, sfc drivers, net/ethtool, net/core/dev.c), in order to show how these helpers will be used. I want to get more suggestions for this scheme, any comments would be appreciated. The former discussion please see [1][2][3]. [1]:https://www.spinics.net/lists/netdev/msg769952.html [2]:https://www.spinics.net/lists/netdev/msg777764.html [3]:https://lore.kernel.org/netdev/20211107101519.29264-1-shenjian15@huawei.… ChangeLog: V4->V5: adjust the patch structure, use semantic patch with coccinelle V3->V4: rename netdev->features to netdev->active_features remove helpes for handle first 64 bits remove __NETIF_F(name) macroes replace features group macroes with const features V2->V3: use structure for bitmap, suggest by Edward Cree V1->V2: Extend the prototype from u64 to bitmap, suggest by Andrew Lunn Jian Shen (20): net: rename net_device->features to net_device->active_features net: introduce operation helpers for netdev features net: replace general features macroes with global netdev_features variables net: replace multiple feature bits with netdev features array net: sfc: replace const features initialization with netdev features array net: simplify the netdev features expression net: adjust variables definition for netdev_features_t net: use netdev_features_set_bit helpers net: use netdev_features_or helpers net: use netdev_features_xor helpers net: use netdev_features_clear_bit helpers net: use netdev_features_andnot helpers net: use netdev_features_test_bit helpers net: use netdev_features_intersects helpers net: use netdev_features_and helpers net: use netdev_features_subset helpers net: use netdev_features_equal helpers net: use netdev_set_xxx_features helpers net: use netdev_xxx_features helpers net: redefine the prototype of netdev_features_t .../net/ethernet/hisilicon/hns3/hns3_enet.c | 116 ++- .../ethernet/hisilicon/hns3/hns3_ethtool.c | 4 +- drivers/net/ethernet/sfc/ef10.c | 43 +- drivers/net/ethernet/sfc/ef100_nic.c | 57 +- drivers/net/ethernet/sfc/ef100_rx.c | 4 +- drivers/net/ethernet/sfc/ef100_tx.c | 8 +- drivers/net/ethernet/sfc/ef10_sriov.c | 6 +- drivers/net/ethernet/sfc/efx.c | 96 ++- drivers/net/ethernet/sfc/efx_common.c | 32 +- drivers/net/ethernet/sfc/falcon/efx.c | 75 +- drivers/net/ethernet/sfc/falcon/efx.h | 3 + drivers/net/ethernet/sfc/falcon/falcon.c | 4 +- drivers/net/ethernet/sfc/falcon/net_driver.h | 4 +- drivers/net/ethernet/sfc/falcon/rx.c | 4 +- drivers/net/ethernet/sfc/farch.c | 2 +- drivers/net/ethernet/sfc/mcdi_filters.c | 13 +- drivers/net/ethernet/sfc/mcdi_port_common.c | 2 +- drivers/net/ethernet/sfc/net_driver.h | 4 +- drivers/net/ethernet/sfc/rx.c | 2 +- drivers/net/ethernet/sfc/rx_common.c | 5 +- drivers/net/ethernet/sfc/rx_common.h | 4 + drivers/net/ethernet/sfc/siena.c | 3 +- include/linux/netdev_features.h | 189 ++--- include/linux/netdevice.h | 722 +++++++++++++++++- lib/vsprintf.c | 11 +- net/core/dev.c | 419 ++++++---- net/core/netdev_features.c | 276 +++++++ net/ethtool/features.c | 77 +- net/ethtool/ioctl.c | 140 ++-- 29 files changed, 1797 insertions(+), 528 deletions(-) create mode 100644 net/core/netdev_features.c -- 2.33.0

4 35

Ref: Business Deal!
by Kalinkin Aliaksandr 15 Apr '22

15 Apr '22

An executive director with an oil Company, who is a client of mine has informed me he is privy to over invoiced contracts amounting to hundreds of millions of dollars. Based on this privileged information he has agreed to assign this over invoiced funds to any individual or company that applies as the contractor/beneficiary, with a good understanding that when the funds are released to you, that both parties will share the funds. If you agree to work with my client on this privileged info, I will be needing your consent to present you or your company as the beneficiary of one of the over invoiced contract funds of $47 million. I will inform you in detail what is required of you and how we are to achieve this within the confines of the law as stipulated by my client as soon as you reach me on my email. The modalities for sharing the funds as suggested by my client which is still subject to deliberation and agreement between the parties as will be mutually decided is 60% for him and 40% for you. All relevant documents to back up your claim as beneficiary will be provided to you . All that is required is your honest cooperation and participation to enable us to see this transaction through. Looking forward to hear from you soonest. Sincerely Kalinkin Aliaksandr Esq.

1 0

Quotation..
by Nicholas Morgan 14 Apr '22

14 Apr '22

Hi, You Want Top Rank on Google. 1st Page of Google. Just send me your Website URL & Keywords Let me know if you are interested, I will send you our SEO Packages and price list. Thanks, Nicholas Morgan Noida NCR (India)

1 0

Wycena paneli fotowoltaicznych
by "Przemysław Wróblewski" 12 Apr '22

12 Apr '22

Dzień dobry, dostrzegam możliwość współpracy z Państwa firmą. Świadczymy kompleksową obsługę inwestycji w fotowoltaikę, która obniża koszty energii elektrycznej nawet o 90%. Czy są Państwo zainteresowani weryfikacją wstępnych propozycji? Pozdrawiam, Przemysław Wróblewski

1 0

[PATCH] MAINTAINERS: update HiSilicon ZIP and QM maintainers
by Zhou Wang 11 Apr '22

11 Apr '22

This patch splits QM and ZIP in MAINTAINERS, then add Weili Qian for QM driver and Yang Shen for ZIP driver. This patch adds missing Kconfig and Makefile files as well. Signed-off-by: Zhou Wang <wangzhou1(a)hisilicon.com> --- MAINTAINERS | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 61d9f11..d721620 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8858,15 +8858,24 @@ F: Documentation/admin-guide/perf/hisi-pcie-pmu.rst F: Documentation/admin-guide/perf/hisi-pmu.rst F: drivers/perf/hisilicon -HISILICON QM AND ZIP Controller DRIVER +HISILICON QM DRIVER +M: Weili Qian <qianweili(a)huawei.com> M: Zhou Wang <wangzhou1(a)hisilicon.com> L: linux-crypto(a)vger.kernel.org S: Maintained -F: Documentation/ABI/testing/debugfs-hisi-zip F: drivers/crypto/hisilicon/qm.c F: drivers/crypto/hisilicon/sgl.c -F: drivers/crypto/hisilicon/zip/ F: include/linux/hisi_acc_qm.h +F: drivers/crypto/hisilicon/Kconfig +F: drivers/crypto/hisilicon/Makefile + +HISILICON ZIP Controller DRIVER +M: Yang Shen <shenyang39(a)huawei.com> +M: Zhou Wang <wangzhou1(a)hisilicon.com> +L: linux-crypto(a)vger.kernel.org +S: Maintained +F: Documentation/ABI/testing/debugfs-hisi-zip +F: drivers/crypto/hisilicon/zip/ HISILICON ROCE DRIVER M: Wenpeng Liang <liangwenpeng(a)huawei.com> -- 2.8.1

1 0

Programas y Servicios para Email Marketing ISA 2022 - id= 202248213255
by ISA Email Marketing 10 Apr '22

10 Apr '22

1 0

Prezentacja
by Marek Onufrowicz 05 Apr '22

05 Apr '22

Dzień dobry! Czy mógłbym przedstawić rozwiązanie, które umożliwia monitoring każdego auta w czasie rzeczywistym w tym jego pozycję, zużycie paliwa i przebieg? Dodatkowo nasze narzędzie minimalizuje koszty utrzymania samochodów, skraca czas przejazdów, a także tworzenie planu tras czy dostaw. Z naszej wiedzy i doświadczenia korzysta już ponad 49 tys. Klientów. Monitorujemy 809 000 pojazdów na całym świecie, co jest naszą najlepszą wizytówką. Bardzo proszę o e-maila zwrotnego, jeśli moglibyśmy wspólnie omówić potencjał wykorzystania takiego rozwiązania w Państwa firmie. Pozdrawiam, Marek Onufrowicz

1 0

[PATCH 0/4] rasdaemon: Some little fixes and add some modules support
by Xiaofei Tan 01 Apr '22

01 Apr '22

Some little fixes and add some modules support for kunpeng series. Xiaofei Tan (4): rasdaemon: Fix the issue of sprintf data type mismatch in uuid_le() rasdaemon: Fix the issue of command option -r for hip08 rasdaemon: Fix some print format issues for hisi common error section rasdaemon: Add some modules supported by hisi common error section non-standard-hisi_hip08.c | 6 +++--- non-standard-hisilicon.c | 32 +++++++++++++++++++++----------- ras-extlog-handler.c | 2 +- ras-non-standard-handler.c | 4 ++-- 4 files changed, 27 insertions(+), 17 deletions(-) -- 2.33.0

3 6

information about Email Marketing - id= 202232875729
by ISA Email Marketing 28 Mar '22

28 Mar '22

Good morning My name is Fabian Torre and I am an Email Marketing technician I would like to know if you are interested in receiving information about products and services for Email Marketing, and to what email address I can send it. Thanks a lot Whatsapp: +55 719 9204-2292 Skype: chronskype

1 0

Koszty instalacji fotowoltaicznej
by "Arkadiusz Sokołowski" 28 Mar '22

28 Mar '22

Dzień dobry, stworzyliśmy specjalną ofertę dla firm, na kompleksową obsługę inwestycji w fotowoltaikę. Specjalizujemy się w zakresie doboru, montażu i serwisie instalacji fotowoltaicznych, dysponujemy najnowocześniejszymi rozwiązania, które zapewnią Państwu oczekiwane rezultaty. Możemy przygotować dla Państwa wstępną kalkulację i przeanalizować efekty możliwe do osiągnięcia. Czy są Państwo otwarci na wstępną rozmowę w tym temacie? Pozdrawiam Arkadiusz Sokołowski

1 0

[PATCH net-next v2 0/4] add frag page support in page pool
by Yunsheng Lin 25 Mar '22

25 Mar '22

This patchset adds frag page support in page pool and enable skb's page frag recycling based on page pool in hns3 drvier. V2: 1. resend based on the latest net-next. V1: 1. avoid atomic_long_read() in case of freeing or draining page frag, and drop RFC tag. RFC v6: 1. Disable frag page support in system 32-bit arch and 64-bit DMA. RFC v5: 1. Rename dma_addr[0] to pp_frag_count and adjust codes according to the rename. RFC v4: 1. Use the dma_addr[1] to store bias. 2. Default to a pagecnt_bias of PAGE_SIZE - 1. 3. other minor comment suggested by Alexander. RFC v3: 1. Implement the semantic of "page recycling only wait for the page pool user instead of all user of a page" 2. Support the frag allocation of different sizes 3. Merge patch 4 & 5 to one patch as it does not make sense to use page_pool_dev_alloc_pages() API directly with elevated refcnt. 4. other minor comment suggested by Alexander. RFC v2: 1. Split patch 1 to more reviewable one. 2. Repurpose the lower 12 bits of the dma address to store the pagecnt_bias as suggested by Alexander. 3. support recycling to pool->alloc for elevated refcnt case too. Yunsheng Lin (4): page_pool: keep pp info as long as page pool owns the page page_pool: add interface to manipulate frag count in page pool page_pool: add frag page recycling support in page pool net: hns3: support skb's frag page recycling based on page pool drivers/net/ethernet/hisilicon/Kconfig | 1 + drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 79 +++++++++++++++-- drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | 3 + drivers/net/ethernet/marvell/mvneta.c | 6 +- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 2 +- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_new.c | 2 +- include/linux/mm_types.h | 18 ++-- include/linux/skbuff.h | 4 +- include/net/page_pool.h | 68 +++++++++++--- net/core/page_pool.c | 112 +++++++++++++++++++++++- 11 files changed, 258 insertions(+), 39 deletions(-) -- 2.7.4

7 25

Wycena paneli fotowoltaicznych
by Norbert Karecki 18 Mar '22

18 Mar '22

Dzień dobry, dostrzegam możliwość współpracy z Państwa firmą. Świadczymy kompleksową obsługę inwestycji w fotowoltaikę, która obniża koszty energii elektrycznej nawet o 90%. Czy są Państwo zainteresowani weryfikacją wstępnych propozycji? Pozdrawiam Norbert Karecki

1 0

Re: Mutual Investment Proposal
by Luis Fernandez 15 Mar '22

15 Mar '22

Good Day, My name is Luis Fernandez, I am contacting you because we have investors that have the capacity to invest in any massive project in your country or invest in your existing project that requires funding.Kindly get back to me for more details. Regards Luis Fernandez

1 0

FROM MRS ROSE RAYA
by Mrs.Rose Raya 13 Mar '22

13 Mar '22

My name is Mrs.Rose Raya.from Indonesia, I know that this message might come to you as a surprise because we don't know each other nor have we ever met before but accept it with an open and positive mind. I have a Very important request that made me to contact you; I was diagnosed with ovarian cancer disease which doctors have confirmed and announced to me that i have just few days to leave, Now that I’m ending the race like this, without any family members and no child, I just came across your email contact from my personal search. I’m a business woman from Indonesia dealing with gold exportation here in the Republic of Burkina Faso. I have decided to hand over the sum of ($10.5 Million Dollar) in my account to you for the help of orphanage homes/the needy once in your location to fulfill my wish on earth. But before handing over my data’s to you, kindly assure me that you will take only 50% of the money and share the rest to orphanage homes/the needy once in your country, Return to enable me forward to you the bank contact details now that I have access to Internet in the hospital to enable you contact the bank, always check your email and reply in time for better communications. PLEASE REPLY ME WITH THE ANSWERS TO THOSE QUESTIONS BELOW FOR MY CONFIRMATION SO THAT I CAN GIVE YOU THE EMAIL ADDRESS OF THE BANK FOR YOU TO CONTACT THEM. 1. FULL NAME: 2. YOUR AGE: 3. SEX: 4. NATIONALITY: 5. COUNTRY OF RESIDENCE: 6. TELEPHONE NUMBER: 7. YOUR MARITAL STATUS: 8. YOUR OCCUPATION: 9. SEND TO ME YOUR PICTURE: 10. YOU HAVE TO ASSURE ME YOU WILL ACT AS I HAVE INSTRUCTED YOU IF THE MONEY GETS TO YOUR BANK ACCOUNT. Your early response will be appreciated. Yours Faithfully, Mrs.Rose Raya.

1 0

[PATCH v2] dma-mapping: benchmark: Extract a common header file for map_benchmark definition
by Tian Tao 10 Mar '22

10 Mar '22

kernel/dma/map_benchmark.c and selftests/dma/dma_map_benchmark.c have duplicate map_benchmark definitions, which tends to lead to inconsistent changes to map_benchmark on both sides, extract a common header file to avoid this problem. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> Acked-by: Barry Song <song.bao.hua(a)hisilicon.com> Reviewed-by: Shuah Khan <skhan(a)linuxfoundation.org> --- v2: move map_benchmark.h in a more appropriate directory --- include/linux/map_benchmark.h | 31 +++++++++++++++++++ kernel/dma/map_benchmark.c | 25 +-------------- .../testing/selftests/dma/dma_map_benchmark.c | 25 +-------------- 3 files changed, 33 insertions(+), 48 deletions(-) create mode 100644 include/linux/map_benchmark.h diff --git a/include/linux/map_benchmark.h b/include/linux/map_benchmark.h new file mode 100644 index 000000000000..62674c83bde4 --- /dev/null +++ b/include/linux/map_benchmark.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022 HiSilicon Limited. + */ + +#ifndef _KERNEL_DMA_BENCHMARK_H +#define _KERNEL_DMA_BENCHMARK_H + +#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) +#define DMA_MAP_MAX_THREADS 1024 +#define DMA_MAP_MAX_SECONDS 300 +#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) + +#define DMA_MAP_BIDIRECTIONAL 0 +#define DMA_MAP_TO_DEVICE 1 +#define DMA_MAP_FROM_DEVICE 2 + +struct map_benchmark { + __u64 avg_map_100ns; /* average map latency in 100ns */ + __u64 map_stddev; /* standard deviation of map latency */ + __u64 avg_unmap_100ns; /* as above */ + __u64 unmap_stddev; + __u32 threads; /* how many threads will do map/unmap in parallel */ + __u32 seconds; /* how long the test will last */ + __s32 node; /* which numa node this benchmark will run on */ + __u32 dma_bits; /* DMA addressing capability */ + __u32 dma_dir; /* DMA data direction */ + __u32 dma_trans_ns; /* time for DMA transmission in ns */ + __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ +}; +#endif /* _KERNEL_DMA_BENCHMARK_H */ diff --git a/kernel/dma/map_benchmark.c b/kernel/dma/map_benchmark.c index 9b9af1bd6be3..0520a8f4fb1d 100644 --- a/kernel/dma/map_benchmark.c +++ b/kernel/dma/map_benchmark.c @@ -11,6 +11,7 @@ #include <linux/dma-mapping.h> #include <linux/kernel.h> #include <linux/kthread.h> +#include <linux/map_benchmark.h> #include <linux/math64.h> #include <linux/module.h> #include <linux/pci.h> @@ -18,30 +19,6 @@ #include <linux/slab.h> #include <linux/timekeeping.h> -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; - struct map_benchmark_data { struct map_benchmark bparam; struct device *dev; diff --git a/tools/testing/selftests/dma/dma_map_benchmark.c b/tools/testing/selftests/dma/dma_map_benchmark.c index 485dff51bad2..c3b3c09e995e 100644 --- a/tools/testing/selftests/dma/dma_map_benchmark.c +++ b/tools/testing/selftests/dma/dma_map_benchmark.c @@ -10,40 +10,17 @@ #include <unistd.h> #include <sys/ioctl.h> #include <sys/mman.h> +#include <linux/map_benchmark.h> #include <linux/types.h> #define NSEC_PER_MSEC 1000000L -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - static char *directions[] = { "BIDIRECTIONAL", "TO_DEVICE", "FROM_DEVICE", }; -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; - int main(int argc, char **argv) { struct map_benchmark map; -- 2.33.0

2 1

【重要】えきねっとアカウントの自動退会処理について
by Ekinet 10 Mar '22

10 Mar '22

日頃より「えきねっと」をご利用いただきありがとうございます。「えきねっと」のアカウントは制限されています。通常の使用に影響を与えないように、下のリンクをクリックして関連情報をできるだけ早く確認してください。12時間以内に申し込みが届かない場合、アカウントは常にご不便をおかけして申し訳ございません。２年以上ログインしていないお客さまで、今後も「えきねっと」をご利用いただける場合は、2022 年 3 月 10 日(木)よりも前に、一度ログイン操作をお願いいたします。 ⇒ログインはこちら ※えきねっとトップページ右上のログインボタンよりログインしてください。お問い合わせ先えきねっとサポートセンター TEL 050-2016-5000 受付時間 8時00分～22時00分サイト運営・管理 JR東日本ネットステーション -------------------- このメールは「えきねっと」より自動配信されています。返信いただきましても対応致しかねますので、あらかじめご了承ください。お心当たりのない方は、誠に恐れ入りますがこのメールの削除をお願いいたします。ご不明な点のある方は、えきねっとサポートセンターまでご連絡ください。 Copyright © JR East Net Station Co.,Ltd. All Rights Reserved.

1 0

Napływ Klientów ze strony
by "Mikołaj Rudzik" 09 Mar '22

09 Mar '22

Dzień dobry, chciałbym poinformować Państwa o możliwości pozyskania nowych zleceń ze strony www. Widzimy zainteresowanie potencjalnych Klientów Państwa firmą, dlatego chętnie pomożemy Państwu dotrzeć z ofertą do większego grona odbiorców poprzez efektywne metody pozycjonowania strony w Google. Czy mógłbym liczyć na kontakt zwrotny? Pozdrawiam Mikołaj Rudzik

1 0

[RESEND] dma-mapping: benchmark: Extract a common header file for map_benchmark definition
by Tian Tao 08 Mar '22

08 Mar '22

kernel/dma/map_benchmark.c and selftests/dma/dma_map_benchmark.c have duplicate map_benchmark definitions, which tends to lead to inconsistent changes to map_benchmark on both sides, extract a common header file to avoid this problem. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> Acked-by: Barry Song <song.bao.hua(a)hisilicon.com> Reviewed-by: Shuah Khan <skhan(a)linuxfoundation.org> --- kernel/dma/map_benchmark.c | 24 +------------- kernel/dma/map_benchmark.h | 31 +++++++++++++++++++ .../testing/selftests/dma/dma_map_benchmark.c | 25 +-------------- 3 files changed, 33 insertions(+), 47 deletions(-) create mode 100644 kernel/dma/map_benchmark.h diff --git a/kernel/dma/map_benchmark.c b/kernel/dma/map_benchmark.c index 9b9af1bd6be3..c05f4e242991 100644 --- a/kernel/dma/map_benchmark.c +++ b/kernel/dma/map_benchmark.c @@ -18,29 +18,7 @@ #include <linux/slab.h> #include <linux/timekeeping.h> -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; +#include "map_benchmark.h" struct map_benchmark_data { struct map_benchmark bparam; diff --git a/kernel/dma/map_benchmark.h b/kernel/dma/map_benchmark.h new file mode 100644 index 000000000000..62674c83bde4 --- /dev/null +++ b/kernel/dma/map_benchmark.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022 HiSilicon Limited. + */ + +#ifndef _KERNEL_DMA_BENCHMARK_H +#define _KERNEL_DMA_BENCHMARK_H + +#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) +#define DMA_MAP_MAX_THREADS 1024 +#define DMA_MAP_MAX_SECONDS 300 +#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) + +#define DMA_MAP_BIDIRECTIONAL 0 +#define DMA_MAP_TO_DEVICE 1 +#define DMA_MAP_FROM_DEVICE 2 + +struct map_benchmark { + __u64 avg_map_100ns; /* average map latency in 100ns */ + __u64 map_stddev; /* standard deviation of map latency */ + __u64 avg_unmap_100ns; /* as above */ + __u64 unmap_stddev; + __u32 threads; /* how many threads will do map/unmap in parallel */ + __u32 seconds; /* how long the test will last */ + __s32 node; /* which numa node this benchmark will run on */ + __u32 dma_bits; /* DMA addressing capability */ + __u32 dma_dir; /* DMA data direction */ + __u32 dma_trans_ns; /* time for DMA transmission in ns */ + __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ +}; +#endif /* _KERNEL_DMA_BENCHMARK_H */ diff --git a/tools/testing/selftests/dma/dma_map_benchmark.c b/tools/testing/selftests/dma/dma_map_benchmark.c index 485dff51bad2..33bf073071aa 100644 --- a/tools/testing/selftests/dma/dma_map_benchmark.c +++ b/tools/testing/selftests/dma/dma_map_benchmark.c @@ -11,39 +11,16 @@ #include <sys/ioctl.h> #include <sys/mman.h> #include <linux/types.h> +#include "../../../../kernel/dma/map_benchmark.h" #define NSEC_PER_MSEC 1000000L -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - static char *directions[] = { "BIDIRECTIONAL", "TO_DEVICE", "FROM_DEVICE", }; -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; - int main(int argc, char **argv) { struct map_benchmark map; -- 2.33.0

2 1

information about Email Marketing - id= 20223375917
by ISA Email Marketing 05 Mar '22

05 Mar '22

Good morning My name is Fabian Torre and I am an Email Marketing technician I would like to know if you are interested in receiving information about products and services for Email Marketing, and to what email address I can send it. Thanks a lot Whatsapp: +55 719 9204-2292 Skype: chronskype

1 0

Re: colored gaming keyboard from Shicheng factory
by Carol Zhong 04 Mar '22

04 Mar '22

Hi dear, Recommend our hot selling colored keycap gaming keyboard to you, very suitable for girls. :) MOQ just 100sets, price near 6.8USD/set, If order large quantity, will reduce price, Welcome to contact us if need sample, Best regards, Carol Dongguan Shicheng Electronic Technology Co., Ltd Tel:8615112433669

1 0

Wycena paneli fotowoltaicznych
by Jakub Daroch 25 Feb '22

25 Feb '22

Dzień dobry, dostrzegam możliwość współpracy z Państwa firmą. Świadczymy kompleksową obsługę inwestycji w fotowoltaikę, która obniża koszty energii elektrycznej nawet o 90%. Czy są Państwo zainteresowani weryfikacją wstępnych propozycji? Pozdrawiam, Jakub Daroch

1 0

Ruch z pierwszej pozycji w Google
by Wiktor Zielonko 24 Feb '22

24 Feb '22

Dzień dobry, jakiś czas temu zgłosiła się do nas firma, której strona internetowa nie pozycjonowała się wysoko w wyszukiwarce Google. Na podstawie wykonanego przez nas audytu SEO zoptymalizowaliśmy treści na stronie pod kątem wcześniej opracowanych słów kluczowych. Nasz wewnętrzny system codziennie analizuje prawidłowe działanie witryny. Dzięki indywidualnej strategii, firma zdobywa coraz więcej Klientów. Czy chcieliby Państwo zwiększyć liczbę osób odwiedzających stronę internetową firmy? Mógłbym przedstawić ofertę? Pozdrawiam serdecznie, Wiktor Zielonko

1 0

Re: Keyboard Mouse Items
by jerry shicheng 24 Feb '22

24 Feb '22

Hello My friend, May i know your purchase manager email? then i can send our keyboard mouse catalog to him check, We are keyboard mouse manufacturer in China, Hope can do business with your company, Thank you Jerry Website keyboardoem.com

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[PATCH] dma-mapping: benchmark: Extract a common header file for map_benchmark definition
by Tian Tao 12 Feb '22

12 Feb '22

kernel/dma/map_benchmark.c and selftests/dma/dma_map_benchmark.c have duplicate map_benchmark definitions, which tends to lead to inconsistent changes to map_benchmark on both sides, extract a common header file to avoid this problem. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> --- kernel/dma/map_benchmark.c | 24 +------------- kernel/dma/map_benchmark.h | 31 +++++++++++++++++++ .../testing/selftests/dma/dma_map_benchmark.c | 25 +-------------- 3 files changed, 33 insertions(+), 47 deletions(-) create mode 100644 kernel/dma/map_benchmark.h diff --git a/kernel/dma/map_benchmark.c b/kernel/dma/map_benchmark.c index 9b9af1bd6be3..c05f4e242991 100644 --- a/kernel/dma/map_benchmark.c +++ b/kernel/dma/map_benchmark.c @@ -18,29 +18,7 @@ #include <linux/slab.h> #include <linux/timekeeping.h> -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; +#include "map_benchmark.h" struct map_benchmark_data { struct map_benchmark bparam; diff --git a/kernel/dma/map_benchmark.h b/kernel/dma/map_benchmark.h new file mode 100644 index 000000000000..62674c83bde4 --- /dev/null +++ b/kernel/dma/map_benchmark.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022 HiSilicon Limited. + */ + +#ifndef _KERNEL_DMA_BENCHMARK_H +#define _KERNEL_DMA_BENCHMARK_H + +#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) +#define DMA_MAP_MAX_THREADS 1024 +#define DMA_MAP_MAX_SECONDS 300 +#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) + +#define DMA_MAP_BIDIRECTIONAL 0 +#define DMA_MAP_TO_DEVICE 1 +#define DMA_MAP_FROM_DEVICE 2 + +struct map_benchmark { + __u64 avg_map_100ns; /* average map latency in 100ns */ + __u64 map_stddev; /* standard deviation of map latency */ + __u64 avg_unmap_100ns; /* as above */ + __u64 unmap_stddev; + __u32 threads; /* how many threads will do map/unmap in parallel */ + __u32 seconds; /* how long the test will last */ + __s32 node; /* which numa node this benchmark will run on */ + __u32 dma_bits; /* DMA addressing capability */ + __u32 dma_dir; /* DMA data direction */ + __u32 dma_trans_ns; /* time for DMA transmission in ns */ + __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ +}; +#endif /* _KERNEL_DMA_BENCHMARK_H */ diff --git a/tools/testing/selftests/dma/dma_map_benchmark.c b/tools/testing/selftests/dma/dma_map_benchmark.c index 485dff51bad2..33bf073071aa 100644 --- a/tools/testing/selftests/dma/dma_map_benchmark.c +++ b/tools/testing/selftests/dma/dma_map_benchmark.c @@ -11,39 +11,16 @@ #include <sys/ioctl.h> #include <sys/mman.h> #include <linux/types.h> +#include "../../../../kernel/dma/map_benchmark.h" #define NSEC_PER_MSEC 1000000L -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - static char *directions[] = { "BIDIRECTIONAL", "TO_DEVICE", "FROM_DEVICE", }; -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; - int main(int argc, char **argv) { struct map_benchmark map; -- 2.33.0

3 2

Prezentacja
by Marek Onufrowicz 11 Feb '22

11 Feb '22

Dzień dobry! Czy mógłbym przedstawić rozwiązanie, które umożliwia monitoring każdego auta w czasie rzeczywistym w tym jego pozycję, zużycie paliwa i przebieg? Dodatkowo nasze narzędzie minimalizuje koszty utrzymania samochodów, skraca czas przejazdów, a także tworzenie planu tras czy dostaw. Z naszej wiedzy i doświadczenia korzysta już ponad 49 tys. Klientów. Monitorujemy 809 000 pojazdów na całym świecie, co jest naszą najlepszą wizytówką. Bardzo proszę o e-maila zwrotnego, jeśli moglibyśmy wspólnie omówić potencjał wykorzystania takiego rozwiązania w Państwa firmie. Pozdrawiam, Marek Onufrowicz

1 0

[PATCH v2] dma-mapping: benchmark: Extract a common header file for map_benchmark definition
by Tian Tao 11 Feb '22

11 Feb '22

kernel/dma/map_benchmark.c and selftests/dma/dma_map_benchmark.c have duplicate map_benchmark definitions, which tends to lead to inconsistent changes to map_benchmark on both sides, extract a common header file to avoid this problem. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> --- v2: rewrite the name of patch. --- kernel/dma/map_benchmark.c | 24 +------------- kernel/dma/map_benchmark.h | 31 +++++++++++++++++++ .../testing/selftests/dma/dma_map_benchmark.c | 25 +-------------- 3 files changed, 33 insertions(+), 47 deletions(-) create mode 100644 kernel/dma/map_benchmark.h diff --git a/kernel/dma/map_benchmark.c b/kernel/dma/map_benchmark.c index 9b9af1bd6be3..c05f4e242991 100644 --- a/kernel/dma/map_benchmark.c +++ b/kernel/dma/map_benchmark.c @@ -18,29 +18,7 @@ #include <linux/slab.h> #include <linux/timekeeping.h> -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; +#include "map_benchmark.h" struct map_benchmark_data { struct map_benchmark bparam; diff --git a/kernel/dma/map_benchmark.h b/kernel/dma/map_benchmark.h new file mode 100644 index 000000000000..62674c83bde4 --- /dev/null +++ b/kernel/dma/map_benchmark.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022 HiSilicon Limited. + */ + +#ifndef _KERNEL_DMA_BENCHMARK_H +#define _KERNEL_DMA_BENCHMARK_H + +#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) +#define DMA_MAP_MAX_THREADS 1024 +#define DMA_MAP_MAX_SECONDS 300 +#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) + +#define DMA_MAP_BIDIRECTIONAL 0 +#define DMA_MAP_TO_DEVICE 1 +#define DMA_MAP_FROM_DEVICE 2 + +struct map_benchmark { + __u64 avg_map_100ns; /* average map latency in 100ns */ + __u64 map_stddev; /* standard deviation of map latency */ + __u64 avg_unmap_100ns; /* as above */ + __u64 unmap_stddev; + __u32 threads; /* how many threads will do map/unmap in parallel */ + __u32 seconds; /* how long the test will last */ + __s32 node; /* which numa node this benchmark will run on */ + __u32 dma_bits; /* DMA addressing capability */ + __u32 dma_dir; /* DMA data direction */ + __u32 dma_trans_ns; /* time for DMA transmission in ns */ + __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ +}; +#endif /* _KERNEL_DMA_BENCHMARK_H */ diff --git a/tools/testing/selftests/dma/dma_map_benchmark.c b/tools/testing/selftests/dma/dma_map_benchmark.c index 485dff51bad2..33bf073071aa 100644 --- a/tools/testing/selftests/dma/dma_map_benchmark.c +++ b/tools/testing/selftests/dma/dma_map_benchmark.c @@ -11,39 +11,16 @@ #include <sys/ioctl.h> #include <sys/mman.h> #include <linux/types.h> +#include "../../../../kernel/dma/map_benchmark.h" #define NSEC_PER_MSEC 1000000L -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - static char *directions[] = { "BIDIRECTIONAL", "TO_DEVICE", "FROM_DEVICE", }; -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; - int main(int argc, char **argv) { struct map_benchmark map; -- 2.33.0

1 0

[PATCH v2] dma-mapping: benchmark: Extract a common header file for map_benchmark definition
by Tian Tao 11 Feb '22

11 Feb '22

kernel/dma/map_benchmark.c and selftests/dma/dma_map_benchmark.c have duplicate map_benchmark definitions, which tends to lead to inconsistent changes to map_benchmark on both sides, extract a common header file to avoid this problem. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> --- v2: rewrite the name of patch. --- kernel/dma/map_benchmark.c | 24 +------------- kernel/dma/map_benchmark.h | 31 +++++++++++++++++++ .../testing/selftests/dma/dma_map_benchmark.c | 25 +-------------- 3 files changed, 33 insertions(+), 47 deletions(-) create mode 100644 kernel/dma/map_benchmark.h diff --git a/kernel/dma/map_benchmark.c b/kernel/dma/map_benchmark.c index 9b9af1bd6be3..c05f4e242991 100644 --- a/kernel/dma/map_benchmark.c +++ b/kernel/dma/map_benchmark.c @@ -18,29 +18,7 @@ #include <linux/slab.h> #include <linux/timekeeping.h> -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; +#include "map_benchmark.h" struct map_benchmark_data { struct map_benchmark bparam; diff --git a/kernel/dma/map_benchmark.h b/kernel/dma/map_benchmark.h new file mode 100644 index 000000000000..62674c83bde4 --- /dev/null +++ b/kernel/dma/map_benchmark.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022 HiSilicon Limited. + */ + +#ifndef _KERNEL_DMA_BENCHMARK_H +#define _KERNEL_DMA_BENCHMARK_H + +#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) +#define DMA_MAP_MAX_THREADS 1024 +#define DMA_MAP_MAX_SECONDS 300 +#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) + +#define DMA_MAP_BIDIRECTIONAL 0 +#define DMA_MAP_TO_DEVICE 1 +#define DMA_MAP_FROM_DEVICE 2 + +struct map_benchmark { + __u64 avg_map_100ns; /* average map latency in 100ns */ + __u64 map_stddev; /* standard deviation of map latency */ + __u64 avg_unmap_100ns; /* as above */ + __u64 unmap_stddev; + __u32 threads; /* how many threads will do map/unmap in parallel */ + __u32 seconds; /* how long the test will last */ + __s32 node; /* which numa node this benchmark will run on */ + __u32 dma_bits; /* DMA addressing capability */ + __u32 dma_dir; /* DMA data direction */ + __u32 dma_trans_ns; /* time for DMA transmission in ns */ + __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ +}; +#endif /* _KERNEL_DMA_BENCHMARK_H */ diff --git a/tools/testing/selftests/dma/dma_map_benchmark.c b/tools/testing/selftests/dma/dma_map_benchmark.c index 485dff51bad2..33bf073071aa 100644 --- a/tools/testing/selftests/dma/dma_map_benchmark.c +++ b/tools/testing/selftests/dma/dma_map_benchmark.c @@ -11,39 +11,16 @@ #include <sys/ioctl.h> #include <sys/mman.h> #include <linux/types.h> +#include "../../../../kernel/dma/map_benchmark.h" #define NSEC_PER_MSEC 1000000L -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - static char *directions[] = { "BIDIRECTIONAL", "TO_DEVICE", "FROM_DEVICE", }; -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; - int main(int argc, char **argv) { struct map_benchmark map; -- 2.33.0

1 0

[PATCH] dma-mapping: benchmark: Remove the copy of map_benchmark
by Tian Tao 11 Feb '22

11 Feb '22

kernel/dma/map_benchmark.c and selftests/dma/dma_map_benchmark.c have duplicate map_benchmark definitions, which tends to lead to inconsistent changes to map_benchmark on both sides, extract a common header file to avoid this problem. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> --- kernel/dma/map_benchmark.c | 24 +------------- kernel/dma/map_benchmark.h | 31 +++++++++++++++++++ .../testing/selftests/dma/dma_map_benchmark.c | 25 +-------------- 3 files changed, 33 insertions(+), 47 deletions(-) create mode 100644 kernel/dma/map_benchmark.h diff --git a/kernel/dma/map_benchmark.c b/kernel/dma/map_benchmark.c index 9b9af1bd6be3..c05f4e242991 100644 --- a/kernel/dma/map_benchmark.c +++ b/kernel/dma/map_benchmark.c @@ -18,29 +18,7 @@ #include <linux/slab.h> #include <linux/timekeeping.h> -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; +#include "map_benchmark.h" struct map_benchmark_data { struct map_benchmark bparam; diff --git a/kernel/dma/map_benchmark.h b/kernel/dma/map_benchmark.h new file mode 100644 index 000000000000..62674c83bde4 --- /dev/null +++ b/kernel/dma/map_benchmark.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022 HiSilicon Limited. + */ + +#ifndef _KERNEL_DMA_BENCHMARK_H +#define _KERNEL_DMA_BENCHMARK_H + +#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) +#define DMA_MAP_MAX_THREADS 1024 +#define DMA_MAP_MAX_SECONDS 300 +#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) + +#define DMA_MAP_BIDIRECTIONAL 0 +#define DMA_MAP_TO_DEVICE 1 +#define DMA_MAP_FROM_DEVICE 2 + +struct map_benchmark { + __u64 avg_map_100ns; /* average map latency in 100ns */ + __u64 map_stddev; /* standard deviation of map latency */ + __u64 avg_unmap_100ns; /* as above */ + __u64 unmap_stddev; + __u32 threads; /* how many threads will do map/unmap in parallel */ + __u32 seconds; /* how long the test will last */ + __s32 node; /* which numa node this benchmark will run on */ + __u32 dma_bits; /* DMA addressing capability */ + __u32 dma_dir; /* DMA data direction */ + __u32 dma_trans_ns; /* time for DMA transmission in ns */ + __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ +}; +#endif /* _KERNEL_DMA_BENCHMARK_H */ diff --git a/tools/testing/selftests/dma/dma_map_benchmark.c b/tools/testing/selftests/dma/dma_map_benchmark.c index 485dff51bad2..33bf073071aa 100644 --- a/tools/testing/selftests/dma/dma_map_benchmark.c +++ b/tools/testing/selftests/dma/dma_map_benchmark.c @@ -11,39 +11,16 @@ #include <sys/ioctl.h> #include <sys/mman.h> #include <linux/types.h> +#include "../../../../kernel/dma/map_benchmark.h" #define NSEC_PER_MSEC 1000000L -#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark) -#define DMA_MAP_MAX_THREADS 1024 -#define DMA_MAP_MAX_SECONDS 300 -#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC) - -#define DMA_MAP_BIDIRECTIONAL 0 -#define DMA_MAP_TO_DEVICE 1 -#define DMA_MAP_FROM_DEVICE 2 - static char *directions[] = { "BIDIRECTIONAL", "TO_DEVICE", "FROM_DEVICE", }; -struct map_benchmark { - __u64 avg_map_100ns; /* average map latency in 100ns */ - __u64 map_stddev; /* standard deviation of map latency */ - __u64 avg_unmap_100ns; /* as above */ - __u64 unmap_stddev; - __u32 threads; /* how many threads will do map/unmap in parallel */ - __u32 seconds; /* how long the test will last */ - __s32 node; /* which numa node this benchmark will run on */ - __u32 dma_bits; /* DMA addressing capability */ - __u32 dma_dir; /* DMA data direction */ - __u32 dma_trans_ns; /* time for DMA transmission in ns */ - __u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */ - __u8 expansion[76]; /* For future use */ -}; - int main(int argc, char **argv) { struct map_benchmark map; -- 2.33.0

2 1

[PATCH] MAINTAINERS: Update maintainer list of DMA MAPPING BENCHMARK
by chenxiang 10 Feb '22

10 Feb '22

From: Xiang Chen <chenxiang66(a)hisilicon.com> Barry Song will not focus on this area, and Xiang Chen will continue his work to maintain this module. Signed-off-by: Xiang Chen <chenxiang66(a)hisilicon.com> --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index ea3e6c914384..48335022b0e4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5765,7 +5765,7 @@ F: include/linux/dma-map-ops.h F: kernel/dma/ DMA MAPPING BENCHMARK -M: Barry Song <song.bao.hua(a)hisilicon.com> +M: Xiang Chen <chenxiang66(a)hisilicon.com> L: iommu(a)lists.linux-foundation.org F: kernel/dma/map_benchmark.c F: tools/testing/selftests/dma/ -- 2.33.0

3 2

[PATCH] MAINTAINERS: Update maintainers of DMA MAPPING BENCHMARK
by chenxiang 08 Feb '22

08 Feb '22

From: Xiang Chen <chenxiang66(a)hisilicon.com> Barry Song will not focus on this area, Xiang Chen and Tian Tao will maintain this module. Signed-off-by: Xiang Chen <chenxiang66(a)hisilicon.com> --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index ea3e6c914384..534357d0f7c1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5765,7 +5765,8 @@ F: include/linux/dma-map-ops.h F: kernel/dma/ DMA MAPPING BENCHMARK -M: Barry Song <song.bao.hua(a)hisilicon.com> +M: Xiang Chen <chenxiang66(a)hisilicon.com> +M: Tian Tao <tiantao6(a)hisilicon.com> L: iommu(a)lists.linux-foundation.org F: kernel/dma/map_benchmark.c F: tools/testing/selftests/dma/ -- 2.33.0

1 0

[PATCH] MAINTAINERS: Update maintainers of DMA Mapping Benchmark
by Tian Tao 07 Feb '22

07 Feb '22

Add a new maintainer for DMA Mapping benchmark. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 0590fe14b3bc..e49f0da547f2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5594,6 +5594,7 @@ F: kernel/dma/ DMA MAPPING BENCHMARK M: Barry Song <song.bao.hua(a)hisilicon.com> +M: Tian Tao <tiantao6(a)hisilicon.com> L: iommu(a)lists.linux-foundation.org F: kernel/dma/map_benchmark.c F: tools/testing/selftests/dma/ -- 2.33.0

1 0

information about email marketing
by ISA Email Marketing 05 Feb '22

05 Feb '22

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1 0

Prezentacja
by Mateusz Talaga 02 Feb '22

02 Feb '22

Dzień dobry! Czy mógłbym przedstawić rozwiązanie, które umożliwia monitoring każdego auta w czasie rzeczywistym w tym jego pozycję, zużycie paliwa i przebieg? Dodatkowo nasze narzędzie minimalizuje koszty utrzymania samochodów, skraca czas przejazdów, a także tworzenie planu tras czy dostaw. Z naszej wiedzy i doświadczenia korzysta już ponad 49 tys. Klientów. Monitorujemy 809 000 pojazdów na całym świecie, co jest naszą najlepszą wizytówką. Bardzo proszę o e-maila zwrotnego, jeśli moglibyśmy wspólnie omówić potencjał wykorzystania takiego rozwiązania w Państwa firmie. Z poważaniem, Mateusz Talaga

1 0

[RFCv2 net-next 000/167] net: extend the netdev_features_t
by Jian Shen 27 Jan '22

27 Jan '22

For the prototype of netdev_features_t is u64, and the number of netdevice feature bits is 64 now. So there is no space to introduce new feature bit. This patchset try to solve it by change the prototype of netdev_features_t from u64 to bitmap. With this change, it's necessary to introduce a set of bitmap operation helpers for netdev features. Meanwhile, the functions which use netdev_features_t as return value are also need to be changed, return the result as an output parameter. With above changes, it will affect hundreds of files, and all the nic drivers. To make it easy to be reviewed, split the changes to 167 patches to 5 parts. patch 1~22: convert the prototype which use netdev_features_t as return value patch 24: introduce fake helpers for bitmap operation patch 25~165: use netdev_feature_xxx helpers patch 166: use macro __DECLARE_NETDEV_FEATURE_MASK to replace netdev_feature_t declaration. patch 167: change the type of netdev_features_t to bitmap, and rewrite the bitmap helpers. Sorry to send a so huge patchset, I wanna to get more suggestions to finish this work, to make it much more reviewable and feasible. The former discussing for the changes, see [1] [1]. https://www.spinics.net/lists/netdev/msg753528.html ChangeLog: V1->V2: use bitmap by comment from Andrew Lunn Jian Shen (167): net: convert the prototype of netdev_intersect_features net: convert the prototype of netdev_get_wanted_features net: convert the prototype of net_mpls_features net: convert the prototype of harmonize_features net: convert the prototype of gso_features_check net: convert the prototype of vlan_features_check net: convert the prototype of vxlan_features_check net: convert the prototype of dflt_features_check net: convert the prototype of ndo_features_check net: convert the prototype of netif_skb_features net: convert the prototype of ndo_fix_features net: convert the prototype of netdev_fix_features net: convert the prototype of netdev_sync_upper_features net: convert the prototype of br_features_recompute net: convert the prototype of netdev_add_tso_features net: convert the prototype of netdev_increment_features net: convert the prototype of hsr_features_recompute net: mlx5: convert prototype of mlx5e_ipsec_feature_check, mlx5e_tunnel_features_check and mlx5e_fix_uplink_rep_features net: sfc: convert the prototype of xxx_supported_features net: qlogic: convert the prototype of qlcnic_process_flags net: realtek: convert the prototype of rtl8168evl_fix_tso ethtool: convert the prototype of ethtool_get_feature_mask net: add netdev feature helpers net: core: use netdev feature helpers skbuff: use netdev feature helpers net: vlan: use netdev feature helpers bridge: use netdev feature helpers ipvlan: use netdev feature helpers veth: use netdev feature helpers bonding: use netdev feature helpers net: tun: use netdev feature helpers net: tap: use netdev feature helpers net: geneve: use netdev feature helpers hv_netvsc: use netdev feature helpers macvlan: use netdev feature helpers macsec: use netdev feature helpers net: tls: use netdev feature helpers s390: qeth: use netdev feature helpers dsa: use netdev feature helpers macvtap: use netdev feature helpers team: use netdev feature helpers vmxnet3: use netdev feature helpers net_failover: use netdev feature helpers pktgen: use netdev feature helpers net: sched: use netdev feature helpers netdevsim: use netdev feature helpers virtio_net: use netdev feature helpers net: ipv4: use netdev feature helpers net: ipv6: use netdev feature helpers net: hsr: use netdev feature helpers net: mpls: use netdev feature helpers net: nsh: use netdev feature helpers net: decnet: use netdev feature helpers net: dccp: use netdev feature helpers net: l2tp: use netdev feature helpers net: ntb_netdev: use netdev feature helpers net: thunderbolt: use netdev feature helpers net: phonet: use netdev feature helpers net: vrf: use netdev feature helpers net: sctp: use netdev feature helpers vxlan: use netdev feature helpers xen-netback: use netdev feature helpers xen-netfront: use netdev feature helpers sock: use netdev feature helpers sunrpc: use netdev feature helpers net: caif: use netdev feature helpers net: loopback: use netdev feature helpers net: dummy: use netdev_feature helpers net: mac80211: use netdev feature helpers net: ifb: use netdev feature helpers net: bareudp: use netdev feature helpers net: rionet: use netdev feature helpers net: gtp: use netdev feature helpers net: vsockmon: use netdev feature helpers net: nlmon: use netdev feature helpers net: wireguard: use netdev feature helpers net: can: use netdev feature helpers net: ppp: use netdev feature helpers net: ipa: use netdev feature helpers net: fjes: use netdev feature helpers net: usb: use netdev feature helpers net: wireless: use netdev feature helpers net: realtek: use netdev feature helpers net: broadcom: use netdev feature helpers net: intel: use netdev feature helpers net: hisilicon: use netdev feature helpers net: mellanox: use netdev feature helpers net: atlantic: use netdev feature helpers net: atheros: use netdev feature helpers net: chelsio: use netdev feature helpers net: davicom: use netdev feature helpers net: freescale: use netdev feature helpers net: synopsys: use netdev feature helpers net: sfc: use netdev feature helpers net: qualcomm: use netdev feature helpers net: nvidia: use netdev feature helpers net: faraday: use netdev feature helpers net: google: use netdev feature helpers net: hinic: use netdev feature helpers net: ibm: use netdev feature helpers net: ionic: use netdev feature helpers net: jme: use netdev feature helpers net: micrel: use netdev feature helpers net: cavium: use netdev feature helpers net: cadence: use netdev feature helpers net: mediatek: use netdev feature helpers net: marvell: use netdev feature helpers net: socionext: use netdev feature helpers net: qlogic: use netdev feature helpers net: nfp: use netdev feature helpers net: mscc: use netdev feature helpers net: oki-semi: use netdev feature helpers net: renesas: use netdev feature helpers net: neterion: use netdev feature helpers net: cortina: use netdev feature helpers net: stmmac: use netdev feature helpers net: sxgbe: use netdev feature helpers net: xgmac: use netdev feature helpers net: altera: use netdev feature helpers net: ti: use netdev feature helpers net: benet: use netdev feature helpers net: amd: use netdev feature helpers net: bna: use netdev feature helpers net: enic: use netdev feature helpers net: 3com: use netdev feature helpers net: aeroflex: use netdev feature helpers net: sun: use netdev feature helpers net: mana: use netdev feature helpers net: myricom: use netdev feature helpers net: alacritech: use netdev feature helpers net: toshiba: use netdev feature helpers net: tehuti: use netdev feature helpers net: alteon: use netdev feature helpers net: ena: use netdev feature helpers net: sgi: use netdev feature helpers net: microchip: use netdev feature helpers net: ni: use netdev feature helpers net: apm: use netdev feature helpers net: natsemi: use netdev feature helpers net: xilinx: use netdev feature helpers net: pasemi: use netdev feature helpers net: rocker: use netdev feature helpers net: silan: use netdev feature helpers net: adaptec: use netdev feature helpers net: tundra: use netdev feature helpers net: via: use netdev feature helpers net: wiznet: use netdev feature helpers net: dnet: use netdev feature helpers net: ethoc: use netdev feature helpers RDMA: ipoib: use netdev feature helpers um: use netdev feature helpers scsi: fcoe: use netdev feature helpers net: ipvs: use netdev feature helpers net: xfrm: use netdev feature helpers net: cirrus: use netdev feature helpers net: ec_bhf: use netdev feature helpers net: hamradio: use netdev feature helpers net: batman: use netdev feature helpers net: ieee802154: use netdev feature helpers test_bpf: change the prototype of features net: openvswitch: use netdev feature helpers firewire: use netdev feature helpers staging: qlge: use netdev feature helpers staging: octeon: use netdev feature helpers net: sock: add helper sk_nocaps_add_gso() treewide: introduce macro __DECLARE_NETDEV_FEATURE_MASK net: extend the type of netdev_features_t to bitmap arch/um/drivers/vector_kern.c | 15 +- drivers/firewire/net.c | 3 +- drivers/infiniband/hw/hfi1/vnic_main.c | 7 +- drivers/infiniband/ulp/ipoib/ipoib_cm.c | 2 +- drivers/infiniband/ulp/ipoib/ipoib_ib.c | 2 +- drivers/infiniband/ulp/ipoib/ipoib_main.c | 21 +- drivers/infiniband/ulp/ipoib/ipoib_verbs.c | 2 +- drivers/net/bareudp.c | 16 +- drivers/net/bonding/bond_main.c | 136 +++--- drivers/net/bonding/bond_options.c | 12 +- drivers/net/caif/caif_serial.c | 2 +- drivers/net/can/dev/dev.c | 3 +- drivers/net/can/slcan.c | 3 +- drivers/net/dsa/xrs700x/xrs700x.c | 6 +- drivers/net/dummy.c | 14 +- drivers/net/ethernet/3com/3c59x.c | 9 +- drivers/net/ethernet/3com/typhoon.c | 10 +- drivers/net/ethernet/adaptec/starfire.c | 9 +- drivers/net/ethernet/aeroflex/greth.c | 12 +- drivers/net/ethernet/alacritech/slicoss.c | 5 +- drivers/net/ethernet/alteon/acenic.c | 7 +- drivers/net/ethernet/altera/altera_tse_main.c | 11 +- .../net/ethernet/amazon/ena/ena_admin_defs.h | 2 +- drivers/net/ethernet/amazon/ena/ena_netdev.c | 50 ++- drivers/net/ethernet/amd/amd8111e.c | 8 +- drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 20 +- drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 93 ++-- drivers/net/ethernet/amd/xgbe/xgbe-main.c | 68 +-- drivers/net/ethernet/amd/xgbe/xgbe.h | 2 +- drivers/net/ethernet/apm/xgene-v2/main.c | 5 +- .../net/ethernet/apm/xgene/xgene_enet_main.c | 21 +- .../ethernet/aquantia/atlantic/aq_filters.c | 12 +- .../ethernet/aquantia/atlantic/aq_macsec.c | 2 +- .../net/ethernet/aquantia/atlantic/aq_main.c | 27 +- .../net/ethernet/aquantia/atlantic/aq_nic.c | 28 +- .../net/ethernet/aquantia/atlantic/aq_nic.h | 2 +- .../net/ethernet/aquantia/atlantic/aq_ring.c | 3 +- .../aquantia/atlantic/hw_atl/hw_atl_b0.c | 3 +- drivers/net/ethernet/atheros/alx/main.c | 23 +- .../net/ethernet/atheros/atl1c/atl1c_main.c | 33 +- .../net/ethernet/atheros/atl1e/atl1e_main.c | 44 +- drivers/net/ethernet/atheros/atlx/atl1.c | 15 +- drivers/net/ethernet/atheros/atlx/atl2.c | 27 +- drivers/net/ethernet/atheros/atlx/atlx.c | 20 +- drivers/net/ethernet/broadcom/b44.c | 2 +- drivers/net/ethernet/broadcom/bcmsysport.c | 24 +- drivers/net/ethernet/broadcom/bgmac.c | 8 +- drivers/net/ethernet/broadcom/bnx2.c | 48 +- .../net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | 67 +-- .../net/ethernet/broadcom/bnx2x/bnx2x_cmn.h | 3 +- .../net/ethernet/broadcom/bnx2x/bnx2x_main.c | 93 ++-- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 171 ++++--- drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c | 4 +- drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c | 11 +- drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c | 3 +- .../net/ethernet/broadcom/genet/bcmgenet.c | 12 +- drivers/net/ethernet/broadcom/tg3.c | 62 +-- drivers/net/ethernet/brocade/bna/bnad.c | 48 +- drivers/net/ethernet/cadence/macb_main.c | 81 ++-- drivers/net/ethernet/calxeda/xgmac.c | 20 +- .../net/ethernet/cavium/liquidio/lio_core.c | 6 +- .../net/ethernet/cavium/liquidio/lio_main.c | 95 ++-- .../ethernet/cavium/liquidio/lio_vf_main.c | 79 ++-- .../net/ethernet/cavium/thunder/nicvf_main.c | 50 ++- .../ethernet/cavium/thunder/nicvf_queues.c | 2 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 50 ++- drivers/net/ethernet/chelsio/cxgb/sge.c | 12 +- .../net/ethernet/chelsio/cxgb3/cxgb3_main.c | 60 ++- drivers/net/ethernet/chelsio/cxgb3/sge.c | 10 +- .../net/ethernet/chelsio/cxgb4/cxgb4_fcoe.c | 16 +- .../net/ethernet/chelsio/cxgb4/cxgb4_main.c | 88 ++-- .../net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.h | 3 +- drivers/net/ethernet/chelsio/cxgb4/sge.c | 14 +- .../ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 39 +- drivers/net/ethernet/chelsio/cxgb4vf/sge.c | 8 +- .../chelsio/inline_crypto/chtls/chtls_main.c | 3 +- drivers/net/ethernet/cirrus/ep93xx_eth.c | 2 +- drivers/net/ethernet/cisco/enic/enic_main.c | 74 +-- drivers/net/ethernet/cortina/gemini.c | 18 +- drivers/net/ethernet/davicom/dm9000.c | 24 +- drivers/net/ethernet/dnet.c | 2 +- drivers/net/ethernet/ec_bhf.c | 2 +- drivers/net/ethernet/emulex/benet/be_main.c | 68 +-- drivers/net/ethernet/ethoc.c | 2 +- drivers/net/ethernet/faraday/ftgmac100.c | 38 +- .../net/ethernet/freescale/dpaa/dpaa_eth.c | 23 +- .../net/ethernet/freescale/dpaa2/dpaa2-eth.c | 44 +- .../ethernet/freescale/dpaa2/dpaa2-switch.c | 5 +- drivers/net/ethernet/freescale/enetc/enetc.c | 34 +- .../net/ethernet/freescale/enetc/enetc_pf.c | 38 +- .../net/ethernet/freescale/enetc/enetc_qos.c | 2 +- .../net/ethernet/freescale/enetc/enetc_vf.c | 16 +- drivers/net/ethernet/freescale/fec_main.c | 29 +- .../ethernet/freescale/fs_enet/fs_enet-main.c | 2 +- drivers/net/ethernet/freescale/gianfar.c | 39 +- .../net/ethernet/freescale/gianfar_ethtool.c | 11 +- drivers/net/ethernet/google/gve/gve_adminq.c | 6 +- drivers/net/ethernet/google/gve/gve_main.c | 31 +- drivers/net/ethernet/google/gve/gve_rx.c | 8 +- drivers/net/ethernet/google/gve/gve_rx_dqo.c | 8 +- drivers/net/ethernet/hisilicon/hix5hd2_gmac.c | 8 +- drivers/net/ethernet/hisilicon/hns/hns_enet.c | 52 ++- .../net/ethernet/hisilicon/hns3/hns3_enet.c | 109 +++-- .../net/ethernet/huawei/hinic/hinic_main.c | 80 ++-- drivers/net/ethernet/huawei/hinic/hinic_rx.c | 5 +- drivers/net/ethernet/ibm/ehea/ehea_main.c | 22 +- drivers/net/ethernet/ibm/emac/core.c | 7 +- drivers/net/ethernet/ibm/ibmveth.c | 76 ++-- drivers/net/ethernet/ibm/ibmvnic.c | 69 +-- drivers/net/ethernet/intel/e100.c | 26 +- drivers/net/ethernet/intel/e1000/e1000_main.c | 82 ++-- drivers/net/ethernet/intel/e1000e/netdev.c | 129 +++--- drivers/net/ethernet/intel/fm10k/fm10k_main.c | 9 +- .../net/ethernet/intel/fm10k/fm10k_netdev.c | 65 +-- drivers/net/ethernet/intel/fm10k/fm10k_pci.c | 11 +- drivers/net/ethernet/intel/i40e/i40e_main.c | 122 ++--- drivers/net/ethernet/intel/i40e/i40e_txrx.c | 9 +- drivers/net/ethernet/intel/iavf/iavf_main.c | 153 ++++--- drivers/net/ethernet/intel/iavf/iavf_txrx.c | 12 +- drivers/net/ethernet/intel/ice/ice_main.c | 177 +++++--- drivers/net/ethernet/intel/ice/ice_txrx_lib.c | 9 +- drivers/net/ethernet/intel/igb/igb_ethtool.c | 2 +- drivers/net/ethernet/intel/igb/igb_main.c | 150 ++++--- drivers/net/ethernet/intel/igbvf/netdev.c | 86 ++-- drivers/net/ethernet/intel/igc/igc_ethtool.c | 3 +- drivers/net/ethernet/intel/igc/igc_main.c | 130 +++--- drivers/net/ethernet/intel/ixgb/ixgb_main.c | 49 +- .../net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c | 3 +- .../net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 2 +- drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c | 7 +- drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c | 3 +- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 215 +++++---- .../net/ethernet/intel/ixgbe/ixgbe_sriov.c | 6 +- drivers/net/ethernet/intel/ixgbevf/ipsec.c | 9 +- .../net/ethernet/intel/ixgbevf/ixgbevf_main.c | 105 +++-- drivers/net/ethernet/jme.c | 49 +- drivers/net/ethernet/marvell/mv643xx_eth.c | 14 +- drivers/net/ethernet/marvell/mvneta.c | 22 +- .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 73 +-- .../marvell/octeontx2/nic/otx2_common.c | 3 +- .../marvell/octeontx2/nic/otx2_ethtool.c | 4 +- .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 85 ++-- .../marvell/octeontx2/nic/otx2_txrx.c | 8 +- .../ethernet/marvell/octeontx2/nic/otx2_vf.c | 35 +- .../ethernet/marvell/prestera/prestera_main.c | 3 +- drivers/net/ethernet/marvell/skge.c | 11 +- drivers/net/ethernet/marvell/sky2.c | 75 ++-- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 68 +-- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +- .../net/ethernet/mellanox/mlx4/en_ethtool.c | 4 +- drivers/net/ethernet/mellanox/mlx4/en_main.c | 8 +- .../net/ethernet/mellanox/mlx4/en_netdev.c | 198 +++++---- .../net/ethernet/mellanox/mlx4/en_resources.c | 4 +- drivers/net/ethernet/mellanox/mlx4/en_rx.c | 19 +- drivers/net/ethernet/mellanox/mlx4/mlx4_en.h | 5 +- drivers/net/ethernet/mellanox/mlx5/core/en.h | 5 +- .../mellanox/mlx5/core/en_accel/ipsec.c | 18 +- .../mellanox/mlx5/core/en_accel/ipsec_rxtx.h | 15 +- .../mellanox/mlx5/core/en_accel/ktls.c | 14 +- .../mellanox/mlx5/core/en_accel/tls.c | 16 +- .../net/ethernet/mellanox/mlx5/core/en_arfs.c | 6 +- .../ethernet/mellanox/mlx5/core/en_ethtool.c | 3 +- .../net/ethernet/mellanox/mlx5/core/en_fs.c | 3 +- .../net/ethernet/mellanox/mlx5/core/en_main.c | 250 ++++++----- .../net/ethernet/mellanox/mlx5/core/en_rep.c | 25 +- .../net/ethernet/mellanox/mlx5/core/en_rx.c | 9 +- .../net/ethernet/mellanox/mlx5/core/en_tc.c | 2 +- .../ethernet/mellanox/mlx5/core/ipoib/ipoib.c | 19 +- .../net/ethernet/mellanox/mlxsw/spectrum.c | 36 +- drivers/net/ethernet/micrel/ksz884x.c | 10 +- drivers/net/ethernet/microchip/lan743x_main.c | 7 +- .../ethernet/microchip/sparx5/sparx5_fdma.c | 2 +- drivers/net/ethernet/microsoft/mana/mana_en.c | 20 +- drivers/net/ethernet/mscc/ocelot.c | 3 +- drivers/net/ethernet/mscc/ocelot_net.c | 18 +- .../net/ethernet/myricom/myri10ge/myri10ge.c | 31 +- drivers/net/ethernet/natsemi/ns83820.c | 13 +- drivers/net/ethernet/neterion/s2io.c | 32 +- .../net/ethernet/neterion/vxge/vxge-main.c | 49 +- .../net/ethernet/netronome/nfp/crypto/tls.c | 12 +- .../ethernet/netronome/nfp/nfp_net_common.c | 118 +++-- .../net/ethernet/netronome/nfp/nfp_net_repr.c | 76 ++-- drivers/net/ethernet/netronome/nfp/nfp_port.c | 3 +- drivers/net/ethernet/ni/nixge.c | 3 +- drivers/net/ethernet/nvidia/forcedeth.c | 66 +-- .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 13 +- .../ethernet/oki-semi/pch_gbe/pch_gbe_param.c | 6 +- drivers/net/ethernet/pasemi/pasemi_mac.c | 6 +- .../net/ethernet/pensando/ionic/ionic_lif.c | 125 +++--- .../net/ethernet/pensando/ionic/ionic_txrx.c | 9 +- .../ethernet/qlogic/netxen/netxen_nic_init.c | 3 +- .../ethernet/qlogic/netxen/netxen_nic_main.c | 50 ++- drivers/net/ethernet/qlogic/qede/qede.h | 10 +- .../net/ethernet/qlogic/qede/qede_ethtool.c | 2 +- .../net/ethernet/qlogic/qede/qede_filter.c | 19 +- drivers/net/ethernet/qlogic/qede/qede_fp.c | 23 +- drivers/net/ethernet/qlogic/qede/qede_main.c | 67 +-- drivers/net/ethernet/qlogic/qla3xxx.c | 5 +- drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_hw.c | 72 +-- .../net/ethernet/qlogic/qlcnic/qlcnic_io.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_main.c | 57 +-- drivers/net/ethernet/qualcomm/emac/emac-mac.c | 6 +- drivers/net/ethernet/qualcomm/emac/emac.c | 25 +- .../ethernet/qualcomm/rmnet/rmnet_map_data.c | 11 +- .../net/ethernet/qualcomm/rmnet/rmnet_vnd.c | 10 +- drivers/net/ethernet/realtek/8139cp.c | 39 +- drivers/net/ethernet/realtek/8139too.c | 28 +- drivers/net/ethernet/realtek/r8169_main.c | 85 ++-- drivers/net/ethernet/renesas/ravb.h | 4 +- drivers/net/ethernet/renesas/ravb_main.c | 24 +- drivers/net/ethernet/renesas/sh_eth.c | 28 +- drivers/net/ethernet/rocker/rocker_main.c | 3 +- .../net/ethernet/samsung/sxgbe/sxgbe_main.c | 19 +- drivers/net/ethernet/sfc/ef10.c | 41 +- drivers/net/ethernet/sfc/ef100_nic.c | 43 +- drivers/net/ethernet/sfc/ef100_rx.c | 6 +- drivers/net/ethernet/sfc/ef100_tx.c | 11 +- drivers/net/ethernet/sfc/ef10_sriov.c | 6 +- drivers/net/ethernet/sfc/efx.c | 32 +- drivers/net/ethernet/sfc/efx_common.c | 41 +- drivers/net/ethernet/sfc/efx_common.h | 4 +- drivers/net/ethernet/sfc/falcon/efx.c | 44 +- drivers/net/ethernet/sfc/falcon/falcon.c | 4 +- drivers/net/ethernet/sfc/falcon/net_driver.h | 9 +- drivers/net/ethernet/sfc/falcon/rx.c | 6 +- drivers/net/ethernet/sfc/farch.c | 2 +- drivers/net/ethernet/sfc/mcdi_filters.c | 21 +- drivers/net/ethernet/sfc/mcdi_port_common.c | 3 +- drivers/net/ethernet/sfc/net_driver.h | 9 +- drivers/net/ethernet/sfc/rx.c | 3 +- drivers/net/ethernet/sfc/rx_common.c | 5 +- drivers/net/ethernet/sfc/siena.c | 4 +- drivers/net/ethernet/sgi/ioc3-eth.c | 11 +- drivers/net/ethernet/silan/sc92031.c | 6 +- drivers/net/ethernet/socionext/netsec.c | 10 +- drivers/net/ethernet/socionext/sni_ave.c | 6 +- .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 3 +- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 62 +-- .../stmicro/stmmac/stmmac_selftests.c | 6 +- drivers/net/ethernet/sun/cassini.c | 5 +- drivers/net/ethernet/sun/ldmvsw.c | 5 +- drivers/net/ethernet/sun/niu.c | 11 +- drivers/net/ethernet/sun/sungem.c | 11 +- drivers/net/ethernet/sun/sunhme.c | 14 +- drivers/net/ethernet/sun/sunvnet.c | 8 +- drivers/net/ethernet/sun/sunvnet_common.c | 5 +- .../net/ethernet/synopsys/dwc-xlgmac-common.c | 45 +- drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c | 20 +- .../net/ethernet/synopsys/dwc-xlgmac-net.c | 41 +- drivers/net/ethernet/synopsys/dwc-xlgmac.h | 2 +- drivers/net/ethernet/tehuti/tehuti.c | 22 +- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 23 +- drivers/net/ethernet/ti/cpsw.c | 6 +- drivers/net/ethernet/ti/cpsw_new.c | 7 +- drivers/net/ethernet/ti/netcp_core.c | 9 +- drivers/net/ethernet/toshiba/ps3_gelic_net.c | 14 +- drivers/net/ethernet/toshiba/spider_net.c | 12 +- drivers/net/ethernet/tundra/tsi108_eth.c | 3 +- drivers/net/ethernet/via/via-rhine.c | 10 +- drivers/net/ethernet/via/via-velocity.c | 14 +- drivers/net/ethernet/wiznet/w5100.c | 2 +- drivers/net/ethernet/wiznet/w5300.c | 2 +- drivers/net/ethernet/xilinx/ll_temac_main.c | 5 +- .../net/ethernet/xilinx/xilinx_axienet_main.c | 9 +- drivers/net/fjes/fjes_main.c | 3 +- drivers/net/geneve.c | 18 +- drivers/net/gtp.c | 2 +- drivers/net/hamradio/bpqether.c | 3 +- drivers/net/hyperv/netvsc_bpf.c | 2 +- drivers/net/hyperv/netvsc_drv.c | 46 +- drivers/net/hyperv/rndis_filter.c | 30 +- drivers/net/ifb.c | 12 +- drivers/net/ipa/ipa_modem.c | 3 +- drivers/net/ipvlan/ipvlan.h | 2 +- drivers/net/ipvlan/ipvlan_main.c | 40 +- drivers/net/ipvlan/ipvtap.c | 5 +- drivers/net/loopback.c | 20 +- drivers/net/macsec.c | 49 +- drivers/net/macvlan.c | 58 ++- drivers/net/macvtap.c | 5 +- drivers/net/net_failover.c | 77 ++-- drivers/net/netdevsim/ipsec.c | 4 +- drivers/net/netdevsim/netdev.c | 15 +- drivers/net/nlmon.c | 5 +- drivers/net/ntb_netdev.c | 5 +- drivers/net/ppp/ppp_generic.c | 2 +- drivers/net/rionet.c | 3 +- drivers/net/tap.c | 38 +- drivers/net/team/team.c | 90 ++-- drivers/net/thunderbolt.c | 10 +- drivers/net/tun.c | 53 ++- drivers/net/usb/aqc111.c | 42 +- drivers/net/usb/ax88179_178a.c | 26 +- drivers/net/usb/cdc-phonet.c | 2 +- drivers/net/usb/cdc_mbim.c | 4 +- drivers/net/usb/lan78xx.c | 46 +- drivers/net/usb/r8152.c | 71 +-- drivers/net/usb/smsc75xx.c | 14 +- drivers/net/usb/smsc95xx.c | 19 +- drivers/net/veth.c | 67 +-- drivers/net/virtio_net.c | 50 ++- drivers/net/vmxnet3/vmxnet3_drv.c | 75 ++-- drivers/net/vmxnet3/vmxnet3_ethtool.c | 88 ++-- drivers/net/vmxnet3/vmxnet3_int.h | 4 +- drivers/net/vrf.c | 20 +- drivers/net/vsockmon.c | 6 +- drivers/net/vxlan.c | 21 +- drivers/net/wireguard/device.c | 8 +- drivers/net/wireless/ath/ath10k/mac.c | 7 +- drivers/net/wireless/ath/ath11k/mac.c | 4 +- drivers/net/wireless/ath/ath6kl/main.c | 15 +- drivers/net/wireless/ath/ath6kl/txrx.c | 6 +- drivers/net/wireless/ath/wil6210/netdev.c | 11 +- .../broadcom/brcm80211/brcmfmac/core.c | 4 +- .../net/wireless/intel/iwlwifi/cfg/22000.c | 4 +- drivers/net/wireless/intel/iwlwifi/cfg/8000.c | 2 +- drivers/net/wireless/intel/iwlwifi/cfg/9000.c | 2 +- .../net/wireless/intel/iwlwifi/dvm/mac80211.c | 7 +- .../net/wireless/intel/iwlwifi/iwl-config.h | 2 +- .../net/wireless/intel/iwlwifi/mvm/mac80211.c | 17 +- drivers/net/wireless/intel/iwlwifi/mvm/rx.c | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/tx.c | 10 +- .../net/wireless/mediatek/mt76/mt7615/init.c | 3 +- .../net/wireless/mediatek/mt76/mt7915/init.c | 3 +- .../net/wireless/mediatek/mt76/mt7921/init.c | 3 +- drivers/net/xen-netback/interface.c | 27 +- drivers/net/xen-netfront.c | 53 ++- drivers/s390/net/qeth_core.h | 7 +- drivers/s390/net/qeth_core_main.c | 139 +++--- drivers/s390/net/qeth_l2_main.c | 44 +- drivers/s390/net/qeth_l3_main.c | 49 +- drivers/scsi/fcoe/fcoe.c | 14 +- drivers/staging/octeon/ethernet.c | 5 +- drivers/staging/qlge/qlge_main.c | 59 +-- drivers/usb/gadget/function/f_phonet.c | 2 +- include/linux/if_macvlan.h | 2 +- include/linux/if_tap.h | 2 +- include/linux/if_vlan.h | 22 +- include/linux/netdev_features.h | 181 +++++++- include/linux/netdevice.h | 122 ++--- include/linux/skbuff.h | 6 +- include/net/mac80211.h | 2 +- include/net/pkt_cls.h | 2 +- include/net/sock.h | 22 +- include/net/udp.h | 8 +- include/net/udp_tunnel.h | 12 +- include/net/vxlan.h | 13 +- lib/test_bpf.c | 21 +- lib/vsprintf.c | 4 +- net/8021q/vlan.c | 11 +- net/8021q/vlan.h | 24 +- net/8021q/vlan_core.c | 6 +- net/8021q/vlan_dev.c | 57 +-- net/batman-adv/soft-interface.c | 5 +- net/bridge/br_device.c | 21 +- net/bridge/br_if.c | 19 +- net/bridge/br_private.h | 3 +- net/core/dev.c | 420 ++++++++++-------- net/core/netpoll.c | 4 +- net/core/pktgen.c | 6 +- net/core/skbuff.c | 10 +- net/core/skmsg.c | 3 +- net/core/sock.c | 17 +- net/dccp/ipv4.c | 2 +- net/dccp/ipv6.c | 7 +- net/decnet/af_decnet.c | 2 +- net/decnet/dn_nsp_out.c | 2 +- net/dsa/slave.c | 24 +- net/ethtool/features.c | 94 ++-- net/ethtool/ioctl.c | 158 ++++--- net/hsr/hsr_device.c | 40 +- net/hsr/hsr_forward.c | 11 +- net/hsr/hsr_framereg.c | 3 +- net/hsr/hsr_slave.c | 3 +- net/ieee802154/6lowpan/core.c | 2 +- net/ieee802154/core.c | 14 +- net/ipv4/af_inet.c | 5 +- net/ipv4/esp4_offload.c | 28 +- net/ipv4/gre_offload.c | 8 +- net/ipv4/ip_gre.c | 36 +- net/ipv4/ip_output.c | 27 +- net/ipv4/ip_tunnel.c | 4 +- net/ipv4/ip_vti.c | 2 +- net/ipv4/ipip.c | 6 +- net/ipv4/ipmr.c | 2 +- net/ipv4/tcp.c | 10 +- net/ipv4/tcp_ipv4.c | 6 +- net/ipv4/tcp_offload.c | 5 +- net/ipv4/tcp_output.c | 2 +- net/ipv4/udp_offload.c | 28 +- net/ipv6/af_inet6.c | 2 +- net/ipv6/esp6_offload.c | 19 +- net/ipv6/inet6_connection_sock.c | 2 +- net/ipv6/ip6_gre.c | 17 +- net/ipv6/ip6_offload.c | 3 +- net/ipv6/ip6_output.c | 24 +- net/ipv6/ip6_tunnel.c | 9 +- net/ipv6/ip6mr.c | 2 +- net/ipv6/sit.c | 9 +- net/ipv6/tcp_ipv6.c | 2 +- net/ipv6/udp_offload.c | 2 +- net/l2tp/l2tp_eth.c | 2 +- net/mac80211/iface.c | 10 +- net/mac80211/main.c | 5 +- net/mpls/mpls_gso.c | 4 +- net/netfilter/ipvs/ip_vs_proto_sctp.c | 3 +- net/nsh/nsh.c | 2 +- net/openvswitch/datapath.c | 5 +- net/openvswitch/vport-internal_dev.c | 24 +- net/phonet/pep-gprs.c | 3 +- net/sched/sch_cake.c | 6 +- net/sched/sch_netem.c | 6 +- net/sched/sch_taprio.c | 6 +- net/sched/sch_tbf.c | 6 +- net/sctp/offload.c | 12 +- net/sctp/output.c | 2 +- net/sunrpc/sunrpc.h | 2 +- net/tls/tls_device.c | 10 +- net/wireless/core.c | 14 +- net/xfrm/xfrm_device.c | 31 +- net/xfrm/xfrm_interface.c | 6 +- net/xfrm/xfrm_output.c | 4 +- 424 files changed, 6584 insertions(+), 4459 deletions(-) -- 2.33.0

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Prezentacja
by Mateusz Talaga 25 Jan '22

25 Jan '22

Dzień dobry! Czy mógłbym przedstawić rozwiązanie, które umożliwia monitoring każdego auta w czasie rzeczywistym w tym jego pozycję, zużycie paliwa i przebieg? Dodatkowo nasze narzędzie minimalizuje koszty utrzymania samochodów, skraca czas przejazdów, a także tworzenie planu tras czy dostaw. Z naszej wiedzy i doświadczenia korzysta już ponad 49 tys. Klientów. Monitorujemy 809 000 pojazdów na całym świecie, co jest naszą najlepszą wizytówką. Bardzo proszę o e-maila zwrotnego, jeśli moglibyśmy wspólnie omówić potencjał wykorzystania takiego rozwiązania w Państwa firmie. Z poważaniem, Mateusz Talaga

1 0

Wycena paneli fotowoltaicznych
by Maciej Nitycz 25 Jan '22

25 Jan '22

Dzień dobry, dostrzegam możliwość współpracy z Państwa firmą. Świadczymy kompleksową obsługę inwestycji w fotowoltaikę, która obniża koszty energii elektrycznej nawet o 90%. Czy są Państwo zainteresowani weryfikacją wstępnych propozycji? Pozdrawiam, Maciej Nitycz

1 0

[PATCH v2 plinth/topic-sas-5.16 0/6] Some small fixes for scsi/libsas
by chenxiang 17 Jan '22

17 Jan '22

From: Xiang Chen <chenxiang66(a)hisilicon.com> There are some small fixes related to scsi and libsas: - Use void for sas_discover_event() return code; - Remove duplicated setting fro task->task_state_flags; - Remove unused parameter for function sas_ata_eh(); - Use spin_{lock, unlock} instead of spin_{lock, unlock}_irq or spin_lock_irqsave/spin_unlock_irqrestore for asd_sas_port->dev_list_lock and sas_ha->phy_port_lock; - Remove unused member cmd_pool for structure scsi_host_template; Change Log: v1 -> v2: - Fix some spelling issues; - Remove patch 7 of v1; Xiang Chen (6): {topost} scsi: libsas: Use void for sas_discover_event() return code {topost} scsi: libsas: Remove duplicated setting for task->task_state_flags {topost} scsi: libsas: Remove unused parameter for function sas_ata_eh() {topost} scsi: libsas: Use spin_{lock, unlock}() for asd_sas_port->dev_list_lock {topost} scsi: libsas: Use spin_{lock, unlock}() for sas_ha->phy_port_lock {topost} scsi: Remove unused member cmd_pool for structure scsi_host_template drivers/scsi/libsas/sas_ata.c | 8 +++----- drivers/scsi/libsas/sas_discover.c | 26 ++++++++++++-------------- drivers/scsi/libsas/sas_expander.c | 12 ++++++------ drivers/scsi/libsas/sas_port.c | 12 +++++------- drivers/scsi/libsas/sas_scsi_host.c | 12 +++++------- include/scsi/libsas.h | 2 +- include/scsi/sas_ata.h | 6 ++---- include/scsi/scsi_host.h | 3 --- 8 files changed, 34 insertions(+), 47 deletions(-) -- 2.33.0

3 13

Wycena paneli fotowoltaicznych
by Jakub Daroch 11 Jan '22

11 Jan '22

Dzień dobry, dostrzegam możliwość współpracy z Państwa firmą. Świadczymy kompleksową obsługę inwestycji w fotowoltaikę, która obniża koszty energii elektrycznej nawet o 90%. Czy są Państwo zainteresowani weryfikacją wstępnych propozycji? Pozdrawiam, Jakub Daroch

1 0

Re: 16000DPI gaming mouse
by Carol Zhong 08 Jan '22

08 Jan '22

Hi friend, Recommend our newest 16000DPI gaming mouse to you, all keys are macro, our private model mouse, MOQ is just 1000pcs, can OEM your logo and color box for free, Price just need 7.8USD/PC, Do you need sample to test? Best regards, Carol Dongguan Shicheng Eletronic Technology Co., Tel: +8615112433669

1 0

[PATCH plinth/topic-sas-5.16 0/7] Some small fixes for scsi/libsas
by chenxiang 07 Jan '22

07 Jan '22

From: Xiang Chen <chenxiang66(a)hisilicon.com> There are some small fixes related to scsi and libsas: - Use void for sas_discover_event() return code; - Remove duplicatted setting fro task->task_state_flags; - Remove unused parameter for function sas_ata_eh(); - Use spin_lock/unlock instead of spin_lock/unlock_irq or spin_lock_irqsave /spin_unlock_irqrestore for asd_sas_port->dev_list_lock and sas_ha->phy_port_lock; - Remove unused member cmd_pool for structure scsi_host_template; - Remove unnecessary memset for scsilun; Xiang Chen (7): {topost} scsi: libsas: Use void for sas_discover_event() return code {topost} scsi: libsas: Remove duplicated setting for task->task_state_flags {topost} scsi: libsas: Remove unused parameter for function sas_ata_eh() {topost} scsi: libsas: Use spin_lock/unlock() for asd_sas_port->dev_list_lock {topost} scsi: libsas: Use spin_lock/unlock() for sas_ha->phy_port_lock {topost} scsi: Remove unused member cmd_pool for structure scsi_host_template {topost} scsi: Remove unnecssary memset for scsilun drivers/scsi/libsas/sas_ata.c | 8 +++----- drivers/scsi/libsas/sas_discover.c | 26 ++++++++++++-------------- drivers/scsi/libsas/sas_expander.c | 12 ++++++------ drivers/scsi/libsas/sas_port.c | 12 +++++------- drivers/scsi/libsas/sas_scsi_host.c | 12 +++++------- drivers/scsi/scsi_common.c | 2 -- include/scsi/libsas.h | 2 +- include/scsi/sas_ata.h | 6 ++---- include/scsi/scsi_host.h | 3 --- 9 files changed, 34 insertions(+), 49 deletions(-) -- 2.33.0

3 20

[PATCH v2 plinth/topic-sas-5.16] {topost} scsi: hisi_sas: Change perm of module parameter prot_mask
by chenxiang 05 Jan '22

05 Jan '22

From: Xiang Chen <chenxiang66(a)hisilicon.com> Currently the perm of parameter prot_mask is 0x0 which means that the variable does not appear in sysfs. Change it as other module parameters to 0444 for world-readable. Reported-by: Yihang Li <liyihang6(a)hisilicon.com> Signed-off-by: Xiang Chen <chenxiang66(a)hisilicon.com> Fixes: d6a9000b81be ("scsi: hisi_sas: Add support for DIF feature for v3 hw") --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 3b782241c5bc..6f0a47c6b360 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -530,7 +530,7 @@ MODULE_PARM_DESC(intr_conv, "interrupt converge enable (0-1)"); /* permit overriding the host protection capabilities mask (EEDP/T10 PI) */ static int prot_mask; -module_param(prot_mask, int, 0); +module_param(prot_mask, int, 0444); MODULE_PARM_DESC(prot_mask, " host protection capabilities mask, def=0x0 "); static void debugfs_work_handler_v3_hw(struct work_struct *work); -- 2.33.0

2 1

Re: Keyboard Mouse Items
by jerry shicheng 04 Jan '22

04 Jan '22

Hello My friend, May i know your purchase manager email? then i can send our keyboard mouse catalog to him check, We are keyboard mouse manufacturer in China, Hope can do business with your company, Thank you Jerry Website www.keyboardoem.com

1 0

[PATCH] {topost} scsi: hisi_sas: Change the timeout value of phyup
by chenxiang 04 Jan '22

04 Jan '22

From: Xiang Chen <chenxiang66(a)hisilicon.com> Normally phyup will occur very quickly (about 0.1~0.2s) after enabling the PHY, so currently the timeout value of phyup is 2s. But it is possible that it takes more time to wait phyup in some extreme situations. So change the timeout of phyup from 2s to 5s to decrease the possibility that error occurs since the waiting time for phyup is not enough. Signed-off-by: Xiang Chen <chenxiang66(a)hisilicon.com> --- drivers/scsi/hisi_sas/hisi_sas_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index 23d9f596c910..bd534f07f9d7 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_main.c +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c @@ -1214,7 +1214,7 @@ static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func, goto out; } - if (sts && !wait_for_completion_timeout(&completion, 2 * HZ)) { + if (sts && !wait_for_completion_timeout(&completion, 5 * HZ)) { dev_warn(dev, "phy%d wait phyup timed out for func %d\n", phy_no, func); if (phy->in_reset) -- 2.33.0

2 1

[PATCH plinth/topic-sas-5.16] {topost} scsi: hisi_sas: Change perm of module parameter prot_mask
by chenxiang 04 Jan '22

04 Jan '22

From: Xiang Chen <chenxiang66(a)hisilicon.com> Currently the perm of parameter prot_mask is 0x0 which means that the variable is not to appear in sysfs. Change it as other module parameters to 0444 for world-readable. Reported-by: Yihang Li <liyihang6(a)hisilicon.com> Signed-off-by: Xiang Chen <chenxiang66(a)hisilicon.com> --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 3b782241c5bc..6f0a47c6b360 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -530,7 +530,7 @@ MODULE_PARM_DESC(intr_conv, "interrupt converge enable (0-1)"); /* permit overriding the host protection capabilities mask (EEDP/T10 PI) */ static int prot_mask; -module_param(prot_mask, int, 0); +module_param(prot_mask, int, 0444); MODULE_PARM_DESC(prot_mask, " host protection capabilities mask, def=0x0 "); static void debugfs_work_handler_v3_hw(struct work_struct *work); -- 2.33.0

2 1

information about Email Marketing - id= 20211231212651
by ISA Email Marketing 01 Jan '22

01 Jan '22

Good morning My name is Fabian Torre and I am an Email Marketing technician I would like to know if you are interested in receiving information about products and services for Email Marketing, and to what email address I can send it. Thanks a lot Whatsapp: +55 719 9204-2292 Skype: chronskype

1 0

Re: Keyboard Mouse Items
by jerry shicheng 27 Dec '21

27 Dec '21

Hello Manager, May I know your company whether interested in buying keyboard mouse items? Please reply us if need check our catalog, Gaming collection or office collection are can OEM for you, Thank you, Jerry Factory website www.keyboardoem.com

1 0

Wycena paneli fotowoltaicznych
by "Paweł Jasiński" 27 Dec '21

27 Dec '21

Dzień dobry, dostrzegam możliwość współpracy z Państwa firmą. Świadczymy kompleksową obsługę inwestycji w fotowoltaikę, która obniża koszty energii elektrycznej nawet o 90%. Czy są Państwo zainteresowani weryfikacją wstępnych propozycji? Pozdrawiam Paweł Jasiński

1 0

Wycena paneli fotowoltaicznych
by Jakub Daroch 23 Dec '21

23 Dec '21

Dzień dobry, dostrzegam możliwość współpracy z Państwa firmą. Świadczymy kompleksową obsługę inwestycji w fotowoltaikę, która obniża koszty energii elektrycznej nawet o 90%. Czy są Państwo zainteresowani weryfikacją wstępnych propozycji? Pozdrawiam, Jakub Daroch

1 0

[PATCH net-next 0/2] net: hns3: add support for TX push
by Yufeng Mo 23 Dec '21

23 Dec '21

This series adds TX push support for the HNS3 ethernet driver. And it relies on "asm-generic: introduce io_stop_wc() and add implementation for ARM64"[1], which has not been merged into the net-next branch yet. [1]https://git.kernel.org/arm64/c/d5624bb29f49 Yufeng Mo (2): net: hns3: add support for TX push mode net: hns3: add ethtool priv-flag for TX push drivers/net/ethernet/hisilicon/hns3/hnae3.h | 2 + .../net/ethernet/hisilicon/hns3/hns3_enet.c | 82 ++++++++++++++++++- .../net/ethernet/hisilicon/hns3/hns3_enet.h | 6 ++ .../ethernet/hisilicon/hns3/hns3_ethtool.c | 21 ++++- .../hisilicon/hns3/hns3pf/hclge_cmd.c | 1 + .../hisilicon/hns3/hns3pf/hclge_main.c | 11 ++- .../hisilicon/hns3/hns3pf/hclge_main.h | 8 ++ .../hisilicon/hns3/hns3vf/hclgevf_cmd.c | 1 + .../hisilicon/hns3/hns3vf/hclgevf_main.c | 11 ++- .../hisilicon/hns3/hns3vf/hclgevf_main.h | 8 ++ 10 files changed, 142 insertions(+), 9 deletions(-) -- 2.33.0

1 2

[linuxarm] [PATCH] RDMA/hns: Remove hns ROCE V1
by Chengchang Tang 15 Dec '21

15 Dec '21

We no longer support hns ROCE V1, delete it. Signed-off-by: Chengchang Tang <tangchengchang(a)huawei.com> --- drivers/infiniband/hw/hns/Kconfig | 17 +- drivers/infiniband/hw/hns/Makefile | 5 - drivers/infiniband/hw/hns/hns_roce_ah.c | 1 - drivers/infiniband/hw/hns/hns_roce_alloc.c | 1 - drivers/infiniband/hw/hns/hns_roce_cmd.c | 1 - drivers/infiniband/hw/hns/hns_roce_common.h | 202 - drivers/infiniband/hw/hns/hns_roce_cq.c | 13 - drivers/infiniband/hw/hns/hns_roce_db.c | 1 - drivers/infiniband/hw/hns/hns_roce_device.h | 39 - drivers/infiniband/hw/hns/hns_roce_hem.c | 1 - drivers/infiniband/hw/hns/hns_roce_hw_v1.c | 4675 ------------------- drivers/infiniband/hw/hns/hns_roce_hw_v1.h | 1147 ----- drivers/infiniband/hw/hns/hns_roce_main.c | 53 +- drivers/infiniband/hw/hns/hns_roce_mr.c | 11 +- drivers/infiniband/hw/hns/hns_roce_pd.c | 20 +- drivers/infiniband/hw/hns/hns_roce_qp.c | 35 +- 16 files changed, 14 insertions(+), 6208 deletions(-) delete mode 100644 drivers/infiniband/hw/hns/hns_roce_hw_v1.c delete mode 100644 drivers/infiniband/hw/hns/hns_roce_hw_v1.h diff --git a/drivers/infiniband/hw/hns/Kconfig b/drivers/infiniband/hw/hns/Kconfig index 18d10ebf900b..ab3fbba70789 100644 --- a/drivers/infiniband/hw/hns/Kconfig +++ b/drivers/infiniband/hw/hns/Kconfig @@ -5,22 +5,9 @@ config INFINIBAND_HNS depends on ARM64 || (COMPILE_TEST && 64BIT) depends on (HNS_DSAF && HNS_ENET) || HNS3 help - This is a RoCE/RDMA driver for the Hisilicon RoCE engine. The engine - is used in Hisilicon Hip06 and more further ICT SoC based on - platform device. + This is a RoCE/RDMA driver for the Hisilicon RoCE engine. - To compile HIP06 or HIP08 driver as module, choose M here. - -config INFINIBAND_HNS_HIP06 - bool "Hisilicon Hip06 Family RoCE support" - depends on INFINIBAND_HNS && HNS && HNS_DSAF && HNS_ENET - depends on INFINIBAND_HNS=m || (HNS_DSAF=y && HNS_ENET=y) - help - RoCE driver support for Hisilicon RoCE engine in Hisilicon Hip06 and - Hip07 SoC. These RoCE engines are platform devices. - - To compile this driver, choose Y here: if INFINIBAND_HNS is m, this - module will be called hns-roce-hw-v1 + To compile HIP08 driver as module, choose M here. config INFINIBAND_HNS_HIP08 bool "Hisilicon Hip08 Family RoCE support" diff --git a/drivers/infiniband/hw/hns/Makefile b/drivers/infiniband/hw/hns/Makefile index e105945b94a1..9f04f25d9631 100644 --- a/drivers/infiniband/hw/hns/Makefile +++ b/drivers/infiniband/hw/hns/Makefile @@ -9,11 +9,6 @@ hns-roce-objs := hns_roce_main.o hns_roce_cmd.o hns_roce_pd.o \ hns_roce_ah.o hns_roce_hem.o hns_roce_mr.o hns_roce_qp.o \ hns_roce_cq.o hns_roce_alloc.o hns_roce_db.o hns_roce_srq.o hns_roce_restrack.o -ifdef CONFIG_INFINIBAND_HNS_HIP06 -hns-roce-hw-v1-objs := hns_roce_hw_v1.o $(hns-roce-objs) -obj-$(CONFIG_INFINIBAND_HNS) += hns-roce-hw-v1.o -endif - ifdef CONFIG_INFINIBAND_HNS_HIP08 hns-roce-hw-v2-objs := hns_roce_hw_v2.o hns_roce_hw_v2_dfx.o $(hns-roce-objs) obj-$(CONFIG_INFINIBAND_HNS) += hns-roce-hw-v2.o diff --git a/drivers/infiniband/hw/hns/hns_roce_ah.c b/drivers/infiniband/hw/hns/hns_roce_ah.c index cc258edec331..beacf9e14e82 100644 --- a/drivers/infiniband/hw/hns/hns_roce_ah.c +++ b/drivers/infiniband/hw/hns/hns_roce_ah.c @@ -30,7 +30,6 @@ * SOFTWARE. */ -#include <linux/platform_device.h> #include <linux/pci.h> #include <rdma/ib_addr.h> #include <rdma/ib_cache.h> diff --git a/drivers/infiniband/hw/hns/hns_roce_alloc.c b/drivers/infiniband/hw/hns/hns_roce_alloc.c index d4fa0fd52294..684ad4ca2406 100644 --- a/drivers/infiniband/hw/hns/hns_roce_alloc.c +++ b/drivers/infiniband/hw/hns/hns_roce_alloc.c @@ -31,7 +31,6 @@ * SOFTWARE. */ -#include <linux/platform_device.h> #include <linux/vmalloc.h> #include "hns_roce_device.h" #include <rdma/ib_umem.h> diff --git a/drivers/infiniband/hw/hns/hns_roce_cmd.c b/drivers/infiniband/hw/hns/hns_roce_cmd.c index 3f7fb7508585..4b693d542ace 100644 --- a/drivers/infiniband/hw/hns/hns_roce_cmd.c +++ b/drivers/infiniband/hw/hns/hns_roce_cmd.c @@ -31,7 +31,6 @@ */ #include <linux/dmapool.h> -#include <linux/platform_device.h> #include "hns_roce_common.h" #include "hns_roce_device.h" #include "hns_roce_cmd.h" diff --git a/drivers/infiniband/hw/hns/hns_roce_common.h b/drivers/infiniband/hw/hns/hns_roce_common.h index b73e55de83ac..465d1f914b6c 100644 --- a/drivers/infiniband/hw/hns/hns_roce_common.h +++ b/drivers/infiniband/hw/hns/hns_roce_common.h @@ -104,208 +104,6 @@ #define hr_reg_read(ptr, field) _hr_reg_read(ptr, field) -#define ROCEE_GLB_CFG_ROCEE_DB_SQ_MODE_S 3 -#define ROCEE_GLB_CFG_ROCEE_DB_OTH_MODE_S 4 - -#define ROCEE_GLB_CFG_SQ_EXT_DB_MODE_S 5 - -#define ROCEE_GLB_CFG_OTH_EXT_DB_MODE_S 6 - -#define ROCEE_GLB_CFG_ROCEE_PORT_ST_S 10 -#define ROCEE_GLB_CFG_ROCEE_PORT_ST_M \ - (((1UL << 6) - 1) << ROCEE_GLB_CFG_ROCEE_PORT_ST_S) - -#define ROCEE_GLB_CFG_TRP_RAQ_DROP_EN_S 16 - -#define ROCEE_DMAE_USER_CFG1_ROCEE_STREAM_ID_TB_CFG_S 0 -#define ROCEE_DMAE_USER_CFG1_ROCEE_STREAM_ID_TB_CFG_M \ - (((1UL << 24) - 1) << ROCEE_DMAE_USER_CFG1_ROCEE_STREAM_ID_TB_CFG_S) - -#define ROCEE_DMAE_USER_CFG1_ROCEE_CACHE_TB_CFG_S 24 -#define ROCEE_DMAE_USER_CFG1_ROCEE_CACHE_TB_CFG_M \ - (((1UL << 4) - 1) << ROCEE_DMAE_USER_CFG1_ROCEE_CACHE_TB_CFG_S) - -#define ROCEE_DMAE_USER_CFG2_ROCEE_STREAM_ID_PKT_CFG_S 0 -#define ROCEE_DMAE_USER_CFG2_ROCEE_STREAM_ID_PKT_CFG_M \ - (((1UL << 24) - 1) << ROCEE_DMAE_USER_CFG2_ROCEE_STREAM_ID_PKT_CFG_S) - -#define ROCEE_DMAE_USER_CFG2_ROCEE_CACHE_PKT_CFG_S 24 -#define ROCEE_DMAE_USER_CFG2_ROCEE_CACHE_PKT_CFG_M \ - (((1UL << 4) - 1) << ROCEE_DMAE_USER_CFG2_ROCEE_CACHE_PKT_CFG_S) - -#define ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_S 0 -#define ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_M \ - (((1UL << 16) - 1) << ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_S) - -#define ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_EMPTY_S 16 -#define ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_EMPTY_M \ - (((1UL << 16) - 1) << ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_EMPTY_S) - -#define ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_S 0 -#define ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_M \ - (((1UL << 16) - 1) << ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_S) - -#define ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_EMPTY_S 16 -#define ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_EMPTY_M \ - (((1UL << 16) - 1) << ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_EMPTY_S) - -#define ROCEE_RAQ_WL_ROCEE_RAQ_WL_S 0 -#define ROCEE_RAQ_WL_ROCEE_RAQ_WL_M \ - (((1UL << 8) - 1) << ROCEE_RAQ_WL_ROCEE_RAQ_WL_S) - -#define ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_POL_TIME_INTERVAL_S 0 -#define ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_POL_TIME_INTERVAL_M \ - (((1UL << 15) - 1) << \ - ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_POL_TIME_INTERVAL_S) - -#define ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_RAQ_TIMEOUT_CHK_CFG_S 16 -#define ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_RAQ_TIMEOUT_CHK_CFG_M \ - (((1UL << 4) - 1) << \ - ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_RAQ_TIMEOUT_CHK_CFG_S) - -#define ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_RAQ_TIMEOUT_CHK_EN_S 20 - -#define ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_EXT_RAQ_MODE 21 - -#define ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_SHIFT_S 0 -#define ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_SHIFT_M \ - (((1UL << 5) - 1) << ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_SHIFT_S) - -#define ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_BA_H_S 5 -#define ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_BA_H_M \ - (((1UL << 5) - 1) << ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_BA_H_S) - -#define ROCEE_EXT_DB_OTH_H_EXT_DB_OTH_SHIFT_S 0 -#define ROCEE_EXT_DB_OTH_H_EXT_DB_OTH_SHIFT_M \ - (((1UL << 5) - 1) << ROCEE_EXT_DB_OTH_H_EXT_DB_OTH_SHIFT_S) - -#define ROCEE_EXT_DB_SQ_H_EXT_DB_OTH_BA_H_S 5 -#define ROCEE_EXT_DB_SQ_H_EXT_DB_OTH_BA_H_M \ - (((1UL << 5) - 1) << ROCEE_EXT_DB_SQ_H_EXT_DB_OTH_BA_H_S) - -#define ROCEE_EXT_RAQ_H_EXT_RAQ_SHIFT_S 0 -#define ROCEE_EXT_RAQ_H_EXT_RAQ_SHIFT_M \ - (((1UL << 5) - 1) << ROCEE_EXT_RAQ_H_EXT_RAQ_SHIFT_S) - -#define ROCEE_EXT_RAQ_H_EXT_RAQ_BA_H_S 8 -#define ROCEE_EXT_RAQ_H_EXT_RAQ_BA_H_M \ - (((1UL << 5) - 1) << ROCEE_EXT_RAQ_H_EXT_RAQ_BA_H_S) - -#define ROCEE_BT_CMD_H_ROCEE_BT_CMD_IN_MDF_S 0 -#define ROCEE_BT_CMD_H_ROCEE_BT_CMD_IN_MDF_M \ - (((1UL << 19) - 1) << ROCEE_BT_CMD_H_ROCEE_BT_CMD_IN_MDF_S) - -#define ROCEE_BT_CMD_H_ROCEE_BT_CMD_S 19 - -#define ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_S 20 -#define ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_M \ - (((1UL << 2) - 1) << ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_S) - -#define ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_S 22 -#define ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_M \ - (((1UL << 5) - 1) << ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_S) - -#define ROCEE_BT_CMD_H_ROCEE_BT_CMD_HW_SYNS_S 31 - -#define ROCEE_QP1C_CFG0_0_ROCEE_QP1C_QP_ST_S 0 -#define ROCEE_QP1C_CFG0_0_ROCEE_QP1C_QP_ST_M \ - (((1UL << 3) - 1) << ROCEE_QP1C_CFG0_0_ROCEE_QP1C_QP_ST_S) - -#define ROCEE_QP1C_CFG3_0_ROCEE_QP1C_RQ_HEAD_S 0 -#define ROCEE_QP1C_CFG3_0_ROCEE_QP1C_RQ_HEAD_M \ - (((1UL << 15) - 1) << ROCEE_QP1C_CFG3_0_ROCEE_QP1C_RQ_HEAD_S) - -#define ROCEE_MB6_ROCEE_MB_CMD_S 0 -#define ROCEE_MB6_ROCEE_MB_CMD_M \ - (((1UL << 8) - 1) << ROCEE_MB6_ROCEE_MB_CMD_S) - -#define ROCEE_MB6_ROCEE_MB_CMD_MDF_S 8 -#define ROCEE_MB6_ROCEE_MB_CMD_MDF_M \ - (((1UL << 4) - 1) << ROCEE_MB6_ROCEE_MB_CMD_MDF_S) - -#define ROCEE_MB6_ROCEE_MB_EVENT_S 14 - -#define ROCEE_MB6_ROCEE_MB_HW_RUN_S 15 - -#define ROCEE_MB6_ROCEE_MB_TOKEN_S 16 -#define ROCEE_MB6_ROCEE_MB_TOKEN_M \ - (((1UL << 16) - 1) << ROCEE_MB6_ROCEE_MB_TOKEN_S) - -#define ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_INP_H_S 0 -#define ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_INP_H_M \ - (((1UL << 24) - 1) << ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_INP_H_S) - -#define ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_MDF_S 24 -#define ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_MDF_M \ - (((1UL << 4) - 1) << ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_MDF_S) - -#define ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_S 28 -#define ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_M \ - (((1UL << 3) - 1) << ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_S) - -#define ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_HW_SYNS_S 31 - -#define ROCEE_SMAC_H_ROCEE_SMAC_H_S 0 -#define ROCEE_SMAC_H_ROCEE_SMAC_H_M \ - (((1UL << 16) - 1) << ROCEE_SMAC_H_ROCEE_SMAC_H_S) - -#define ROCEE_SMAC_H_ROCEE_PORT_MTU_S 16 -#define ROCEE_SMAC_H_ROCEE_PORT_MTU_M \ - (((1UL << 4) - 1) << ROCEE_SMAC_H_ROCEE_PORT_MTU_S) - -#define ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_STATE_S 0 -#define ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_STATE_M \ - (((1UL << 2) - 1) << ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_STATE_S) - -#define ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_AEQE_SHIFT_S 8 -#define ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_AEQE_SHIFT_M \ - (((1UL << 4) - 1) << ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_AEQE_SHIFT_S) - -#define ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQ_ALM_OVF_INT_ST_S 17 - -#define ROCEE_CAEP_AEQE_CUR_IDX_CAEP_AEQ_BT_H_S 0 -#define ROCEE_CAEP_AEQE_CUR_IDX_CAEP_AEQ_BT_H_M \ - (((1UL << 5) - 1) << ROCEE_CAEP_AEQE_CUR_IDX_CAEP_AEQ_BT_H_S) - -#define ROCEE_CAEP_AEQE_CUR_IDX_CAEP_AEQE_CUR_IDX_S 16 -#define ROCEE_CAEP_AEQE_CUR_IDX_CAEP_AEQE_CUR_IDX_M \ - (((1UL << 16) - 1) << ROCEE_CAEP_AEQE_CUR_IDX_CAEP_AEQE_CUR_IDX_S) - -#define ROCEE_CAEP_AEQE_CONS_IDX_CAEP_AEQE_CONS_IDX_S 0 -#define ROCEE_CAEP_AEQE_CONS_IDX_CAEP_AEQE_CONS_IDX_M \ - (((1UL << 16) - 1) << ROCEE_CAEP_AEQE_CONS_IDX_CAEP_AEQE_CONS_IDX_S) - -#define ROCEE_CAEP_CEQC_SHIFT_CAEP_CEQ_ALM_OVF_INT_ST_S 16 -#define ROCEE_CAEP_CE_IRQ_MASK_CAEP_CEQ_ALM_OVF_MASK_S 1 -#define ROCEE_CAEP_CEQ_ALM_OVF_CAEP_CEQ_ALM_OVF_S 0 - -#define ROCEE_CAEP_AE_MASK_CAEP_AEQ_ALM_OVF_MASK_S 0 -#define ROCEE_CAEP_AE_MASK_CAEP_AE_IRQ_MASK_S 1 - -#define ROCEE_CAEP_AE_ST_CAEP_AEQ_ALM_OVF_S 0 - -#define ROCEE_SDB_ISSUE_PTR_SDB_ISSUE_PTR_S 0 -#define ROCEE_SDB_ISSUE_PTR_SDB_ISSUE_PTR_M \ - (((1UL << 28) - 1) << ROCEE_SDB_ISSUE_PTR_SDB_ISSUE_PTR_S) - -#define ROCEE_SDB_SEND_PTR_SDB_SEND_PTR_S 0 -#define ROCEE_SDB_SEND_PTR_SDB_SEND_PTR_M \ - (((1UL << 28) - 1) << ROCEE_SDB_SEND_PTR_SDB_SEND_PTR_S) - -#define ROCEE_SDB_INV_CNT_SDB_INV_CNT_S 0 -#define ROCEE_SDB_INV_CNT_SDB_INV_CNT_M \ - (((1UL << 16) - 1) << ROCEE_SDB_INV_CNT_SDB_INV_CNT_S) - -#define ROCEE_SDB_RETRY_CNT_SDB_RETRY_CT_S 0 -#define ROCEE_SDB_RETRY_CNT_SDB_RETRY_CT_M \ - (((1UL << 16) - 1) << ROCEE_SDB_RETRY_CNT_SDB_RETRY_CT_S) - -#define ROCEE_SDB_CNT_CMP_BITS 16 - -#define ROCEE_TSP_BP_ST_QH_FIFO_ENTRY_S 20 - -#define ROCEE_CNT_CLR_CE_CNT_CLR_CE_S 0 - /*************ROCEE_REG DEFINITION****************/ #define ROCEE_VENDOR_ID_REG 0x0 #define ROCEE_VENDOR_PART_ID_REG 0x4 diff --git a/drivers/infiniband/hw/hns/hns_roce_cq.c b/drivers/infiniband/hw/hns/hns_roce_cq.c index d763f097599f..55057dcbb2dc 100644 --- a/drivers/infiniband/hw/hns/hns_roce_cq.c +++ b/drivers/infiniband/hw/hns/hns_roce_cq.c @@ -30,7 +30,6 @@ * SOFTWARE. */ -#include <linux/platform_device.h> #include <rdma/ib_umem.h> #include <rdma/uverbs_ioctl.h> #include "hns_roce_device.h" @@ -406,15 +405,6 @@ int hns_roce_create_cq(struct ib_cq *ib_cq, const struct ib_cq_init_attr *attr, goto err_cqn; } - /* - * For the QP created by kernel space, tptr value should be initialized - * to zero; For the QP created by user space, it will cause synchronous - * problems if tptr is set to zero here, so we initialize it in user - * space. - */ - if (!udata && hr_cq->tptr_addr) - *hr_cq->tptr_addr = 0; - if (udata) { resp.cqn = hr_cq->cqn; ret = ib_copy_to_udata(udata, &resp, @@ -441,9 +431,6 @@ int hns_roce_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata) struct hns_roce_dev *hr_dev = to_hr_dev(ib_cq->device); struct hns_roce_cq *hr_cq = to_hr_cq(ib_cq); - if (hr_dev->hw->destroy_cq) - hr_dev->hw->destroy_cq(ib_cq, udata); - free_cqc(hr_dev, hr_cq); free_cqn(hr_dev, hr_cq->cqn); free_cq_db(hr_dev, hr_cq, udata); diff --git a/drivers/infiniband/hw/hns/hns_roce_db.c b/drivers/infiniband/hw/hns/hns_roce_db.c index 751470c7a2ce..5c4c0480832b 100644 --- a/drivers/infiniband/hw/hns/hns_roce_db.c +++ b/drivers/infiniband/hw/hns/hns_roce_db.c @@ -4,7 +4,6 @@ * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. */ -#include <linux/platform_device.h> #include <rdma/ib_umem.h> #include "hns_roce_device.h" diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h index bc7112a205a7..196737297c70 100644 --- a/drivers/infiniband/hw/hns/hns_roce_device.h +++ b/drivers/infiniband/hw/hns/hns_roce_device.h @@ -41,31 +41,15 @@ #define PCI_REVISION_ID_HIP08 0x21 #define PCI_REVISION_ID_HIP09 0x30 -#define HNS_ROCE_HW_VER1 ('h' << 24 | 'i' << 16 | '0' << 8 | '6') - #define HNS_ROCE_MAX_MSG_LEN 0x80000000 #define HNS_ROCE_IB_MIN_SQ_STRIDE 6 #define BA_BYTE_LEN 8 -/* Hardware specification only for v1 engine */ #define HNS_ROCE_MIN_CQE_NUM 0x40 -#define HNS_ROCE_MIN_WQE_NUM 0x20 #define HNS_ROCE_MIN_SRQ_WQE_NUM 1 -/* Hardware specification only for v1 engine */ -#define HNS_ROCE_MAX_INNER_MTPT_NUM 0x7 -#define HNS_ROCE_MAX_MTPT_PBL_NUM 0x100000 - -#define HNS_ROCE_EACH_FREE_CQ_WAIT_MSECS 20 -#define HNS_ROCE_MAX_FREE_CQ_WAIT_CNT \ - (5000 / HNS_ROCE_EACH_FREE_CQ_WAIT_MSECS) -#define HNS_ROCE_CQE_WCMD_EMPTY_BIT 0x2 -#define HNS_ROCE_MIN_CQE_CNT 16 - -#define HNS_ROCE_RESERVED_SGE 1 - #define HNS_ROCE_MAX_IRQ_NUM 128 #define HNS_ROCE_SGE_IN_WQE 2 @@ -109,11 +93,6 @@ /* Configure to HW for PAGE_SIZE larger than 4KB */ #define PG_SHIFT_OFFSET (PAGE_SHIFT - 12) -#define PAGES_SHIFT_8 8 -#define PAGES_SHIFT_16 16 -#define PAGES_SHIFT_24 24 -#define PAGES_SHIFT_32 32 - #define HNS_ROCE_IDX_QUE_ENTRY_SZ 4 #define SRQ_DB_REG 0x230 @@ -122,11 +101,6 @@ #define CQ_BANKID_SHIFT 2 -/* The chip implementation of the consumer index is calculated - * according to twice the actual EQ depth - */ -#define EQ_DEPTH_COEFF 2 - enum { SERV_TYPE_RC, SERV_TYPE_UC, @@ -244,7 +218,6 @@ struct hns_roce_ucontext { struct list_head page_list; struct mutex page_mutex; struct hns_user_mmap_entry *db_mmap_entry; - struct hns_user_mmap_entry *tptr_mmap_entry; }; struct hns_roce_pd { @@ -347,9 +320,6 @@ struct hns_roce_mw { u32 pbl_buf_pg_sz; }; -/* Only support 4K page size for mr register */ -#define MR_SIZE_4K 0 - struct hns_roce_mr { struct ib_mr ibmr; u64 iova; /* MR's virtual original addr */ @@ -455,7 +425,6 @@ struct hns_roce_cq { u32 cons_index; u32 *set_ci_db; void __iomem *db_reg; - u16 *tptr_addr; int arm_sn; int cqe_size; unsigned long cqn; @@ -739,7 +708,6 @@ struct hns_roce_eq { struct hns_roce_eq_table { struct hns_roce_eq *eq; - void __iomem **eqc_base; /* only for hw v1 */ }; enum cong_type { @@ -896,7 +864,6 @@ enum hns_roce_device_state { }; struct hns_roce_hw { - int (*reset)(struct hns_roce_dev *hr_dev, bool enable); int (*cmq_init)(struct hns_roce_dev *hr_dev); void (*cmq_exit)(struct hns_roce_dev *hr_dev); int (*hw_profile)(struct hns_roce_dev *hr_dev); @@ -912,8 +879,6 @@ struct hns_roce_hw { const union ib_gid *gid, const struct ib_gid_attr *attr); int (*set_mac)(struct hns_roce_dev *hr_dev, u8 phy_port, const u8 *addr); - void (*set_mtu)(struct hns_roce_dev *hr_dev, u8 phy_port, - enum ib_mtu mtu); int (*write_mtpt)(struct hns_roce_dev *hr_dev, void *mb_buf, struct hns_roce_mr *mr, unsigned long mtpt_idx); int (*rereg_write_mtpt)(struct hns_roce_dev *hr_dev, @@ -937,7 +902,6 @@ struct hns_roce_hw { struct hns_roce_qp *hr_qp); int (*dereg_mr)(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr, struct ib_udata *udata); - int (*destroy_cq)(struct ib_cq *ibcq, struct ib_udata *udata); int (*init_eq)(struct hns_roce_dev *hr_dev); void (*cleanup_eq)(struct hns_roce_dev *hr_dev); int (*write_srqc)(struct hns_roce_srq *srq, void *mb_buf); @@ -947,7 +911,6 @@ struct hns_roce_hw { struct hns_roce_dev { struct ib_device ib_dev; - struct platform_device *pdev; struct pci_dev *pci_dev; struct device *dev; struct hns_roce_uar priv_uar; @@ -1000,8 +963,6 @@ struct hns_roce_dev { int loop_idc; u32 sdb_offset; u32 odb_offset; - dma_addr_t tptr_dma_addr; /* only for hw v1 */ - u32 tptr_size; /* only for hw v1 */ const struct hns_roce_hw *hw; void *priv; struct workqueue_struct *irq_workq; diff --git a/drivers/infiniband/hw/hns/hns_roce_hem.c b/drivers/infiniband/hw/hns/hns_roce_hem.c index fa15d79eabb3..8917365cc6b8 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hem.c +++ b/drivers/infiniband/hw/hns/hns_roce_hem.c @@ -31,7 +31,6 @@ * SOFTWARE. */ -#include <linux/platform_device.h> #include "hns_roce_device.h" #include "hns_roce_hem.h" #include "hns_roce_common.h" diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c deleted file mode 100644 index f4af3992ba95..000000000000 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c +++ /dev/null @@ -1,4675 +0,0 @@ -/* - * Copyright (c) 2016 Hisilicon Limited. - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the - * OpenIB.org BSD license below: - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * - * - Redistributions of source code must retain the above - * copyright notice, this list of conditions and the following - * disclaimer. - * - * - Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#include <linux/platform_device.h> -#include <linux/acpi.h> -#include <linux/etherdevice.h> -#include <linux/interrupt.h> -#include <linux/of.h> -#include <linux/of_platform.h> -#include <rdma/ib_umem.h> -#include "hns_roce_common.h" -#include "hns_roce_device.h" -#include "hns_roce_cmd.h" -#include "hns_roce_hem.h" -#include "hns_roce_hw_v1.h" - -/** - * hns_get_gid_index - Get gid index. - * @hr_dev: pointer to structure hns_roce_dev. - * @port: port, value range: 0 ~ MAX - * @gid_index: gid_index, value range: 0 ~ MAX - * Description: - * N ports shared gids, allocation method as follow: - * GID[0][0], GID[1][0],.....GID[N - 1][0], - * GID[0][0], GID[1][0],.....GID[N - 1][0], - * And so on - */ -u8 hns_get_gid_index(struct hns_roce_dev *hr_dev, u32 port, int gid_index) -{ - return gid_index * hr_dev->caps.num_ports + port; -} - -static void set_data_seg(struct hns_roce_wqe_data_seg *dseg, struct ib_sge *sg) -{ - dseg->lkey = cpu_to_le32(sg->lkey); - dseg->addr = cpu_to_le64(sg->addr); - dseg->len = cpu_to_le32(sg->length); -} - -static void set_raddr_seg(struct hns_roce_wqe_raddr_seg *rseg, u64 remote_addr, - u32 rkey) -{ - rseg->raddr = cpu_to_le64(remote_addr); - rseg->rkey = cpu_to_le32(rkey); - rseg->len = 0; -} - -static int hns_roce_v1_post_send(struct ib_qp *ibqp, - const struct ib_send_wr *wr, - const struct ib_send_wr **bad_wr) -{ - struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device); - struct hns_roce_ah *ah = to_hr_ah(ud_wr(wr)->ah); - struct hns_roce_ud_send_wqe *ud_sq_wqe = NULL; - struct hns_roce_wqe_ctrl_seg *ctrl = NULL; - struct hns_roce_wqe_data_seg *dseg = NULL; - struct hns_roce_qp *qp = to_hr_qp(ibqp); - struct device *dev = &hr_dev->pdev->dev; - struct hns_roce_sq_db sq_db = {}; - int ps_opcode, i; - unsigned long flags = 0; - void *wqe = NULL; - __le32 doorbell[2]; - const u8 *smac; - int ret = 0; - int loopback; - u32 wqe_idx; - int nreq; - - if (unlikely(ibqp->qp_type != IB_QPT_GSI && - ibqp->qp_type != IB_QPT_RC)) { - dev_err(dev, "un-supported QP type\n"); - *bad_wr = NULL; - return -EOPNOTSUPP; - } - - spin_lock_irqsave(&qp->sq.lock, flags); - - for (nreq = 0; wr; ++nreq, wr = wr->next) { - if (hns_roce_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq)) { - ret = -ENOMEM; - *bad_wr = wr; - goto out; - } - - wqe_idx = (qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1); - - if (unlikely(wr->num_sge > qp->sq.max_gs)) { - dev_err(dev, "num_sge=%d > qp->sq.max_gs=%d\n", - wr->num_sge, qp->sq.max_gs); - ret = -EINVAL; - *bad_wr = wr; - goto out; - } - - wqe = hns_roce_get_send_wqe(qp, wqe_idx); - qp->sq.wrid[wqe_idx] = wr->wr_id; - - /* Corresponding to the RC and RD type wqe process separately */ - if (ibqp->qp_type == IB_QPT_GSI) { - ud_sq_wqe = wqe; - roce_set_field(ud_sq_wqe->dmac_h, - UD_SEND_WQE_U32_4_DMAC_0_M, - UD_SEND_WQE_U32_4_DMAC_0_S, - ah->av.mac[0]); - roce_set_field(ud_sq_wqe->dmac_h, - UD_SEND_WQE_U32_4_DMAC_1_M, - UD_SEND_WQE_U32_4_DMAC_1_S, - ah->av.mac[1]); - roce_set_field(ud_sq_wqe->dmac_h, - UD_SEND_WQE_U32_4_DMAC_2_M, - UD_SEND_WQE_U32_4_DMAC_2_S, - ah->av.mac[2]); - roce_set_field(ud_sq_wqe->dmac_h, - UD_SEND_WQE_U32_4_DMAC_3_M, - UD_SEND_WQE_U32_4_DMAC_3_S, - ah->av.mac[3]); - - roce_set_field(ud_sq_wqe->u32_8, - UD_SEND_WQE_U32_8_DMAC_4_M, - UD_SEND_WQE_U32_8_DMAC_4_S, - ah->av.mac[4]); - roce_set_field(ud_sq_wqe->u32_8, - UD_SEND_WQE_U32_8_DMAC_5_M, - UD_SEND_WQE_U32_8_DMAC_5_S, - ah->av.mac[5]); - - smac = (const u8 *)hr_dev->dev_addr[qp->port]; - loopback = ether_addr_equal_unaligned(ah->av.mac, - smac) ? 1 : 0; - roce_set_bit(ud_sq_wqe->u32_8, - UD_SEND_WQE_U32_8_LOOPBACK_INDICATOR_S, - loopback); - - roce_set_field(ud_sq_wqe->u32_8, - UD_SEND_WQE_U32_8_OPERATION_TYPE_M, - UD_SEND_WQE_U32_8_OPERATION_TYPE_S, - HNS_ROCE_WQE_OPCODE_SEND); - roce_set_field(ud_sq_wqe->u32_8, - UD_SEND_WQE_U32_8_NUMBER_OF_DATA_SEG_M, - UD_SEND_WQE_U32_8_NUMBER_OF_DATA_SEG_S, - 2); - roce_set_bit(ud_sq_wqe->u32_8, - UD_SEND_WQE_U32_8_SEND_GL_ROUTING_HDR_FLAG_S, - 1); - - ud_sq_wqe->u32_8 |= (wr->send_flags & IB_SEND_SIGNALED ? - cpu_to_le32(HNS_ROCE_WQE_CQ_NOTIFY) : 0) | - (wr->send_flags & IB_SEND_SOLICITED ? - cpu_to_le32(HNS_ROCE_WQE_SE) : 0) | - ((wr->opcode == IB_WR_SEND_WITH_IMM) ? - cpu_to_le32(HNS_ROCE_WQE_IMM) : 0); - - roce_set_field(ud_sq_wqe->u32_16, - UD_SEND_WQE_U32_16_DEST_QP_M, - UD_SEND_WQE_U32_16_DEST_QP_S, - ud_wr(wr)->remote_qpn); - roce_set_field(ud_sq_wqe->u32_16, - UD_SEND_WQE_U32_16_MAX_STATIC_RATE_M, - UD_SEND_WQE_U32_16_MAX_STATIC_RATE_S, - ah->av.stat_rate); - - roce_set_field(ud_sq_wqe->u32_36, - UD_SEND_WQE_U32_36_FLOW_LABEL_M, - UD_SEND_WQE_U32_36_FLOW_LABEL_S, - ah->av.flowlabel); - roce_set_field(ud_sq_wqe->u32_36, - UD_SEND_WQE_U32_36_PRIORITY_M, - UD_SEND_WQE_U32_36_PRIORITY_S, - ah->av.sl); - roce_set_field(ud_sq_wqe->u32_36, - UD_SEND_WQE_U32_36_SGID_INDEX_M, - UD_SEND_WQE_U32_36_SGID_INDEX_S, - hns_get_gid_index(hr_dev, qp->phy_port, - ah->av.gid_index)); - - roce_set_field(ud_sq_wqe->u32_40, - UD_SEND_WQE_U32_40_HOP_LIMIT_M, - UD_SEND_WQE_U32_40_HOP_LIMIT_S, - ah->av.hop_limit); - roce_set_field(ud_sq_wqe->u32_40, - UD_SEND_WQE_U32_40_TRAFFIC_CLASS_M, - UD_SEND_WQE_U32_40_TRAFFIC_CLASS_S, - ah->av.tclass); - - memcpy(&ud_sq_wqe->dgid[0], &ah->av.dgid[0], GID_LEN); - - ud_sq_wqe->va0_l = - cpu_to_le32((u32)wr->sg_list[0].addr); - ud_sq_wqe->va0_h = - cpu_to_le32((wr->sg_list[0].addr) >> 32); - ud_sq_wqe->l_key0 = - cpu_to_le32(wr->sg_list[0].lkey); - - ud_sq_wqe->va1_l = - cpu_to_le32((u32)wr->sg_list[1].addr); - ud_sq_wqe->va1_h = - cpu_to_le32((wr->sg_list[1].addr) >> 32); - ud_sq_wqe->l_key1 = - cpu_to_le32(wr->sg_list[1].lkey); - } else if (ibqp->qp_type == IB_QPT_RC) { - u32 tmp_len = 0; - - ctrl = wqe; - memset(ctrl, 0, sizeof(struct hns_roce_wqe_ctrl_seg)); - for (i = 0; i < wr->num_sge; i++) - tmp_len += wr->sg_list[i].length; - - ctrl->msg_length = - cpu_to_le32(le32_to_cpu(ctrl->msg_length) + tmp_len); - - ctrl->sgl_pa_h = 0; - ctrl->flag = 0; - - switch (wr->opcode) { - case IB_WR_SEND_WITH_IMM: - case IB_WR_RDMA_WRITE_WITH_IMM: - ctrl->imm_data = wr->ex.imm_data; - break; - case IB_WR_SEND_WITH_INV: - ctrl->inv_key = - cpu_to_le32(wr->ex.invalidate_rkey); - break; - default: - ctrl->imm_data = 0; - break; - } - - /* Ctrl field, ctrl set type: sig, solic, imm, fence */ - /* SO wait for conforming application scenarios */ - ctrl->flag |= (wr->send_flags & IB_SEND_SIGNALED ? - cpu_to_le32(HNS_ROCE_WQE_CQ_NOTIFY) : 0) | - (wr->send_flags & IB_SEND_SOLICITED ? - cpu_to_le32(HNS_ROCE_WQE_SE) : 0) | - ((wr->opcode == IB_WR_SEND_WITH_IMM || - wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM) ? - cpu_to_le32(HNS_ROCE_WQE_IMM) : 0) | - (wr->send_flags & IB_SEND_FENCE ? - (cpu_to_le32(HNS_ROCE_WQE_FENCE)) : 0); - - wqe += sizeof(struct hns_roce_wqe_ctrl_seg); - - switch (wr->opcode) { - case IB_WR_RDMA_READ: - ps_opcode = HNS_ROCE_WQE_OPCODE_RDMA_READ; - set_raddr_seg(wqe, rdma_wr(wr)->remote_addr, - rdma_wr(wr)->rkey); - break; - case IB_WR_RDMA_WRITE: - case IB_WR_RDMA_WRITE_WITH_IMM: - ps_opcode = HNS_ROCE_WQE_OPCODE_RDMA_WRITE; - set_raddr_seg(wqe, rdma_wr(wr)->remote_addr, - rdma_wr(wr)->rkey); - break; - case IB_WR_SEND: - case IB_WR_SEND_WITH_INV: - case IB_WR_SEND_WITH_IMM: - ps_opcode = HNS_ROCE_WQE_OPCODE_SEND; - break; - case IB_WR_LOCAL_INV: - case IB_WR_ATOMIC_CMP_AND_SWP: - case IB_WR_ATOMIC_FETCH_AND_ADD: - case IB_WR_LSO: - default: - ps_opcode = HNS_ROCE_WQE_OPCODE_MASK; - break; - } - ctrl->flag |= cpu_to_le32(ps_opcode); - wqe += sizeof(struct hns_roce_wqe_raddr_seg); - - dseg = wqe; - if (wr->send_flags & IB_SEND_INLINE && wr->num_sge) { - if (le32_to_cpu(ctrl->msg_length) > - hr_dev->caps.max_sq_inline) { - ret = -EINVAL; - *bad_wr = wr; - dev_err(dev, "inline len(1-%d)=%d, illegal", - le32_to_cpu(ctrl->msg_length), - hr_dev->caps.max_sq_inline); - goto out; - } - for (i = 0; i < wr->num_sge; i++) { - memcpy(wqe, ((void *) (uintptr_t) - wr->sg_list[i].addr), - wr->sg_list[i].length); - wqe += wr->sg_list[i].length; - } - ctrl->flag |= cpu_to_le32(HNS_ROCE_WQE_INLINE); - } else { - /* sqe num is two */ - for (i = 0; i < wr->num_sge; i++) - set_data_seg(dseg + i, wr->sg_list + i); - - ctrl->flag |= cpu_to_le32(wr->num_sge << - HNS_ROCE_WQE_SGE_NUM_BIT); - } - } - } - -out: - /* Set DB return */ - if (likely(nreq)) { - qp->sq.head += nreq; - - roce_set_field(sq_db.u32_4, SQ_DOORBELL_U32_4_SQ_HEAD_M, - SQ_DOORBELL_U32_4_SQ_HEAD_S, - (qp->sq.head & ((qp->sq.wqe_cnt << 1) - 1))); - roce_set_field(sq_db.u32_4, SQ_DOORBELL_U32_4_SL_M, - SQ_DOORBELL_U32_4_SL_S, qp->sl); - roce_set_field(sq_db.u32_4, SQ_DOORBELL_U32_4_PORT_M, - SQ_DOORBELL_U32_4_PORT_S, qp->phy_port); - roce_set_field(sq_db.u32_8, SQ_DOORBELL_U32_8_QPN_M, - SQ_DOORBELL_U32_8_QPN_S, qp->doorbell_qpn); - roce_set_bit(sq_db.u32_8, SQ_DOORBELL_HW_SYNC_S, 1); - - doorbell[0] = sq_db.u32_4; - doorbell[1] = sq_db.u32_8; - - hns_roce_write64_k(doorbell, qp->sq.db_reg); - } - - spin_unlock_irqrestore(&qp->sq.lock, flags); - - return ret; -} - -static int hns_roce_v1_post_recv(struct ib_qp *ibqp, - const struct ib_recv_wr *wr, - const struct ib_recv_wr **bad_wr) -{ - struct hns_roce_rq_wqe_ctrl *ctrl = NULL; - struct hns_roce_wqe_data_seg *scat = NULL; - struct hns_roce_qp *hr_qp = to_hr_qp(ibqp); - struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device); - struct device *dev = &hr_dev->pdev->dev; - struct hns_roce_rq_db rq_db = {}; - __le32 doorbell[2] = {0}; - unsigned long flags = 0; - unsigned int wqe_idx; - int ret = 0; - int nreq; - int i; - u32 reg_val; - - spin_lock_irqsave(&hr_qp->rq.lock, flags); - - for (nreq = 0; wr; ++nreq, wr = wr->next) { - if (hns_roce_wq_overflow(&hr_qp->rq, nreq, - hr_qp->ibqp.recv_cq)) { - ret = -ENOMEM; - *bad_wr = wr; - goto out; - } - - wqe_idx = (hr_qp->rq.head + nreq) & (hr_qp->rq.wqe_cnt - 1); - - if (unlikely(wr->num_sge > hr_qp->rq.max_gs)) { - dev_err(dev, "rq:num_sge=%d > qp->sq.max_gs=%d\n", - wr->num_sge, hr_qp->rq.max_gs); - ret = -EINVAL; - *bad_wr = wr; - goto out; - } - - ctrl = hns_roce_get_recv_wqe(hr_qp, wqe_idx); - - roce_set_field(ctrl->rwqe_byte_12, - RQ_WQE_CTRL_RWQE_BYTE_12_RWQE_SGE_NUM_M, - RQ_WQE_CTRL_RWQE_BYTE_12_RWQE_SGE_NUM_S, - wr->num_sge); - - scat = (struct hns_roce_wqe_data_seg *)(ctrl + 1); - - for (i = 0; i < wr->num_sge; i++) - set_data_seg(scat + i, wr->sg_list + i); - - hr_qp->rq.wrid[wqe_idx] = wr->wr_id; - } - -out: - if (likely(nreq)) { - hr_qp->rq.head += nreq; - - if (ibqp->qp_type == IB_QPT_GSI) { - __le32 tmp; - - /* SW update GSI rq header */ - reg_val = roce_read(to_hr_dev(ibqp->device), - ROCEE_QP1C_CFG3_0_REG + - QP1C_CFGN_OFFSET * hr_qp->phy_port); - tmp = cpu_to_le32(reg_val); - roce_set_field(tmp, - ROCEE_QP1C_CFG3_0_ROCEE_QP1C_RQ_HEAD_M, - ROCEE_QP1C_CFG3_0_ROCEE_QP1C_RQ_HEAD_S, - hr_qp->rq.head); - reg_val = le32_to_cpu(tmp); - roce_write(to_hr_dev(ibqp->device), - ROCEE_QP1C_CFG3_0_REG + - QP1C_CFGN_OFFSET * hr_qp->phy_port, reg_val); - } else { - roce_set_field(rq_db.u32_4, RQ_DOORBELL_U32_4_RQ_HEAD_M, - RQ_DOORBELL_U32_4_RQ_HEAD_S, - hr_qp->rq.head); - roce_set_field(rq_db.u32_8, RQ_DOORBELL_U32_8_QPN_M, - RQ_DOORBELL_U32_8_QPN_S, hr_qp->qpn); - roce_set_field(rq_db.u32_8, RQ_DOORBELL_U32_8_CMD_M, - RQ_DOORBELL_U32_8_CMD_S, 1); - roce_set_bit(rq_db.u32_8, RQ_DOORBELL_U32_8_HW_SYNC_S, - 1); - - doorbell[0] = rq_db.u32_4; - doorbell[1] = rq_db.u32_8; - - hns_roce_write64_k(doorbell, hr_qp->rq.db_reg); - } - } - spin_unlock_irqrestore(&hr_qp->rq.lock, flags); - - return ret; -} - -static void hns_roce_set_db_event_mode(struct hns_roce_dev *hr_dev, - int sdb_mode, int odb_mode) -{ - __le32 tmp; - u32 val; - - val = roce_read(hr_dev, ROCEE_GLB_CFG_REG); - tmp = cpu_to_le32(val); - roce_set_bit(tmp, ROCEE_GLB_CFG_ROCEE_DB_SQ_MODE_S, sdb_mode); - roce_set_bit(tmp, ROCEE_GLB_CFG_ROCEE_DB_OTH_MODE_S, odb_mode); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_GLB_CFG_REG, val); -} - -static int hns_roce_v1_set_hem(struct hns_roce_dev *hr_dev, - struct hns_roce_hem_table *table, int obj, - int step_idx) -{ - spinlock_t *lock = &hr_dev->bt_cmd_lock; - struct device *dev = hr_dev->dev; - struct hns_roce_hem_iter iter; - void __iomem *bt_cmd; - __le32 bt_cmd_val[2]; - __le32 bt_cmd_h = 0; - unsigned long flags; - __le32 bt_cmd_l; - int ret = 0; - u64 bt_ba; - long end; - - /* Find the HEM(Hardware Entry Memory) entry */ - unsigned long i = obj / (table->table_chunk_size / table->obj_size); - - switch (table->type) { - case HEM_TYPE_QPC: - case HEM_TYPE_MTPT: - case HEM_TYPE_CQC: - case HEM_TYPE_SRQC: - roce_set_field(bt_cmd_h, ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_M, - ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_S, table->type); - break; - default: - return ret; - } - - roce_set_field(bt_cmd_h, ROCEE_BT_CMD_H_ROCEE_BT_CMD_IN_MDF_M, - ROCEE_BT_CMD_H_ROCEE_BT_CMD_IN_MDF_S, obj); - roce_set_bit(bt_cmd_h, ROCEE_BT_CMD_H_ROCEE_BT_CMD_S, 0); - roce_set_bit(bt_cmd_h, ROCEE_BT_CMD_H_ROCEE_BT_CMD_HW_SYNS_S, 1); - - /* Currently iter only a chunk */ - for (hns_roce_hem_first(table->hem[i], &iter); - !hns_roce_hem_last(&iter); hns_roce_hem_next(&iter)) { - bt_ba = hns_roce_hem_addr(&iter) >> HNS_HW_PAGE_SHIFT; - - spin_lock_irqsave(lock, flags); - - bt_cmd = hr_dev->reg_base + ROCEE_BT_CMD_H_REG; - - end = HW_SYNC_TIMEOUT_MSECS; - while (end > 0) { - if (!(readl(bt_cmd) >> BT_CMD_SYNC_SHIFT)) - break; - - mdelay(HW_SYNC_SLEEP_TIME_INTERVAL); - end -= HW_SYNC_SLEEP_TIME_INTERVAL; - } - - if (end <= 0) { - dev_err(dev, "Write bt_cmd err,hw_sync is not zero.\n"); - spin_unlock_irqrestore(lock, flags); - return -EBUSY; - } - - bt_cmd_l = cpu_to_le32(bt_ba); - roce_set_field(bt_cmd_h, ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_M, - ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_S, - upper_32_bits(bt_ba)); - - bt_cmd_val[0] = bt_cmd_l; - bt_cmd_val[1] = bt_cmd_h; - hns_roce_write64_k(bt_cmd_val, - hr_dev->reg_base + ROCEE_BT_CMD_L_REG); - spin_unlock_irqrestore(lock, flags); - } - - return ret; -} - -static void hns_roce_set_db_ext_mode(struct hns_roce_dev *hr_dev, u32 sdb_mode, - u32 odb_mode) -{ - __le32 tmp; - u32 val; - - /* Configure SDB/ODB extend mode */ - val = roce_read(hr_dev, ROCEE_GLB_CFG_REG); - tmp = cpu_to_le32(val); - roce_set_bit(tmp, ROCEE_GLB_CFG_SQ_EXT_DB_MODE_S, sdb_mode); - roce_set_bit(tmp, ROCEE_GLB_CFG_OTH_EXT_DB_MODE_S, odb_mode); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_GLB_CFG_REG, val); -} - -static void hns_roce_set_sdb(struct hns_roce_dev *hr_dev, u32 sdb_alept, - u32 sdb_alful) -{ - __le32 tmp; - u32 val; - - /* Configure SDB */ - val = roce_read(hr_dev, ROCEE_DB_SQ_WL_REG); - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_M, - ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_S, sdb_alful); - roce_set_field(tmp, ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_EMPTY_M, - ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_EMPTY_S, sdb_alept); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_DB_SQ_WL_REG, val); -} - -static void hns_roce_set_odb(struct hns_roce_dev *hr_dev, u32 odb_alept, - u32 odb_alful) -{ - __le32 tmp; - u32 val; - - /* Configure ODB */ - val = roce_read(hr_dev, ROCEE_DB_OTHERS_WL_REG); - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_M, - ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_S, odb_alful); - roce_set_field(tmp, ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_EMPTY_M, - ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_EMPTY_S, odb_alept); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_DB_OTHERS_WL_REG, val); -} - -static void hns_roce_set_sdb_ext(struct hns_roce_dev *hr_dev, u32 ext_sdb_alept, - u32 ext_sdb_alful) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_db_table *db = &priv->db_table; - struct device *dev = &hr_dev->pdev->dev; - dma_addr_t sdb_dma_addr; - __le32 tmp; - u32 val; - - /* Configure extend SDB threshold */ - roce_write(hr_dev, ROCEE_EXT_DB_SQ_WL_EMPTY_REG, ext_sdb_alept); - roce_write(hr_dev, ROCEE_EXT_DB_SQ_WL_REG, ext_sdb_alful); - - /* Configure extend SDB base addr */ - sdb_dma_addr = db->ext_db->sdb_buf_list->map; - roce_write(hr_dev, ROCEE_EXT_DB_SQ_REG, (u32)(sdb_dma_addr >> 12)); - - /* Configure extend SDB depth */ - val = roce_read(hr_dev, ROCEE_EXT_DB_SQ_H_REG); - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_SHIFT_M, - ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_SHIFT_S, - db->ext_db->esdb_dep); - /* - * 44 = 32 + 12, When evaluating addr to hardware, shift 12 because of - * using 4K page, and shift more 32 because of - * calculating the high 32 bit value evaluated to hardware. - */ - roce_set_field(tmp, ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_BA_H_M, - ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_BA_H_S, sdb_dma_addr >> 44); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_EXT_DB_SQ_H_REG, val); - - dev_dbg(dev, "ext SDB depth: 0x%x\n", db->ext_db->esdb_dep); - dev_dbg(dev, "ext SDB threshold: empty: 0x%x, ful: 0x%x\n", - ext_sdb_alept, ext_sdb_alful); -} - -static void hns_roce_set_odb_ext(struct hns_roce_dev *hr_dev, u32 ext_odb_alept, - u32 ext_odb_alful) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_db_table *db = &priv->db_table; - struct device *dev = &hr_dev->pdev->dev; - dma_addr_t odb_dma_addr; - __le32 tmp; - u32 val; - - /* Configure extend ODB threshold */ - roce_write(hr_dev, ROCEE_EXT_DB_OTHERS_WL_EMPTY_REG, ext_odb_alept); - roce_write(hr_dev, ROCEE_EXT_DB_OTHERS_WL_REG, ext_odb_alful); - - /* Configure extend ODB base addr */ - odb_dma_addr = db->ext_db->odb_buf_list->map; - roce_write(hr_dev, ROCEE_EXT_DB_OTH_REG, (u32)(odb_dma_addr >> 12)); - - /* Configure extend ODB depth */ - val = roce_read(hr_dev, ROCEE_EXT_DB_OTH_H_REG); - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_EXT_DB_OTH_H_EXT_DB_OTH_SHIFT_M, - ROCEE_EXT_DB_OTH_H_EXT_DB_OTH_SHIFT_S, - db->ext_db->eodb_dep); - roce_set_field(tmp, ROCEE_EXT_DB_SQ_H_EXT_DB_OTH_BA_H_M, - ROCEE_EXT_DB_SQ_H_EXT_DB_OTH_BA_H_S, - db->ext_db->eodb_dep); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_EXT_DB_OTH_H_REG, val); - - dev_dbg(dev, "ext ODB depth: 0x%x\n", db->ext_db->eodb_dep); - dev_dbg(dev, "ext ODB threshold: empty: 0x%x, ful: 0x%x\n", - ext_odb_alept, ext_odb_alful); -} - -static int hns_roce_db_ext_init(struct hns_roce_dev *hr_dev, u32 sdb_ext_mod, - u32 odb_ext_mod) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_db_table *db = &priv->db_table; - struct device *dev = &hr_dev->pdev->dev; - dma_addr_t sdb_dma_addr; - dma_addr_t odb_dma_addr; - int ret = 0; - - db->ext_db = kmalloc(sizeof(*db->ext_db), GFP_KERNEL); - if (!db->ext_db) - return -ENOMEM; - - if (sdb_ext_mod) { - db->ext_db->sdb_buf_list = kmalloc( - sizeof(*db->ext_db->sdb_buf_list), GFP_KERNEL); - if (!db->ext_db->sdb_buf_list) { - ret = -ENOMEM; - goto ext_sdb_buf_fail_out; - } - - db->ext_db->sdb_buf_list->buf = dma_alloc_coherent(dev, - HNS_ROCE_V1_EXT_SDB_SIZE, - &sdb_dma_addr, GFP_KERNEL); - if (!db->ext_db->sdb_buf_list->buf) { - ret = -ENOMEM; - goto alloc_sq_db_buf_fail; - } - db->ext_db->sdb_buf_list->map = sdb_dma_addr; - - db->ext_db->esdb_dep = ilog2(HNS_ROCE_V1_EXT_SDB_DEPTH); - hns_roce_set_sdb_ext(hr_dev, HNS_ROCE_V1_EXT_SDB_ALEPT, - HNS_ROCE_V1_EXT_SDB_ALFUL); - } else - hns_roce_set_sdb(hr_dev, HNS_ROCE_V1_SDB_ALEPT, - HNS_ROCE_V1_SDB_ALFUL); - - if (odb_ext_mod) { - db->ext_db->odb_buf_list = kmalloc( - sizeof(*db->ext_db->odb_buf_list), GFP_KERNEL); - if (!db->ext_db->odb_buf_list) { - ret = -ENOMEM; - goto ext_odb_buf_fail_out; - } - - db->ext_db->odb_buf_list->buf = dma_alloc_coherent(dev, - HNS_ROCE_V1_EXT_ODB_SIZE, - &odb_dma_addr, GFP_KERNEL); - if (!db->ext_db->odb_buf_list->buf) { - ret = -ENOMEM; - goto alloc_otr_db_buf_fail; - } - db->ext_db->odb_buf_list->map = odb_dma_addr; - - db->ext_db->eodb_dep = ilog2(HNS_ROCE_V1_EXT_ODB_DEPTH); - hns_roce_set_odb_ext(hr_dev, HNS_ROCE_V1_EXT_ODB_ALEPT, - HNS_ROCE_V1_EXT_ODB_ALFUL); - } else - hns_roce_set_odb(hr_dev, HNS_ROCE_V1_ODB_ALEPT, - HNS_ROCE_V1_ODB_ALFUL); - - hns_roce_set_db_ext_mode(hr_dev, sdb_ext_mod, odb_ext_mod); - - return 0; - -alloc_otr_db_buf_fail: - kfree(db->ext_db->odb_buf_list); - -ext_odb_buf_fail_out: - if (sdb_ext_mod) { - dma_free_coherent(dev, HNS_ROCE_V1_EXT_SDB_SIZE, - db->ext_db->sdb_buf_list->buf, - db->ext_db->sdb_buf_list->map); - } - -alloc_sq_db_buf_fail: - if (sdb_ext_mod) - kfree(db->ext_db->sdb_buf_list); - -ext_sdb_buf_fail_out: - kfree(db->ext_db); - return ret; -} - -static struct hns_roce_qp *hns_roce_v1_create_lp_qp(struct hns_roce_dev *hr_dev, - struct ib_pd *pd) -{ - struct device *dev = &hr_dev->pdev->dev; - struct ib_qp_init_attr init_attr; - struct ib_qp *qp; - - memset(&init_attr, 0, sizeof(struct ib_qp_init_attr)); - init_attr.qp_type = IB_QPT_RC; - init_attr.sq_sig_type = IB_SIGNAL_ALL_WR; - init_attr.cap.max_recv_wr = HNS_ROCE_MIN_WQE_NUM; - init_attr.cap.max_send_wr = HNS_ROCE_MIN_WQE_NUM; - - qp = ib_create_qp(pd, &init_attr); - if (IS_ERR(qp)) { - dev_err(dev, "Create loop qp for mr free failed!"); - return NULL; - } - - return to_hr_qp(qp); -} - -static int hns_roce_v1_rsv_lp_qp(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_free_mr *free_mr = &priv->free_mr; - struct hns_roce_caps *caps = &hr_dev->caps; - struct ib_device *ibdev = &hr_dev->ib_dev; - struct device *dev = &hr_dev->pdev->dev; - struct ib_cq_init_attr cq_init_attr; - struct ib_qp_attr attr = { 0 }; - struct hns_roce_qp *hr_qp; - struct ib_cq *cq; - struct ib_pd *pd; - union ib_gid dgid; - __be64 subnet_prefix; - int attr_mask = 0; - int ret; - int i, j; - u8 queue_en[HNS_ROCE_V1_RESV_QP] = { 0 }; - u8 phy_port; - u32 port = 0; - u8 sl; - - /* Reserved cq for loop qp */ - cq_init_attr.cqe = HNS_ROCE_MIN_WQE_NUM * 2; - cq_init_attr.comp_vector = 0; - - cq = rdma_zalloc_drv_obj(ibdev, ib_cq); - if (!cq) - return -ENOMEM; - - ret = hns_roce_create_cq(cq, &cq_init_attr, NULL); - if (ret) { - dev_err(dev, "Create cq for reserved loop qp failed!"); - goto alloc_cq_failed; - } - free_mr->mr_free_cq = to_hr_cq(cq); - free_mr->mr_free_cq->ib_cq.device = &hr_dev->ib_dev; - free_mr->mr_free_cq->ib_cq.uobject = NULL; - free_mr->mr_free_cq->ib_cq.comp_handler = NULL; - free_mr->mr_free_cq->ib_cq.event_handler = NULL; - free_mr->mr_free_cq->ib_cq.cq_context = NULL; - atomic_set(&free_mr->mr_free_cq->ib_cq.usecnt, 0); - - pd = rdma_zalloc_drv_obj(ibdev, ib_pd); - if (!pd) { - ret = -ENOMEM; - goto alloc_mem_failed; - } - - pd->device = ibdev; - ret = hns_roce_alloc_pd(pd, NULL); - if (ret) - goto alloc_pd_failed; - - free_mr->mr_free_pd = to_hr_pd(pd); - free_mr->mr_free_pd->ibpd.device = &hr_dev->ib_dev; - free_mr->mr_free_pd->ibpd.uobject = NULL; - free_mr->mr_free_pd->ibpd.__internal_mr = NULL; - atomic_set(&free_mr->mr_free_pd->ibpd.usecnt, 0); - - attr.qp_access_flags = IB_ACCESS_REMOTE_WRITE; - attr.pkey_index = 0; - attr.min_rnr_timer = 0; - /* Disable read ability */ - attr.max_dest_rd_atomic = 0; - attr.max_rd_atomic = 0; - /* Use arbitrary values as rq_psn and sq_psn */ - attr.rq_psn = 0x0808; - attr.sq_psn = 0x0808; - attr.retry_cnt = 7; - attr.rnr_retry = 7; - attr.timeout = 0x12; - attr.path_mtu = IB_MTU_256; - attr.ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE; - rdma_ah_set_grh(&attr.ah_attr, NULL, 0, 0, 1, 0); - rdma_ah_set_static_rate(&attr.ah_attr, 3); - - subnet_prefix = cpu_to_be64(0xfe80000000000000LL); - for (i = 0; i < HNS_ROCE_V1_RESV_QP; i++) { - phy_port = (i >= HNS_ROCE_MAX_PORTS) ? (i - 2) : - (i % HNS_ROCE_MAX_PORTS); - sl = i / HNS_ROCE_MAX_PORTS; - - for (j = 0; j < caps->num_ports; j++) { - if (hr_dev->iboe.phy_port[j] == phy_port) { - queue_en[i] = 1; - port = j; - break; - } - } - - if (!queue_en[i]) - continue; - - free_mr->mr_free_qp[i] = hns_roce_v1_create_lp_qp(hr_dev, pd); - if (!free_mr->mr_free_qp[i]) { - dev_err(dev, "Create loop qp failed!\n"); - ret = -ENOMEM; - goto create_lp_qp_failed; - } - hr_qp = free_mr->mr_free_qp[i]; - - hr_qp->port = port; - hr_qp->phy_port = phy_port; - hr_qp->ibqp.qp_type = IB_QPT_RC; - hr_qp->ibqp.device = &hr_dev->ib_dev; - hr_qp->ibqp.uobject = NULL; - atomic_set(&hr_qp->ibqp.usecnt, 0); - hr_qp->ibqp.pd = pd; - hr_qp->ibqp.recv_cq = cq; - hr_qp->ibqp.send_cq = cq; - - rdma_ah_set_port_num(&attr.ah_attr, port + 1); - rdma_ah_set_sl(&attr.ah_attr, sl); - attr.port_num = port + 1; - - attr.dest_qp_num = hr_qp->qpn; - memcpy(rdma_ah_retrieve_dmac(&attr.ah_attr), - hr_dev->dev_addr[port], - ETH_ALEN); - - memcpy(&dgid.raw, &subnet_prefix, sizeof(u64)); - memcpy(&dgid.raw[8], hr_dev->dev_addr[port], 3); - memcpy(&dgid.raw[13], hr_dev->dev_addr[port] + 3, 3); - dgid.raw[11] = 0xff; - dgid.raw[12] = 0xfe; - dgid.raw[8] ^= 2; - rdma_ah_set_dgid_raw(&attr.ah_attr, dgid.raw); - - ret = hr_dev->hw->modify_qp(&hr_qp->ibqp, &attr, attr_mask, - IB_QPS_RESET, IB_QPS_INIT); - if (ret) { - dev_err(dev, "modify qp failed(%d)!\n", ret); - goto create_lp_qp_failed; - } - - ret = hr_dev->hw->modify_qp(&hr_qp->ibqp, &attr, IB_QP_DEST_QPN, - IB_QPS_INIT, IB_QPS_RTR); - if (ret) { - dev_err(dev, "modify qp failed(%d)!\n", ret); - goto create_lp_qp_failed; - } - - ret = hr_dev->hw->modify_qp(&hr_qp->ibqp, &attr, attr_mask, - IB_QPS_RTR, IB_QPS_RTS); - if (ret) { - dev_err(dev, "modify qp failed(%d)!\n", ret); - goto create_lp_qp_failed; - } - } - - return 0; - -create_lp_qp_failed: - for (i -= 1; i >= 0; i--) { - hr_qp = free_mr->mr_free_qp[i]; - if (ib_destroy_qp(&hr_qp->ibqp)) - dev_err(dev, "Destroy qp %d for mr free failed!\n", i); - } - - hns_roce_dealloc_pd(pd, NULL); - -alloc_pd_failed: - kfree(pd); - -alloc_mem_failed: - hns_roce_destroy_cq(cq, NULL); -alloc_cq_failed: - kfree(cq); - return ret; -} - -static void hns_roce_v1_release_lp_qp(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_free_mr *free_mr = &priv->free_mr; - struct device *dev = &hr_dev->pdev->dev; - struct hns_roce_qp *hr_qp; - int ret; - int i; - - for (i = 0; i < HNS_ROCE_V1_RESV_QP; i++) { - hr_qp = free_mr->mr_free_qp[i]; - if (!hr_qp) - continue; - - ret = ib_destroy_qp(&hr_qp->ibqp); - if (ret) - dev_err(dev, "Destroy qp %d for mr free failed(%d)!\n", - i, ret); - } - - hns_roce_destroy_cq(&free_mr->mr_free_cq->ib_cq, NULL); - kfree(&free_mr->mr_free_cq->ib_cq); - hns_roce_dealloc_pd(&free_mr->mr_free_pd->ibpd, NULL); - kfree(&free_mr->mr_free_pd->ibpd); -} - -static int hns_roce_db_init(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_db_table *db = &priv->db_table; - struct device *dev = &hr_dev->pdev->dev; - u32 sdb_ext_mod; - u32 odb_ext_mod; - u32 sdb_evt_mod; - u32 odb_evt_mod; - int ret; - - memset(db, 0, sizeof(*db)); - - /* Default DB mode */ - sdb_ext_mod = HNS_ROCE_SDB_EXTEND_MODE; - odb_ext_mod = HNS_ROCE_ODB_EXTEND_MODE; - sdb_evt_mod = HNS_ROCE_SDB_NORMAL_MODE; - odb_evt_mod = HNS_ROCE_ODB_POLL_MODE; - - db->sdb_ext_mod = sdb_ext_mod; - db->odb_ext_mod = odb_ext_mod; - - /* Init extend DB */ - ret = hns_roce_db_ext_init(hr_dev, sdb_ext_mod, odb_ext_mod); - if (ret) { - dev_err(dev, "Failed in extend DB configuration.\n"); - return ret; - } - - hns_roce_set_db_event_mode(hr_dev, sdb_evt_mod, odb_evt_mod); - - return 0; -} - -static void hns_roce_v1_recreate_lp_qp_work_fn(struct work_struct *work) -{ - struct hns_roce_recreate_lp_qp_work *lp_qp_work; - struct hns_roce_dev *hr_dev; - - lp_qp_work = container_of(work, struct hns_roce_recreate_lp_qp_work, - work); - hr_dev = to_hr_dev(lp_qp_work->ib_dev); - - hns_roce_v1_release_lp_qp(hr_dev); - - if (hns_roce_v1_rsv_lp_qp(hr_dev)) - dev_err(&hr_dev->pdev->dev, "create reserver qp failed\n"); - - if (lp_qp_work->comp_flag) - complete(lp_qp_work->comp); - - kfree(lp_qp_work); -} - -static int hns_roce_v1_recreate_lp_qp(struct hns_roce_dev *hr_dev) -{ - long end = HNS_ROCE_V1_RECREATE_LP_QP_TIMEOUT_MSECS; - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_free_mr *free_mr = &priv->free_mr; - struct hns_roce_recreate_lp_qp_work *lp_qp_work; - struct device *dev = &hr_dev->pdev->dev; - struct completion comp; - - lp_qp_work = kzalloc(sizeof(struct hns_roce_recreate_lp_qp_work), - GFP_KERNEL); - if (!lp_qp_work) - return -ENOMEM; - - INIT_WORK(&(lp_qp_work->work), hns_roce_v1_recreate_lp_qp_work_fn); - - lp_qp_work->ib_dev = &(hr_dev->ib_dev); - lp_qp_work->comp = &comp; - lp_qp_work->comp_flag = 1; - - init_completion(lp_qp_work->comp); - - queue_work(free_mr->free_mr_wq, &(lp_qp_work->work)); - - while (end > 0) { - if (try_wait_for_completion(&comp)) - return 0; - msleep(HNS_ROCE_V1_RECREATE_LP_QP_WAIT_VALUE); - end -= HNS_ROCE_V1_RECREATE_LP_QP_WAIT_VALUE; - } - - lp_qp_work->comp_flag = 0; - if (try_wait_for_completion(&comp)) - return 0; - - dev_warn(dev, "recreate lp qp failed 20s timeout and return failed!\n"); - return -ETIMEDOUT; -} - -static int hns_roce_v1_send_lp_wqe(struct hns_roce_qp *hr_qp) -{ - struct hns_roce_dev *hr_dev = to_hr_dev(hr_qp->ibqp.device); - struct device *dev = &hr_dev->pdev->dev; - struct ib_send_wr send_wr; - const struct ib_send_wr *bad_wr; - int ret; - - memset(&send_wr, 0, sizeof(send_wr)); - send_wr.next = NULL; - send_wr.num_sge = 0; - send_wr.send_flags = 0; - send_wr.sg_list = NULL; - send_wr.wr_id = (unsigned long long)&send_wr; - send_wr.opcode = IB_WR_RDMA_WRITE; - - ret = hns_roce_v1_post_send(&hr_qp->ibqp, &send_wr, &bad_wr); - if (ret) { - dev_err(dev, "Post write wqe for mr free failed(%d)!", ret); - return ret; - } - - return 0; -} - -static void hns_roce_v1_mr_free_work_fn(struct work_struct *work) -{ - unsigned long end = - msecs_to_jiffies(HNS_ROCE_V1_FREE_MR_TIMEOUT_MSECS) + jiffies; - struct hns_roce_mr_free_work *mr_work = - container_of(work, struct hns_roce_mr_free_work, work); - struct hns_roce_dev *hr_dev = to_hr_dev(mr_work->ib_dev); - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_free_mr *free_mr = &priv->free_mr; - struct hns_roce_cq *mr_free_cq = free_mr->mr_free_cq; - struct hns_roce_mr *hr_mr = mr_work->mr; - struct device *dev = &hr_dev->pdev->dev; - struct ib_wc wc[HNS_ROCE_V1_RESV_QP]; - struct hns_roce_qp *hr_qp; - int ne = 0; - int ret; - int i; - - for (i = 0; i < HNS_ROCE_V1_RESV_QP; i++) { - hr_qp = free_mr->mr_free_qp[i]; - if (!hr_qp) - continue; - ne++; - - ret = hns_roce_v1_send_lp_wqe(hr_qp); - if (ret) { - dev_err(dev, - "Send wqe (qp:0x%lx) for mr free failed(%d)!\n", - hr_qp->qpn, ret); - goto free_work; - } - } - - if (!ne) { - dev_err(dev, "Reserved loop qp is absent!\n"); - goto free_work; - } - - do { - ret = hns_roce_v1_poll_cq(&mr_free_cq->ib_cq, ne, wc); - if (ret < 0 && hr_qp) { - dev_err(dev, - "(qp:0x%lx) starts, Poll cqe failed(%d) for mr 0x%x free! Remain %d cqe\n", - hr_qp->qpn, ret, hr_mr->key, ne); - goto free_work; - } - ne -= ret; - usleep_range(HNS_ROCE_V1_FREE_MR_WAIT_VALUE * 1000, - (1 + HNS_ROCE_V1_FREE_MR_WAIT_VALUE) * 1000); - } while (ne && time_before_eq(jiffies, end)); - - if (ne != 0) - dev_err(dev, - "Poll cqe for mr 0x%x free timeout! Remain %d cqe\n", - hr_mr->key, ne); - -free_work: - if (mr_work->comp_flag) - complete(mr_work->comp); - kfree(mr_work); -} - -static int hns_roce_v1_dereg_mr(struct hns_roce_dev *hr_dev, - struct hns_roce_mr *mr, struct ib_udata *udata) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_free_mr *free_mr = &priv->free_mr; - long end = HNS_ROCE_V1_FREE_MR_TIMEOUT_MSECS; - struct device *dev = &hr_dev->pdev->dev; - struct hns_roce_mr_free_work *mr_work; - unsigned long start = jiffies; - struct completion comp; - int ret = 0; - - if (mr->enabled) { - if (hns_roce_hw_destroy_mpt(hr_dev, NULL, - key_to_hw_index(mr->key) & - (hr_dev->caps.num_mtpts - 1))) - dev_warn(dev, "DESTROY_MPT failed!\n"); - } - - mr_work = kzalloc(sizeof(*mr_work), GFP_KERNEL); - if (!mr_work) { - ret = -ENOMEM; - goto free_mr; - } - - INIT_WORK(&(mr_work->work), hns_roce_v1_mr_free_work_fn); - - mr_work->ib_dev = &(hr_dev->ib_dev); - mr_work->comp = &comp; - mr_work->comp_flag = 1; - mr_work->mr = (void *)mr; - init_completion(mr_work->comp); - - queue_work(free_mr->free_mr_wq, &(mr_work->work)); - - while (end > 0) { - if (try_wait_for_completion(&comp)) - goto free_mr; - msleep(HNS_ROCE_V1_FREE_MR_WAIT_VALUE); - end -= HNS_ROCE_V1_FREE_MR_WAIT_VALUE; - } - - mr_work->comp_flag = 0; - if (try_wait_for_completion(&comp)) - goto free_mr; - - dev_warn(dev, "Free mr work 0x%x over 50s and failed!\n", mr->key); - ret = -ETIMEDOUT; - -free_mr: - dev_dbg(dev, "Free mr 0x%x use 0x%x us.\n", - mr->key, jiffies_to_usecs(jiffies) - jiffies_to_usecs(start)); - - ida_free(&hr_dev->mr_table.mtpt_ida.ida, (int)key_to_hw_index(mr->key)); - hns_roce_mtr_destroy(hr_dev, &mr->pbl_mtr); - kfree(mr); - - return ret; -} - -static void hns_roce_db_free(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_db_table *db = &priv->db_table; - struct device *dev = &hr_dev->pdev->dev; - - if (db->sdb_ext_mod) { - dma_free_coherent(dev, HNS_ROCE_V1_EXT_SDB_SIZE, - db->ext_db->sdb_buf_list->buf, - db->ext_db->sdb_buf_list->map); - kfree(db->ext_db->sdb_buf_list); - } - - if (db->odb_ext_mod) { - dma_free_coherent(dev, HNS_ROCE_V1_EXT_ODB_SIZE, - db->ext_db->odb_buf_list->buf, - db->ext_db->odb_buf_list->map); - kfree(db->ext_db->odb_buf_list); - } - - kfree(db->ext_db); -} - -static int hns_roce_raq_init(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_raq_table *raq = &priv->raq_table; - struct device *dev = &hr_dev->pdev->dev; - dma_addr_t addr; - int raq_shift; - __le32 tmp; - u32 val; - int ret; - - raq->e_raq_buf = kzalloc(sizeof(*(raq->e_raq_buf)), GFP_KERNEL); - if (!raq->e_raq_buf) - return -ENOMEM; - - raq->e_raq_buf->buf = dma_alloc_coherent(dev, HNS_ROCE_V1_RAQ_SIZE, - &addr, GFP_KERNEL); - if (!raq->e_raq_buf->buf) { - ret = -ENOMEM; - goto err_dma_alloc_raq; - } - raq->e_raq_buf->map = addr; - - /* Configure raq extended address. 48bit 4K align */ - roce_write(hr_dev, ROCEE_EXT_RAQ_REG, raq->e_raq_buf->map >> 12); - - /* Configure raq_shift */ - raq_shift = ilog2(HNS_ROCE_V1_RAQ_SIZE / HNS_ROCE_V1_RAQ_ENTRY); - val = roce_read(hr_dev, ROCEE_EXT_RAQ_H_REG); - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_EXT_RAQ_H_EXT_RAQ_SHIFT_M, - ROCEE_EXT_RAQ_H_EXT_RAQ_SHIFT_S, raq_shift); - /* - * 44 = 32 + 12, When evaluating addr to hardware, shift 12 because of - * using 4K page, and shift more 32 because of - * calculating the high 32 bit value evaluated to hardware. - */ - roce_set_field(tmp, ROCEE_EXT_RAQ_H_EXT_RAQ_BA_H_M, - ROCEE_EXT_RAQ_H_EXT_RAQ_BA_H_S, - raq->e_raq_buf->map >> 44); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_EXT_RAQ_H_REG, val); - dev_dbg(dev, "Configure raq_shift 0x%x.\n", val); - - /* Configure raq threshold */ - val = roce_read(hr_dev, ROCEE_RAQ_WL_REG); - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_RAQ_WL_ROCEE_RAQ_WL_M, - ROCEE_RAQ_WL_ROCEE_RAQ_WL_S, - HNS_ROCE_V1_EXT_RAQ_WF); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_RAQ_WL_REG, val); - dev_dbg(dev, "Configure raq_wl 0x%x.\n", val); - - /* Enable extend raq */ - val = roce_read(hr_dev, ROCEE_WRMS_POL_TIME_INTERVAL_REG); - tmp = cpu_to_le32(val); - roce_set_field(tmp, - ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_POL_TIME_INTERVAL_M, - ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_POL_TIME_INTERVAL_S, - POL_TIME_INTERVAL_VAL); - roce_set_bit(tmp, ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_EXT_RAQ_MODE, 1); - roce_set_field(tmp, - ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_RAQ_TIMEOUT_CHK_CFG_M, - ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_RAQ_TIMEOUT_CHK_CFG_S, - 2); - roce_set_bit(tmp, - ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_RAQ_TIMEOUT_CHK_EN_S, 1); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_WRMS_POL_TIME_INTERVAL_REG, val); - dev_dbg(dev, "Configure WrmsPolTimeInterval 0x%x.\n", val); - - /* Enable raq drop */ - val = roce_read(hr_dev, ROCEE_GLB_CFG_REG); - tmp = cpu_to_le32(val); - roce_set_bit(tmp, ROCEE_GLB_CFG_TRP_RAQ_DROP_EN_S, 1); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_GLB_CFG_REG, val); - dev_dbg(dev, "Configure GlbCfg = 0x%x.\n", val); - - return 0; - -err_dma_alloc_raq: - kfree(raq->e_raq_buf); - return ret; -} - -static void hns_roce_raq_free(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_raq_table *raq = &priv->raq_table; - struct device *dev = &hr_dev->pdev->dev; - - dma_free_coherent(dev, HNS_ROCE_V1_RAQ_SIZE, raq->e_raq_buf->buf, - raq->e_raq_buf->map); - kfree(raq->e_raq_buf); -} - -static void hns_roce_port_enable(struct hns_roce_dev *hr_dev, int enable_flag) -{ - __le32 tmp; - u32 val; - - if (enable_flag) { - val = roce_read(hr_dev, ROCEE_GLB_CFG_REG); - /* Open all ports */ - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_GLB_CFG_ROCEE_PORT_ST_M, - ROCEE_GLB_CFG_ROCEE_PORT_ST_S, - ALL_PORT_VAL_OPEN); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_GLB_CFG_REG, val); - } else { - val = roce_read(hr_dev, ROCEE_GLB_CFG_REG); - /* Close all ports */ - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_GLB_CFG_ROCEE_PORT_ST_M, - ROCEE_GLB_CFG_ROCEE_PORT_ST_S, 0x0); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_GLB_CFG_REG, val); - } -} - -static int hns_roce_bt_init(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct device *dev = &hr_dev->pdev->dev; - int ret; - - priv->bt_table.qpc_buf.buf = dma_alloc_coherent(dev, - HNS_ROCE_BT_RSV_BUF_SIZE, &priv->bt_table.qpc_buf.map, - GFP_KERNEL); - if (!priv->bt_table.qpc_buf.buf) - return -ENOMEM; - - priv->bt_table.mtpt_buf.buf = dma_alloc_coherent(dev, - HNS_ROCE_BT_RSV_BUF_SIZE, &priv->bt_table.mtpt_buf.map, - GFP_KERNEL); - if (!priv->bt_table.mtpt_buf.buf) { - ret = -ENOMEM; - goto err_failed_alloc_mtpt_buf; - } - - priv->bt_table.cqc_buf.buf = dma_alloc_coherent(dev, - HNS_ROCE_BT_RSV_BUF_SIZE, &priv->bt_table.cqc_buf.map, - GFP_KERNEL); - if (!priv->bt_table.cqc_buf.buf) { - ret = -ENOMEM; - goto err_failed_alloc_cqc_buf; - } - - return 0; - -err_failed_alloc_cqc_buf: - dma_free_coherent(dev, HNS_ROCE_BT_RSV_BUF_SIZE, - priv->bt_table.mtpt_buf.buf, priv->bt_table.mtpt_buf.map); - -err_failed_alloc_mtpt_buf: - dma_free_coherent(dev, HNS_ROCE_BT_RSV_BUF_SIZE, - priv->bt_table.qpc_buf.buf, priv->bt_table.qpc_buf.map); - - return ret; -} - -static void hns_roce_bt_free(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct device *dev = &hr_dev->pdev->dev; - - dma_free_coherent(dev, HNS_ROCE_BT_RSV_BUF_SIZE, - priv->bt_table.cqc_buf.buf, priv->bt_table.cqc_buf.map); - - dma_free_coherent(dev, HNS_ROCE_BT_RSV_BUF_SIZE, - priv->bt_table.mtpt_buf.buf, priv->bt_table.mtpt_buf.map); - - dma_free_coherent(dev, HNS_ROCE_BT_RSV_BUF_SIZE, - priv->bt_table.qpc_buf.buf, priv->bt_table.qpc_buf.map); -} - -static int hns_roce_tptr_init(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_buf_list *tptr_buf = &priv->tptr_table.tptr_buf; - struct device *dev = &hr_dev->pdev->dev; - - /* - * This buffer will be used for CQ's tptr(tail pointer), also - * named ci(customer index). Every CQ will use 2 bytes to save - * cqe ci in hip06. Hardware will read this area to get new ci - * when the queue is almost full. - */ - tptr_buf->buf = dma_alloc_coherent(dev, HNS_ROCE_V1_TPTR_BUF_SIZE, - &tptr_buf->map, GFP_KERNEL); - if (!tptr_buf->buf) - return -ENOMEM; - - hr_dev->tptr_dma_addr = tptr_buf->map; - hr_dev->tptr_size = HNS_ROCE_V1_TPTR_BUF_SIZE; - - return 0; -} - -static void hns_roce_tptr_free(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_buf_list *tptr_buf = &priv->tptr_table.tptr_buf; - struct device *dev = &hr_dev->pdev->dev; - - dma_free_coherent(dev, HNS_ROCE_V1_TPTR_BUF_SIZE, - tptr_buf->buf, tptr_buf->map); -} - -static int hns_roce_free_mr_init(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_free_mr *free_mr = &priv->free_mr; - struct device *dev = &hr_dev->pdev->dev; - int ret; - - free_mr->free_mr_wq = create_singlethread_workqueue("hns_roce_free_mr"); - if (!free_mr->free_mr_wq) { - dev_err(dev, "Create free mr workqueue failed!\n"); - return -ENOMEM; - } - - ret = hns_roce_v1_rsv_lp_qp(hr_dev); - if (ret) { - dev_err(dev, "Reserved loop qp failed(%d)!\n", ret); - destroy_workqueue(free_mr->free_mr_wq); - } - - return ret; -} - -static void hns_roce_free_mr_free(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_free_mr *free_mr = &priv->free_mr; - - destroy_workqueue(free_mr->free_mr_wq); - - hns_roce_v1_release_lp_qp(hr_dev); -} - -/** - * hns_roce_v1_reset - reset RoCE - * @hr_dev: RoCE device struct pointer - * @dereset: true -- drop reset, false -- reset - * return 0 - success , negative --fail - */ -static int hns_roce_v1_reset(struct hns_roce_dev *hr_dev, bool dereset) -{ - struct device_node *dsaf_node; - struct device *dev = &hr_dev->pdev->dev; - struct device_node *np = dev->of_node; - struct fwnode_handle *fwnode; - int ret; - - /* check if this is DT/ACPI case */ - if (dev_of_node(dev)) { - dsaf_node = of_parse_phandle(np, "dsaf-handle", 0); - if (!dsaf_node) { - dev_err(dev, "could not find dsaf-handle\n"); - return -EINVAL; - } - fwnode = &dsaf_node->fwnode; - } else if (is_acpi_device_node(dev->fwnode)) { - struct fwnode_reference_args args; - - ret = acpi_node_get_property_reference(dev->fwnode, - "dsaf-handle", 0, &args); - if (ret) { - dev_err(dev, "could not find dsaf-handle\n"); - return ret; - } - fwnode = args.fwnode; - } else { - dev_err(dev, "cannot read data from DT or ACPI\n"); - return -ENXIO; - } - - ret = hns_dsaf_roce_reset(fwnode, false); - if (ret) - return ret; - - if (dereset) { - msleep(SLEEP_TIME_INTERVAL); - ret = hns_dsaf_roce_reset(fwnode, true); - } - - return ret; -} - -static int hns_roce_v1_profile(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_caps *caps = &hr_dev->caps; - int i; - - hr_dev->vendor_id = roce_read(hr_dev, ROCEE_VENDOR_ID_REG); - hr_dev->vendor_part_id = roce_read(hr_dev, ROCEE_VENDOR_PART_ID_REG); - hr_dev->sys_image_guid = roce_read(hr_dev, ROCEE_SYS_IMAGE_GUID_L_REG) | - ((u64)roce_read(hr_dev, - ROCEE_SYS_IMAGE_GUID_H_REG) << 32); - hr_dev->hw_rev = HNS_ROCE_HW_VER1; - - caps->num_qps = HNS_ROCE_V1_MAX_QP_NUM; - caps->max_wqes = HNS_ROCE_V1_MAX_WQE_NUM; - caps->min_wqes = HNS_ROCE_MIN_WQE_NUM; - caps->num_cqs = HNS_ROCE_V1_MAX_CQ_NUM; - caps->min_cqes = HNS_ROCE_MIN_CQE_NUM; - caps->max_cqes = HNS_ROCE_V1_MAX_CQE_NUM; - caps->max_sq_sg = HNS_ROCE_V1_SG_NUM; - caps->max_rq_sg = HNS_ROCE_V1_SG_NUM; - caps->max_sq_inline = HNS_ROCE_V1_INLINE_SIZE; - caps->num_uars = HNS_ROCE_V1_UAR_NUM; - caps->phy_num_uars = HNS_ROCE_V1_PHY_UAR_NUM; - caps->num_aeq_vectors = HNS_ROCE_V1_AEQE_VEC_NUM; - caps->num_comp_vectors = HNS_ROCE_V1_COMP_VEC_NUM; - caps->num_other_vectors = HNS_ROCE_V1_ABNORMAL_VEC_NUM; - caps->num_mtpts = HNS_ROCE_V1_MAX_MTPT_NUM; - caps->num_mtt_segs = HNS_ROCE_V1_MAX_MTT_SEGS; - caps->num_pds = HNS_ROCE_V1_MAX_PD_NUM; - caps->max_qp_init_rdma = HNS_ROCE_V1_MAX_QP_INIT_RDMA; - caps->max_qp_dest_rdma = HNS_ROCE_V1_MAX_QP_DEST_RDMA; - caps->max_sq_desc_sz = HNS_ROCE_V1_MAX_SQ_DESC_SZ; - caps->max_rq_desc_sz = HNS_ROCE_V1_MAX_RQ_DESC_SZ; - caps->qpc_sz = HNS_ROCE_V1_QPC_SIZE; - caps->irrl_entry_sz = HNS_ROCE_V1_IRRL_ENTRY_SIZE; - caps->cqc_entry_sz = HNS_ROCE_V1_CQC_ENTRY_SIZE; - caps->mtpt_entry_sz = HNS_ROCE_V1_MTPT_ENTRY_SIZE; - caps->mtt_entry_sz = HNS_ROCE_V1_MTT_ENTRY_SIZE; - caps->cqe_sz = HNS_ROCE_V1_CQE_SIZE; - caps->page_size_cap = HNS_ROCE_V1_PAGE_SIZE_SUPPORT; - caps->reserved_lkey = 0; - caps->reserved_pds = 0; - caps->reserved_mrws = 1; - caps->reserved_uars = 0; - caps->reserved_cqs = 0; - caps->reserved_qps = 12; /* 2 SQP per port, six ports total 12 */ - caps->chunk_sz = HNS_ROCE_V1_TABLE_CHUNK_SIZE; - - for (i = 0; i < caps->num_ports; i++) - caps->pkey_table_len[i] = 1; - - for (i = 0; i < caps->num_ports; i++) { - /* Six ports shared 16 GID in v1 engine */ - if (i >= (HNS_ROCE_V1_GID_NUM % caps->num_ports)) - caps->gid_table_len[i] = HNS_ROCE_V1_GID_NUM / - caps->num_ports; - else - caps->gid_table_len[i] = HNS_ROCE_V1_GID_NUM / - caps->num_ports + 1; - } - - caps->ceqe_depth = HNS_ROCE_V1_COMP_EQE_NUM; - caps->aeqe_depth = HNS_ROCE_V1_ASYNC_EQE_NUM; - caps->local_ca_ack_delay = roce_read(hr_dev, ROCEE_ACK_DELAY_REG); - caps->max_mtu = IB_MTU_2048; - - return 0; -} - -static int hns_roce_v1_init(struct hns_roce_dev *hr_dev) -{ - int ret; - u32 val; - __le32 tmp; - struct device *dev = &hr_dev->pdev->dev; - - /* DMAE user config */ - val = roce_read(hr_dev, ROCEE_DMAE_USER_CFG1_REG); - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_DMAE_USER_CFG1_ROCEE_CACHE_TB_CFG_M, - ROCEE_DMAE_USER_CFG1_ROCEE_CACHE_TB_CFG_S, 0xf); - roce_set_field(tmp, ROCEE_DMAE_USER_CFG1_ROCEE_STREAM_ID_TB_CFG_M, - ROCEE_DMAE_USER_CFG1_ROCEE_STREAM_ID_TB_CFG_S, - 1 << PAGES_SHIFT_16); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_DMAE_USER_CFG1_REG, val); - - val = roce_read(hr_dev, ROCEE_DMAE_USER_CFG2_REG); - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_DMAE_USER_CFG2_ROCEE_CACHE_PKT_CFG_M, - ROCEE_DMAE_USER_CFG2_ROCEE_CACHE_PKT_CFG_S, 0xf); - roce_set_field(tmp, ROCEE_DMAE_USER_CFG2_ROCEE_STREAM_ID_PKT_CFG_M, - ROCEE_DMAE_USER_CFG2_ROCEE_STREAM_ID_PKT_CFG_S, - 1 << PAGES_SHIFT_16); - - ret = hns_roce_db_init(hr_dev); - if (ret) { - dev_err(dev, "doorbell init failed!\n"); - return ret; - } - - ret = hns_roce_raq_init(hr_dev); - if (ret) { - dev_err(dev, "raq init failed!\n"); - goto error_failed_raq_init; - } - - ret = hns_roce_bt_init(hr_dev); - if (ret) { - dev_err(dev, "bt init failed!\n"); - goto error_failed_bt_init; - } - - ret = hns_roce_tptr_init(hr_dev); - if (ret) { - dev_err(dev, "tptr init failed!\n"); - goto error_failed_tptr_init; - } - - ret = hns_roce_free_mr_init(hr_dev); - if (ret) { - dev_err(dev, "free mr init failed!\n"); - goto error_failed_free_mr_init; - } - - hns_roce_port_enable(hr_dev, HNS_ROCE_PORT_UP); - - return 0; - -error_failed_free_mr_init: - hns_roce_tptr_free(hr_dev); - -error_failed_tptr_init: - hns_roce_bt_free(hr_dev); - -error_failed_bt_init: - hns_roce_raq_free(hr_dev); - -error_failed_raq_init: - hns_roce_db_free(hr_dev); - return ret; -} - -static void hns_roce_v1_exit(struct hns_roce_dev *hr_dev) -{ - hns_roce_port_enable(hr_dev, HNS_ROCE_PORT_DOWN); - hns_roce_free_mr_free(hr_dev); - hns_roce_tptr_free(hr_dev); - hns_roce_bt_free(hr_dev); - hns_roce_raq_free(hr_dev); - hns_roce_db_free(hr_dev); -} - -static int hns_roce_v1_cmd_pending(struct hns_roce_dev *hr_dev) -{ - u32 status = readl(hr_dev->reg_base + ROCEE_MB6_REG); - - return (!!(status & (1 << HCR_GO_BIT))); -} - -static int hns_roce_v1_post_mbox(struct hns_roce_dev *hr_dev, u64 in_param, - u64 out_param, u32 in_modifier, u8 op_modifier, - u16 op, u16 token, int event) -{ - u32 __iomem *hcr = (u32 __iomem *)(hr_dev->reg_base + ROCEE_MB1_REG); - unsigned long end; - u32 val = 0; - __le32 tmp; - - end = msecs_to_jiffies(GO_BIT_TIMEOUT_MSECS) + jiffies; - while (hns_roce_v1_cmd_pending(hr_dev)) { - if (time_after(jiffies, end)) { - dev_err(hr_dev->dev, "jiffies=%d end=%d\n", - (int)jiffies, (int)end); - return -EAGAIN; - } - cond_resched(); - } - - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_MB6_ROCEE_MB_CMD_M, ROCEE_MB6_ROCEE_MB_CMD_S, - op); - roce_set_field(tmp, ROCEE_MB6_ROCEE_MB_CMD_MDF_M, - ROCEE_MB6_ROCEE_MB_CMD_MDF_S, op_modifier); - roce_set_bit(tmp, ROCEE_MB6_ROCEE_MB_EVENT_S, event); - roce_set_bit(tmp, ROCEE_MB6_ROCEE_MB_HW_RUN_S, 1); - roce_set_field(tmp, ROCEE_MB6_ROCEE_MB_TOKEN_M, - ROCEE_MB6_ROCEE_MB_TOKEN_S, token); - - val = le32_to_cpu(tmp); - writeq(in_param, hcr + 0); - writeq(out_param, hcr + 2); - writel(in_modifier, hcr + 4); - /* Memory barrier */ - wmb(); - - writel(val, hcr + 5); - - return 0; -} - -static int hns_roce_v1_chk_mbox(struct hns_roce_dev *hr_dev, - unsigned int timeout) -{ - u8 __iomem *hcr = hr_dev->reg_base + ROCEE_MB1_REG; - unsigned long end; - u32 status = 0; - - end = msecs_to_jiffies(timeout) + jiffies; - while (hns_roce_v1_cmd_pending(hr_dev) && time_before(jiffies, end)) - cond_resched(); - - if (hns_roce_v1_cmd_pending(hr_dev)) { - dev_err(hr_dev->dev, "[cmd_poll]hw run cmd TIMEDOUT!\n"); - return -ETIMEDOUT; - } - - status = le32_to_cpu((__force __le32) - __raw_readl(hcr + HCR_STATUS_OFFSET)); - if ((status & STATUS_MASK) != 0x1) { - dev_err(hr_dev->dev, "mailbox status 0x%x!\n", status); - return -EBUSY; - } - - return 0; -} - -static int hns_roce_v1_set_gid(struct hns_roce_dev *hr_dev, u32 port, - int gid_index, const union ib_gid *gid, - const struct ib_gid_attr *attr) -{ - unsigned long flags; - u32 *p = NULL; - u8 gid_idx; - - gid_idx = hns_get_gid_index(hr_dev, port, gid_index); - - spin_lock_irqsave(&hr_dev->iboe.lock, flags); - - p = (u32 *)&gid->raw[0]; - roce_raw_write(*p, hr_dev->reg_base + ROCEE_PORT_GID_L_0_REG + - (HNS_ROCE_V1_GID_NUM * gid_idx)); - - p = (u32 *)&gid->raw[4]; - roce_raw_write(*p, hr_dev->reg_base + ROCEE_PORT_GID_ML_0_REG + - (HNS_ROCE_V1_GID_NUM * gid_idx)); - - p = (u32 *)&gid->raw[8]; - roce_raw_write(*p, hr_dev->reg_base + ROCEE_PORT_GID_MH_0_REG + - (HNS_ROCE_V1_GID_NUM * gid_idx)); - - p = (u32 *)&gid->raw[0xc]; - roce_raw_write(*p, hr_dev->reg_base + ROCEE_PORT_GID_H_0_REG + - (HNS_ROCE_V1_GID_NUM * gid_idx)); - - spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); - - return 0; -} - -static int hns_roce_v1_set_mac(struct hns_roce_dev *hr_dev, u8 phy_port, - const u8 *addr) -{ - u32 reg_smac_l; - u16 reg_smac_h; - __le32 tmp; - u16 *p_h; - u32 *p; - u32 val; - - /* - * When mac changed, loopback may fail - * because of smac not equal to dmac. - * We Need to release and create reserved qp again. - */ - if (hr_dev->hw->dereg_mr) { - int ret; - - ret = hns_roce_v1_recreate_lp_qp(hr_dev); - if (ret && ret != -ETIMEDOUT) - return ret; - } - - p = (u32 *)(&addr[0]); - reg_smac_l = *p; - roce_raw_write(reg_smac_l, hr_dev->reg_base + ROCEE_SMAC_L_0_REG + - PHY_PORT_OFFSET * phy_port); - - val = roce_read(hr_dev, - ROCEE_SMAC_H_0_REG + phy_port * PHY_PORT_OFFSET); - tmp = cpu_to_le32(val); - p_h = (u16 *)(&addr[4]); - reg_smac_h = *p_h; - roce_set_field(tmp, ROCEE_SMAC_H_ROCEE_SMAC_H_M, - ROCEE_SMAC_H_ROCEE_SMAC_H_S, reg_smac_h); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_SMAC_H_0_REG + phy_port * PHY_PORT_OFFSET, - val); - - return 0; -} - -static void hns_roce_v1_set_mtu(struct hns_roce_dev *hr_dev, u8 phy_port, - enum ib_mtu mtu) -{ - __le32 tmp; - u32 val; - - val = roce_read(hr_dev, - ROCEE_SMAC_H_0_REG + phy_port * PHY_PORT_OFFSET); - tmp = cpu_to_le32(val); - roce_set_field(tmp, ROCEE_SMAC_H_ROCEE_PORT_MTU_M, - ROCEE_SMAC_H_ROCEE_PORT_MTU_S, mtu); - val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_SMAC_H_0_REG + phy_port * PHY_PORT_OFFSET, - val); -} - -static int hns_roce_v1_write_mtpt(struct hns_roce_dev *hr_dev, void *mb_buf, - struct hns_roce_mr *mr, - unsigned long mtpt_idx) -{ - u64 pages[HNS_ROCE_MAX_INNER_MTPT_NUM] = { 0 }; - struct ib_device *ibdev = &hr_dev->ib_dev; - struct hns_roce_v1_mpt_entry *mpt_entry; - dma_addr_t pbl_ba; - int count; - int i; - - /* MPT filled into mailbox buf */ - mpt_entry = (struct hns_roce_v1_mpt_entry *)mb_buf; - memset(mpt_entry, 0, sizeof(*mpt_entry)); - - roce_set_field(mpt_entry->mpt_byte_4, MPT_BYTE_4_KEY_STATE_M, - MPT_BYTE_4_KEY_STATE_S, KEY_VALID); - roce_set_field(mpt_entry->mpt_byte_4, MPT_BYTE_4_KEY_M, - MPT_BYTE_4_KEY_S, mr->key); - roce_set_field(mpt_entry->mpt_byte_4, MPT_BYTE_4_PAGE_SIZE_M, - MPT_BYTE_4_PAGE_SIZE_S, MR_SIZE_4K); - roce_set_bit(mpt_entry->mpt_byte_4, MPT_BYTE_4_MW_TYPE_S, 0); - roce_set_bit(mpt_entry->mpt_byte_4, MPT_BYTE_4_MW_BIND_ENABLE_S, - (mr->access & IB_ACCESS_MW_BIND ? 1 : 0)); - roce_set_bit(mpt_entry->mpt_byte_4, MPT_BYTE_4_OWN_S, 0); - roce_set_field(mpt_entry->mpt_byte_4, MPT_BYTE_4_MEMORY_LOCATION_TYPE_M, - MPT_BYTE_4_MEMORY_LOCATION_TYPE_S, mr->type); - roce_set_bit(mpt_entry->mpt_byte_4, MPT_BYTE_4_REMOTE_ATOMIC_S, 0); - roce_set_bit(mpt_entry->mpt_byte_4, MPT_BYTE_4_LOCAL_WRITE_S, - (mr->access & IB_ACCESS_LOCAL_WRITE ? 1 : 0)); - roce_set_bit(mpt_entry->mpt_byte_4, MPT_BYTE_4_REMOTE_WRITE_S, - (mr->access & IB_ACCESS_REMOTE_WRITE ? 1 : 0)); - roce_set_bit(mpt_entry->mpt_byte_4, MPT_BYTE_4_REMOTE_READ_S, - (mr->access & IB_ACCESS_REMOTE_READ ? 1 : 0)); - roce_set_bit(mpt_entry->mpt_byte_4, MPT_BYTE_4_REMOTE_INVAL_ENABLE_S, - 0); - roce_set_bit(mpt_entry->mpt_byte_4, MPT_BYTE_4_ADDRESS_TYPE_S, 0); - - roce_set_field(mpt_entry->mpt_byte_12, MPT_BYTE_12_PBL_ADDR_H_M, - MPT_BYTE_12_PBL_ADDR_H_S, 0); - roce_set_field(mpt_entry->mpt_byte_12, MPT_BYTE_12_MW_BIND_COUNTER_M, - MPT_BYTE_12_MW_BIND_COUNTER_S, 0); - - mpt_entry->virt_addr_l = cpu_to_le32((u32)mr->iova); - mpt_entry->virt_addr_h = cpu_to_le32((u32)(mr->iova >> 32)); - mpt_entry->length = cpu_to_le32((u32)mr->size); - - roce_set_field(mpt_entry->mpt_byte_28, MPT_BYTE_28_PD_M, - MPT_BYTE_28_PD_S, mr->pd); - roce_set_field(mpt_entry->mpt_byte_28, MPT_BYTE_28_L_KEY_IDX_L_M, - MPT_BYTE_28_L_KEY_IDX_L_S, mtpt_idx); - roce_set_field(mpt_entry->mpt_byte_64, MPT_BYTE_64_L_KEY_IDX_H_M, - MPT_BYTE_64_L_KEY_IDX_H_S, mtpt_idx >> MTPT_IDX_SHIFT); - - /* DMA memory register */ - if (mr->type == MR_TYPE_DMA) - return 0; - - count = hns_roce_mtr_find(hr_dev, &mr->pbl_mtr, 0, pages, - ARRAY_SIZE(pages), &pbl_ba); - if (count < 1) { - ibdev_err(ibdev, "failed to find PBL mtr, count = %d.", count); - return -ENOBUFS; - } - - /* Register user mr */ - for (i = 0; i < count; i++) { - switch (i) { - case 0: - mpt_entry->pa0_l = cpu_to_le32((u32)(pages[i])); - roce_set_field(mpt_entry->mpt_byte_36, - MPT_BYTE_36_PA0_H_M, - MPT_BYTE_36_PA0_H_S, - (u32)(pages[i] >> PAGES_SHIFT_32)); - break; - case 1: - roce_set_field(mpt_entry->mpt_byte_36, - MPT_BYTE_36_PA1_L_M, - MPT_BYTE_36_PA1_L_S, (u32)(pages[i])); - roce_set_field(mpt_entry->mpt_byte_40, - MPT_BYTE_40_PA1_H_M, - MPT_BYTE_40_PA1_H_S, - (u32)(pages[i] >> PAGES_SHIFT_24)); - break; - case 2: - roce_set_field(mpt_entry->mpt_byte_40, - MPT_BYTE_40_PA2_L_M, - MPT_BYTE_40_PA2_L_S, (u32)(pages[i])); - roce_set_field(mpt_entry->mpt_byte_44, - MPT_BYTE_44_PA2_H_M, - MPT_BYTE_44_PA2_H_S, - (u32)(pages[i] >> PAGES_SHIFT_16)); - break; - case 3: - roce_set_field(mpt_entry->mpt_byte_44, - MPT_BYTE_44_PA3_L_M, - MPT_BYTE_44_PA3_L_S, (u32)(pages[i])); - roce_set_field(mpt_entry->mpt_byte_48, - MPT_BYTE_48_PA3_H_M, - MPT_BYTE_48_PA3_H_S, - (u32)(pages[i] >> PAGES_SHIFT_8)); - break; - case 4: - mpt_entry->pa4_l = cpu_to_le32((u32)(pages[i])); - roce_set_field(mpt_entry->mpt_byte_56, - MPT_BYTE_56_PA4_H_M, - MPT_BYTE_56_PA4_H_S, - (u32)(pages[i] >> PAGES_SHIFT_32)); - break; - case 5: - roce_set_field(mpt_entry->mpt_byte_56, - MPT_BYTE_56_PA5_L_M, - MPT_BYTE_56_PA5_L_S, (u32)(pages[i])); - roce_set_field(mpt_entry->mpt_byte_60, - MPT_BYTE_60_PA5_H_M, - MPT_BYTE_60_PA5_H_S, - (u32)(pages[i] >> PAGES_SHIFT_24)); - break; - case 6: - roce_set_field(mpt_entry->mpt_byte_60, - MPT_BYTE_60_PA6_L_M, - MPT_BYTE_60_PA6_L_S, (u32)(pages[i])); - roce_set_field(mpt_entry->mpt_byte_64, - MPT_BYTE_64_PA6_H_M, - MPT_BYTE_64_PA6_H_S, - (u32)(pages[i] >> PAGES_SHIFT_16)); - break; - default: - break; - } - } - - mpt_entry->pbl_addr_l = cpu_to_le32(pbl_ba); - roce_set_field(mpt_entry->mpt_byte_12, MPT_BYTE_12_PBL_ADDR_H_M, - MPT_BYTE_12_PBL_ADDR_H_S, upper_32_bits(pbl_ba)); - - return 0; -} - -static void *get_cqe(struct hns_roce_cq *hr_cq, int n) -{ - return hns_roce_buf_offset(hr_cq->mtr.kmem, n * HNS_ROCE_V1_CQE_SIZE); -} - -static void *get_sw_cqe(struct hns_roce_cq *hr_cq, int n) -{ - struct hns_roce_cqe *hr_cqe = get_cqe(hr_cq, n & hr_cq->ib_cq.cqe); - - /* Get cqe when Owner bit is Conversely with the MSB of cons_idx */ - return (roce_get_bit(hr_cqe->cqe_byte_4, CQE_BYTE_4_OWNER_S) ^ - !!(n & hr_cq->cq_depth)) ? hr_cqe : NULL; -} - -static struct hns_roce_cqe *next_cqe_sw(struct hns_roce_cq *hr_cq) -{ - return get_sw_cqe(hr_cq, hr_cq->cons_index); -} - -static void hns_roce_v1_cq_set_ci(struct hns_roce_cq *hr_cq, u32 cons_index) -{ - __le32 doorbell[2]; - - doorbell[0] = cpu_to_le32(cons_index & ((hr_cq->cq_depth << 1) - 1)); - doorbell[1] = 0; - roce_set_bit(doorbell[1], ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_HW_SYNS_S, 1); - roce_set_field(doorbell[1], ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_M, - ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_S, 3); - roce_set_field(doorbell[1], ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_MDF_M, - ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_MDF_S, 0); - roce_set_field(doorbell[1], ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_INP_H_M, - ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_INP_H_S, hr_cq->cqn); - - hns_roce_write64_k(doorbell, hr_cq->db_reg); -} - -static void __hns_roce_v1_cq_clean(struct hns_roce_cq *hr_cq, u32 qpn, - struct hns_roce_srq *srq) -{ - struct hns_roce_cqe *cqe, *dest; - u32 prod_index; - int nfreed = 0; - u8 owner_bit; - - for (prod_index = hr_cq->cons_index; get_sw_cqe(hr_cq, prod_index); - ++prod_index) { - if (prod_index == hr_cq->cons_index + hr_cq->ib_cq.cqe) - break; - } - - /* - * Now backwards through the CQ, removing CQ entries - * that match our QP by overwriting them with next entries. - */ - while ((int) --prod_index - (int) hr_cq->cons_index >= 0) { - cqe = get_cqe(hr_cq, prod_index & hr_cq->ib_cq.cqe); - if ((roce_get_field(cqe->cqe_byte_16, CQE_BYTE_16_LOCAL_QPN_M, - CQE_BYTE_16_LOCAL_QPN_S) & - HNS_ROCE_CQE_QPN_MASK) == qpn) { - /* In v1 engine, not support SRQ */ - ++nfreed; - } else if (nfreed) { - dest = get_cqe(hr_cq, (prod_index + nfreed) & - hr_cq->ib_cq.cqe); - owner_bit = roce_get_bit(dest->cqe_byte_4, - CQE_BYTE_4_OWNER_S); - memcpy(dest, cqe, sizeof(*cqe)); - roce_set_bit(dest->cqe_byte_4, CQE_BYTE_4_OWNER_S, - owner_bit); - } - } - - if (nfreed) { - hr_cq->cons_index += nfreed; - hns_roce_v1_cq_set_ci(hr_cq, hr_cq->cons_index); - } -} - -static void hns_roce_v1_cq_clean(struct hns_roce_cq *hr_cq, u32 qpn, - struct hns_roce_srq *srq) -{ - spin_lock_irq(&hr_cq->lock); - __hns_roce_v1_cq_clean(hr_cq, qpn, srq); - spin_unlock_irq(&hr_cq->lock); -} - -static void hns_roce_v1_write_cqc(struct hns_roce_dev *hr_dev, - struct hns_roce_cq *hr_cq, void *mb_buf, - u64 *mtts, dma_addr_t dma_handle) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct hns_roce_buf_list *tptr_buf = &priv->tptr_table.tptr_buf; - struct hns_roce_cq_context *cq_context = mb_buf; - dma_addr_t tptr_dma_addr; - int offset; - - memset(cq_context, 0, sizeof(*cq_context)); - - /* Get the tptr for this CQ. */ - offset = hr_cq->cqn * HNS_ROCE_V1_TPTR_ENTRY_SIZE; - tptr_dma_addr = tptr_buf->map + offset; - hr_cq->tptr_addr = (u16 *)(tptr_buf->buf + offset); - - /* Register cq_context members */ - roce_set_field(cq_context->cqc_byte_4, - CQ_CONTEXT_CQC_BYTE_4_CQC_STATE_M, - CQ_CONTEXT_CQC_BYTE_4_CQC_STATE_S, CQ_STATE_VALID); - roce_set_field(cq_context->cqc_byte_4, CQ_CONTEXT_CQC_BYTE_4_CQN_M, - CQ_CONTEXT_CQC_BYTE_4_CQN_S, hr_cq->cqn); - - cq_context->cq_bt_l = cpu_to_le32((u32)dma_handle); - - roce_set_field(cq_context->cqc_byte_12, - CQ_CONTEXT_CQC_BYTE_12_CQ_BT_H_M, - CQ_CONTEXT_CQC_BYTE_12_CQ_BT_H_S, - ((u64)dma_handle >> 32)); - roce_set_field(cq_context->cqc_byte_12, - CQ_CONTEXT_CQC_BYTE_12_CQ_CQE_SHIFT_M, - CQ_CONTEXT_CQC_BYTE_12_CQ_CQE_SHIFT_S, - ilog2(hr_cq->cq_depth)); - roce_set_field(cq_context->cqc_byte_12, CQ_CONTEXT_CQC_BYTE_12_CEQN_M, - CQ_CONTEXT_CQC_BYTE_12_CEQN_S, hr_cq->vector); - - cq_context->cur_cqe_ba0_l = cpu_to_le32((u32)(mtts[0])); - - roce_set_field(cq_context->cqc_byte_20, - CQ_CONTEXT_CQC_BYTE_20_CUR_CQE_BA0_H_M, - CQ_CONTEXT_CQC_BYTE_20_CUR_CQE_BA0_H_S, (mtts[0]) >> 32); - /* Dedicated hardware, directly set 0 */ - roce_set_field(cq_context->cqc_byte_20, - CQ_CONTEXT_CQC_BYTE_20_CQ_CUR_INDEX_M, - CQ_CONTEXT_CQC_BYTE_20_CQ_CUR_INDEX_S, 0); - /** - * 44 = 32 + 12, When evaluating addr to hardware, shift 12 because of - * using 4K page, and shift more 32 because of - * calculating the high 32 bit value evaluated to hardware. - */ - roce_set_field(cq_context->cqc_byte_20, - CQ_CONTEXT_CQC_BYTE_20_CQE_TPTR_ADDR_H_M, - CQ_CONTEXT_CQC_BYTE_20_CQE_TPTR_ADDR_H_S, - tptr_dma_addr >> 44); - - cq_context->cqe_tptr_addr_l = cpu_to_le32((u32)(tptr_dma_addr >> 12)); - - roce_set_field(cq_context->cqc_byte_32, - CQ_CONTEXT_CQC_BYTE_32_CUR_CQE_BA1_H_M, - CQ_CONTEXT_CQC_BYTE_32_CUR_CQE_BA1_H_S, 0); - roce_set_bit(cq_context->cqc_byte_32, - CQ_CONTEXT_CQC_BYTE_32_SE_FLAG_S, 0); - roce_set_bit(cq_context->cqc_byte_32, - CQ_CONTEXT_CQC_BYTE_32_CE_FLAG_S, 0); - roce_set_bit(cq_context->cqc_byte_32, - CQ_CONTEXT_CQC_BYTE_32_NOTIFICATION_FLAG_S, 0); - roce_set_bit(cq_context->cqc_byte_32, - CQ_CQNTEXT_CQC_BYTE_32_TYPE_OF_COMPLETION_NOTIFICATION_S, - 0); - /* The initial value of cq's ci is 0 */ - roce_set_field(cq_context->cqc_byte_32, - CQ_CONTEXT_CQC_BYTE_32_CQ_CONS_IDX_M, - CQ_CONTEXT_CQC_BYTE_32_CQ_CONS_IDX_S, 0); -} - -static int hns_roce_v1_req_notify_cq(struct ib_cq *ibcq, - enum ib_cq_notify_flags flags) -{ - struct hns_roce_cq *hr_cq = to_hr_cq(ibcq); - u32 notification_flag; - __le32 doorbell[2] = {}; - - notification_flag = (flags & IB_CQ_SOLICITED_MASK) == - IB_CQ_SOLICITED ? CQ_DB_REQ_NOT : CQ_DB_REQ_NOT_SOL; - /* - * flags = 0; Notification Flag = 1, next - * flags = 1; Notification Flag = 0, solocited - */ - doorbell[0] = - cpu_to_le32(hr_cq->cons_index & ((hr_cq->cq_depth << 1) - 1)); - roce_set_bit(doorbell[1], ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_HW_SYNS_S, 1); - roce_set_field(doorbell[1], ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_M, - ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_S, 3); - roce_set_field(doorbell[1], ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_MDF_M, - ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_CMD_MDF_S, 1); - roce_set_field(doorbell[1], ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_INP_H_M, - ROCEE_DB_OTHERS_H_ROCEE_DB_OTH_INP_H_S, - hr_cq->cqn | notification_flag); - - hns_roce_write64_k(doorbell, hr_cq->db_reg); - - return 0; -} - -static int hns_roce_v1_poll_one(struct hns_roce_cq *hr_cq, - struct hns_roce_qp **cur_qp, struct ib_wc *wc) -{ - int qpn; - int is_send; - u16 wqe_ctr; - u32 status; - u32 opcode; - struct hns_roce_cqe *cqe; - struct hns_roce_qp *hr_qp; - struct hns_roce_wq *wq; - struct hns_roce_wqe_ctrl_seg *sq_wqe; - struct hns_roce_dev *hr_dev = to_hr_dev(hr_cq->ib_cq.device); - struct device *dev = &hr_dev->pdev->dev; - - /* Find cqe according consumer index */ - cqe = next_cqe_sw(hr_cq); - if (!cqe) - return -EAGAIN; - - ++hr_cq->cons_index; - /* Memory barrier */ - rmb(); - /* 0->SQ, 1->RQ */ - is_send = !(roce_get_bit(cqe->cqe_byte_4, CQE_BYTE_4_SQ_RQ_FLAG_S)); - - /* Local_qpn in UD cqe is always 1, so it needs to compute new qpn */ - if (roce_get_field(cqe->cqe_byte_16, CQE_BYTE_16_LOCAL_QPN_M, - CQE_BYTE_16_LOCAL_QPN_S) <= 1) { - qpn = roce_get_field(cqe->cqe_byte_20, CQE_BYTE_20_PORT_NUM_M, - CQE_BYTE_20_PORT_NUM_S) + - roce_get_field(cqe->cqe_byte_16, CQE_BYTE_16_LOCAL_QPN_M, - CQE_BYTE_16_LOCAL_QPN_S) * - HNS_ROCE_MAX_PORTS; - } else { - qpn = roce_get_field(cqe->cqe_byte_16, CQE_BYTE_16_LOCAL_QPN_M, - CQE_BYTE_16_LOCAL_QPN_S); - } - - if (!*cur_qp || (qpn & HNS_ROCE_CQE_QPN_MASK) != (*cur_qp)->qpn) { - hr_qp = __hns_roce_qp_lookup(hr_dev, qpn); - if (unlikely(!hr_qp)) { - dev_err(dev, "CQ %06lx with entry for unknown QPN %06x\n", - hr_cq->cqn, (qpn & HNS_ROCE_CQE_QPN_MASK)); - return -EINVAL; - } - - *cur_qp = hr_qp; - } - - wc->qp = &(*cur_qp)->ibqp; - wc->vendor_err = 0; - - status = roce_get_field(cqe->cqe_byte_4, - CQE_BYTE_4_STATUS_OF_THE_OPERATION_M, - CQE_BYTE_4_STATUS_OF_THE_OPERATION_S) & - HNS_ROCE_CQE_STATUS_MASK; - switch (status) { - case HNS_ROCE_CQE_SUCCESS: - wc->status = IB_WC_SUCCESS; - break; - case HNS_ROCE_CQE_SYNDROME_LOCAL_LENGTH_ERR: - wc->status = IB_WC_LOC_LEN_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_LOCAL_QP_OP_ERR: - wc->status = IB_WC_LOC_QP_OP_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_LOCAL_PROT_ERR: - wc->status = IB_WC_LOC_PROT_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_WR_FLUSH_ERR: - wc->status = IB_WC_WR_FLUSH_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_MEM_MANAGE_OPERATE_ERR: - wc->status = IB_WC_MW_BIND_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_BAD_RESP_ERR: - wc->status = IB_WC_BAD_RESP_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_LOCAL_ACCESS_ERR: - wc->status = IB_WC_LOC_ACCESS_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR: - wc->status = IB_WC_REM_INV_REQ_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_REMOTE_ACCESS_ERR: - wc->status = IB_WC_REM_ACCESS_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_REMOTE_OP_ERR: - wc->status = IB_WC_REM_OP_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR: - wc->status = IB_WC_RETRY_EXC_ERR; - break; - case HNS_ROCE_CQE_SYNDROME_RNR_RETRY_EXC_ERR: - wc->status = IB_WC_RNR_RETRY_EXC_ERR; - break; - default: - wc->status = IB_WC_GENERAL_ERR; - break; - } - - /* CQE status error, directly return */ - if (wc->status != IB_WC_SUCCESS) - return 0; - - if (is_send) { - /* SQ conrespond to CQE */ - sq_wqe = hns_roce_get_send_wqe(*cur_qp, - roce_get_field(cqe->cqe_byte_4, - CQE_BYTE_4_WQE_INDEX_M, - CQE_BYTE_4_WQE_INDEX_S) & - ((*cur_qp)->sq.wqe_cnt-1)); - switch (le32_to_cpu(sq_wqe->flag) & HNS_ROCE_WQE_OPCODE_MASK) { - case HNS_ROCE_WQE_OPCODE_SEND: - wc->opcode = IB_WC_SEND; - break; - case HNS_ROCE_WQE_OPCODE_RDMA_READ: - wc->opcode = IB_WC_RDMA_READ; - wc->byte_len = le32_to_cpu(cqe->byte_cnt); - break; - case HNS_ROCE_WQE_OPCODE_RDMA_WRITE: - wc->opcode = IB_WC_RDMA_WRITE; - break; - case HNS_ROCE_WQE_OPCODE_LOCAL_INV: - wc->opcode = IB_WC_LOCAL_INV; - break; - case HNS_ROCE_WQE_OPCODE_UD_SEND: - wc->opcode = IB_WC_SEND; - break; - default: - wc->status = IB_WC_GENERAL_ERR; - break; - } - wc->wc_flags = (le32_to_cpu(sq_wqe->flag) & HNS_ROCE_WQE_IMM ? - IB_WC_WITH_IMM : 0); - - wq = &(*cur_qp)->sq; - if ((*cur_qp)->sq_signal_bits) { - /* - * If sg_signal_bit is 1, - * firstly tail pointer updated to wqe - * which current cqe correspond to - */ - wqe_ctr = (u16)roce_get_field(cqe->cqe_byte_4, - CQE_BYTE_4_WQE_INDEX_M, - CQE_BYTE_4_WQE_INDEX_S); - wq->tail += (wqe_ctr - (u16)wq->tail) & - (wq->wqe_cnt - 1); - } - wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)]; - ++wq->tail; - } else { - /* RQ conrespond to CQE */ - wc->byte_len = le32_to_cpu(cqe->byte_cnt); - opcode = roce_get_field(cqe->cqe_byte_4, - CQE_BYTE_4_OPERATION_TYPE_M, - CQE_BYTE_4_OPERATION_TYPE_S) & - HNS_ROCE_CQE_OPCODE_MASK; - switch (opcode) { - case HNS_ROCE_OPCODE_RDMA_WITH_IMM_RECEIVE: - wc->opcode = IB_WC_RECV_RDMA_WITH_IMM; - wc->wc_flags = IB_WC_WITH_IMM; - wc->ex.imm_data = - cpu_to_be32(le32_to_cpu(cqe->immediate_data)); - break; - case HNS_ROCE_OPCODE_SEND_DATA_RECEIVE: - if (roce_get_bit(cqe->cqe_byte_4, - CQE_BYTE_4_IMM_INDICATOR_S)) { - wc->opcode = IB_WC_RECV; - wc->wc_flags = IB_WC_WITH_IMM; - wc->ex.imm_data = cpu_to_be32( - le32_to_cpu(cqe->immediate_data)); - } else { - wc->opcode = IB_WC_RECV; - wc->wc_flags = 0; - } - break; - default: - wc->status = IB_WC_GENERAL_ERR; - break; - } - - /* Update tail pointer, record wr_id */ - wq = &(*cur_qp)->rq; - wc->wr_id = wq->wrid[wq->tail & (wq->wqe_cnt - 1)]; - ++wq->tail; - wc->sl = (u8)roce_get_field(cqe->cqe_byte_20, CQE_BYTE_20_SL_M, - CQE_BYTE_20_SL_S); - wc->src_qp = (u8)roce_get_field(cqe->cqe_byte_20, - CQE_BYTE_20_REMOTE_QPN_M, - CQE_BYTE_20_REMOTE_QPN_S); - wc->wc_flags |= (roce_get_bit(cqe->cqe_byte_20, - CQE_BYTE_20_GRH_PRESENT_S) ? - IB_WC_GRH : 0); - wc->pkey_index = (u16)roce_get_field(cqe->cqe_byte_28, - CQE_BYTE_28_P_KEY_IDX_M, - CQE_BYTE_28_P_KEY_IDX_S); - } - - return 0; -} - -int hns_roce_v1_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc) -{ - struct hns_roce_cq *hr_cq = to_hr_cq(ibcq); - struct hns_roce_qp *cur_qp = NULL; - unsigned long flags; - int npolled; - int ret; - - spin_lock_irqsave(&hr_cq->lock, flags); - - for (npolled = 0; npolled < num_entries; ++npolled) { - ret = hns_roce_v1_poll_one(hr_cq, &cur_qp, wc + npolled); - if (ret) - break; - } - - if (npolled) { - *hr_cq->tptr_addr = hr_cq->cons_index & - ((hr_cq->cq_depth << 1) - 1); - - hns_roce_v1_cq_set_ci(hr_cq, hr_cq->cons_index); - } - - spin_unlock_irqrestore(&hr_cq->lock, flags); - - if (ret == 0 || ret == -EAGAIN) - return npolled; - else - return ret; -} - -static int hns_roce_v1_clear_hem(struct hns_roce_dev *hr_dev, - struct hns_roce_hem_table *table, int obj, - int step_idx) -{ - struct hns_roce_v1_priv *priv = hr_dev->priv; - struct device *dev = &hr_dev->pdev->dev; - long end = HW_SYNC_TIMEOUT_MSECS; - __le32 bt_cmd_val[2] = {0}; - unsigned long flags = 0; - void __iomem *bt_cmd; - u64 bt_ba = 0; - - switch (table->type) { - case HEM_TYPE_QPC: - bt_ba = priv->bt_table.qpc_buf.map >> 12; - break; - case HEM_TYPE_MTPT: - bt_ba = priv->bt_table.mtpt_buf.map >> 12; - break; - case HEM_TYPE_CQC: - bt_ba = priv->bt_table.cqc_buf.map >> 12; - break; - case HEM_TYPE_SRQC: - dev_dbg(dev, "HEM_TYPE_SRQC not support.\n"); - return -EINVAL; - default: - return 0; - } - roce_set_field(bt_cmd_val[1], ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_M, - ROCEE_BT_CMD_H_ROCEE_BT_CMD_MDF_S, table->type); - roce_set_field(bt_cmd_val[1], ROCEE_BT_CMD_H_ROCEE_BT_CMD_IN_MDF_M, - ROCEE_BT_CMD_H_ROCEE_BT_CMD_IN_MDF_S, obj); - roce_set_bit(bt_cmd_val[1], ROCEE_BT_CMD_H_ROCEE_BT_CMD_S, 0); - roce_set_bit(bt_cmd_val[1], ROCEE_BT_CMD_H_ROCEE_BT_CMD_HW_SYNS_S, 1); - - spin_lock_irqsave(&hr_dev->bt_cmd_lock, flags); - - bt_cmd = hr_dev->reg_base + ROCEE_BT_CMD_H_REG; - - while (1) { - if (readl(bt_cmd) >> BT_CMD_SYNC_SHIFT) { - if (!end) { - dev_err(dev, "Write bt_cmd err,hw_sync is not zero.\n"); - spin_unlock_irqrestore(&hr_dev->bt_cmd_lock, - flags); - return -EBUSY; - } - } else { - break; - } - mdelay(HW_SYNC_SLEEP_TIME_INTERVAL); - end -= HW_SYNC_SLEEP_TIME_INTERVAL; - } - - bt_cmd_val[0] = cpu_to_le32(bt_ba); - roce_set_field(bt_cmd_val[1], ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_M, - ROCEE_BT_CMD_H_ROCEE_BT_CMD_BA_H_S, bt_ba >> 32); - hns_roce_write64_k(bt_cmd_val, hr_dev->reg_base + ROCEE_BT_CMD_L_REG); - - spin_unlock_irqrestore(&hr_dev->bt_cmd_lock, flags); - - return 0; -} - -static int hns_roce_v1_qp_modify(struct hns_roce_dev *hr_dev, - enum hns_roce_qp_state cur_state, - enum hns_roce_qp_state new_state, - struct hns_roce_qp_context *context, - struct hns_roce_qp *hr_qp) -{ - static const u16 - op[HNS_ROCE_QP_NUM_STATE][HNS_ROCE_QP_NUM_STATE] = { - [HNS_ROCE_QP_STATE_RST] = { - [HNS_ROCE_QP_STATE_RST] = HNS_ROCE_CMD_2RST_QP, - [HNS_ROCE_QP_STATE_ERR] = HNS_ROCE_CMD_2ERR_QP, - [HNS_ROCE_QP_STATE_INIT] = HNS_ROCE_CMD_RST2INIT_QP, - }, - [HNS_ROCE_QP_STATE_INIT] = { - [HNS_ROCE_QP_STATE_RST] = HNS_ROCE_CMD_2RST_QP, - [HNS_ROCE_QP_STATE_ERR] = HNS_ROCE_CMD_2ERR_QP, - /* Note: In v1 engine, HW doesn't support RST2INIT. - * We use RST2INIT cmd instead of INIT2INIT. - */ - [HNS_ROCE_QP_STATE_INIT] = HNS_ROCE_CMD_RST2INIT_QP, - [HNS_ROCE_QP_STATE_RTR] = HNS_ROCE_CMD_INIT2RTR_QP, - }, - [HNS_ROCE_QP_STATE_RTR] = { - [HNS_ROCE_QP_STATE_RST] = HNS_ROCE_CMD_2RST_QP, - [HNS_ROCE_QP_STATE_ERR] = HNS_ROCE_CMD_2ERR_QP, - [HNS_ROCE_QP_STATE_RTS] = HNS_ROCE_CMD_RTR2RTS_QP, - }, - [HNS_ROCE_QP_STATE_RTS] = { - [HNS_ROCE_QP_STATE_RST] = HNS_ROCE_CMD_2RST_QP, - [HNS_ROCE_QP_STATE_ERR] = HNS_ROCE_CMD_2ERR_QP, - [HNS_ROCE_QP_STATE_RTS] = HNS_ROCE_CMD_RTS2RTS_QP, - [HNS_ROCE_QP_STATE_SQD] = HNS_ROCE_CMD_RTS2SQD_QP, - }, - [HNS_ROCE_QP_STATE_SQD] = { - [HNS_ROCE_QP_STATE_RST] = HNS_ROCE_CMD_2RST_QP, - [HNS_ROCE_QP_STATE_ERR] = HNS_ROCE_CMD_2ERR_QP, - [HNS_ROCE_QP_STATE_RTS] = HNS_ROCE_CMD_SQD2RTS_QP, - [HNS_ROCE_QP_STATE_SQD] = HNS_ROCE_CMD_SQD2SQD_QP, - }, - [HNS_ROCE_QP_STATE_ERR] = { - [HNS_ROCE_QP_STATE_RST] = HNS_ROCE_CMD_2RST_QP, - [HNS_ROCE_QP_STATE_ERR] = HNS_ROCE_CMD_2ERR_QP, - } - }; - - struct hns_roce_cmd_mailbox *mailbox; - struct device *dev = &hr_dev->pdev->dev; - int ret; - - if (cur_state >= HNS_ROCE_QP_NUM_STATE || - new_state >= HNS_ROCE_QP_NUM_STATE || - !op[cur_state][new_state]) { - dev_err(dev, "[modify_qp]not support state %d to %d\n", - cur_state, new_state); - return -EINVAL; - } - - if (op[cur_state][new_state] == HNS_ROCE_CMD_2RST_QP) - return hns_roce_cmd_mbox(hr_dev, 0, 0, hr_qp->qpn, 2, - HNS_ROCE_CMD_2RST_QP, - HNS_ROCE_CMD_TIMEOUT_MSECS); - - if (op[cur_state][new_state] == HNS_ROCE_CMD_2ERR_QP) - return hns_roce_cmd_mbox(hr_dev, 0, 0, hr_qp->qpn, 2, - HNS_ROCE_CMD_2ERR_QP, - HNS_ROCE_CMD_TIMEOUT_MSECS); - - mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); - if (IS_ERR(mailbox)) - return PTR_ERR(mailbox); - - memcpy(mailbox->buf, context, sizeof(*context)); - - ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, hr_qp->qpn, 0, - op[cur_state][new_state], - HNS_ROCE_CMD_TIMEOUT_MSECS); - - hns_roce_free_cmd_mailbox(hr_dev, mailbox); - return ret; -} - -static int find_wqe_mtt(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp, - u64 *sq_ba, u64 *rq_ba, dma_addr_t *bt_ba) -{ - struct ib_device *ibdev = &hr_dev->ib_dev; - int count; - - count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, 0, sq_ba, 1, bt_ba); - if (count < 1) { - ibdev_err(ibdev, "Failed to find SQ ba\n"); - return -ENOBUFS; - } - - count = hns_roce_mtr_find(hr_dev, &hr_qp->mtr, hr_qp->rq.offset, rq_ba, - 1, NULL); - if (!count) { - ibdev_err(ibdev, "Failed to find RQ ba\n"); - return -ENOBUFS; - } - - return 0; -} - -static int hns_roce_v1_m_sqp(struct ib_qp *ibqp, const struct ib_qp_attr *attr, - int attr_mask, enum ib_qp_state cur_state, - enum ib_qp_state new_state) -{ - struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device); - struct hns_roce_qp *hr_qp = to_hr_qp(ibqp); - struct hns_roce_sqp_context *context; - dma_addr_t dma_handle = 0; - u32 __iomem *addr; - u64 sq_ba = 0; - u64 rq_ba = 0; - __le32 tmp; - u32 reg_val; - - context = kzalloc(sizeof(*context), GFP_KERNEL); - if (!context) - return -ENOMEM; - - /* Search QP buf's MTTs */ - if (find_wqe_mtt(hr_dev, hr_qp, &sq_ba, &rq_ba, &dma_handle)) - goto out; - - if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { - roce_set_field(context->qp1c_bytes_4, - QP1C_BYTES_4_SQ_WQE_SHIFT_M, - QP1C_BYTES_4_SQ_WQE_SHIFT_S, - ilog2((unsigned int)hr_qp->sq.wqe_cnt)); - roce_set_field(context->qp1c_bytes_4, - QP1C_BYTES_4_RQ_WQE_SHIFT_M, - QP1C_BYTES_4_RQ_WQE_SHIFT_S, - ilog2((unsigned int)hr_qp->rq.wqe_cnt)); - roce_set_field(context->qp1c_bytes_4, QP1C_BYTES_4_PD_M, - QP1C_BYTES_4_PD_S, to_hr_pd(ibqp->pd)->pdn); - - context->sq_rq_bt_l = cpu_to_le32(dma_handle); - roce_set_field(context->qp1c_bytes_12, - QP1C_BYTES_12_SQ_RQ_BT_H_M, - QP1C_BYTES_12_SQ_RQ_BT_H_S, - upper_32_bits(dma_handle)); - - roce_set_field(context->qp1c_bytes_16, QP1C_BYTES_16_RQ_HEAD_M, - QP1C_BYTES_16_RQ_HEAD_S, hr_qp->rq.head); - roce_set_field(context->qp1c_bytes_16, QP1C_BYTES_16_PORT_NUM_M, - QP1C_BYTES_16_PORT_NUM_S, hr_qp->phy_port); - roce_set_bit(context->qp1c_bytes_16, - QP1C_BYTES_16_SIGNALING_TYPE_S, - hr_qp->sq_signal_bits); - roce_set_bit(context->qp1c_bytes_16, QP1C_BYTES_16_RQ_BA_FLG_S, - 1); - roce_set_bit(context->qp1c_bytes_16, QP1C_BYTES_16_SQ_BA_FLG_S, - 1); - roce_set_bit(context->qp1c_bytes_16, QP1C_BYTES_16_QP1_ERR_S, - 0); - - roce_set_field(context->qp1c_bytes_20, QP1C_BYTES_20_SQ_HEAD_M, - QP1C_BYTES_20_SQ_HEAD_S, hr_qp->sq.head); - roce_set_field(context->qp1c_bytes_20, QP1C_BYTES_20_PKEY_IDX_M, - QP1C_BYTES_20_PKEY_IDX_S, attr->pkey_index); - - context->cur_rq_wqe_ba_l = cpu_to_le32(rq_ba); - - roce_set_field(context->qp1c_bytes_28, - QP1C_BYTES_28_CUR_RQ_WQE_BA_H_M, - QP1C_BYTES_28_CUR_RQ_WQE_BA_H_S, - upper_32_bits(rq_ba)); - roce_set_field(context->qp1c_bytes_28, - QP1C_BYTES_28_RQ_CUR_IDX_M, - QP1C_BYTES_28_RQ_CUR_IDX_S, 0); - - roce_set_field(context->qp1c_bytes_32, - QP1C_BYTES_32_RX_CQ_NUM_M, - QP1C_BYTES_32_RX_CQ_NUM_S, - to_hr_cq(ibqp->recv_cq)->cqn); - roce_set_field(context->qp1c_bytes_32, - QP1C_BYTES_32_TX_CQ_NUM_M, - QP1C_BYTES_32_TX_CQ_NUM_S, - to_hr_cq(ibqp->send_cq)->cqn); - - context->cur_sq_wqe_ba_l = cpu_to_le32(sq_ba); - - roce_set_field(context->qp1c_bytes_40, - QP1C_BYTES_40_CUR_SQ_WQE_BA_H_M, - QP1C_BYTES_40_CUR_SQ_WQE_BA_H_S, - upper_32_bits(sq_ba)); - roce_set_field(context->qp1c_bytes_40, - QP1C_BYTES_40_SQ_CUR_IDX_M, - QP1C_BYTES_40_SQ_CUR_IDX_S, 0); - - /* Copy context to QP1C register */ - addr = (u32 __iomem *)(hr_dev->reg_base + - ROCEE_QP1C_CFG0_0_REG + - hr_qp->phy_port * sizeof(*context)); - - writel(le32_to_cpu(context->qp1c_bytes_4), addr); - writel(le32_to_cpu(context->sq_rq_bt_l), addr + 1); - writel(le32_to_cpu(context->qp1c_bytes_12), addr + 2); - writel(le32_to_cpu(context->qp1c_bytes_16), addr + 3); - writel(le32_to_cpu(context->qp1c_bytes_20), addr + 4); - writel(le32_to_cpu(context->cur_rq_wqe_ba_l), addr + 5); - writel(le32_to_cpu(context->qp1c_bytes_28), addr + 6); - writel(le32_to_cpu(context->qp1c_bytes_32), addr + 7); - writel(le32_to_cpu(context->cur_sq_wqe_ba_l), addr + 8); - writel(le32_to_cpu(context->qp1c_bytes_40), addr + 9); - } - - /* Modify QP1C status */ - reg_val = roce_read(hr_dev, ROCEE_QP1C_CFG0_0_REG + - hr_qp->phy_port * sizeof(*context)); - tmp = cpu_to_le32(reg_val); - roce_set_field(tmp, ROCEE_QP1C_CFG0_0_ROCEE_QP1C_QP_ST_M, - ROCEE_QP1C_CFG0_0_ROCEE_QP1C_QP_ST_S, new_state); - reg_val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_QP1C_CFG0_0_REG + - hr_qp->phy_port * sizeof(*context), reg_val); - - hr_qp->state = new_state; - if (new_state == IB_QPS_RESET) { - hns_roce_v1_cq_clean(to_hr_cq(ibqp->recv_cq), hr_qp->qpn, - ibqp->srq ? to_hr_srq(ibqp->srq) : NULL); - if (ibqp->send_cq != ibqp->recv_cq) - hns_roce_v1_cq_clean(to_hr_cq(ibqp->send_cq), - hr_qp->qpn, NULL); - - hr_qp->rq.head = 0; - hr_qp->rq.tail = 0; - hr_qp->sq.head = 0; - hr_qp->sq.tail = 0; - } - - kfree(context); - return 0; - -out: - kfree(context); - return -EINVAL; -} - -static bool check_qp_state(enum ib_qp_state cur_state, - enum ib_qp_state new_state) -{ - static const bool sm[][IB_QPS_ERR + 1] = { - [IB_QPS_RESET] = { [IB_QPS_RESET] = true, - [IB_QPS_INIT] = true }, - [IB_QPS_INIT] = { [IB_QPS_RESET] = true, - [IB_QPS_INIT] = true, - [IB_QPS_RTR] = true, - [IB_QPS_ERR] = true }, - [IB_QPS_RTR] = { [IB_QPS_RESET] = true, - [IB_QPS_RTS] = true, - [IB_QPS_ERR] = true }, - [IB_QPS_RTS] = { [IB_QPS_RESET] = true, [IB_QPS_ERR] = true }, - [IB_QPS_SQD] = {}, - [IB_QPS_SQE] = {}, - [IB_QPS_ERR] = { [IB_QPS_RESET] = true, [IB_QPS_ERR] = true } - }; - - return sm[cur_state][new_state]; -} - -static int hns_roce_v1_m_qp(struct ib_qp *ibqp, const struct ib_qp_attr *attr, - int attr_mask, enum ib_qp_state cur_state, - enum ib_qp_state new_state) -{ - struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device); - struct hns_roce_qp *hr_qp = to_hr_qp(ibqp); - struct device *dev = &hr_dev->pdev->dev; - struct hns_roce_qp_context *context; - const struct ib_global_route *grh = rdma_ah_read_grh(&attr->ah_attr); - dma_addr_t dma_handle_2 = 0; - dma_addr_t dma_handle = 0; - __le32 doorbell[2] = {0}; - u64 *mtts_2 = NULL; - int ret = -EINVAL; - const u8 *smac; - u64 sq_ba = 0; - u64 rq_ba = 0; - u32 port; - u32 port_num; - u8 *dmac; - - if (!check_qp_state(cur_state, new_state)) { - ibdev_err(ibqp->device, - "not support QP(%u) status from %d to %d\n", - ibqp->qp_num, cur_state, new_state); - return -EINVAL; - } - - context = kzalloc(sizeof(*context), GFP_KERNEL); - if (!context) - return -ENOMEM; - - /* Search qp buf's mtts */ - if (find_wqe_mtt(hr_dev, hr_qp, &sq_ba, &rq_ba, &dma_handle)) - goto out; - - /* Search IRRL's mtts */ - mtts_2 = hns_roce_table_find(hr_dev, &hr_dev->qp_table.irrl_table, - hr_qp->qpn, &dma_handle_2); - if (mtts_2 == NULL) { - dev_err(dev, "qp irrl_table find failed\n"); - goto out; - } - - /* - * Reset to init - * Mandatory param: - * IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_PORT | IB_QP_ACCESS_FLAGS - * Optional param: NA - */ - if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { - roce_set_field(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTES_4_TRANSPORT_SERVICE_TYPE_M, - QP_CONTEXT_QPC_BYTES_4_TRANSPORT_SERVICE_TYPE_S, - to_hr_qp_type(hr_qp->ibqp.qp_type)); - - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_ENABLE_FPMR_S, 0); - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_RDMA_READ_ENABLE_S, - !!(attr->qp_access_flags & IB_ACCESS_REMOTE_READ)); - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_RDMA_WRITE_ENABLE_S, - !!(attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) - ); - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_ATOMIC_OPERATION_ENABLE_S, - !!(attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC) - ); - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_RDMAR_USE_S, 1); - roce_set_field(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTES_4_SQ_WQE_SHIFT_M, - QP_CONTEXT_QPC_BYTES_4_SQ_WQE_SHIFT_S, - ilog2((unsigned int)hr_qp->sq.wqe_cnt)); - roce_set_field(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTES_4_RQ_WQE_SHIFT_M, - QP_CONTEXT_QPC_BYTES_4_RQ_WQE_SHIFT_S, - ilog2((unsigned int)hr_qp->rq.wqe_cnt)); - roce_set_field(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTES_4_PD_M, - QP_CONTEXT_QPC_BYTES_4_PD_S, - to_hr_pd(ibqp->pd)->pdn); - hr_qp->access_flags = attr->qp_access_flags; - roce_set_field(context->qpc_bytes_8, - QP_CONTEXT_QPC_BYTES_8_TX_COMPLETION_M, - QP_CONTEXT_QPC_BYTES_8_TX_COMPLETION_S, - to_hr_cq(ibqp->send_cq)->cqn); - roce_set_field(context->qpc_bytes_8, - QP_CONTEXT_QPC_BYTES_8_RX_COMPLETION_M, - QP_CONTEXT_QPC_BYTES_8_RX_COMPLETION_S, - to_hr_cq(ibqp->recv_cq)->cqn); - - if (ibqp->srq) - roce_set_field(context->qpc_bytes_12, - QP_CONTEXT_QPC_BYTES_12_SRQ_NUMBER_M, - QP_CONTEXT_QPC_BYTES_12_SRQ_NUMBER_S, - to_hr_srq(ibqp->srq)->srqn); - - roce_set_field(context->qpc_bytes_12, - QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_M, - QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_S, - attr->pkey_index); - hr_qp->pkey_index = attr->pkey_index; - roce_set_field(context->qpc_bytes_16, - QP_CONTEXT_QPC_BYTES_16_QP_NUM_M, - QP_CONTEXT_QPC_BYTES_16_QP_NUM_S, hr_qp->qpn); - } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { - roce_set_field(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTES_4_TRANSPORT_SERVICE_TYPE_M, - QP_CONTEXT_QPC_BYTES_4_TRANSPORT_SERVICE_TYPE_S, - to_hr_qp_type(hr_qp->ibqp.qp_type)); - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_ENABLE_FPMR_S, 0); - if (attr_mask & IB_QP_ACCESS_FLAGS) { - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_RDMA_READ_ENABLE_S, - !!(attr->qp_access_flags & - IB_ACCESS_REMOTE_READ)); - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_RDMA_WRITE_ENABLE_S, - !!(attr->qp_access_flags & - IB_ACCESS_REMOTE_WRITE)); - } else { - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_RDMA_READ_ENABLE_S, - !!(hr_qp->access_flags & - IB_ACCESS_REMOTE_READ)); - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_RDMA_WRITE_ENABLE_S, - !!(hr_qp->access_flags & - IB_ACCESS_REMOTE_WRITE)); - } - - roce_set_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_RDMAR_USE_S, 1); - roce_set_field(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTES_4_SQ_WQE_SHIFT_M, - QP_CONTEXT_QPC_BYTES_4_SQ_WQE_SHIFT_S, - ilog2((unsigned int)hr_qp->sq.wqe_cnt)); - roce_set_field(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTES_4_RQ_WQE_SHIFT_M, - QP_CONTEXT_QPC_BYTES_4_RQ_WQE_SHIFT_S, - ilog2((unsigned int)hr_qp->rq.wqe_cnt)); - roce_set_field(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTES_4_PD_M, - QP_CONTEXT_QPC_BYTES_4_PD_S, - to_hr_pd(ibqp->pd)->pdn); - - roce_set_field(context->qpc_bytes_8, - QP_CONTEXT_QPC_BYTES_8_TX_COMPLETION_M, - QP_CONTEXT_QPC_BYTES_8_TX_COMPLETION_S, - to_hr_cq(ibqp->send_cq)->cqn); - roce_set_field(context->qpc_bytes_8, - QP_CONTEXT_QPC_BYTES_8_RX_COMPLETION_M, - QP_CONTEXT_QPC_BYTES_8_RX_COMPLETION_S, - to_hr_cq(ibqp->recv_cq)->cqn); - - if (ibqp->srq) - roce_set_field(context->qpc_bytes_12, - QP_CONTEXT_QPC_BYTES_12_SRQ_NUMBER_M, - QP_CONTEXT_QPC_BYTES_12_SRQ_NUMBER_S, - to_hr_srq(ibqp->srq)->srqn); - if (attr_mask & IB_QP_PKEY_INDEX) - roce_set_field(context->qpc_bytes_12, - QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_M, - QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_S, - attr->pkey_index); - else - roce_set_field(context->qpc_bytes_12, - QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_M, - QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_S, - hr_qp->pkey_index); - - roce_set_field(context->qpc_bytes_16, - QP_CONTEXT_QPC_BYTES_16_QP_NUM_M, - QP_CONTEXT_QPC_BYTES_16_QP_NUM_S, hr_qp->qpn); - } else if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { - if ((attr_mask & IB_QP_ALT_PATH) || - (attr_mask & IB_QP_ACCESS_FLAGS) || - (attr_mask & IB_QP_PKEY_INDEX) || - (attr_mask & IB_QP_QKEY)) { - dev_err(dev, "INIT2RTR attr_mask error\n"); - goto out; - } - - dmac = (u8 *)attr->ah_attr.roce.dmac; - - context->sq_rq_bt_l = cpu_to_le32(dma_handle); - roce_set_field(context->qpc_bytes_24, - QP_CONTEXT_QPC_BYTES_24_SQ_RQ_BT_H_M, - QP_CONTEXT_QPC_BYTES_24_SQ_RQ_BT_H_S, - upper_32_bits(dma_handle)); - roce_set_bit(context->qpc_bytes_24, - QP_CONTEXT_QPC_BYTE_24_REMOTE_ENABLE_E2E_CREDITS_S, - 1); - roce_set_field(context->qpc_bytes_24, - QP_CONTEXT_QPC_BYTES_24_MINIMUM_RNR_NAK_TIMER_M, - QP_CONTEXT_QPC_BYTES_24_MINIMUM_RNR_NAK_TIMER_S, - attr->min_rnr_timer); - context->irrl_ba_l = cpu_to_le32((u32)(dma_handle_2)); - roce_set_field(context->qpc_bytes_32, - QP_CONTEXT_QPC_BYTES_32_IRRL_BA_H_M, - QP_CONTEXT_QPC_BYTES_32_IRRL_BA_H_S, - ((u32)(dma_handle_2 >> 32)) & - QP_CONTEXT_QPC_BYTES_32_IRRL_BA_H_M); - roce_set_field(context->qpc_bytes_32, - QP_CONTEXT_QPC_BYTES_32_MIG_STATE_M, - QP_CONTEXT_QPC_BYTES_32_MIG_STATE_S, 0); - roce_set_bit(context->qpc_bytes_32, - QP_CONTEXT_QPC_BYTE_32_LOCAL_ENABLE_E2E_CREDITS_S, - 1); - roce_set_bit(context->qpc_bytes_32, - QP_CONTEXT_QPC_BYTE_32_SIGNALING_TYPE_S, - hr_qp->sq_signal_bits); - - port = (attr_mask & IB_QP_PORT) ? (attr->port_num - 1) : - hr_qp->port; - smac = (const u8 *)hr_dev->dev_addr[port]; - /* when dmac equals smac or loop_idc is 1, it should loopback */ - if (ether_addr_equal_unaligned(dmac, smac) || - hr_dev->loop_idc == 0x1) - roce_set_bit(context->qpc_bytes_32, - QP_CONTEXT_QPC_BYTE_32_LOOPBACK_INDICATOR_S, 1); - - roce_set_bit(context->qpc_bytes_32, - QP_CONTEXT_QPC_BYTE_32_GLOBAL_HEADER_S, - rdma_ah_get_ah_flags(&attr->ah_attr)); - roce_set_field(context->qpc_bytes_32, - QP_CONTEXT_QPC_BYTES_32_RESPONDER_RESOURCES_M, - QP_CONTEXT_QPC_BYTES_32_RESPONDER_RESOURCES_S, - ilog2((unsigned int)attr->max_dest_rd_atomic)); - - if (attr_mask & IB_QP_DEST_QPN) - roce_set_field(context->qpc_bytes_36, - QP_CONTEXT_QPC_BYTES_36_DEST_QP_M, - QP_CONTEXT_QPC_BYTES_36_DEST_QP_S, - attr->dest_qp_num); - - /* Configure GID index */ - port_num = rdma_ah_get_port_num(&attr->ah_attr); - roce_set_field(context->qpc_bytes_36, - QP_CONTEXT_QPC_BYTES_36_SGID_INDEX_M, - QP_CONTEXT_QPC_BYTES_36_SGID_INDEX_S, - hns_get_gid_index(hr_dev, - port_num - 1, - grh->sgid_index)); - - memcpy(&(context->dmac_l), dmac, 4); - - roce_set_field(context->qpc_bytes_44, - QP_CONTEXT_QPC_BYTES_44_DMAC_H_M, - QP_CONTEXT_QPC_BYTES_44_DMAC_H_S, - *((u16 *)(&dmac[4]))); - roce_set_field(context->qpc_bytes_44, - QP_CONTEXT_QPC_BYTES_44_MAXIMUM_STATIC_RATE_M, - QP_CONTEXT_QPC_BYTES_44_MAXIMUM_STATIC_RATE_S, - rdma_ah_get_static_rate(&attr->ah_attr)); - roce_set_field(context->qpc_bytes_44, - QP_CONTEXT_QPC_BYTES_44_HOPLMT_M, - QP_CONTEXT_QPC_BYTES_44_HOPLMT_S, - grh->hop_limit); - - roce_set_field(context->qpc_bytes_48, - QP_CONTEXT_QPC_BYTES_48_FLOWLABEL_M, - QP_CONTEXT_QPC_BYTES_48_FLOWLABEL_S, - grh->flow_label); - roce_set_field(context->qpc_bytes_48, - QP_CONTEXT_QPC_BYTES_48_TCLASS_M, - QP_CONTEXT_QPC_BYTES_48_TCLASS_S, - grh->traffic_class); - roce_set_field(context->qpc_bytes_48, - QP_CONTEXT_QPC_BYTES_48_MTU_M, - QP_CONTEXT_QPC_BYTES_48_MTU_S, attr->path_mtu); - - memcpy(context->dgid, grh->dgid.raw, - sizeof(grh->dgid.raw)); - - dev_dbg(dev, "dmac:%x :%lx\n", context->dmac_l, - roce_get_field(context->qpc_bytes_44, - QP_CONTEXT_QPC_BYTES_44_DMAC_H_M, - QP_CONTEXT_QPC_BYTES_44_DMAC_H_S)); - - roce_set_field(context->qpc_bytes_68, - QP_CONTEXT_QPC_BYTES_68_RQ_HEAD_M, - QP_CONTEXT_QPC_BYTES_68_RQ_HEAD_S, - hr_qp->rq.head); - roce_set_field(context->qpc_bytes_68, - QP_CONTEXT_QPC_BYTES_68_RQ_CUR_INDEX_M, - QP_CONTEXT_QPC_BYTES_68_RQ_CUR_INDEX_S, 0); - - context->cur_rq_wqe_ba_l = cpu_to_le32(rq_ba); - - roce_set_field(context->qpc_bytes_76, - QP_CONTEXT_QPC_BYTES_76_CUR_RQ_WQE_BA_H_M, - QP_CONTEXT_QPC_BYTES_76_CUR_RQ_WQE_BA_H_S, - upper_32_bits(rq_ba)); - roce_set_field(context->qpc_bytes_76, - QP_CONTEXT_QPC_BYTES_76_RX_REQ_MSN_M, - QP_CONTEXT_QPC_BYTES_76_RX_REQ_MSN_S, 0); - - context->rx_rnr_time = 0; - - roce_set_field(context->qpc_bytes_84, - QP_CONTEXT_QPC_BYTES_84_LAST_ACK_PSN_M, - QP_CONTEXT_QPC_BYTES_84_LAST_ACK_PSN_S, - attr->rq_psn - 1); - roce_set_field(context->qpc_bytes_84, - QP_CONTEXT_QPC_BYTES_84_TRRL_HEAD_M, - QP_CONTEXT_QPC_BYTES_84_TRRL_HEAD_S, 0); - - roce_set_field(context->qpc_bytes_88, - QP_CONTEXT_QPC_BYTES_88_RX_REQ_EPSN_M, - QP_CONTEXT_QPC_BYTES_88_RX_REQ_EPSN_S, - attr->rq_psn); - roce_set_bit(context->qpc_bytes_88, - QP_CONTEXT_QPC_BYTES_88_RX_REQ_PSN_ERR_FLAG_S, 0); - roce_set_bit(context->qpc_bytes_88, - QP_CONTEXT_QPC_BYTES_88_RX_LAST_OPCODE_FLG_S, 0); - roce_set_field(context->qpc_bytes_88, - QP_CONTEXT_QPC_BYTES_88_RQ_REQ_LAST_OPERATION_TYPE_M, - QP_CONTEXT_QPC_BYTES_88_RQ_REQ_LAST_OPERATION_TYPE_S, - 0); - roce_set_field(context->qpc_bytes_88, - QP_CONTEXT_QPC_BYTES_88_RQ_REQ_RDMA_WR_FLAG_M, - QP_CONTEXT_QPC_BYTES_88_RQ_REQ_RDMA_WR_FLAG_S, - 0); - - context->dma_length = 0; - context->r_key = 0; - context->va_l = 0; - context->va_h = 0; - - roce_set_field(context->qpc_bytes_108, - QP_CONTEXT_QPC_BYTES_108_TRRL_SDB_PSN_M, - QP_CONTEXT_QPC_BYTES_108_TRRL_SDB_PSN_S, 0); - roce_set_bit(context->qpc_bytes_108, - QP_CONTEXT_QPC_BYTES_108_TRRL_SDB_PSN_FLG_S, 0); - roce_set_bit(context->qpc_bytes_108, - QP_CONTEXT_QPC_BYTES_108_TRRL_TDB_PSN_FLG_S, 0); - - roce_set_field(context->qpc_bytes_112, - QP_CONTEXT_QPC_BYTES_112_TRRL_TDB_PSN_M, - QP_CONTEXT_QPC_BYTES_112_TRRL_TDB_PSN_S, 0); - roce_set_field(context->qpc_bytes_112, - QP_CONTEXT_QPC_BYTES_112_TRRL_TAIL_M, - QP_CONTEXT_QPC_BYTES_112_TRRL_TAIL_S, 0); - - /* For chip resp ack */ - roce_set_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_PORT_NUM_M, - QP_CONTEXT_QPC_BYTES_156_PORT_NUM_S, - hr_qp->phy_port); - roce_set_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_SL_M, - QP_CONTEXT_QPC_BYTES_156_SL_S, - rdma_ah_get_sl(&attr->ah_attr)); - hr_qp->sl = rdma_ah_get_sl(&attr->ah_attr); - } else if (cur_state == IB_QPS_RTR && new_state == IB_QPS_RTS) { - /* If exist optional param, return error */ - if ((attr_mask & IB_QP_ALT_PATH) || - (attr_mask & IB_QP_ACCESS_FLAGS) || - (attr_mask & IB_QP_QKEY) || - (attr_mask & IB_QP_PATH_MIG_STATE) || - (attr_mask & IB_QP_CUR_STATE) || - (attr_mask & IB_QP_MIN_RNR_TIMER)) { - dev_err(dev, "RTR2RTS attr_mask error\n"); - goto out; - } - - context->rx_cur_sq_wqe_ba_l = cpu_to_le32(sq_ba); - - roce_set_field(context->qpc_bytes_120, - QP_CONTEXT_QPC_BYTES_120_RX_CUR_SQ_WQE_BA_H_M, - QP_CONTEXT_QPC_BYTES_120_RX_CUR_SQ_WQE_BA_H_S, - upper_32_bits(sq_ba)); - - roce_set_field(context->qpc_bytes_124, - QP_CONTEXT_QPC_BYTES_124_RX_ACK_MSN_M, - QP_CONTEXT_QPC_BYTES_124_RX_ACK_MSN_S, 0); - roce_set_field(context->qpc_bytes_124, - QP_CONTEXT_QPC_BYTES_124_IRRL_MSG_IDX_M, - QP_CONTEXT_QPC_BYTES_124_IRRL_MSG_IDX_S, 0); - - roce_set_field(context->qpc_bytes_128, - QP_CONTEXT_QPC_BYTES_128_RX_ACK_EPSN_M, - QP_CONTEXT_QPC_BYTES_128_RX_ACK_EPSN_S, - attr->sq_psn); - roce_set_bit(context->qpc_bytes_128, - QP_CONTEXT_QPC_BYTES_128_RX_ACK_PSN_ERR_FLG_S, 0); - roce_set_field(context->qpc_bytes_128, - QP_CONTEXT_QPC_BYTES_128_ACK_LAST_OPERATION_TYPE_M, - QP_CONTEXT_QPC_BYTES_128_ACK_LAST_OPERATION_TYPE_S, - 0); - roce_set_bit(context->qpc_bytes_128, - QP_CONTEXT_QPC_BYTES_128_IRRL_PSN_VLD_FLG_S, 0); - - roce_set_field(context->qpc_bytes_132, - QP_CONTEXT_QPC_BYTES_132_IRRL_PSN_M, - QP_CONTEXT_QPC_BYTES_132_IRRL_PSN_S, 0); - roce_set_field(context->qpc_bytes_132, - QP_CONTEXT_QPC_BYTES_132_IRRL_TAIL_M, - QP_CONTEXT_QPC_BYTES_132_IRRL_TAIL_S, 0); - - roce_set_field(context->qpc_bytes_136, - QP_CONTEXT_QPC_BYTES_136_RETRY_MSG_PSN_M, - QP_CONTEXT_QPC_BYTES_136_RETRY_MSG_PSN_S, - attr->sq_psn); - roce_set_field(context->qpc_bytes_136, - QP_CONTEXT_QPC_BYTES_136_RETRY_MSG_FPKT_PSN_L_M, - QP_CONTEXT_QPC_BYTES_136_RETRY_MSG_FPKT_PSN_L_S, - attr->sq_psn); - - roce_set_field(context->qpc_bytes_140, - QP_CONTEXT_QPC_BYTES_140_RETRY_MSG_FPKT_PSN_H_M, - QP_CONTEXT_QPC_BYTES_140_RETRY_MSG_FPKT_PSN_H_S, - (attr->sq_psn >> SQ_PSN_SHIFT)); - roce_set_field(context->qpc_bytes_140, - QP_CONTEXT_QPC_BYTES_140_RETRY_MSG_MSN_M, - QP_CONTEXT_QPC_BYTES_140_RETRY_MSG_MSN_S, 0); - roce_set_bit(context->qpc_bytes_140, - QP_CONTEXT_QPC_BYTES_140_RNR_RETRY_FLG_S, 0); - - roce_set_field(context->qpc_bytes_148, - QP_CONTEXT_QPC_BYTES_148_CHECK_FLAG_M, - QP_CONTEXT_QPC_BYTES_148_CHECK_FLAG_S, 0); - roce_set_field(context->qpc_bytes_148, - QP_CONTEXT_QPC_BYTES_148_RETRY_COUNT_M, - QP_CONTEXT_QPC_BYTES_148_RETRY_COUNT_S, - attr->retry_cnt); - roce_set_field(context->qpc_bytes_148, - QP_CONTEXT_QPC_BYTES_148_RNR_RETRY_COUNT_M, - QP_CONTEXT_QPC_BYTES_148_RNR_RETRY_COUNT_S, - attr->rnr_retry); - roce_set_field(context->qpc_bytes_148, - QP_CONTEXT_QPC_BYTES_148_LSN_M, - QP_CONTEXT_QPC_BYTES_148_LSN_S, 0x100); - - context->rnr_retry = 0; - - roce_set_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_RETRY_COUNT_INIT_M, - QP_CONTEXT_QPC_BYTES_156_RETRY_COUNT_INIT_S, - attr->retry_cnt); - if (attr->timeout < 0x12) { - dev_info(dev, "ack timeout value(0x%x) must bigger than 0x12.\n", - attr->timeout); - roce_set_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_ACK_TIMEOUT_M, - QP_CONTEXT_QPC_BYTES_156_ACK_TIMEOUT_S, - 0x12); - } else { - roce_set_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_ACK_TIMEOUT_M, - QP_CONTEXT_QPC_BYTES_156_ACK_TIMEOUT_S, - attr->timeout); - } - roce_set_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_RNR_RETRY_COUNT_INIT_M, - QP_CONTEXT_QPC_BYTES_156_RNR_RETRY_COUNT_INIT_S, - attr->rnr_retry); - roce_set_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_PORT_NUM_M, - QP_CONTEXT_QPC_BYTES_156_PORT_NUM_S, - hr_qp->phy_port); - roce_set_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_SL_M, - QP_CONTEXT_QPC_BYTES_156_SL_S, - rdma_ah_get_sl(&attr->ah_attr)); - hr_qp->sl = rdma_ah_get_sl(&attr->ah_attr); - roce_set_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_INITIATOR_DEPTH_M, - QP_CONTEXT_QPC_BYTES_156_INITIATOR_DEPTH_S, - ilog2((unsigned int)attr->max_rd_atomic)); - roce_set_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_ACK_REQ_IND_M, - QP_CONTEXT_QPC_BYTES_156_ACK_REQ_IND_S, 0); - context->pkt_use_len = 0; - - roce_set_field(context->qpc_bytes_164, - QP_CONTEXT_QPC_BYTES_164_SQ_PSN_M, - QP_CONTEXT_QPC_BYTES_164_SQ_PSN_S, attr->sq_psn); - roce_set_field(context->qpc_bytes_164, - QP_CONTEXT_QPC_BYTES_164_IRRL_HEAD_M, - QP_CONTEXT_QPC_BYTES_164_IRRL_HEAD_S, 0); - - roce_set_field(context->qpc_bytes_168, - QP_CONTEXT_QPC_BYTES_168_RETRY_SQ_PSN_M, - QP_CONTEXT_QPC_BYTES_168_RETRY_SQ_PSN_S, - attr->sq_psn); - roce_set_field(context->qpc_bytes_168, - QP_CONTEXT_QPC_BYTES_168_SGE_USE_FLA_M, - QP_CONTEXT_QPC_BYTES_168_SGE_USE_FLA_S, 0); - roce_set_field(context->qpc_bytes_168, - QP_CONTEXT_QPC_BYTES_168_DB_TYPE_M, - QP_CONTEXT_QPC_BYTES_168_DB_TYPE_S, 0); - roce_set_bit(context->qpc_bytes_168, - QP_CONTEXT_QPC_BYTES_168_MSG_LP_IND_S, 0); - roce_set_bit(context->qpc_bytes_168, - QP_CONTEXT_QPC_BYTES_168_CSDB_LP_IND_S, 0); - roce_set_bit(context->qpc_bytes_168, - QP_CONTEXT_QPC_BYTES_168_QP_ERR_FLG_S, 0); - context->sge_use_len = 0; - - roce_set_field(context->qpc_bytes_176, - QP_CONTEXT_QPC_BYTES_176_DB_CUR_INDEX_M, - QP_CONTEXT_QPC_BYTES_176_DB_CUR_INDEX_S, 0); - roce_set_field(context->qpc_bytes_176, - QP_CONTEXT_QPC_BYTES_176_RETRY_DB_CUR_INDEX_M, - QP_CONTEXT_QPC_BYTES_176_RETRY_DB_CUR_INDEX_S, - 0); - roce_set_field(context->qpc_bytes_180, - QP_CONTEXT_QPC_BYTES_180_SQ_CUR_INDEX_M, - QP_CONTEXT_QPC_BYTES_180_SQ_CUR_INDEX_S, 0); - roce_set_field(context->qpc_bytes_180, - QP_CONTEXT_QPC_BYTES_180_SQ_HEAD_M, - QP_CONTEXT_QPC_BYTES_180_SQ_HEAD_S, 0); - - context->tx_cur_sq_wqe_ba_l = cpu_to_le32(sq_ba); - - roce_set_field(context->qpc_bytes_188, - QP_CONTEXT_QPC_BYTES_188_TX_CUR_SQ_WQE_BA_H_M, - QP_CONTEXT_QPC_BYTES_188_TX_CUR_SQ_WQE_BA_H_S, - upper_32_bits(sq_ba)); - roce_set_bit(context->qpc_bytes_188, - QP_CONTEXT_QPC_BYTES_188_PKT_RETRY_FLG_S, 0); - roce_set_field(context->qpc_bytes_188, - QP_CONTEXT_QPC_BYTES_188_TX_RETRY_CUR_INDEX_M, - QP_CONTEXT_QPC_BYTES_188_TX_RETRY_CUR_INDEX_S, - 0); - } - - /* Every status migrate must change state */ - roce_set_field(context->qpc_bytes_144, - QP_CONTEXT_QPC_BYTES_144_QP_STATE_M, - QP_CONTEXT_QPC_BYTES_144_QP_STATE_S, new_state); - - /* SW pass context to HW */ - ret = hns_roce_v1_qp_modify(hr_dev, to_hns_roce_state(cur_state), - to_hns_roce_state(new_state), context, - hr_qp); - if (ret) { - dev_err(dev, "hns_roce_qp_modify failed\n"); - goto out; - } - - /* - * Use rst2init to instead of init2init with drv, - * need to hw to flash RQ HEAD by DB again - */ - if (cur_state == IB_QPS_INIT && new_state == IB_QPS_INIT) { - roce_set_field(doorbell[0], RQ_DOORBELL_U32_4_RQ_HEAD_M, - RQ_DOORBELL_U32_4_RQ_HEAD_S, hr_qp->rq.head); - roce_set_field(doorbell[1], RQ_DOORBELL_U32_8_QPN_M, - RQ_DOORBELL_U32_8_QPN_S, hr_qp->qpn); - roce_set_field(doorbell[1], RQ_DOORBELL_U32_8_CMD_M, - RQ_DOORBELL_U32_8_CMD_S, 1); - roce_set_bit(doorbell[1], RQ_DOORBELL_U32_8_HW_SYNC_S, 1); - - if (ibqp->uobject) { - hr_qp->rq.db_reg = hr_dev->reg_base + - hr_dev->odb_offset + - DB_REG_OFFSET * hr_dev->priv_uar.index; - } - - hns_roce_write64_k(doorbell, hr_qp->rq.db_reg); - } - - hr_qp->state = new_state; - - if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) - hr_qp->resp_depth = attr->max_dest_rd_atomic; - if (attr_mask & IB_QP_PORT) { - hr_qp->port = attr->port_num - 1; - hr_qp->phy_port = hr_dev->iboe.phy_port[hr_qp->port]; - } - - if (new_state == IB_QPS_RESET && !ibqp->uobject) { - hns_roce_v1_cq_clean(to_hr_cq(ibqp->recv_cq), hr_qp->qpn, - ibqp->srq ? to_hr_srq(ibqp->srq) : NULL); - if (ibqp->send_cq != ibqp->recv_cq) - hns_roce_v1_cq_clean(to_hr_cq(ibqp->send_cq), - hr_qp->qpn, NULL); - - hr_qp->rq.head = 0; - hr_qp->rq.tail = 0; - hr_qp->sq.head = 0; - hr_qp->sq.tail = 0; - } -out: - kfree(context); - return ret; -} - -static int hns_roce_v1_modify_qp(struct ib_qp *ibqp, - const struct ib_qp_attr *attr, int attr_mask, - enum ib_qp_state cur_state, - enum ib_qp_state new_state) -{ - if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS) - return -EOPNOTSUPP; - - if (ibqp->qp_type == IB_QPT_GSI || ibqp->qp_type == IB_QPT_SMI) - return hns_roce_v1_m_sqp(ibqp, attr, attr_mask, cur_state, - new_state); - else - return hns_roce_v1_m_qp(ibqp, attr, attr_mask, cur_state, - new_state); -} - -static enum ib_qp_state to_ib_qp_state(enum hns_roce_qp_state state) -{ - switch (state) { - case HNS_ROCE_QP_STATE_RST: - return IB_QPS_RESET; - case HNS_ROCE_QP_STATE_INIT: - return IB_QPS_INIT; - case HNS_ROCE_QP_STATE_RTR: - return IB_QPS_RTR; - case HNS_ROCE_QP_STATE_RTS: - return IB_QPS_RTS; - case HNS_ROCE_QP_STATE_SQD: - return IB_QPS_SQD; - case HNS_ROCE_QP_STATE_ERR: - return IB_QPS_ERR; - default: - return IB_QPS_ERR; - } -} - -static int hns_roce_v1_query_qpc(struct hns_roce_dev *hr_dev, - struct hns_roce_qp *hr_qp, - struct hns_roce_qp_context *hr_context) -{ - struct hns_roce_cmd_mailbox *mailbox; - int ret; - - mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); - if (IS_ERR(mailbox)) - return PTR_ERR(mailbox); - - ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, hr_qp->qpn, 0, - HNS_ROCE_CMD_QUERY_QP, - HNS_ROCE_CMD_TIMEOUT_MSECS); - if (!ret) - memcpy(hr_context, mailbox->buf, sizeof(*hr_context)); - else - dev_err(&hr_dev->pdev->dev, "QUERY QP cmd process error\n"); - - hns_roce_free_cmd_mailbox(hr_dev, mailbox); - - return ret; -} - -static int hns_roce_v1_q_sqp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, - int qp_attr_mask, - struct ib_qp_init_attr *qp_init_attr) -{ - struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device); - struct hns_roce_qp *hr_qp = to_hr_qp(ibqp); - struct hns_roce_sqp_context context; - u32 addr; - - mutex_lock(&hr_qp->mutex); - - if (hr_qp->state == IB_QPS_RESET) { - qp_attr->qp_state = IB_QPS_RESET; - goto done; - } - - addr = ROCEE_QP1C_CFG0_0_REG + - hr_qp->port * sizeof(struct hns_roce_sqp_context); - context.qp1c_bytes_4 = cpu_to_le32(roce_read(hr_dev, addr)); - context.sq_rq_bt_l = cpu_to_le32(roce_read(hr_dev, addr + 1)); - context.qp1c_bytes_12 = cpu_to_le32(roce_read(hr_dev, addr + 2)); - context.qp1c_bytes_16 = cpu_to_le32(roce_read(hr_dev, addr + 3)); - context.qp1c_bytes_20 = cpu_to_le32(roce_read(hr_dev, addr + 4)); - context.cur_rq_wqe_ba_l = cpu_to_le32(roce_read(hr_dev, addr + 5)); - context.qp1c_bytes_28 = cpu_to_le32(roce_read(hr_dev, addr + 6)); - context.qp1c_bytes_32 = cpu_to_le32(roce_read(hr_dev, addr + 7)); - context.cur_sq_wqe_ba_l = cpu_to_le32(roce_read(hr_dev, addr + 8)); - context.qp1c_bytes_40 = cpu_to_le32(roce_read(hr_dev, addr + 9)); - - hr_qp->state = roce_get_field(context.qp1c_bytes_4, - QP1C_BYTES_4_QP_STATE_M, - QP1C_BYTES_4_QP_STATE_S); - qp_attr->qp_state = hr_qp->state; - qp_attr->path_mtu = IB_MTU_256; - qp_attr->path_mig_state = IB_MIG_ARMED; - qp_attr->qkey = QKEY_VAL; - qp_attr->ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE; - qp_attr->rq_psn = 0; - qp_attr->sq_psn = 0; - qp_attr->dest_qp_num = 1; - qp_attr->qp_access_flags = 6; - - qp_attr->pkey_index = roce_get_field(context.qp1c_bytes_20, - QP1C_BYTES_20_PKEY_IDX_M, - QP1C_BYTES_20_PKEY_IDX_S); - qp_attr->port_num = hr_qp->port + 1; - qp_attr->sq_draining = 0; - qp_attr->max_rd_atomic = 0; - qp_attr->max_dest_rd_atomic = 0; - qp_attr->min_rnr_timer = 0; - qp_attr->timeout = 0; - qp_attr->retry_cnt = 0; - qp_attr->rnr_retry = 0; - qp_attr->alt_timeout = 0; - -done: - qp_attr->cur_qp_state = qp_attr->qp_state; - qp_attr->cap.max_recv_wr = hr_qp->rq.wqe_cnt; - qp_attr->cap.max_recv_sge = hr_qp->rq.max_gs; - qp_attr->cap.max_send_wr = hr_qp->sq.wqe_cnt; - qp_attr->cap.max_send_sge = hr_qp->sq.max_gs; - qp_attr->cap.max_inline_data = 0; - qp_init_attr->cap = qp_attr->cap; - qp_init_attr->create_flags = 0; - - mutex_unlock(&hr_qp->mutex); - - return 0; -} - -static int hns_roce_v1_q_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, - int qp_attr_mask, - struct ib_qp_init_attr *qp_init_attr) -{ - struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device); - struct hns_roce_qp *hr_qp = to_hr_qp(ibqp); - struct device *dev = &hr_dev->pdev->dev; - struct hns_roce_qp_context *context; - int tmp_qp_state; - int ret = 0; - int state; - - context = kzalloc(sizeof(*context), GFP_KERNEL); - if (!context) - return -ENOMEM; - - memset(qp_attr, 0, sizeof(*qp_attr)); - memset(qp_init_attr, 0, sizeof(*qp_init_attr)); - - mutex_lock(&hr_qp->mutex); - - if (hr_qp->state == IB_QPS_RESET) { - qp_attr->qp_state = IB_QPS_RESET; - goto done; - } - - ret = hns_roce_v1_query_qpc(hr_dev, hr_qp, context); - if (ret) { - dev_err(dev, "query qpc error\n"); - ret = -EINVAL; - goto out; - } - - state = roce_get_field(context->qpc_bytes_144, - QP_CONTEXT_QPC_BYTES_144_QP_STATE_M, - QP_CONTEXT_QPC_BYTES_144_QP_STATE_S); - tmp_qp_state = (int)to_ib_qp_state((enum hns_roce_qp_state)state); - if (tmp_qp_state == -1) { - dev_err(dev, "to_ib_qp_state error\n"); - ret = -EINVAL; - goto out; - } - hr_qp->state = (u8)tmp_qp_state; - qp_attr->qp_state = (enum ib_qp_state)hr_qp->state; - qp_attr->path_mtu = (enum ib_mtu)roce_get_field(context->qpc_bytes_48, - QP_CONTEXT_QPC_BYTES_48_MTU_M, - QP_CONTEXT_QPC_BYTES_48_MTU_S); - qp_attr->path_mig_state = IB_MIG_ARMED; - qp_attr->ah_attr.type = RDMA_AH_ATTR_TYPE_ROCE; - if (hr_qp->ibqp.qp_type == IB_QPT_UD) - qp_attr->qkey = QKEY_VAL; - - qp_attr->rq_psn = roce_get_field(context->qpc_bytes_88, - QP_CONTEXT_QPC_BYTES_88_RX_REQ_EPSN_M, - QP_CONTEXT_QPC_BYTES_88_RX_REQ_EPSN_S); - qp_attr->sq_psn = (u32)roce_get_field(context->qpc_bytes_164, - QP_CONTEXT_QPC_BYTES_164_SQ_PSN_M, - QP_CONTEXT_QPC_BYTES_164_SQ_PSN_S); - qp_attr->dest_qp_num = (u8)roce_get_field(context->qpc_bytes_36, - QP_CONTEXT_QPC_BYTES_36_DEST_QP_M, - QP_CONTEXT_QPC_BYTES_36_DEST_QP_S); - qp_attr->qp_access_flags = ((roce_get_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_RDMA_READ_ENABLE_S)) << 2) | - ((roce_get_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_RDMA_WRITE_ENABLE_S)) << 1) | - ((roce_get_bit(context->qpc_bytes_4, - QP_CONTEXT_QPC_BYTE_4_ATOMIC_OPERATION_ENABLE_S)) << 3); - - if (hr_qp->ibqp.qp_type == IB_QPT_RC) { - struct ib_global_route *grh = - rdma_ah_retrieve_grh(&qp_attr->ah_attr); - - rdma_ah_set_sl(&qp_attr->ah_attr, - roce_get_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_SL_M, - QP_CONTEXT_QPC_BYTES_156_SL_S)); - rdma_ah_set_ah_flags(&qp_attr->ah_attr, IB_AH_GRH); - grh->flow_label = - roce_get_field(context->qpc_bytes_48, - QP_CONTEXT_QPC_BYTES_48_FLOWLABEL_M, - QP_CONTEXT_QPC_BYTES_48_FLOWLABEL_S); - grh->sgid_index = - roce_get_field(context->qpc_bytes_36, - QP_CONTEXT_QPC_BYTES_36_SGID_INDEX_M, - QP_CONTEXT_QPC_BYTES_36_SGID_INDEX_S); - grh->hop_limit = - roce_get_field(context->qpc_bytes_44, - QP_CONTEXT_QPC_BYTES_44_HOPLMT_M, - QP_CONTEXT_QPC_BYTES_44_HOPLMT_S); - grh->traffic_class = - roce_get_field(context->qpc_bytes_48, - QP_CONTEXT_QPC_BYTES_48_TCLASS_M, - QP_CONTEXT_QPC_BYTES_48_TCLASS_S); - - memcpy(grh->dgid.raw, context->dgid, - sizeof(grh->dgid.raw)); - } - - qp_attr->pkey_index = roce_get_field(context->qpc_bytes_12, - QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_M, - QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_S); - qp_attr->port_num = hr_qp->port + 1; - qp_attr->sq_draining = 0; - qp_attr->max_rd_atomic = 1 << roce_get_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_INITIATOR_DEPTH_M, - QP_CONTEXT_QPC_BYTES_156_INITIATOR_DEPTH_S); - qp_attr->max_dest_rd_atomic = 1 << roce_get_field(context->qpc_bytes_32, - QP_CONTEXT_QPC_BYTES_32_RESPONDER_RESOURCES_M, - QP_CONTEXT_QPC_BYTES_32_RESPONDER_RESOURCES_S); - qp_attr->min_rnr_timer = (u8)(roce_get_field(context->qpc_bytes_24, - QP_CONTEXT_QPC_BYTES_24_MINIMUM_RNR_NAK_TIMER_M, - QP_CONTEXT_QPC_BYTES_24_MINIMUM_RNR_NAK_TIMER_S)); - qp_attr->timeout = (u8)(roce_get_field(context->qpc_bytes_156, - QP_CONTEXT_QPC_BYTES_156_ACK_TIMEOUT_M, - QP_CONTEXT_QPC_BYTES_156_ACK_TIMEOUT_S)); - qp_attr->retry_cnt = roce_get_field(context->qpc_bytes_148, - QP_CONTEXT_QPC_BYTES_148_RETRY_COUNT_M, - QP_CONTEXT_QPC_BYTES_148_RETRY_COUNT_S); - qp_attr->rnr_retry = (u8)le32_to_cpu(context->rnr_retry); - -done: - qp_attr->cur_qp_state = qp_attr->qp_state; - qp_attr->cap.max_recv_wr = hr_qp->rq.wqe_cnt; - qp_attr->cap.max_recv_sge = hr_qp->rq.max_gs; - - if (!ibqp->uobject) { - qp_attr->cap.max_send_wr = hr_qp->sq.wqe_cnt; - qp_attr->cap.max_send_sge = hr_qp->sq.max_gs; - } else { - qp_attr->cap.max_send_wr = 0; - qp_attr->cap.max_send_sge = 0; - } - - qp_init_attr->cap = qp_attr->cap; - -out: - mutex_unlock(&hr_qp->mutex); - kfree(context); - return ret; -} - -static int hns_roce_v1_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, - int qp_attr_mask, - struct ib_qp_init_attr *qp_init_attr) -{ - struct hns_roce_qp *hr_qp = to_hr_qp(ibqp); - - return hr_qp->doorbell_qpn <= 1 ? - hns_roce_v1_q_sqp(ibqp, qp_attr, qp_attr_mask, qp_init_attr) : - hns_roce_v1_q_qp(ibqp, qp_attr, qp_attr_mask, qp_init_attr); -} - -int hns_roce_v1_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata) -{ - struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device); - struct hns_roce_qp *hr_qp = to_hr_qp(ibqp); - struct hns_roce_cq *send_cq, *recv_cq; - int ret; - - ret = hns_roce_v1_modify_qp(ibqp, NULL, 0, hr_qp->state, IB_QPS_RESET); - if (ret) - return ret; - - send_cq = hr_qp->ibqp.send_cq ? to_hr_cq(hr_qp->ibqp.send_cq) : NULL; - recv_cq = hr_qp->ibqp.recv_cq ? to_hr_cq(hr_qp->ibqp.recv_cq) : NULL; - - hns_roce_lock_cqs(send_cq, recv_cq); - if (!udata) { - if (recv_cq) - __hns_roce_v1_cq_clean(recv_cq, hr_qp->qpn, - (hr_qp->ibqp.srq ? - to_hr_srq(hr_qp->ibqp.srq) : - NULL)); - - if (send_cq && send_cq != recv_cq) - __hns_roce_v1_cq_clean(send_cq, hr_qp->qpn, NULL); - } - hns_roce_qp_remove(hr_dev, hr_qp); - hns_roce_unlock_cqs(send_cq, recv_cq); - - hns_roce_qp_destroy(hr_dev, hr_qp, udata); - - return 0; -} - -static int hns_roce_v1_destroy_cq(struct ib_cq *ibcq, struct ib_udata *udata) -{ - struct hns_roce_dev *hr_dev = to_hr_dev(ibcq->device); - struct hns_roce_cq *hr_cq = to_hr_cq(ibcq); - struct device *dev = &hr_dev->pdev->dev; - u32 cqe_cnt_ori; - u32 cqe_cnt_cur; - int wait_time = 0; - - /* - * Before freeing cq buffer, we need to ensure that the outstanding CQE - * have been written by checking the CQE counter. - */ - cqe_cnt_ori = roce_read(hr_dev, ROCEE_SCAEP_WR_CQE_CNT); - while (1) { - if (roce_read(hr_dev, ROCEE_CAEP_CQE_WCMD_EMPTY) & - HNS_ROCE_CQE_WCMD_EMPTY_BIT) - break; - - cqe_cnt_cur = roce_read(hr_dev, ROCEE_SCAEP_WR_CQE_CNT); - if ((cqe_cnt_cur - cqe_cnt_ori) >= HNS_ROCE_MIN_CQE_CNT) - break; - - msleep(HNS_ROCE_EACH_FREE_CQ_WAIT_MSECS); - if (wait_time > HNS_ROCE_MAX_FREE_CQ_WAIT_CNT) { - dev_warn(dev, "Destroy cq 0x%lx timeout!\n", - hr_cq->cqn); - break; - } - wait_time++; - } - return 0; -} - -static void set_eq_cons_index_v1(struct hns_roce_eq *eq, u32 req_not) -{ - roce_raw_write((eq->cons_index & HNS_ROCE_V1_CONS_IDX_M) | - (req_not << eq->log_entries), eq->db_reg); -} - -static void hns_roce_v1_wq_catas_err_handle(struct hns_roce_dev *hr_dev, - struct hns_roce_aeqe *aeqe, int qpn) -{ - struct device *dev = &hr_dev->pdev->dev; - - dev_warn(dev, "Local Work Queue Catastrophic Error.\n"); - switch (roce_get_field(aeqe->asyn, HNS_ROCE_AEQE_U32_4_EVENT_SUB_TYPE_M, - HNS_ROCE_AEQE_U32_4_EVENT_SUB_TYPE_S)) { - case HNS_ROCE_LWQCE_QPC_ERROR: - dev_warn(dev, "QP %d, QPC error.\n", qpn); - break; - case HNS_ROCE_LWQCE_MTU_ERROR: - dev_warn(dev, "QP %d, MTU error.\n", qpn); - break; - case HNS_ROCE_LWQCE_WQE_BA_ADDR_ERROR: - dev_warn(dev, "QP %d, WQE BA addr error.\n", qpn); - break; - case HNS_ROCE_LWQCE_WQE_ADDR_ERROR: - dev_warn(dev, "QP %d, WQE addr error.\n", qpn); - break; - case HNS_ROCE_LWQCE_SQ_WQE_SHIFT_ERROR: - dev_warn(dev, "QP %d, WQE shift error\n", qpn); - break; - case HNS_ROCE_LWQCE_SL_ERROR: - dev_warn(dev, "QP %d, SL error.\n", qpn); - break; - case HNS_ROCE_LWQCE_PORT_ERROR: - dev_warn(dev, "QP %d, port error.\n", qpn); - break; - default: - break; - } -} - -static void hns_roce_v1_local_wq_access_err_handle(struct hns_roce_dev *hr_dev, - struct hns_roce_aeqe *aeqe, - int qpn) -{ - struct device *dev = &hr_dev->pdev->dev; - - dev_warn(dev, "Local Access Violation Work Queue Error.\n"); - switch (roce_get_field(aeqe->asyn, HNS_ROCE_AEQE_U32_4_EVENT_SUB_TYPE_M, - HNS_ROCE_AEQE_U32_4_EVENT_SUB_TYPE_S)) { - case HNS_ROCE_LAVWQE_R_KEY_VIOLATION: - dev_warn(dev, "QP %d, R_key violation.\n", qpn); - break; - case HNS_ROCE_LAVWQE_LENGTH_ERROR: - dev_warn(dev, "QP %d, length error.\n", qpn); - break; - case HNS_ROCE_LAVWQE_VA_ERROR: - dev_warn(dev, "QP %d, VA error.\n", qpn); - break; - case HNS_ROCE_LAVWQE_PD_ERROR: - dev_err(dev, "QP %d, PD error.\n", qpn); - break; - case HNS_ROCE_LAVWQE_RW_ACC_ERROR: - dev_warn(dev, "QP %d, rw acc error.\n", qpn); - break; - case HNS_ROCE_LAVWQE_KEY_STATE_ERROR: - dev_warn(dev, "QP %d, key state error.\n", qpn); - break; - case HNS_ROCE_LAVWQE_MR_OPERATION_ERROR: - dev_warn(dev, "QP %d, MR operation error.\n", qpn); - break; - default: - break; - } -} - -static void hns_roce_v1_qp_err_handle(struct hns_roce_dev *hr_dev, - struct hns_roce_aeqe *aeqe, - int event_type) -{ - struct device *dev = &hr_dev->pdev->dev; - int phy_port; - int qpn; - - qpn = roce_get_field(aeqe->event.queue_event.num, - HNS_ROCE_AEQE_EVENT_QP_EVENT_QP_QPN_M, - HNS_ROCE_AEQE_EVENT_QP_EVENT_QP_QPN_S); - phy_port = roce_get_field(aeqe->event.queue_event.num, - HNS_ROCE_AEQE_EVENT_QP_EVENT_PORT_NUM_M, - HNS_ROCE_AEQE_EVENT_QP_EVENT_PORT_NUM_S); - if (qpn <= 1) - qpn = HNS_ROCE_MAX_PORTS * qpn + phy_port; - - switch (event_type) { - case HNS_ROCE_EVENT_TYPE_INV_REQ_LOCAL_WQ_ERROR: - dev_warn(dev, "Invalid Req Local Work Queue Error.\n" - "QP %d, phy_port %d.\n", qpn, phy_port); - break; - case HNS_ROCE_EVENT_TYPE_WQ_CATAS_ERROR: - hns_roce_v1_wq_catas_err_handle(hr_dev, aeqe, qpn); - break; - case HNS_ROCE_EVENT_TYPE_LOCAL_WQ_ACCESS_ERROR: - hns_roce_v1_local_wq_access_err_handle(hr_dev, aeqe, qpn); - break; - default: - break; - } - - hns_roce_qp_event(hr_dev, qpn, event_type); -} - -static void hns_roce_v1_cq_err_handle(struct hns_roce_dev *hr_dev, - struct hns_roce_aeqe *aeqe, - int event_type) -{ - struct device *dev = &hr_dev->pdev->dev; - u32 cqn; - - cqn = roce_get_field(aeqe->event.queue_event.num, - HNS_ROCE_AEQE_EVENT_CQ_EVENT_CQ_CQN_M, - HNS_ROCE_AEQE_EVENT_CQ_EVENT_CQ_CQN_S); - - switch (event_type) { - case HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR: - dev_warn(dev, "CQ 0x%x access err.\n", cqn); - break; - case HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW: - dev_warn(dev, "CQ 0x%x overflow\n", cqn); - break; - case HNS_ROCE_EVENT_TYPE_CQ_ID_INVALID: - dev_warn(dev, "CQ 0x%x ID invalid.\n", cqn); - break; - default: - break; - } - - hns_roce_cq_event(hr_dev, cqn, event_type); -} - -static void hns_roce_v1_db_overflow_handle(struct hns_roce_dev *hr_dev, - struct hns_roce_aeqe *aeqe) -{ - struct device *dev = &hr_dev->pdev->dev; - - switch (roce_get_field(aeqe->asyn, HNS_ROCE_AEQE_U32_4_EVENT_SUB_TYPE_M, - HNS_ROCE_AEQE_U32_4_EVENT_SUB_TYPE_S)) { - case HNS_ROCE_DB_SUBTYPE_SDB_OVF: - dev_warn(dev, "SDB overflow.\n"); - break; - case HNS_ROCE_DB_SUBTYPE_SDB_ALM_OVF: - dev_warn(dev, "SDB almost overflow.\n"); - break; - case HNS_ROCE_DB_SUBTYPE_SDB_ALM_EMP: - dev_warn(dev, "SDB almost empty.\n"); - break; - case HNS_ROCE_DB_SUBTYPE_ODB_OVF: - dev_warn(dev, "ODB overflow.\n"); - break; - case HNS_ROCE_DB_SUBTYPE_ODB_ALM_OVF: - dev_warn(dev, "ODB almost overflow.\n"); - break; - case HNS_ROCE_DB_SUBTYPE_ODB_ALM_EMP: - dev_warn(dev, "SDB almost empty.\n"); - break; - default: - break; - } -} - -static struct hns_roce_aeqe *get_aeqe_v1(struct hns_roce_eq *eq, u32 entry) -{ - unsigned long off = (entry & (eq->entries - 1)) * HNS_ROCE_AEQE_SIZE; - - return (struct hns_roce_aeqe *)((u8 *) - (eq->buf_list[off / HNS_ROCE_BA_SIZE].buf) + - off % HNS_ROCE_BA_SIZE); -} - -static struct hns_roce_aeqe *next_aeqe_sw_v1(struct hns_roce_eq *eq) -{ - struct hns_roce_aeqe *aeqe = get_aeqe_v1(eq, eq->cons_index); - - return (roce_get_bit(aeqe->asyn, HNS_ROCE_AEQE_U32_4_OWNER_S) ^ - !!(eq->cons_index & eq->entries)) ? aeqe : NULL; -} - -static int hns_roce_v1_aeq_int(struct hns_roce_dev *hr_dev, - struct hns_roce_eq *eq) -{ - struct device *dev = &hr_dev->pdev->dev; - struct hns_roce_aeqe *aeqe; - int aeqes_found = 0; - int event_type; - - while ((aeqe = next_aeqe_sw_v1(eq))) { - /* Make sure we read the AEQ entry after we have checked the - * ownership bit - */ - dma_rmb(); - - dev_dbg(dev, "aeqe = %pK, aeqe->asyn.event_type = 0x%lx\n", - aeqe, - roce_get_field(aeqe->asyn, - HNS_ROCE_AEQE_U32_4_EVENT_TYPE_M, - HNS_ROCE_AEQE_U32_4_EVENT_TYPE_S)); - event_type = roce_get_field(aeqe->asyn, - HNS_ROCE_AEQE_U32_4_EVENT_TYPE_M, - HNS_ROCE_AEQE_U32_4_EVENT_TYPE_S); - switch (event_type) { - case HNS_ROCE_EVENT_TYPE_PATH_MIG: - dev_warn(dev, "PATH MIG not supported\n"); - break; - case HNS_ROCE_EVENT_TYPE_COMM_EST: - dev_warn(dev, "COMMUNICATION established\n"); - break; - case HNS_ROCE_EVENT_TYPE_SQ_DRAINED: - dev_warn(dev, "SQ DRAINED not supported\n"); - break; - case HNS_ROCE_EVENT_TYPE_PATH_MIG_FAILED: - dev_warn(dev, "PATH MIG failed\n"); - break; - case HNS_ROCE_EVENT_TYPE_INV_REQ_LOCAL_WQ_ERROR: - case HNS_ROCE_EVENT_TYPE_WQ_CATAS_ERROR: - case HNS_ROCE_EVENT_TYPE_LOCAL_WQ_ACCESS_ERROR: - hns_roce_v1_qp_err_handle(hr_dev, aeqe, event_type); - break; - case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH: - case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR: - case HNS_ROCE_EVENT_TYPE_SRQ_LAST_WQE_REACH: - dev_warn(dev, "SRQ not support!\n"); - break; - case HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR: - case HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW: - case HNS_ROCE_EVENT_TYPE_CQ_ID_INVALID: - hns_roce_v1_cq_err_handle(hr_dev, aeqe, event_type); - break; - case HNS_ROCE_EVENT_TYPE_PORT_CHANGE: - dev_warn(dev, "port change.\n"); - break; - case HNS_ROCE_EVENT_TYPE_MB: - hns_roce_cmd_event(hr_dev, - le16_to_cpu(aeqe->event.cmd.token), - aeqe->event.cmd.status, - le64_to_cpu(aeqe->event.cmd.out_param - )); - break; - case HNS_ROCE_EVENT_TYPE_DB_OVERFLOW: - hns_roce_v1_db_overflow_handle(hr_dev, aeqe); - break; - default: - dev_warn(dev, "Unhandled event %d on EQ %d at idx %u.\n", - event_type, eq->eqn, eq->cons_index); - break; - } - - eq->cons_index++; - aeqes_found = 1; - - if (eq->cons_index > 2 * hr_dev->caps.aeqe_depth - 1) - eq->cons_index = 0; - } - - set_eq_cons_index_v1(eq, 0); - - return aeqes_found; -} - -static struct hns_roce_ceqe *get_ceqe_v1(struct hns_roce_eq *eq, u32 entry) -{ - unsigned long off = (entry & (eq->entries - 1)) * HNS_ROCE_CEQE_SIZE; - - return (struct hns_roce_ceqe *)((u8 *) - (eq->buf_list[off / HNS_ROCE_BA_SIZE].buf) + - off % HNS_ROCE_BA_SIZE); -} - -static struct hns_roce_ceqe *next_ceqe_sw_v1(struct hns_roce_eq *eq) -{ - struct hns_roce_ceqe *ceqe = get_ceqe_v1(eq, eq->cons_index); - - return (!!(roce_get_bit(ceqe->comp, - HNS_ROCE_CEQE_CEQE_COMP_OWNER_S))) ^ - (!!(eq->cons_index & eq->entries)) ? ceqe : NULL; -} - -static int hns_roce_v1_ceq_int(struct hns_roce_dev *hr_dev, - struct hns_roce_eq *eq) -{ - struct hns_roce_ceqe *ceqe; - int ceqes_found = 0; - u32 cqn; - - while ((ceqe = next_ceqe_sw_v1(eq))) { - /* Make sure we read CEQ entry after we have checked the - * ownership bit - */ - dma_rmb(); - - cqn = roce_get_field(ceqe->comp, - HNS_ROCE_CEQE_CEQE_COMP_CQN_M, - HNS_ROCE_CEQE_CEQE_COMP_CQN_S); - hns_roce_cq_completion(hr_dev, cqn); - - ++eq->cons_index; - ceqes_found = 1; - - if (eq->cons_index > - EQ_DEPTH_COEFF * hr_dev->caps.ceqe_depth - 1) - eq->cons_index = 0; - } - - set_eq_cons_index_v1(eq, 0); - - return ceqes_found; -} - -static irqreturn_t hns_roce_v1_msix_interrupt_eq(int irq, void *eq_ptr) -{ - struct hns_roce_eq *eq = eq_ptr; - struct hns_roce_dev *hr_dev = eq->hr_dev; - int int_work; - - if (eq->type_flag == HNS_ROCE_CEQ) - /* CEQ irq routine, CEQ is pulse irq, not clear */ - int_work = hns_roce_v1_ceq_int(hr_dev, eq); - else - /* AEQ irq routine, AEQ is pulse irq, not clear */ - int_work = hns_roce_v1_aeq_int(hr_dev, eq); - - return IRQ_RETVAL(int_work); -} - -static irqreturn_t hns_roce_v1_msix_interrupt_abn(int irq, void *dev_id) -{ - struct hns_roce_dev *hr_dev = dev_id; - struct device *dev = &hr_dev->pdev->dev; - int int_work = 0; - u32 caepaemask_val; - u32 cealmovf_val; - u32 caepaest_val; - u32 aeshift_val; - u32 ceshift_val; - u32 cemask_val; - __le32 tmp; - int i; - - /* - * Abnormal interrupt: - * AEQ overflow, ECC multi-bit err, CEQ overflow must clear - * interrupt, mask irq, clear irq, cancel mask operation - */ - aeshift_val = roce_read(hr_dev, ROCEE_CAEP_AEQC_AEQE_SHIFT_REG); - tmp = cpu_to_le32(aeshift_val); - - /* AEQE overflow */ - if (roce_get_bit(tmp, - ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQ_ALM_OVF_INT_ST_S) == 1) { - dev_warn(dev, "AEQ overflow!\n"); - - /* Set mask */ - caepaemask_val = roce_read(hr_dev, ROCEE_CAEP_AE_MASK_REG); - tmp = cpu_to_le32(caepaemask_val); - roce_set_bit(tmp, ROCEE_CAEP_AE_MASK_CAEP_AEQ_ALM_OVF_MASK_S, - HNS_ROCE_INT_MASK_ENABLE); - caepaemask_val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_CAEP_AE_MASK_REG, caepaemask_val); - - /* Clear int state(INT_WC : write 1 clear) */ - caepaest_val = roce_read(hr_dev, ROCEE_CAEP_AE_ST_REG); - tmp = cpu_to_le32(caepaest_val); - roce_set_bit(tmp, ROCEE_CAEP_AE_ST_CAEP_AEQ_ALM_OVF_S, 1); - caepaest_val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_CAEP_AE_ST_REG, caepaest_val); - - /* Clear mask */ - caepaemask_val = roce_read(hr_dev, ROCEE_CAEP_AE_MASK_REG); - tmp = cpu_to_le32(caepaemask_val); - roce_set_bit(tmp, ROCEE_CAEP_AE_MASK_CAEP_AEQ_ALM_OVF_MASK_S, - HNS_ROCE_INT_MASK_DISABLE); - caepaemask_val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_CAEP_AE_MASK_REG, caepaemask_val); - } - - /* CEQ almost overflow */ - for (i = 0; i < hr_dev->caps.num_comp_vectors; i++) { - ceshift_val = roce_read(hr_dev, ROCEE_CAEP_CEQC_SHIFT_0_REG + - i * CEQ_REG_OFFSET); - tmp = cpu_to_le32(ceshift_val); - - if (roce_get_bit(tmp, - ROCEE_CAEP_CEQC_SHIFT_CAEP_CEQ_ALM_OVF_INT_ST_S) == 1) { - dev_warn(dev, "CEQ[%d] almost overflow!\n", i); - int_work++; - - /* Set mask */ - cemask_val = roce_read(hr_dev, - ROCEE_CAEP_CE_IRQ_MASK_0_REG + - i * CEQ_REG_OFFSET); - tmp = cpu_to_le32(cemask_val); - roce_set_bit(tmp, - ROCEE_CAEP_CE_IRQ_MASK_CAEP_CEQ_ALM_OVF_MASK_S, - HNS_ROCE_INT_MASK_ENABLE); - cemask_val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_CAEP_CE_IRQ_MASK_0_REG + - i * CEQ_REG_OFFSET, cemask_val); - - /* Clear int state(INT_WC : write 1 clear) */ - cealmovf_val = roce_read(hr_dev, - ROCEE_CAEP_CEQ_ALM_OVF_0_REG + - i * CEQ_REG_OFFSET); - tmp = cpu_to_le32(cealmovf_val); - roce_set_bit(tmp, - ROCEE_CAEP_CEQ_ALM_OVF_CAEP_CEQ_ALM_OVF_S, - 1); - cealmovf_val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_CAEP_CEQ_ALM_OVF_0_REG + - i * CEQ_REG_OFFSET, cealmovf_val); - - /* Clear mask */ - cemask_val = roce_read(hr_dev, - ROCEE_CAEP_CE_IRQ_MASK_0_REG + - i * CEQ_REG_OFFSET); - tmp = cpu_to_le32(cemask_val); - roce_set_bit(tmp, - ROCEE_CAEP_CE_IRQ_MASK_CAEP_CEQ_ALM_OVF_MASK_S, - HNS_ROCE_INT_MASK_DISABLE); - cemask_val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_CAEP_CE_IRQ_MASK_0_REG + - i * CEQ_REG_OFFSET, cemask_val); - } - } - - /* ECC multi-bit error alarm */ - dev_warn(dev, "ECC UCERR ALARM: 0x%x, 0x%x, 0x%x\n", - roce_read(hr_dev, ROCEE_ECC_UCERR_ALM0_REG), - roce_read(hr_dev, ROCEE_ECC_UCERR_ALM1_REG), - roce_read(hr_dev, ROCEE_ECC_UCERR_ALM2_REG)); - - dev_warn(dev, "ECC CERR ALARM: 0x%x, 0x%x, 0x%x\n", - roce_read(hr_dev, ROCEE_ECC_CERR_ALM0_REG), - roce_read(hr_dev, ROCEE_ECC_CERR_ALM1_REG), - roce_read(hr_dev, ROCEE_ECC_CERR_ALM2_REG)); - - return IRQ_RETVAL(int_work); -} - -static void hns_roce_v1_int_mask_enable(struct hns_roce_dev *hr_dev) -{ - u32 aemask_val; - int masken = 0; - __le32 tmp; - int i; - - /* AEQ INT */ - aemask_val = roce_read(hr_dev, ROCEE_CAEP_AE_MASK_REG); - tmp = cpu_to_le32(aemask_val); - roce_set_bit(tmp, ROCEE_CAEP_AE_MASK_CAEP_AEQ_ALM_OVF_MASK_S, - masken); - roce_set_bit(tmp, ROCEE_CAEP_AE_MASK_CAEP_AE_IRQ_MASK_S, masken); - aemask_val = le32_to_cpu(tmp); - roce_write(hr_dev, ROCEE_CAEP_AE_MASK_REG, aemask_val); - - /* CEQ INT */ - for (i = 0; i < hr_dev->caps.num_comp_vectors; i++) { - /* IRQ mask */ - roce_write(hr_dev, ROCEE_CAEP_CE_IRQ_MASK_0_REG + - i * CEQ_REG_OFFSET, masken); - } -} - -static void hns_roce_v1_free_eq(struct hns_roce_dev *hr_dev, - struct hns_roce_eq *eq) -{ - int npages = (PAGE_ALIGN(eq->eqe_size * eq->entries) + - HNS_ROCE_BA_SIZE - 1) / HNS_ROCE_BA_SIZE; - int i; - - if (!eq->buf_list) - return; - - for (i = 0; i < npages; ++i) - dma_free_coherent(&hr_dev->pdev->dev, HNS_ROCE_BA_SIZE, - eq->buf_list[i].buf, eq->buf_list[i].map); - - kfree(eq->buf_list); -} - -static void hns_roce_v1_enable_eq(struct hns_roce_dev *hr_dev, int eq_num, - int enable_flag) -{ - void __iomem *eqc = hr_dev->eq_table.eqc_base[eq_num]; - __le32 tmp; - u32 val; - - val = readl(eqc); - tmp = cpu_to_le32(val); - - if (enable_flag) - roce_set_field(tmp, - ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_STATE_M, - ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_STATE_S, - HNS_ROCE_EQ_STAT_VALID); - else - roce_set_field(tmp, - ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_STATE_M, - ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_STATE_S, - HNS_ROCE_EQ_STAT_INVALID); - - val = le32_to_cpu(tmp); - writel(val, eqc); -} - -static int hns_roce_v1_create_eq(struct hns_roce_dev *hr_dev, - struct hns_roce_eq *eq) -{ - void __iomem *eqc = hr_dev->eq_table.eqc_base[eq->eqn]; - struct device *dev = &hr_dev->pdev->dev; - dma_addr_t tmp_dma_addr; - u32 eqcuridx_val; - u32 eqconsindx_val; - u32 eqshift_val; - __le32 tmp2 = 0; - __le32 tmp1 = 0; - __le32 tmp = 0; - int num_bas; - int ret; - int i; - - num_bas = (PAGE_ALIGN(eq->entries * eq->eqe_size) + - HNS_ROCE_BA_SIZE - 1) / HNS_ROCE_BA_SIZE; - - if ((eq->entries * eq->eqe_size) > HNS_ROCE_BA_SIZE) { - dev_err(dev, "[error]eq buf %d gt ba size(%d) need bas=%d\n", - (eq->entries * eq->eqe_size), HNS_ROCE_BA_SIZE, - num_bas); - return -EINVAL; - } - - eq->buf_list = kcalloc(num_bas, sizeof(*eq->buf_list), GFP_KERNEL); - if (!eq->buf_list) - return -ENOMEM; - - for (i = 0; i < num_bas; ++i) { - eq->buf_list[i].buf = dma_alloc_coherent(dev, HNS_ROCE_BA_SIZE, - &tmp_dma_addr, - GFP_KERNEL); - if (!eq->buf_list[i].buf) { - ret = -ENOMEM; - goto err_out_free_pages; - } - - eq->buf_list[i].map = tmp_dma_addr; - } - eq->cons_index = 0; - roce_set_field(tmp, ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_STATE_M, - ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_STATE_S, - HNS_ROCE_EQ_STAT_INVALID); - roce_set_field(tmp, ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_AEQE_SHIFT_M, - ROCEE_CAEP_AEQC_AEQE_SHIFT_CAEP_AEQC_AEQE_SHIFT_S, - eq->log_entries); - eqshift_val = le32_to_cpu(tmp); - writel(eqshift_val, eqc); - - /* Configure eq extended address 12~44bit */ - writel((u32)(eq->buf_list[0].map >> 12), eqc + 4); - - /* - * Configure eq extended address 45~49 bit. - * 44 = 32 + 12, When evaluating addr to hardware, shift 12 because of - * using 4K page, and shift more 32 because of - * calculating the high 32 bit value evaluated to hardware. - */ - roce_set_field(tmp1, ROCEE_CAEP_AEQE_CUR_IDX_CAEP_AEQ_BT_H_M, - ROCEE_CAEP_AEQE_CUR_IDX_CAEP_AEQ_BT_H_S, - eq->buf_list[0].map >> 44); - roce_set_field(tmp1, ROCEE_CAEP_AEQE_CUR_IDX_CAEP_AEQE_CUR_IDX_M, - ROCEE_CAEP_AEQE_CUR_IDX_CAEP_AEQE_CUR_IDX_S, 0); - eqcuridx_val = le32_to_cpu(tmp1); - writel(eqcuridx_val, eqc + 8); - - /* Configure eq consumer index */ - roce_set_field(tmp2, ROCEE_CAEP_AEQE_CONS_IDX_CAEP_AEQE_CONS_IDX_M, - ROCEE_CAEP_AEQE_CONS_IDX_CAEP_AEQE_CONS_IDX_S, 0); - eqconsindx_val = le32_to_cpu(tmp2); - writel(eqconsindx_val, eqc + 0xc); - - return 0; - -err_out_free_pages: - for (i -= 1; i >= 0; i--) - dma_free_coherent(dev, HNS_ROCE_BA_SIZE, eq->buf_list[i].buf, - eq->buf_list[i].map); - - kfree(eq->buf_list); - return ret; -} - -static int hns_roce_v1_init_eq_table(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_eq_table *eq_table = &hr_dev->eq_table; - struct device *dev = &hr_dev->pdev->dev; - struct hns_roce_eq *eq; - int irq_num; - int eq_num; - int ret; - int i, j; - - eq_num = hr_dev->caps.num_comp_vectors + hr_dev->caps.num_aeq_vectors; - irq_num = eq_num + hr_dev->caps.num_other_vectors; - - eq_table->eq = kcalloc(eq_num, sizeof(*eq_table->eq), GFP_KERNEL); - if (!eq_table->eq) - return -ENOMEM; - - eq_table->eqc_base = kcalloc(eq_num, sizeof(*eq_table->eqc_base), - GFP_KERNEL); - if (!eq_table->eqc_base) { - ret = -ENOMEM; - goto err_eqc_base_alloc_fail; - } - - for (i = 0; i < eq_num; i++) { - eq = &eq_table->eq[i]; - eq->hr_dev = hr_dev; - eq->eqn = i; - eq->irq = hr_dev->irq[i]; - eq->log_page_size = PAGE_SHIFT; - - if (i < hr_dev->caps.num_comp_vectors) { - /* CEQ */ - eq_table->eqc_base[i] = hr_dev->reg_base + - ROCEE_CAEP_CEQC_SHIFT_0_REG + - CEQ_REG_OFFSET * i; - eq->type_flag = HNS_ROCE_CEQ; - eq->db_reg = hr_dev->reg_base + - ROCEE_CAEP_CEQC_CONS_IDX_0_REG + - CEQ_REG_OFFSET * i; - eq->entries = hr_dev->caps.ceqe_depth; - eq->log_entries = ilog2(eq->entries); - eq->eqe_size = HNS_ROCE_CEQE_SIZE; - } else { - /* AEQ */ - eq_table->eqc_base[i] = hr_dev->reg_base + - ROCEE_CAEP_AEQC_AEQE_SHIFT_REG; - eq->type_flag = HNS_ROCE_AEQ; - eq->db_reg = hr_dev->reg_base + - ROCEE_CAEP_AEQE_CONS_IDX_REG; - eq->entries = hr_dev->caps.aeqe_depth; - eq->log_entries = ilog2(eq->entries); - eq->eqe_size = HNS_ROCE_AEQE_SIZE; - } - } - - /* Disable irq */ - hns_roce_v1_int_mask_enable(hr_dev); - - /* Configure ce int interval */ - roce_write(hr_dev, ROCEE_CAEP_CE_INTERVAL_CFG_REG, - HNS_ROCE_CEQ_DEFAULT_INTERVAL); - - /* Configure ce int burst num */ - roce_write(hr_dev, ROCEE_CAEP_CE_BURST_NUM_CFG_REG, - HNS_ROCE_CEQ_DEFAULT_BURST_NUM); - - for (i = 0; i < eq_num; i++) { - ret = hns_roce_v1_create_eq(hr_dev, &eq_table->eq[i]); - if (ret) { - dev_err(dev, "eq create failed\n"); - goto err_create_eq_fail; - } - } - - for (j = 0; j < irq_num; j++) { - if (j < eq_num) - ret = request_irq(hr_dev->irq[j], - hns_roce_v1_msix_interrupt_eq, 0, - hr_dev->irq_names[j], - &eq_table->eq[j]); - else - ret = request_irq(hr_dev->irq[j], - hns_roce_v1_msix_interrupt_abn, 0, - hr_dev->irq_names[j], hr_dev); - - if (ret) { - dev_err(dev, "request irq error!\n"); - goto err_request_irq_fail; - } - } - - for (i = 0; i < eq_num; i++) - hns_roce_v1_enable_eq(hr_dev, i, EQ_ENABLE); - - return 0; - -err_request_irq_fail: - for (j -= 1; j >= 0; j--) - free_irq(hr_dev->irq[j], &eq_table->eq[j]); - -err_create_eq_fail: - for (i -= 1; i >= 0; i--) - hns_roce_v1_free_eq(hr_dev, &eq_table->eq[i]); - - kfree(eq_table->eqc_base); - -err_eqc_base_alloc_fail: - kfree(eq_table->eq); - - return ret; -} - -static void hns_roce_v1_cleanup_eq_table(struct hns_roce_dev *hr_dev) -{ - struct hns_roce_eq_table *eq_table = &hr_dev->eq_table; - int irq_num; - int eq_num; - int i; - - eq_num = hr_dev->caps.num_comp_vectors + hr_dev->caps.num_aeq_vectors; - irq_num = eq_num + hr_dev->caps.num_other_vectors; - for (i = 0; i < eq_num; i++) { - /* Disable EQ */ - hns_roce_v1_enable_eq(hr_dev, i, EQ_DISABLE); - - free_irq(hr_dev->irq[i], &eq_table->eq[i]); - - hns_roce_v1_free_eq(hr_dev, &eq_table->eq[i]); - } - for (i = eq_num; i < irq_num; i++) - free_irq(hr_dev->irq[i], hr_dev); - - kfree(eq_table->eqc_base); - kfree(eq_table->eq); -} - -static const struct ib_device_ops hns_roce_v1_dev_ops = { - .destroy_qp = hns_roce_v1_destroy_qp, - .poll_cq = hns_roce_v1_poll_cq, - .post_recv = hns_roce_v1_post_recv, - .post_send = hns_roce_v1_post_send, - .query_qp = hns_roce_v1_query_qp, - .req_notify_cq = hns_roce_v1_req_notify_cq, -}; - -static const struct hns_roce_hw hns_roce_hw_v1 = { - .reset = hns_roce_v1_reset, - .hw_profile = hns_roce_v1_profile, - .hw_init = hns_roce_v1_init, - .hw_exit = hns_roce_v1_exit, - .post_mbox = hns_roce_v1_post_mbox, - .poll_mbox_done = hns_roce_v1_chk_mbox, - .set_gid = hns_roce_v1_set_gid, - .set_mac = hns_roce_v1_set_mac, - .set_mtu = hns_roce_v1_set_mtu, - .write_mtpt = hns_roce_v1_write_mtpt, - .write_cqc = hns_roce_v1_write_cqc, - .set_hem = hns_roce_v1_set_hem, - .clear_hem = hns_roce_v1_clear_hem, - .modify_qp = hns_roce_v1_modify_qp, - .dereg_mr = hns_roce_v1_dereg_mr, - .destroy_cq = hns_roce_v1_destroy_cq, - .init_eq = hns_roce_v1_init_eq_table, - .cleanup_eq = hns_roce_v1_cleanup_eq_table, - .hns_roce_dev_ops = &hns_roce_v1_dev_ops, -}; - -static const struct of_device_id hns_roce_of_match[] = { - { .compatible = "hisilicon,hns-roce-v1", .data = &hns_roce_hw_v1, }, - {}, -}; -MODULE_DEVICE_TABLE(of, hns_roce_of_match); - -static const struct acpi_device_id hns_roce_acpi_match[] = { - { "HISI00D1", (kernel_ulong_t)&hns_roce_hw_v1 }, - {}, -}; -MODULE_DEVICE_TABLE(acpi, hns_roce_acpi_match); - -static struct -platform_device *hns_roce_find_pdev(struct fwnode_handle *fwnode) -{ - struct device *dev; - - /* get the 'device' corresponding to the matching 'fwnode' */ - dev = bus_find_device_by_fwnode(&platform_bus_type, fwnode); - /* get the platform device */ - return dev ? to_platform_device(dev) : NULL; -} - -static int hns_roce_get_cfg(struct hns_roce_dev *hr_dev) -{ - struct device *dev = &hr_dev->pdev->dev; - struct platform_device *pdev = NULL; - struct net_device *netdev = NULL; - struct device_node *net_node; - int port_cnt = 0; - u8 phy_port; - int ret; - int i; - - /* check if we are compatible with the underlying SoC */ - if (dev_of_node(dev)) { - const struct of_device_id *of_id; - - of_id = of_match_node(hns_roce_of_match, dev->of_node); - if (!of_id) { - dev_err(dev, "device is not compatible!\n"); - return -ENXIO; - } - hr_dev->hw = (const struct hns_roce_hw *)of_id->data; - if (!hr_dev->hw) { - dev_err(dev, "couldn't get H/W specific DT data!\n"); - return -ENXIO; - } - } else if (is_acpi_device_node(dev->fwnode)) { - const struct acpi_device_id *acpi_id; - - acpi_id = acpi_match_device(hns_roce_acpi_match, dev); - if (!acpi_id) { - dev_err(dev, "device is not compatible!\n"); - return -ENXIO; - } - hr_dev->hw = (const struct hns_roce_hw *) acpi_id->driver_data; - if (!hr_dev->hw) { - dev_err(dev, "couldn't get H/W specific ACPI data!\n"); - return -ENXIO; - } - } else { - dev_err(dev, "can't read compatibility data from DT or ACPI\n"); - return -ENXIO; - } - - /* get the mapped register base address */ - hr_dev->reg_base = devm_platform_ioremap_resource(hr_dev->pdev, 0); - if (IS_ERR(hr_dev->reg_base)) - return PTR_ERR(hr_dev->reg_base); - - /* read the node_guid of IB device from the DT or ACPI */ - ret = device_property_read_u8_array(dev, "node-guid", - (u8 *)&hr_dev->ib_dev.node_guid, - GUID_LEN); - if (ret) { - dev_err(dev, "couldn't get node_guid from DT or ACPI!\n"); - return ret; - } - - /* get the RoCE associated ethernet ports or netdevices */ - for (i = 0; i < HNS_ROCE_MAX_PORTS; i++) { - if (dev_of_node(dev)) { - net_node = of_parse_phandle(dev->of_node, "eth-handle", - i); - if (!net_node) - continue; - pdev = of_find_device_by_node(net_node); - } else if (is_acpi_device_node(dev->fwnode)) { - struct fwnode_reference_args args; - - ret = acpi_node_get_property_reference(dev->fwnode, - "eth-handle", - i, &args); - if (ret) - continue; - pdev = hns_roce_find_pdev(args.fwnode); - } else { - dev_err(dev, "cannot read data from DT or ACPI\n"); - return -ENXIO; - } - - if (pdev) { - netdev = platform_get_drvdata(pdev); - phy_port = (u8)i; - if (netdev) { - hr_dev->iboe.netdevs[port_cnt] = netdev; - hr_dev->iboe.phy_port[port_cnt] = phy_port; - } else { - dev_err(dev, "no netdev found with pdev %s\n", - pdev->name); - return -ENODEV; - } - port_cnt++; - } - } - - if (port_cnt == 0) { - dev_err(dev, "unable to get eth-handle for available ports!\n"); - return -EINVAL; - } - - hr_dev->caps.num_ports = port_cnt; - - /* cmd issue mode: 0 is poll, 1 is event */ - hr_dev->cmd_mod = 1; - hr_dev->loop_idc = 0; - hr_dev->sdb_offset = ROCEE_DB_SQ_L_0_REG; - hr_dev->odb_offset = ROCEE_DB_OTHERS_L_0_REG; - - /* read the interrupt names from the DT or ACPI */ - ret = device_property_read_string_array(dev, "interrupt-names", - hr_dev->irq_names, - HNS_ROCE_V1_MAX_IRQ_NUM); - if (ret < 0) { - dev_err(dev, "couldn't get interrupt names from DT or ACPI!\n"); - return ret; - } - - /* fetch the interrupt numbers */ - for (i = 0; i < HNS_ROCE_V1_MAX_IRQ_NUM; i++) { - hr_dev->irq[i] = platform_get_irq(hr_dev->pdev, i); - if (hr_dev->irq[i] <= 0) - return -EINVAL; - } - - return 0; -} - -/** - * hns_roce_probe - RoCE driver entrance - * @pdev: pointer to platform device - * Return : int - * - */ -static int hns_roce_probe(struct platform_device *pdev) -{ - int ret; - struct hns_roce_dev *hr_dev; - struct device *dev = &pdev->dev; - - hr_dev = ib_alloc_device(hns_roce_dev, ib_dev); - if (!hr_dev) - return -ENOMEM; - - hr_dev->priv = kzalloc(sizeof(struct hns_roce_v1_priv), GFP_KERNEL); - if (!hr_dev->priv) { - ret = -ENOMEM; - goto error_failed_kzalloc; - } - - hr_dev->pdev = pdev; - hr_dev->dev = dev; - platform_set_drvdata(pdev, hr_dev); - - if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64ULL)) && - dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32ULL))) { - dev_err(dev, "Not usable DMA addressing mode\n"); - ret = -EIO; - goto error_failed_get_cfg; - } - - ret = hns_roce_get_cfg(hr_dev); - if (ret) { - dev_err(dev, "Get Configuration failed!\n"); - goto error_failed_get_cfg; - } - - ret = hns_roce_init(hr_dev); - if (ret) { - dev_err(dev, "RoCE engine init failed!\n"); - goto error_failed_get_cfg; - } - - return 0; - -error_failed_get_cfg: - kfree(hr_dev->priv); - -error_failed_kzalloc: - ib_dealloc_device(&hr_dev->ib_dev); - - return ret; -} - -/** - * hns_roce_remove - remove RoCE device - * @pdev: pointer to platform device - */ -static int hns_roce_remove(struct platform_device *pdev) -{ - struct hns_roce_dev *hr_dev = platform_get_drvdata(pdev); - - hns_roce_exit(hr_dev); - kfree(hr_dev->priv); - ib_dealloc_device(&hr_dev->ib_dev); - - return 0; -} - -static struct platform_driver hns_roce_driver = { - .probe = hns_roce_probe, - .remove = hns_roce_remove, - .driver = { - .name = DRV_NAME, - .of_match_table = hns_roce_of_match, - .acpi_match_table = ACPI_PTR(hns_roce_acpi_match), - }, -}; - -module_platform_driver(hns_roce_driver); - -MODULE_LICENSE("Dual BSD/GPL"); -MODULE_AUTHOR("Wei Hu <xavier.huwei(a)huawei.com>"); -MODULE_AUTHOR("Nenglong Zhao <zhaonenglong(a)hisilicon.com>"); -MODULE_AUTHOR("Lijun Ou <oulijun(a)huawei.com>"); -MODULE_DESCRIPTION("Hisilicon Hip06 Family RoCE Driver"); diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.h b/drivers/infiniband/hw/hns/hns_roce_hw_v1.h deleted file mode 100644 index 60fdcbae6729..000000000000 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v1.h +++ /dev/null @@ -1,1147 +0,0 @@ -/* - * Copyright (c) 2016 Hisilicon Limited. - * - * This software is available to you under a choice of one of two - * licenses. You may choose to be licensed under the terms of the GNU - * General Public License (GPL) Version 2, available from the file - * COPYING in the main directory of this source tree, or the - * OpenIB.org BSD license below: - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * - * - Redistributions of source code must retain the above - * copyright notice, this list of conditions and the following - * disclaimer. - * - * - Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _HNS_ROCE_HW_V1_H -#define _HNS_ROCE_HW_V1_H - -#define CQ_STATE_VALID 2 - -#define HNS_ROCE_V1_MAX_PD_NUM 0x8000 -#define HNS_ROCE_V1_MAX_CQ_NUM 0x10000 -#define HNS_ROCE_V1_MAX_CQE_NUM 0x8000 - -#define HNS_ROCE_V1_MAX_QP_NUM 0x40000 -#define HNS_ROCE_V1_MAX_WQE_NUM 0x4000 - -#define HNS_ROCE_V1_MAX_MTPT_NUM 0x80000 - -#define HNS_ROCE_V1_MAX_MTT_SEGS 0x100000 - -#define HNS_ROCE_V1_MAX_QP_INIT_RDMA 128 -#define HNS_ROCE_V1_MAX_QP_DEST_RDMA 128 - -#define HNS_ROCE_V1_MAX_SQ_DESC_SZ 64 -#define HNS_ROCE_V1_MAX_RQ_DESC_SZ 64 -#define HNS_ROCE_V1_SG_NUM 2 -#define HNS_ROCE_V1_INLINE_SIZE 32 - -#define HNS_ROCE_V1_UAR_NUM 256 -#define HNS_ROCE_V1_PHY_UAR_NUM 8 - -#define HNS_ROCE_V1_GID_NUM 16 -#define HNS_ROCE_V1_RESV_QP 8 - -#define HNS_ROCE_V1_MAX_IRQ_NUM 34 -#define HNS_ROCE_V1_COMP_VEC_NUM 32 -#define HNS_ROCE_V1_AEQE_VEC_NUM 1 -#define HNS_ROCE_V1_ABNORMAL_VEC_NUM 1 - -#define HNS_ROCE_V1_COMP_EQE_NUM 0x8000 -#define HNS_ROCE_V1_ASYNC_EQE_NUM 0x400 - -#define HNS_ROCE_V1_QPC_SIZE 256 -#define HNS_ROCE_V1_IRRL_ENTRY_SIZE 8 -#define HNS_ROCE_V1_CQC_ENTRY_SIZE 64 -#define HNS_ROCE_V1_MTPT_ENTRY_SIZE 64 -#define HNS_ROCE_V1_MTT_ENTRY_SIZE 64 - -#define HNS_ROCE_V1_CQE_SIZE 32 -#define HNS_ROCE_V1_PAGE_SIZE_SUPPORT 0xFFFFF000 - -#define HNS_ROCE_V1_TABLE_CHUNK_SIZE (1 << 17) - -#define HNS_ROCE_V1_EXT_RAQ_WF 8 -#define HNS_ROCE_V1_RAQ_ENTRY 64 -#define HNS_ROCE_V1_RAQ_DEPTH 32768 -#define HNS_ROCE_V1_RAQ_SIZE (HNS_ROCE_V1_RAQ_ENTRY * HNS_ROCE_V1_RAQ_DEPTH) - -#define HNS_ROCE_V1_SDB_DEPTH 0x400 -#define HNS_ROCE_V1_ODB_DEPTH 0x400 - -#define HNS_ROCE_V1_DB_RSVD 0x80 - -#define HNS_ROCE_V1_SDB_ALEPT HNS_ROCE_V1_DB_RSVD -#define HNS_ROCE_V1_SDB_ALFUL (HNS_ROCE_V1_SDB_DEPTH - HNS_ROCE_V1_DB_RSVD) -#define HNS_ROCE_V1_ODB_ALEPT HNS_ROCE_V1_DB_RSVD -#define HNS_ROCE_V1_ODB_ALFUL (HNS_ROCE_V1_ODB_DEPTH - HNS_ROCE_V1_DB_RSVD) - -#define HNS_ROCE_V1_EXT_SDB_DEPTH 0x4000 -#define HNS_ROCE_V1_EXT_ODB_DEPTH 0x4000 -#define HNS_ROCE_V1_EXT_SDB_ENTRY 16 -#define HNS_ROCE_V1_EXT_ODB_ENTRY 16 -#define HNS_ROCE_V1_EXT_SDB_SIZE \ - (HNS_ROCE_V1_EXT_SDB_DEPTH * HNS_ROCE_V1_EXT_SDB_ENTRY) -#define HNS_ROCE_V1_EXT_ODB_SIZE \ - (HNS_ROCE_V1_EXT_ODB_DEPTH * HNS_ROCE_V1_EXT_ODB_ENTRY) - -#define HNS_ROCE_V1_EXT_SDB_ALEPT HNS_ROCE_V1_DB_RSVD -#define HNS_ROCE_V1_EXT_SDB_ALFUL \ - (HNS_ROCE_V1_EXT_SDB_DEPTH - HNS_ROCE_V1_DB_RSVD) -#define HNS_ROCE_V1_EXT_ODB_ALEPT HNS_ROCE_V1_DB_RSVD -#define HNS_ROCE_V1_EXT_ODB_ALFUL \ - (HNS_ROCE_V1_EXT_ODB_DEPTH - HNS_ROCE_V1_DB_RSVD) - -#define HNS_ROCE_V1_FREE_MR_TIMEOUT_MSECS 50000 -#define HNS_ROCE_V1_RECREATE_LP_QP_TIMEOUT_MSECS 10000 -#define HNS_ROCE_V1_FREE_MR_WAIT_VALUE 5 -#define HNS_ROCE_V1_RECREATE_LP_QP_WAIT_VALUE 20 - -#define HNS_ROCE_BT_RSV_BUF_SIZE (1 << 17) - -#define HNS_ROCE_V1_TPTR_ENTRY_SIZE 2 -#define HNS_ROCE_V1_TPTR_BUF_SIZE \ - (HNS_ROCE_V1_TPTR_ENTRY_SIZE * HNS_ROCE_V1_MAX_CQ_NUM) - -#define HNS_ROCE_ODB_POLL_MODE 0 - -#define HNS_ROCE_SDB_NORMAL_MODE 0 -#define HNS_ROCE_SDB_EXTEND_MODE 1 - -#define HNS_ROCE_ODB_EXTEND_MODE 1 - -#define KEY_VALID 0x02 - -#define HNS_ROCE_CQE_QPN_MASK 0x3ffff -#define HNS_ROCE_CQE_STATUS_MASK 0x1f -#define HNS_ROCE_CQE_OPCODE_MASK 0xf - -#define HNS_ROCE_CQE_SUCCESS 0x00 -#define HNS_ROCE_CQE_SYNDROME_LOCAL_LENGTH_ERR 0x01 -#define HNS_ROCE_CQE_SYNDROME_LOCAL_QP_OP_ERR 0x02 -#define HNS_ROCE_CQE_SYNDROME_LOCAL_PROT_ERR 0x03 -#define HNS_ROCE_CQE_SYNDROME_WR_FLUSH_ERR 0x04 -#define HNS_ROCE_CQE_SYNDROME_MEM_MANAGE_OPERATE_ERR 0x05 -#define HNS_ROCE_CQE_SYNDROME_BAD_RESP_ERR 0x06 -#define HNS_ROCE_CQE_SYNDROME_LOCAL_ACCESS_ERR 0x07 -#define HNS_ROCE_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR 0x08 -#define HNS_ROCE_CQE_SYNDROME_REMOTE_ACCESS_ERR 0x09 -#define HNS_ROCE_CQE_SYNDROME_REMOTE_OP_ERR 0x0a -#define HNS_ROCE_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR 0x0b -#define HNS_ROCE_CQE_SYNDROME_RNR_RETRY_EXC_ERR 0x0c - -#define QP1C_CFGN_OFFSET 0x28 -#define PHY_PORT_OFFSET 0x8 -#define MTPT_IDX_SHIFT 16 -#define ALL_PORT_VAL_OPEN 0x3f -#define POL_TIME_INTERVAL_VAL 0x80 -#define SLEEP_TIME_INTERVAL 20 -#define SQ_PSN_SHIFT 8 -#define QKEY_VAL 0x80010000 -#define SDB_INV_CNT_OFFSET 8 - -#define HNS_ROCE_CEQ_DEFAULT_INTERVAL 0x10 -#define HNS_ROCE_CEQ_DEFAULT_BURST_NUM 0x10 - -#define HNS_ROCE_INT_MASK_DISABLE 0 -#define HNS_ROCE_INT_MASK_ENABLE 1 - -#define CEQ_REG_OFFSET 0x18 - -#define HNS_ROCE_CEQE_CEQE_COMP_OWNER_S 0 - -#define HNS_ROCE_V1_CONS_IDX_M GENMASK(15, 0) - -#define HNS_ROCE_CEQE_CEQE_COMP_CQN_S 16 -#define HNS_ROCE_CEQE_CEQE_COMP_CQN_M GENMASK(31, 16) - -#define HNS_ROCE_AEQE_U32_4_EVENT_TYPE_S 16 -#define HNS_ROCE_AEQE_U32_4_EVENT_TYPE_M GENMASK(23, 16) - -#define HNS_ROCE_AEQE_U32_4_EVENT_SUB_TYPE_S 24 -#define HNS_ROCE_AEQE_U32_4_EVENT_SUB_TYPE_M GENMASK(30, 24) - -#define HNS_ROCE_AEQE_U32_4_OWNER_S 31 - -#define HNS_ROCE_AEQE_EVENT_QP_EVENT_QP_QPN_S 0 -#define HNS_ROCE_AEQE_EVENT_QP_EVENT_QP_QPN_M GENMASK(23, 0) - -#define HNS_ROCE_AEQE_EVENT_QP_EVENT_PORT_NUM_S 25 -#define HNS_ROCE_AEQE_EVENT_QP_EVENT_PORT_NUM_M GENMASK(27, 25) - -#define HNS_ROCE_AEQE_EVENT_CQ_EVENT_CQ_CQN_S 0 -#define HNS_ROCE_AEQE_EVENT_CQ_EVENT_CQ_CQN_M GENMASK(15, 0) - -#define HNS_ROCE_AEQE_EVENT_CE_EVENT_CEQE_CEQN_S 0 -#define HNS_ROCE_AEQE_EVENT_CE_EVENT_CEQE_CEQN_M GENMASK(4, 0) - -/* Local Work Queue Catastrophic Error,SUBTYPE 0x5 */ -enum { - HNS_ROCE_LWQCE_QPC_ERROR = 1, - HNS_ROCE_LWQCE_MTU_ERROR, - HNS_ROCE_LWQCE_WQE_BA_ADDR_ERROR, - HNS_ROCE_LWQCE_WQE_ADDR_ERROR, - HNS_ROCE_LWQCE_SQ_WQE_SHIFT_ERROR, - HNS_ROCE_LWQCE_SL_ERROR, - HNS_ROCE_LWQCE_PORT_ERROR, -}; - -/* Local Access Violation Work Queue Error,SUBTYPE 0x7 */ -enum { - HNS_ROCE_LAVWQE_R_KEY_VIOLATION = 1, - HNS_ROCE_LAVWQE_LENGTH_ERROR, - HNS_ROCE_LAVWQE_VA_ERROR, - HNS_ROCE_LAVWQE_PD_ERROR, - HNS_ROCE_LAVWQE_RW_ACC_ERROR, - HNS_ROCE_LAVWQE_KEY_STATE_ERROR, - HNS_ROCE_LAVWQE_MR_OPERATION_ERROR, -}; - -/* DOORBELL overflow subtype */ -enum { - HNS_ROCE_DB_SUBTYPE_SDB_OVF = 1, - HNS_ROCE_DB_SUBTYPE_SDB_ALM_OVF, - HNS_ROCE_DB_SUBTYPE_ODB_OVF, - HNS_ROCE_DB_SUBTYPE_ODB_ALM_OVF, - HNS_ROCE_DB_SUBTYPE_SDB_ALM_EMP, - HNS_ROCE_DB_SUBTYPE_ODB_ALM_EMP, -}; - -enum { - /* RQ&SRQ related operations */ - HNS_ROCE_OPCODE_SEND_DATA_RECEIVE = 0x06, - HNS_ROCE_OPCODE_RDMA_WITH_IMM_RECEIVE, -}; - -enum { - HNS_ROCE_PORT_DOWN = 0, - HNS_ROCE_PORT_UP, -}; - -struct hns_roce_cq_context { - __le32 cqc_byte_4; - __le32 cq_bt_l; - __le32 cqc_byte_12; - __le32 cur_cqe_ba0_l; - __le32 cqc_byte_20; - __le32 cqe_tptr_addr_l; - __le32 cur_cqe_ba1_l; - __le32 cqc_byte_32; -}; - -#define CQ_CONTEXT_CQC_BYTE_4_CQC_STATE_S 0 -#define CQ_CONTEXT_CQC_BYTE_4_CQC_STATE_M \ - (((1UL << 2) - 1) << CQ_CONTEXT_CQC_BYTE_4_CQC_STATE_S) - -#define CQ_CONTEXT_CQC_BYTE_4_CQN_S 16 -#define CQ_CONTEXT_CQC_BYTE_4_CQN_M \ - (((1UL << 16) - 1) << CQ_CONTEXT_CQC_BYTE_4_CQN_S) - -#define CQ_CONTEXT_CQC_BYTE_12_CQ_BT_H_S 0 -#define CQ_CONTEXT_CQC_BYTE_12_CQ_BT_H_M \ - (((1UL << 17) - 1) << CQ_CONTEXT_CQC_BYTE_12_CQ_BT_H_S) - -#define CQ_CONTEXT_CQC_BYTE_12_CQ_CQE_SHIFT_S 20 -#define CQ_CONTEXT_CQC_BYTE_12_CQ_CQE_SHIFT_M \ - (((1UL << 4) - 1) << CQ_CONTEXT_CQC_BYTE_12_CQ_CQE_SHIFT_S) - -#define CQ_CONTEXT_CQC_BYTE_12_CEQN_S 24 -#define CQ_CONTEXT_CQC_BYTE_12_CEQN_M \ - (((1UL << 5) - 1) << CQ_CONTEXT_CQC_BYTE_12_CEQN_S) - -#define CQ_CONTEXT_CQC_BYTE_20_CUR_CQE_BA0_H_S 0 -#define CQ_CONTEXT_CQC_BYTE_20_CUR_CQE_BA0_H_M \ - (((1UL << 5) - 1) << CQ_CONTEXT_CQC_BYTE_20_CUR_CQE_BA0_H_S) - -#define CQ_CONTEXT_CQC_BYTE_20_CQ_CUR_INDEX_S 16 -#define CQ_CONTEXT_CQC_BYTE_20_CQ_CUR_INDEX_M \ - (((1UL << 16) - 1) << CQ_CONTEXT_CQC_BYTE_20_CQ_CUR_INDEX_S) - -#define CQ_CONTEXT_CQC_BYTE_20_CQE_TPTR_ADDR_H_S 8 -#define CQ_CONTEXT_CQC_BYTE_20_CQE_TPTR_ADDR_H_M \ - (((1UL << 5) - 1) << CQ_CONTEXT_CQC_BYTE_20_CQE_TPTR_ADDR_H_S) - -#define CQ_CONTEXT_CQC_BYTE_32_CUR_CQE_BA1_H_S 0 -#define CQ_CONTEXT_CQC_BYTE_32_CUR_CQE_BA1_H_M \ - (((1UL << 5) - 1) << CQ_CONTEXT_CQC_BYTE_32_CUR_CQE_BA1_H_S) - -#define CQ_CONTEXT_CQC_BYTE_32_SE_FLAG_S 9 - -#define CQ_CONTEXT_CQC_BYTE_32_CE_FLAG_S 8 -#define CQ_CONTEXT_CQC_BYTE_32_NOTIFICATION_FLAG_S 14 -#define CQ_CQNTEXT_CQC_BYTE_32_TYPE_OF_COMPLETION_NOTIFICATION_S 15 - -#define CQ_CONTEXT_CQC_BYTE_32_CQ_CONS_IDX_S 16 -#define CQ_CONTEXT_CQC_BYTE_32_CQ_CONS_IDX_M \ - (((1UL << 16) - 1) << CQ_CONTEXT_CQC_BYTE_32_CQ_CONS_IDX_S) - -struct hns_roce_cqe { - __le32 cqe_byte_4; - union { - __le32 r_key; - __le32 immediate_data; - }; - __le32 byte_cnt; - __le32 cqe_byte_16; - __le32 cqe_byte_20; - __le32 s_mac_l; - __le32 cqe_byte_28; - __le32 reserved; -}; - -#define CQE_BYTE_4_OWNER_S 7 -#define CQE_BYTE_4_SQ_RQ_FLAG_S 14 - -#define CQE_BYTE_4_STATUS_OF_THE_OPERATION_S 8 -#define CQE_BYTE_4_STATUS_OF_THE_OPERATION_M \ - (((1UL << 5) - 1) << CQE_BYTE_4_STATUS_OF_THE_OPERATION_S) - -#define CQE_BYTE_4_WQE_INDEX_S 16 -#define CQE_BYTE_4_WQE_INDEX_M (((1UL << 14) - 1) << CQE_BYTE_4_WQE_INDEX_S) - -#define CQE_BYTE_4_OPERATION_TYPE_S 0 -#define CQE_BYTE_4_OPERATION_TYPE_M \ - (((1UL << 4) - 1) << CQE_BYTE_4_OPERATION_TYPE_S) - -#define CQE_BYTE_4_IMM_INDICATOR_S 15 - -#define CQE_BYTE_16_LOCAL_QPN_S 0 -#define CQE_BYTE_16_LOCAL_QPN_M (((1UL << 24) - 1) << CQE_BYTE_16_LOCAL_QPN_S) - -#define CQE_BYTE_20_PORT_NUM_S 26 -#define CQE_BYTE_20_PORT_NUM_M (((1UL << 3) - 1) << CQE_BYTE_20_PORT_NUM_S) - -#define CQE_BYTE_20_SL_S 24 -#define CQE_BYTE_20_SL_M (((1UL << 2) - 1) << CQE_BYTE_20_SL_S) - -#define CQE_BYTE_20_REMOTE_QPN_S 0 -#define CQE_BYTE_20_REMOTE_QPN_M \ - (((1UL << 24) - 1) << CQE_BYTE_20_REMOTE_QPN_S) - -#define CQE_BYTE_20_GRH_PRESENT_S 29 - -#define CQE_BYTE_28_P_KEY_IDX_S 16 -#define CQE_BYTE_28_P_KEY_IDX_M (((1UL << 16) - 1) << CQE_BYTE_28_P_KEY_IDX_S) - -#define CQ_DB_REQ_NOT_SOL 0 -#define CQ_DB_REQ_NOT (1 << 16) - -struct hns_roce_v1_mpt_entry { - __le32 mpt_byte_4; - __le32 pbl_addr_l; - __le32 mpt_byte_12; - __le32 virt_addr_l; - __le32 virt_addr_h; - __le32 length; - __le32 mpt_byte_28; - __le32 pa0_l; - __le32 mpt_byte_36; - __le32 mpt_byte_40; - __le32 mpt_byte_44; - __le32 mpt_byte_48; - __le32 pa4_l; - __le32 mpt_byte_56; - __le32 mpt_byte_60; - __le32 mpt_byte_64; -}; - -#define MPT_BYTE_4_KEY_STATE_S 0 -#define MPT_BYTE_4_KEY_STATE_M (((1UL << 2) - 1) << MPT_BYTE_4_KEY_STATE_S) - -#define MPT_BYTE_4_KEY_S 8 -#define MPT_BYTE_4_KEY_M (((1UL << 8) - 1) << MPT_BYTE_4_KEY_S) - -#define MPT_BYTE_4_PAGE_SIZE_S 16 -#define MPT_BYTE_4_PAGE_SIZE_M (((1UL << 2) - 1) << MPT_BYTE_4_PAGE_SIZE_S) - -#define MPT_BYTE_4_MW_TYPE_S 20 - -#define MPT_BYTE_4_MW_BIND_ENABLE_S 21 - -#define MPT_BYTE_4_OWN_S 22 - -#define MPT_BYTE_4_MEMORY_LOCATION_TYPE_S 24 -#define MPT_BYTE_4_MEMORY_LOCATION_TYPE_M \ - (((1UL << 2) - 1) << MPT_BYTE_4_MEMORY_LOCATION_TYPE_S) - -#define MPT_BYTE_4_REMOTE_ATOMIC_S 26 -#define MPT_BYTE_4_LOCAL_WRITE_S 27 -#define MPT_BYTE_4_REMOTE_WRITE_S 28 -#define MPT_BYTE_4_REMOTE_READ_S 29 -#define MPT_BYTE_4_REMOTE_INVAL_ENABLE_S 30 -#define MPT_BYTE_4_ADDRESS_TYPE_S 31 - -#define MPT_BYTE_12_PBL_ADDR_H_S 0 -#define MPT_BYTE_12_PBL_ADDR_H_M \ - (((1UL << 17) - 1) << MPT_BYTE_12_PBL_ADDR_H_S) - -#define MPT_BYTE_12_MW_BIND_COUNTER_S 17 -#define MPT_BYTE_12_MW_BIND_COUNTER_M \ - (((1UL << 15) - 1) << MPT_BYTE_12_MW_BIND_COUNTER_S) - -#define MPT_BYTE_28_PD_S 0 -#define MPT_BYTE_28_PD_M (((1UL << 16) - 1) << MPT_BYTE_28_PD_S) - -#define MPT_BYTE_28_L_KEY_IDX_L_S 16 -#define MPT_BYTE_28_L_KEY_IDX_L_M \ - (((1UL << 16) - 1) << MPT_BYTE_28_L_KEY_IDX_L_S) - -#define MPT_BYTE_36_PA0_H_S 0 -#define MPT_BYTE_36_PA0_H_M (((1UL << 5) - 1) << MPT_BYTE_36_PA0_H_S) - -#define MPT_BYTE_36_PA1_L_S 8 -#define MPT_BYTE_36_PA1_L_M (((1UL << 24) - 1) << MPT_BYTE_36_PA1_L_S) - -#define MPT_BYTE_40_PA1_H_S 0 -#define MPT_BYTE_40_PA1_H_M (((1UL << 13) - 1) << MPT_BYTE_40_PA1_H_S) - -#define MPT_BYTE_40_PA2_L_S 16 -#define MPT_BYTE_40_PA2_L_M (((1UL << 16) - 1) << MPT_BYTE_40_PA2_L_S) - -#define MPT_BYTE_44_PA2_H_S 0 -#define MPT_BYTE_44_PA2_H_M (((1UL << 21) - 1) << MPT_BYTE_44_PA2_H_S) - -#define MPT_BYTE_44_PA3_L_S 24 -#define MPT_BYTE_44_PA3_L_M (((1UL << 8) - 1) << MPT_BYTE_44_PA3_L_S) - -#define MPT_BYTE_48_PA3_H_S 0 -#define MPT_BYTE_48_PA3_H_M (((1UL << 29) - 1) << MPT_BYTE_48_PA3_H_S) - -#define MPT_BYTE_56_PA4_H_S 0 -#define MPT_BYTE_56_PA4_H_M (((1UL << 5) - 1) << MPT_BYTE_56_PA4_H_S) - -#define MPT_BYTE_56_PA5_L_S 8 -#define MPT_BYTE_56_PA5_L_M (((1UL << 24) - 1) << MPT_BYTE_56_PA5_L_S) - -#define MPT_BYTE_60_PA5_H_S 0 -#define MPT_BYTE_60_PA5_H_M (((1UL << 13) - 1) << MPT_BYTE_60_PA5_H_S) - -#define MPT_BYTE_60_PA6_L_S 16 -#define MPT_BYTE_60_PA6_L_M (((1UL << 16) - 1) << MPT_BYTE_60_PA6_L_S) - -#define MPT_BYTE_64_PA6_H_S 0 -#define MPT_BYTE_64_PA6_H_M (((1UL << 21) - 1) << MPT_BYTE_64_PA6_H_S) - -#define MPT_BYTE_64_L_KEY_IDX_H_S 24 -#define MPT_BYTE_64_L_KEY_IDX_H_M \ - (((1UL << 8) - 1) << MPT_BYTE_64_L_KEY_IDX_H_S) - -struct hns_roce_wqe_ctrl_seg { - __le32 sgl_pa_h; - __le32 flag; - union { - __be32 imm_data; - __le32 inv_key; - }; - __le32 msg_length; -}; - -struct hns_roce_wqe_data_seg { - __le64 addr; - __le32 lkey; - __le32 len; -}; - -struct hns_roce_wqe_raddr_seg { - __le32 rkey; - __le32 len; /* reserved */ - __le64 raddr; -}; - -struct hns_roce_rq_wqe_ctrl { - __le32 rwqe_byte_4; - __le32 rocee_sgl_ba_l; - __le32 rwqe_byte_12; - __le32 reserved[5]; -}; - -#define RQ_WQE_CTRL_RWQE_BYTE_12_RWQE_SGE_NUM_S 16 -#define RQ_WQE_CTRL_RWQE_BYTE_12_RWQE_SGE_NUM_M \ - (((1UL << 6) - 1) << RQ_WQE_CTRL_RWQE_BYTE_12_RWQE_SGE_NUM_S) - -#define HNS_ROCE_QP_DESTROY_TIMEOUT_MSECS 10000 - -#define GID_LEN 16 - -struct hns_roce_ud_send_wqe { - __le32 dmac_h; - __le32 u32_8; - __le32 immediate_data; - - __le32 u32_16; - union { - unsigned char dgid[GID_LEN]; - struct { - __le32 u32_20; - __le32 u32_24; - __le32 u32_28; - __le32 u32_32; - }; - }; - - __le32 u32_36; - __le32 u32_40; - - __le32 va0_l; - __le32 va0_h; - __le32 l_key0; - - __le32 va1_l; - __le32 va1_h; - __le32 l_key1; -}; - -#define UD_SEND_WQE_U32_4_DMAC_0_S 0 -#define UD_SEND_WQE_U32_4_DMAC_0_M \ - (((1UL << 8) - 1) << UD_SEND_WQE_U32_4_DMAC_0_S) - -#define UD_SEND_WQE_U32_4_DMAC_1_S 8 -#define UD_SEND_WQE_U32_4_DMAC_1_M \ - (((1UL << 8) - 1) << UD_SEND_WQE_U32_4_DMAC_1_S) - -#define UD_SEND_WQE_U32_4_DMAC_2_S 16 -#define UD_SEND_WQE_U32_4_DMAC_2_M \ - (((1UL << 8) - 1) << UD_SEND_WQE_U32_4_DMAC_2_S) - -#define UD_SEND_WQE_U32_4_DMAC_3_S 24 -#define UD_SEND_WQE_U32_4_DMAC_3_M \ - (((1UL << 8) - 1) << UD_SEND_WQE_U32_4_DMAC_3_S) - -#define UD_SEND_WQE_U32_8_DMAC_4_S 0 -#define UD_SEND_WQE_U32_8_DMAC_4_M \ - (((1UL << 8) - 1) << UD_SEND_WQE_U32_8_DMAC_4_S) - -#define UD_SEND_WQE_U32_8_DMAC_5_S 8 -#define UD_SEND_WQE_U32_8_DMAC_5_M \ - (((1UL << 8) - 1) << UD_SEND_WQE_U32_8_DMAC_5_S) - -#define UD_SEND_WQE_U32_8_LOOPBACK_INDICATOR_S 22 - -#define UD_SEND_WQE_U32_8_OPERATION_TYPE_S 16 -#define UD_SEND_WQE_U32_8_OPERATION_TYPE_M \ - (((1UL << 4) - 1) << UD_SEND_WQE_U32_8_OPERATION_TYPE_S) - -#define UD_SEND_WQE_U32_8_NUMBER_OF_DATA_SEG_S 24 -#define UD_SEND_WQE_U32_8_NUMBER_OF_DATA_SEG_M \ - (((1UL << 6) - 1) << UD_SEND_WQE_U32_8_NUMBER_OF_DATA_SEG_S) - -#define UD_SEND_WQE_U32_8_SEND_GL_ROUTING_HDR_FLAG_S 31 - -#define UD_SEND_WQE_U32_16_DEST_QP_S 0 -#define UD_SEND_WQE_U32_16_DEST_QP_M \ - (((1UL << 24) - 1) << UD_SEND_WQE_U32_16_DEST_QP_S) - -#define UD_SEND_WQE_U32_16_MAX_STATIC_RATE_S 24 -#define UD_SEND_WQE_U32_16_MAX_STATIC_RATE_M \ - (((1UL << 8) - 1) << UD_SEND_WQE_U32_16_MAX_STATIC_RATE_S) - -#define UD_SEND_WQE_U32_36_FLOW_LABEL_S 0 -#define UD_SEND_WQE_U32_36_FLOW_LABEL_M \ - (((1UL << 20) - 1) << UD_SEND_WQE_U32_36_FLOW_LABEL_S) - -#define UD_SEND_WQE_U32_36_PRIORITY_S 20 -#define UD_SEND_WQE_U32_36_PRIORITY_M \ - (((1UL << 4) - 1) << UD_SEND_WQE_U32_36_PRIORITY_S) - -#define UD_SEND_WQE_U32_36_SGID_INDEX_S 24 -#define UD_SEND_WQE_U32_36_SGID_INDEX_M \ - (((1UL << 8) - 1) << UD_SEND_WQE_U32_36_SGID_INDEX_S) - -#define UD_SEND_WQE_U32_40_HOP_LIMIT_S 0 -#define UD_SEND_WQE_U32_40_HOP_LIMIT_M \ - (((1UL << 8) - 1) << UD_SEND_WQE_U32_40_HOP_LIMIT_S) - -#define UD_SEND_WQE_U32_40_TRAFFIC_CLASS_S 8 -#define UD_SEND_WQE_U32_40_TRAFFIC_CLASS_M \ - (((1UL << 8) - 1) << UD_SEND_WQE_U32_40_TRAFFIC_CLASS_S) - -struct hns_roce_sqp_context { - __le32 qp1c_bytes_4; - __le32 sq_rq_bt_l; - __le32 qp1c_bytes_12; - __le32 qp1c_bytes_16; - __le32 qp1c_bytes_20; - __le32 cur_rq_wqe_ba_l; - __le32 qp1c_bytes_28; - __le32 qp1c_bytes_32; - __le32 cur_sq_wqe_ba_l; - __le32 qp1c_bytes_40; -}; - -#define QP1C_BYTES_4_QP_STATE_S 0 -#define QP1C_BYTES_4_QP_STATE_M \ - (((1UL << 3) - 1) << QP1C_BYTES_4_QP_STATE_S) - -#define QP1C_BYTES_4_SQ_WQE_SHIFT_S 8 -#define QP1C_BYTES_4_SQ_WQE_SHIFT_M \ - (((1UL << 4) - 1) << QP1C_BYTES_4_SQ_WQE_SHIFT_S) - -#define QP1C_BYTES_4_RQ_WQE_SHIFT_S 12 -#define QP1C_BYTES_4_RQ_WQE_SHIFT_M \ - (((1UL << 4) - 1) << QP1C_BYTES_4_RQ_WQE_SHIFT_S) - -#define QP1C_BYTES_4_PD_S 16 -#define QP1C_BYTES_4_PD_M (((1UL << 16) - 1) << QP1C_BYTES_4_PD_S) - -#define QP1C_BYTES_12_SQ_RQ_BT_H_S 0 -#define QP1C_BYTES_12_SQ_RQ_BT_H_M \ - (((1UL << 17) - 1) << QP1C_BYTES_12_SQ_RQ_BT_H_S) - -#define QP1C_BYTES_16_RQ_HEAD_S 0 -#define QP1C_BYTES_16_RQ_HEAD_M (((1UL << 15) - 1) << QP1C_BYTES_16_RQ_HEAD_S) - -#define QP1C_BYTES_16_PORT_NUM_S 16 -#define QP1C_BYTES_16_PORT_NUM_M \ - (((1UL << 3) - 1) << QP1C_BYTES_16_PORT_NUM_S) - -#define QP1C_BYTES_16_SIGNALING_TYPE_S 27 -#define QP1C_BYTES_16_LOCAL_ENABLE_E2E_CREDIT_S 28 -#define QP1C_BYTES_16_RQ_BA_FLG_S 29 -#define QP1C_BYTES_16_SQ_BA_FLG_S 30 -#define QP1C_BYTES_16_QP1_ERR_S 31 - -#define QP1C_BYTES_20_SQ_HEAD_S 0 -#define QP1C_BYTES_20_SQ_HEAD_M (((1UL << 15) - 1) << QP1C_BYTES_20_SQ_HEAD_S) - -#define QP1C_BYTES_20_PKEY_IDX_S 16 -#define QP1C_BYTES_20_PKEY_IDX_M \ - (((1UL << 16) - 1) << QP1C_BYTES_20_PKEY_IDX_S) - -#define QP1C_BYTES_28_CUR_RQ_WQE_BA_H_S 0 -#define QP1C_BYTES_28_CUR_RQ_WQE_BA_H_M \ - (((1UL << 5) - 1) << QP1C_BYTES_28_CUR_RQ_WQE_BA_H_S) - -#define QP1C_BYTES_28_RQ_CUR_IDX_S 16 -#define QP1C_BYTES_28_RQ_CUR_IDX_M \ - (((1UL << 15) - 1) << QP1C_BYTES_28_RQ_CUR_IDX_S) - -#define QP1C_BYTES_32_TX_CQ_NUM_S 0 -#define QP1C_BYTES_32_TX_CQ_NUM_M \ - (((1UL << 16) - 1) << QP1C_BYTES_32_TX_CQ_NUM_S) - -#define QP1C_BYTES_32_RX_CQ_NUM_S 16 -#define QP1C_BYTES_32_RX_CQ_NUM_M \ - (((1UL << 16) - 1) << QP1C_BYTES_32_RX_CQ_NUM_S) - -#define QP1C_BYTES_40_CUR_SQ_WQE_BA_H_S 0 -#define QP1C_BYTES_40_CUR_SQ_WQE_BA_H_M \ - (((1UL << 5) - 1) << QP1C_BYTES_40_CUR_SQ_WQE_BA_H_S) - -#define QP1C_BYTES_40_SQ_CUR_IDX_S 16 -#define QP1C_BYTES_40_SQ_CUR_IDX_M \ - (((1UL << 15) - 1) << QP1C_BYTES_40_SQ_CUR_IDX_S) - -#define HNS_ROCE_WQE_INLINE (1UL<<31) -#define HNS_ROCE_WQE_SE (1UL<<30) - -#define HNS_ROCE_WQE_SGE_NUM_BIT 24 -#define HNS_ROCE_WQE_IMM (1UL<<23) -#define HNS_ROCE_WQE_FENCE (1UL<<21) -#define HNS_ROCE_WQE_CQ_NOTIFY (1UL<<20) - -#define HNS_ROCE_WQE_OPCODE_SEND (0<<16) -#define HNS_ROCE_WQE_OPCODE_RDMA_READ (1<<16) -#define HNS_ROCE_WQE_OPCODE_RDMA_WRITE (2<<16) -#define HNS_ROCE_WQE_OPCODE_LOCAL_INV (4<<16) -#define HNS_ROCE_WQE_OPCODE_UD_SEND (7<<16) -#define HNS_ROCE_WQE_OPCODE_MASK (15<<16) - -struct hns_roce_qp_context { - __le32 qpc_bytes_4; - __le32 qpc_bytes_8; - __le32 qpc_bytes_12; - __le32 qpc_bytes_16; - __le32 sq_rq_bt_l; - __le32 qpc_bytes_24; - __le32 irrl_ba_l; - __le32 qpc_bytes_32; - __le32 qpc_bytes_36; - __le32 dmac_l; - __le32 qpc_bytes_44; - __le32 qpc_bytes_48; - u8 dgid[16]; - __le32 qpc_bytes_68; - __le32 cur_rq_wqe_ba_l; - __le32 qpc_bytes_76; - __le32 rx_rnr_time; - __le32 qpc_bytes_84; - __le32 qpc_bytes_88; - union { - __le32 rx_sge_len; - __le32 dma_length; - }; - union { - __le32 rx_sge_num; - __le32 rx_send_pktn; - __le32 r_key; - }; - __le32 va_l; - __le32 va_h; - __le32 qpc_bytes_108; - __le32 qpc_bytes_112; - __le32 rx_cur_sq_wqe_ba_l; - __le32 qpc_bytes_120; - __le32 qpc_bytes_124; - __le32 qpc_bytes_128; - __le32 qpc_bytes_132; - __le32 qpc_bytes_136; - __le32 qpc_bytes_140; - __le32 qpc_bytes_144; - __le32 qpc_bytes_148; - union { - __le32 rnr_retry; - __le32 ack_time; - }; - __le32 qpc_bytes_156; - __le32 pkt_use_len; - __le32 qpc_bytes_164; - __le32 qpc_bytes_168; - union { - __le32 sge_use_len; - __le32 pa_use_len; - }; - __le32 qpc_bytes_176; - __le32 qpc_bytes_180; - __le32 tx_cur_sq_wqe_ba_l; - __le32 qpc_bytes_188; - __le32 rvd21; -}; - -#define QP_CONTEXT_QPC_BYTES_4_TRANSPORT_SERVICE_TYPE_S 0 -#define QP_CONTEXT_QPC_BYTES_4_TRANSPORT_SERVICE_TYPE_M \ - (((1UL << 3) - 1) << QP_CONTEXT_QPC_BYTES_4_TRANSPORT_SERVICE_TYPE_S) - -#define QP_CONTEXT_QPC_BYTE_4_ENABLE_FPMR_S 3 -#define QP_CONTEXT_QPC_BYTE_4_RDMA_READ_ENABLE_S 4 -#define QP_CONTEXT_QPC_BYTE_4_RDMA_WRITE_ENABLE_S 5 -#define QP_CONTEXT_QPC_BYTE_4_ATOMIC_OPERATION_ENABLE_S 6 -#define QP_CONTEXT_QPC_BYTE_4_RDMAR_USE_S 7 - -#define QP_CONTEXT_QPC_BYTES_4_SQ_WQE_SHIFT_S 8 -#define QP_CONTEXT_QPC_BYTES_4_SQ_WQE_SHIFT_M \ - (((1UL << 4) - 1) << QP_CONTEXT_QPC_BYTES_4_SQ_WQE_SHIFT_S) - -#define QP_CONTEXT_QPC_BYTES_4_RQ_WQE_SHIFT_S 12 -#define QP_CONTEXT_QPC_BYTES_4_RQ_WQE_SHIFT_M \ - (((1UL << 4) - 1) << QP_CONTEXT_QPC_BYTES_4_RQ_WQE_SHIFT_S) - -#define QP_CONTEXT_QPC_BYTES_4_PD_S 16 -#define QP_CONTEXT_QPC_BYTES_4_PD_M \ - (((1UL << 16) - 1) << QP_CONTEXT_QPC_BYTES_4_PD_S) - -#define QP_CONTEXT_QPC_BYTES_8_TX_COMPLETION_S 0 -#define QP_CONTEXT_QPC_BYTES_8_TX_COMPLETION_M \ - (((1UL << 16) - 1) << QP_CONTEXT_QPC_BYTES_8_TX_COMPLETION_S) - -#define QP_CONTEXT_QPC_BYTES_8_RX_COMPLETION_S 16 -#define QP_CONTEXT_QPC_BYTES_8_RX_COMPLETION_M \ - (((1UL << 16) - 1) << QP_CONTEXT_QPC_BYTES_8_RX_COMPLETION_S) - -#define QP_CONTEXT_QPC_BYTES_12_SRQ_NUMBER_S 0 -#define QP_CONTEXT_QPC_BYTES_12_SRQ_NUMBER_M \ - (((1UL << 16) - 1) << QP_CONTEXT_QPC_BYTES_12_SRQ_NUMBER_S) - -#define QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_S 16 -#define QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_M \ - (((1UL << 16) - 1) << QP_CONTEXT_QPC_BYTES_12_P_KEY_INDEX_S) - -#define QP_CONTEXT_QPC_BYTES_16_QP_NUM_S 0 -#define QP_CONTEXT_QPC_BYTES_16_QP_NUM_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_16_QP_NUM_S) - -#define QP_CONTEXT_QPC_BYTES_24_SQ_RQ_BT_H_S 0 -#define QP_CONTEXT_QPC_BYTES_24_SQ_RQ_BT_H_M \ - (((1UL << 17) - 1) << QP_CONTEXT_QPC_BYTES_24_SQ_RQ_BT_H_S) - -#define QP_CONTEXT_QPC_BYTES_24_MINIMUM_RNR_NAK_TIMER_S 18 -#define QP_CONTEXT_QPC_BYTES_24_MINIMUM_RNR_NAK_TIMER_M \ - (((1UL << 5) - 1) << QP_CONTEXT_QPC_BYTES_24_MINIMUM_RNR_NAK_TIMER_S) - -#define QP_CONTEXT_QPC_BYTE_24_REMOTE_ENABLE_E2E_CREDITS_S 23 - -#define QP_CONTEXT_QPC_BYTES_32_IRRL_BA_H_S 0 -#define QP_CONTEXT_QPC_BYTES_32_IRRL_BA_H_M \ - (((1UL << 17) - 1) << QP_CONTEXT_QPC_BYTES_32_IRRL_BA_H_S) - -#define QP_CONTEXT_QPC_BYTES_32_MIG_STATE_S 18 -#define QP_CONTEXT_QPC_BYTES_32_MIG_STATE_M \ - (((1UL << 2) - 1) << QP_CONTEXT_QPC_BYTES_32_MIG_STATE_S) - -#define QP_CONTEXT_QPC_BYTE_32_LOCAL_ENABLE_E2E_CREDITS_S 20 -#define QP_CONTEXT_QPC_BYTE_32_SIGNALING_TYPE_S 21 -#define QP_CONTEXT_QPC_BYTE_32_LOOPBACK_INDICATOR_S 22 -#define QP_CONTEXT_QPC_BYTE_32_GLOBAL_HEADER_S 23 - -#define QP_CONTEXT_QPC_BYTES_32_RESPONDER_RESOURCES_S 24 -#define QP_CONTEXT_QPC_BYTES_32_RESPONDER_RESOURCES_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_32_RESPONDER_RESOURCES_S) - -#define QP_CONTEXT_QPC_BYTES_36_DEST_QP_S 0 -#define QP_CONTEXT_QPC_BYTES_36_DEST_QP_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_36_DEST_QP_S) - -#define QP_CONTEXT_QPC_BYTES_36_SGID_INDEX_S 24 -#define QP_CONTEXT_QPC_BYTES_36_SGID_INDEX_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_36_SGID_INDEX_S) - -#define QP_CONTEXT_QPC_BYTES_44_DMAC_H_S 0 -#define QP_CONTEXT_QPC_BYTES_44_DMAC_H_M \ - (((1UL << 16) - 1) << QP_CONTEXT_QPC_BYTES_44_DMAC_H_S) - -#define QP_CONTEXT_QPC_BYTES_44_MAXIMUM_STATIC_RATE_S 16 -#define QP_CONTEXT_QPC_BYTES_44_MAXIMUM_STATIC_RATE_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_44_MAXIMUM_STATIC_RATE_S) - -#define QP_CONTEXT_QPC_BYTES_44_HOPLMT_S 24 -#define QP_CONTEXT_QPC_BYTES_44_HOPLMT_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_44_HOPLMT_S) - -#define QP_CONTEXT_QPC_BYTES_48_FLOWLABEL_S 0 -#define QP_CONTEXT_QPC_BYTES_48_FLOWLABEL_M \ - (((1UL << 20) - 1) << QP_CONTEXT_QPC_BYTES_48_FLOWLABEL_S) - -#define QP_CONTEXT_QPC_BYTES_48_TCLASS_S 20 -#define QP_CONTEXT_QPC_BYTES_48_TCLASS_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_48_TCLASS_S) - -#define QP_CONTEXT_QPC_BYTES_48_MTU_S 28 -#define QP_CONTEXT_QPC_BYTES_48_MTU_M \ - (((1UL << 4) - 1) << QP_CONTEXT_QPC_BYTES_48_MTU_S) - -#define QP_CONTEXT_QPC_BYTES_68_RQ_HEAD_S 0 -#define QP_CONTEXT_QPC_BYTES_68_RQ_HEAD_M \ - (((1UL << 15) - 1) << QP_CONTEXT_QPC_BYTES_68_RQ_HEAD_S) - -#define QP_CONTEXT_QPC_BYTES_68_RQ_CUR_INDEX_S 16 -#define QP_CONTEXT_QPC_BYTES_68_RQ_CUR_INDEX_M \ - (((1UL << 15) - 1) << QP_CONTEXT_QPC_BYTES_68_RQ_CUR_INDEX_S) - -#define QP_CONTEXT_QPC_BYTES_76_CUR_RQ_WQE_BA_H_S 0 -#define QP_CONTEXT_QPC_BYTES_76_CUR_RQ_WQE_BA_H_M \ - (((1UL << 5) - 1) << QP_CONTEXT_QPC_BYTES_76_CUR_RQ_WQE_BA_H_S) - -#define QP_CONTEXT_QPC_BYTES_76_RX_REQ_MSN_S 8 -#define QP_CONTEXT_QPC_BYTES_76_RX_REQ_MSN_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_76_RX_REQ_MSN_S) - -#define QP_CONTEXT_QPC_BYTES_84_LAST_ACK_PSN_S 0 -#define QP_CONTEXT_QPC_BYTES_84_LAST_ACK_PSN_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_84_LAST_ACK_PSN_S) - -#define QP_CONTEXT_QPC_BYTES_84_TRRL_HEAD_S 24 -#define QP_CONTEXT_QPC_BYTES_84_TRRL_HEAD_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_84_TRRL_HEAD_S) - -#define QP_CONTEXT_QPC_BYTES_88_RX_REQ_EPSN_S 0 -#define QP_CONTEXT_QPC_BYTES_88_RX_REQ_EPSN_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_88_RX_REQ_EPSN_S) - -#define QP_CONTEXT_QPC_BYTES_88_RX_REQ_PSN_ERR_FLAG_S 24 -#define QP_CONTEXT_QPC_BYTES_88_RX_LAST_OPCODE_FLG_S 25 - -#define QP_CONTEXT_QPC_BYTES_88_RQ_REQ_LAST_OPERATION_TYPE_S 26 -#define QP_CONTEXT_QPC_BYTES_88_RQ_REQ_LAST_OPERATION_TYPE_M \ - (((1UL << 2) - 1) << \ - QP_CONTEXT_QPC_BYTES_88_RQ_REQ_LAST_OPERATION_TYPE_S) - -#define QP_CONTEXT_QPC_BYTES_88_RQ_REQ_RDMA_WR_FLAG_S 29 -#define QP_CONTEXT_QPC_BYTES_88_RQ_REQ_RDMA_WR_FLAG_M \ - (((1UL << 2) - 1) << QP_CONTEXT_QPC_BYTES_88_RQ_REQ_RDMA_WR_FLAG_S) - -#define QP_CONTEXT_QPC_BYTES_108_TRRL_SDB_PSN_S 0 -#define QP_CONTEXT_QPC_BYTES_108_TRRL_SDB_PSN_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_108_TRRL_SDB_PSN_S) - -#define QP_CONTEXT_QPC_BYTES_108_TRRL_SDB_PSN_FLG_S 24 -#define QP_CONTEXT_QPC_BYTES_108_TRRL_TDB_PSN_FLG_S 25 - -#define QP_CONTEXT_QPC_BYTES_112_TRRL_TDB_PSN_S 0 -#define QP_CONTEXT_QPC_BYTES_112_TRRL_TDB_PSN_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_112_TRRL_TDB_PSN_S) - -#define QP_CONTEXT_QPC_BYTES_112_TRRL_TAIL_S 24 -#define QP_CONTEXT_QPC_BYTES_112_TRRL_TAIL_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_112_TRRL_TAIL_S) - -#define QP_CONTEXT_QPC_BYTES_120_RX_CUR_SQ_WQE_BA_H_S 0 -#define QP_CONTEXT_QPC_BYTES_120_RX_CUR_SQ_WQE_BA_H_M \ - (((1UL << 5) - 1) << QP_CONTEXT_QPC_BYTES_120_RX_CUR_SQ_WQE_BA_H_S) - -#define QP_CONTEXT_QPC_BYTES_124_RX_ACK_MSN_S 0 -#define QP_CONTEXT_QPC_BYTES_124_RX_ACK_MSN_M \ - (((1UL << 15) - 1) << QP_CONTEXT_QPC_BYTES_124_RX_ACK_MSN_S) - -#define QP_CONTEXT_QPC_BYTES_124_IRRL_MSG_IDX_S 16 -#define QP_CONTEXT_QPC_BYTES_124_IRRL_MSG_IDX_M \ - (((1UL << 15) - 1) << QP_CONTEXT_QPC_BYTES_124_IRRL_MSG_IDX_S) - -#define QP_CONTEXT_QPC_BYTES_128_RX_ACK_EPSN_S 0 -#define QP_CONTEXT_QPC_BYTES_128_RX_ACK_EPSN_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_128_RX_ACK_EPSN_S) - -#define QP_CONTEXT_QPC_BYTES_128_RX_ACK_PSN_ERR_FLG_S 24 - -#define QP_CONTEXT_QPC_BYTES_128_ACK_LAST_OPERATION_TYPE_S 25 -#define QP_CONTEXT_QPC_BYTES_128_ACK_LAST_OPERATION_TYPE_M \ - (((1UL << 2) - 1) << QP_CONTEXT_QPC_BYTES_128_ACK_LAST_OPERATION_TYPE_S) - -#define QP_CONTEXT_QPC_BYTES_128_IRRL_PSN_VLD_FLG_S 27 - -#define QP_CONTEXT_QPC_BYTES_132_IRRL_PSN_S 0 -#define QP_CONTEXT_QPC_BYTES_132_IRRL_PSN_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_132_IRRL_PSN_S) - -#define QP_CONTEXT_QPC_BYTES_132_IRRL_TAIL_S 24 -#define QP_CONTEXT_QPC_BYTES_132_IRRL_TAIL_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_132_IRRL_TAIL_S) - -#define QP_CONTEXT_QPC_BYTES_136_RETRY_MSG_PSN_S 0 -#define QP_CONTEXT_QPC_BYTES_136_RETRY_MSG_PSN_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_136_RETRY_MSG_PSN_S) - -#define QP_CONTEXT_QPC_BYTES_136_RETRY_MSG_FPKT_PSN_L_S 24 -#define QP_CONTEXT_QPC_BYTES_136_RETRY_MSG_FPKT_PSN_L_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_136_RETRY_MSG_FPKT_PSN_L_S) - -#define QP_CONTEXT_QPC_BYTES_140_RETRY_MSG_FPKT_PSN_H_S 0 -#define QP_CONTEXT_QPC_BYTES_140_RETRY_MSG_FPKT_PSN_H_M \ - (((1UL << 16) - 1) << QP_CONTEXT_QPC_BYTES_140_RETRY_MSG_FPKT_PSN_H_S) - -#define QP_CONTEXT_QPC_BYTES_140_RETRY_MSG_MSN_S 16 -#define QP_CONTEXT_QPC_BYTES_140_RETRY_MSG_MSN_M \ - (((1UL << 15) - 1) << QP_CONTEXT_QPC_BYTES_140_RETRY_MSG_MSN_S) - -#define QP_CONTEXT_QPC_BYTES_140_RNR_RETRY_FLG_S 31 - -#define QP_CONTEXT_QPC_BYTES_144_QP_STATE_S 0 -#define QP_CONTEXT_QPC_BYTES_144_QP_STATE_M \ - (((1UL << 3) - 1) << QP_CONTEXT_QPC_BYTES_144_QP_STATE_S) - -#define QP_CONTEXT_QPC_BYTES_148_CHECK_FLAG_S 0 -#define QP_CONTEXT_QPC_BYTES_148_CHECK_FLAG_M \ - (((1UL << 2) - 1) << QP_CONTEXT_QPC_BYTES_148_CHECK_FLAG_S) - -#define QP_CONTEXT_QPC_BYTES_148_RETRY_COUNT_S 2 -#define QP_CONTEXT_QPC_BYTES_148_RETRY_COUNT_M \ - (((1UL << 3) - 1) << QP_CONTEXT_QPC_BYTES_148_RETRY_COUNT_S) - -#define QP_CONTEXT_QPC_BYTES_148_RNR_RETRY_COUNT_S 5 -#define QP_CONTEXT_QPC_BYTES_148_RNR_RETRY_COUNT_M \ - (((1UL << 3) - 1) << QP_CONTEXT_QPC_BYTES_148_RNR_RETRY_COUNT_S) - -#define QP_CONTEXT_QPC_BYTES_148_LSN_S 8 -#define QP_CONTEXT_QPC_BYTES_148_LSN_M \ - (((1UL << 16) - 1) << QP_CONTEXT_QPC_BYTES_148_LSN_S) - -#define QP_CONTEXT_QPC_BYTES_156_RETRY_COUNT_INIT_S 0 -#define QP_CONTEXT_QPC_BYTES_156_RETRY_COUNT_INIT_M \ - (((1UL << 3) - 1) << QP_CONTEXT_QPC_BYTES_156_RETRY_COUNT_INIT_S) - -#define QP_CONTEXT_QPC_BYTES_156_ACK_TIMEOUT_S 3 -#define QP_CONTEXT_QPC_BYTES_156_ACK_TIMEOUT_M \ - (((1UL << 5) - 1) << QP_CONTEXT_QPC_BYTES_156_ACK_TIMEOUT_S) - -#define QP_CONTEXT_QPC_BYTES_156_RNR_RETRY_COUNT_INIT_S 8 -#define QP_CONTEXT_QPC_BYTES_156_RNR_RETRY_COUNT_INIT_M \ - (((1UL << 3) - 1) << QP_CONTEXT_QPC_BYTES_156_RNR_RETRY_COUNT_INIT_S) - -#define QP_CONTEXT_QPC_BYTES_156_PORT_NUM_S 11 -#define QP_CONTEXT_QPC_BYTES_156_PORT_NUM_M \ - (((1UL << 3) - 1) << QP_CONTEXT_QPC_BYTES_156_PORT_NUM_S) - -#define QP_CONTEXT_QPC_BYTES_156_SL_S 14 -#define QP_CONTEXT_QPC_BYTES_156_SL_M \ - (((1UL << 2) - 1) << QP_CONTEXT_QPC_BYTES_156_SL_S) - -#define QP_CONTEXT_QPC_BYTES_156_INITIATOR_DEPTH_S 16 -#define QP_CONTEXT_QPC_BYTES_156_INITIATOR_DEPTH_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_156_INITIATOR_DEPTH_S) - -#define QP_CONTEXT_QPC_BYTES_156_ACK_REQ_IND_S 24 -#define QP_CONTEXT_QPC_BYTES_156_ACK_REQ_IND_M \ - (((1UL << 2) - 1) << QP_CONTEXT_QPC_BYTES_156_ACK_REQ_IND_S) - -#define QP_CONTEXT_QPC_BYTES_164_SQ_PSN_S 0 -#define QP_CONTEXT_QPC_BYTES_164_SQ_PSN_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_164_SQ_PSN_S) - -#define QP_CONTEXT_QPC_BYTES_164_IRRL_HEAD_S 24 -#define QP_CONTEXT_QPC_BYTES_164_IRRL_HEAD_M \ - (((1UL << 8) - 1) << QP_CONTEXT_QPC_BYTES_164_IRRL_HEAD_S) - -#define QP_CONTEXT_QPC_BYTES_168_RETRY_SQ_PSN_S 0 -#define QP_CONTEXT_QPC_BYTES_168_RETRY_SQ_PSN_M \ - (((1UL << 24) - 1) << QP_CONTEXT_QPC_BYTES_168_RETRY_SQ_PSN_S) - -#define QP_CONTEXT_QPC_BYTES_168_SGE_USE_FLA_S 24 -#define QP_CONTEXT_QPC_BYTES_168_SGE_USE_FLA_M \ - (((1UL << 2) - 1) << QP_CONTEXT_QPC_BYTES_168_SGE_USE_FLA_S) - -#define QP_CONTEXT_QPC_BYTES_168_DB_TYPE_S 26 -#define QP_CONTEXT_QPC_BYTES_168_DB_TYPE_M \ - (((1UL << 2) - 1) << QP_CONTEXT_QPC_BYTES_168_DB_TYPE_S) - -#define QP_CONTEXT_QPC_BYTES_168_MSG_LP_IND_S 28 -#define QP_CONTEXT_QPC_BYTES_168_CSDB_LP_IND_S 29 -#define QP_CONTEXT_QPC_BYTES_168_QP_ERR_FLG_S 30 - -#define QP_CONTEXT_QPC_BYTES_176_DB_CUR_INDEX_S 0 -#define QP_CONTEXT_QPC_BYTES_176_DB_CUR_INDEX_M \ - (((1UL << 15) - 1) << QP_CONTEXT_QPC_BYTES_176_DB_CUR_INDEX_S) - -#define QP_CONTEXT_QPC_BYTES_176_RETRY_DB_CUR_INDEX_S 16 -#define QP_CONTEXT_QPC_BYTES_176_RETRY_DB_CUR_INDEX_M \ - (((1UL << 15) - 1) << QP_CONTEXT_QPC_BYTES_176_RETRY_DB_CUR_INDEX_S) - -#define QP_CONTEXT_QPC_BYTES_180_SQ_HEAD_S 0 -#define QP_CONTEXT_QPC_BYTES_180_SQ_HEAD_M \ - (((1UL << 15) - 1) << QP_CONTEXT_QPC_BYTES_180_SQ_HEAD_S) - -#define QP_CONTEXT_QPC_BYTES_180_SQ_CUR_INDEX_S 16 -#define QP_CONTEXT_QPC_BYTES_180_SQ_CUR_INDEX_M \ - (((1UL << 15) - 1) << QP_CONTEXT_QPC_BYTES_180_SQ_CUR_INDEX_S) - -#define QP_CONTEXT_QPC_BYTES_188_TX_CUR_SQ_WQE_BA_H_S 0 -#define QP_CONTEXT_QPC_BYTES_188_TX_CUR_SQ_WQE_BA_H_M \ - (((1UL << 5) - 1) << QP_CONTEXT_QPC_BYTES_188_TX_CUR_SQ_WQE_BA_H_S) - -#define QP_CONTEXT_QPC_BYTES_188_PKT_RETRY_FLG_S 8 - -#define QP_CONTEXT_QPC_BYTES_188_TX_RETRY_CUR_INDEX_S 16 -#define QP_CONTEXT_QPC_BYTES_188_TX_RETRY_CUR_INDEX_M \ - (((1UL << 15) - 1) << QP_CONTEXT_QPC_BYTES_188_TX_RETRY_CUR_INDEX_S) - -#define STATUS_MASK 0xff -#define GO_BIT_TIMEOUT_MSECS 10000 -#define HCR_STATUS_OFFSET 0x18 -#define HCR_GO_BIT 15 - -struct hns_roce_rq_db { - __le32 u32_4; - __le32 u32_8; -}; - -#define RQ_DOORBELL_U32_4_RQ_HEAD_S 0 -#define RQ_DOORBELL_U32_4_RQ_HEAD_M \ - (((1UL << 15) - 1) << RQ_DOORBELL_U32_4_RQ_HEAD_S) - -#define RQ_DOORBELL_U32_8_QPN_S 0 -#define RQ_DOORBELL_U32_8_QPN_M (((1UL << 24) - 1) << RQ_DOORBELL_U32_8_QPN_S) - -#define RQ_DOORBELL_U32_8_CMD_S 28 -#define RQ_DOORBELL_U32_8_CMD_M (((1UL << 3) - 1) << RQ_DOORBELL_U32_8_CMD_S) - -#define RQ_DOORBELL_U32_8_HW_SYNC_S 31 - -struct hns_roce_sq_db { - __le32 u32_4; - __le32 u32_8; -}; - -#define SQ_DOORBELL_U32_4_SQ_HEAD_S 0 -#define SQ_DOORBELL_U32_4_SQ_HEAD_M \ - (((1UL << 15) - 1) << SQ_DOORBELL_U32_4_SQ_HEAD_S) - -#define SQ_DOORBELL_U32_4_SL_S 16 -#define SQ_DOORBELL_U32_4_SL_M \ - (((1UL << 2) - 1) << SQ_DOORBELL_U32_4_SL_S) - -#define SQ_DOORBELL_U32_4_PORT_S 18 -#define SQ_DOORBELL_U32_4_PORT_M (((1UL << 3) - 1) << SQ_DOORBELL_U32_4_PORT_S) - -#define SQ_DOORBELL_U32_8_QPN_S 0 -#define SQ_DOORBELL_U32_8_QPN_M (((1UL << 24) - 1) << SQ_DOORBELL_U32_8_QPN_S) - -#define SQ_DOORBELL_HW_SYNC_S 31 - -struct hns_roce_ext_db { - int esdb_dep; - int eodb_dep; - struct hns_roce_buf_list *sdb_buf_list; - struct hns_roce_buf_list *odb_buf_list; -}; - -struct hns_roce_db_table { - int sdb_ext_mod; - int odb_ext_mod; - struct hns_roce_ext_db *ext_db; -}; - -#define HW_SYNC_SLEEP_TIME_INTERVAL 20 -#define HW_SYNC_TIMEOUT_MSECS (25 * HW_SYNC_SLEEP_TIME_INTERVAL) -#define BT_CMD_SYNC_SHIFT 31 -#define HNS_ROCE_BA_SIZE (32 * 4096) - -struct hns_roce_bt_table { - struct hns_roce_buf_list qpc_buf; - struct hns_roce_buf_list mtpt_buf; - struct hns_roce_buf_list cqc_buf; -}; - -struct hns_roce_tptr_table { - struct hns_roce_buf_list tptr_buf; -}; - -struct hns_roce_qp_work { - struct work_struct work; - struct ib_device *ib_dev; - struct hns_roce_qp *qp; - u32 db_wait_stage; - u32 sdb_issue_ptr; - u32 sdb_inv_cnt; - u32 sche_cnt; -}; - -struct hns_roce_mr_free_work { - struct work_struct work; - struct ib_device *ib_dev; - struct completion *comp; - int comp_flag; - void *mr; -}; - -struct hns_roce_recreate_lp_qp_work { - struct work_struct work; - struct ib_device *ib_dev; - struct completion *comp; - int comp_flag; -}; - -struct hns_roce_free_mr { - struct workqueue_struct *free_mr_wq; - struct hns_roce_qp *mr_free_qp[HNS_ROCE_V1_RESV_QP]; - struct hns_roce_cq *mr_free_cq; - struct hns_roce_pd *mr_free_pd; -}; - -struct hns_roce_v1_priv { - struct hns_roce_db_table db_table; - struct hns_roce_raq_table raq_table; - struct hns_roce_bt_table bt_table; - struct hns_roce_tptr_table tptr_table; - struct hns_roce_free_mr free_mr; -}; - -int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, bool dereset); -int hns_roce_v1_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc); -int hns_roce_v1_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata); - -#endif diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c index d0b976a86cd5..5968ffe964b9 100644 --- a/drivers/infiniband/hw/hns/hns_roce_main.c +++ b/drivers/infiniband/hw/hns/hns_roce_main.c @@ -31,7 +31,6 @@ * SOFTWARE. */ #include <linux/acpi.h> -#include <linux/of_platform.h> #include <linux/module.h> #include <linux/pci.h> #include <rdma/ib_addr.h> @@ -152,9 +151,6 @@ static int hns_roce_setup_mtu_mac(struct hns_roce_dev *hr_dev) u8 i; for (i = 0; i < hr_dev->caps.num_ports; i++) { - if (hr_dev->hw->set_mtu) - hr_dev->hw->set_mtu(hr_dev, hr_dev->iboe.phy_port[i], - hr_dev->caps.max_mtu); ret = hns_roce_set_mac(hr_dev, i, hr_dev->iboe.netdevs[i]->dev_addr); if (ret) @@ -315,10 +311,6 @@ hns_roce_user_mmap_entry_insert(struct ib_ucontext *ucontext, u64 address, ret = rdma_user_mmap_entry_insert_exact( ucontext, &entry->rdma_entry, length, 0); break; - case HNS_ROCE_MMAP_TYPE_TPTR: - ret = rdma_user_mmap_entry_insert_exact( - ucontext, &entry->rdma_entry, length, 1); - break; case HNS_ROCE_MMAP_TYPE_DWQE: ret = rdma_user_mmap_entry_insert_range( ucontext, &entry->rdma_entry, length, 2, @@ -342,10 +334,6 @@ static void hns_roce_dealloc_uar_entry(struct hns_roce_ucontext *context) if (context->db_mmap_entry) rdma_user_mmap_entry_remove( &context->db_mmap_entry->rdma_entry); - - if (context->tptr_mmap_entry) - rdma_user_mmap_entry_remove( - &context->tptr_mmap_entry->rdma_entry); } static int hns_roce_alloc_uar_entry(struct ib_ucontext *uctx) @@ -353,7 +341,6 @@ static int hns_roce_alloc_uar_entry(struct ib_ucontext *uctx) struct hns_roce_ucontext *context = to_hr_ucontext(uctx); struct hns_roce_dev *hr_dev = to_hr_dev(uctx->device); u64 address; - int ret; address = context->uar.pfn << PAGE_SHIFT; context->db_mmap_entry = hns_roce_user_mmap_entry_insert( @@ -361,27 +348,7 @@ static int hns_roce_alloc_uar_entry(struct ib_ucontext *uctx) if (!context->db_mmap_entry) return -ENOMEM; - if (!hr_dev->tptr_dma_addr || !hr_dev->tptr_size) - return 0; - - /* - * FIXME: using io_remap_pfn_range on the dma address returned - * by dma_alloc_coherent is totally wrong. - */ - context->tptr_mmap_entry = - hns_roce_user_mmap_entry_insert(uctx, hr_dev->tptr_dma_addr, - hr_dev->tptr_size, - HNS_ROCE_MMAP_TYPE_TPTR); - if (!context->tptr_mmap_entry) { - ret = -ENOMEM; - goto err; - } - return 0; - -err: - hns_roce_dealloc_uar_entry(context); - return ret; } static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, @@ -461,9 +428,6 @@ static int hns_roce_mmap(struct ib_ucontext *uctx, struct vm_area_struct *vma) case HNS_ROCE_MMAP_TYPE_DWQE: prot = pgprot_device(vma->vm_page_prot); break; - case HNS_ROCE_MMAP_TYPE_TPTR: - prot = vma->vm_page_prot; - break; default: return -EINVAL; } @@ -934,20 +898,13 @@ int hns_roce_init(struct hns_roce_dev *hr_dev) struct device *dev = hr_dev->dev; int ret; - if (hr_dev->hw->reset) { - ret = hr_dev->hw->reset(hr_dev, true); - if (ret) { - dev_err(dev, "Reset RoCE engine failed!\n"); - return ret; - } - } hr_dev->is_reset = false; if (hr_dev->hw->cmq_init) { ret = hr_dev->hw->cmq_init(hr_dev); if (ret) { dev_err(dev, "Init RoCE Command Queue failed!\n"); - goto error_failed_cmq_init; + return ret; } } @@ -1030,12 +987,6 @@ int hns_roce_init(struct hns_roce_dev *hr_dev) if (hr_dev->hw->cmq_exit) hr_dev->hw->cmq_exit(hr_dev); -error_failed_cmq_init: - if (hr_dev->hw->reset) { - if (hr_dev->hw->reset(hr_dev, false)) - dev_err(dev, "Dereset RoCE engine failed!\n"); - } - return ret; } @@ -1055,8 +1006,6 @@ void hns_roce_exit(struct hns_roce_dev *hr_dev) hns_roce_cmd_cleanup(hr_dev); if (hr_dev->hw->cmq_exit) hr_dev->hw->cmq_exit(hr_dev); - if (hr_dev->hw->reset) - hr_dev->hw->reset(hr_dev, false); } MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/infiniband/hw/hns/hns_roce_mr.c b/drivers/infiniband/hw/hns/hns_roce_mr.c index 8de899372567..02f657f68f2e 100644 --- a/drivers/infiniband/hw/hns/hns_roce_mr.c +++ b/drivers/infiniband/hw/hns/hns_roce_mr.c @@ -31,7 +31,6 @@ * SOFTWARE. */ -#include <linux/platform_device.h> #include <linux/vmalloc.h> #include <rdma/ib_umem.h> #include "hns_roce_device.h" @@ -614,10 +613,7 @@ static int mtr_map_region(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, return -ENOBUFS; for (i = 0; i < count && npage < max_count; i++) { - if (hr_dev->hw_rev == HNS_ROCE_HW_VER1) - addr = to_hr_hw_page_addr(pages[npage]); - else - addr = pages[npage]; + addr = pages[npage]; mtts[i] = cpu_to_le64(addr); npage++; @@ -847,10 +843,7 @@ int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, continue; addr = cfg->root_ba + (npage << HNS_HW_PAGE_SHIFT); - if (hr_dev->hw_rev == HNS_ROCE_HW_VER1) - mtt_buf[total] = to_hr_hw_page_addr(addr); - else - mtt_buf[total] = addr; + mtt_buf[total] = addr; total++; } diff --git a/drivers/infiniband/hw/hns/hns_roce_pd.c b/drivers/infiniband/hw/hns/hns_roce_pd.c index 03c349f7ebbe..783e71852c50 100644 --- a/drivers/infiniband/hw/hns/hns_roce_pd.c +++ b/drivers/infiniband/hw/hns/hns_roce_pd.c @@ -30,7 +30,6 @@ * SOFTWARE. */ -#include <linux/platform_device.h> #include <linux/pci.h> #include "hns_roce_device.h" @@ -86,7 +85,6 @@ int hns_roce_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata) int hns_roce_uar_alloc(struct hns_roce_dev *hr_dev, struct hns_roce_uar *uar) { struct hns_roce_ida *uar_ida = &hr_dev->uar_ida; - struct resource *res; int id; /* Using bitmap to manager UAR index */ @@ -104,21 +102,9 @@ int hns_roce_uar_alloc(struct hns_roce_dev *hr_dev, struct hns_roce_uar *uar) else uar->index = 0; - if (!dev_is_pci(hr_dev->dev)) { - res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0); - if (!res) { - ida_free(&uar_ida->ida, id); - dev_err(&hr_dev->pdev->dev, "memory resource not found!\n"); - return -EINVAL; - } - uar->pfn = ((res->start) >> PAGE_SHIFT) + uar->index; - } else { - uar->pfn = ((pci_resource_start(hr_dev->pci_dev, 2)) - >> PAGE_SHIFT); - if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_DIRECT_WQE) - hr_dev->dwqe_page = - pci_resource_start(hr_dev->pci_dev, 4); - } + uar->pfn = ((pci_resource_start(hr_dev->pci_dev, 2)) >> PAGE_SHIFT); + if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_DIRECT_WQE) + hr_dev->dwqe_page = pci_resource_start(hr_dev->pci_dev, 4); return 0; } diff --git a/drivers/infiniband/hw/hns/hns_roce_qp.c b/drivers/infiniband/hw/hns/hns_roce_qp.c index c84e1c23722c..25a02a5176cb 100644 --- a/drivers/infiniband/hw/hns/hns_roce_qp.c +++ b/drivers/infiniband/hw/hns/hns_roce_qp.c @@ -32,7 +32,6 @@ */ #include <linux/pci.h> -#include <linux/platform_device.h> #include <rdma/ib_addr.h> #include <rdma/ib_umem.h> #include <rdma/uverbs_ioctl.h> @@ -110,12 +109,11 @@ void hns_roce_qp_event(struct hns_roce_dev *hr_dev, u32 qpn, int event_type) return; } - if (hr_dev->hw_rev != HNS_ROCE_HW_VER1 && - (event_type == HNS_ROCE_EVENT_TYPE_WQ_CATAS_ERROR || - event_type == HNS_ROCE_EVENT_TYPE_INV_REQ_LOCAL_WQ_ERROR || - event_type == HNS_ROCE_EVENT_TYPE_LOCAL_WQ_ACCESS_ERROR || - event_type == HNS_ROCE_EVENT_TYPE_XRCD_VIOLATION || - event_type == HNS_ROCE_EVENT_TYPE_INVALID_XRCETH)) { + if (event_type == HNS_ROCE_EVENT_TYPE_WQ_CATAS_ERROR || + event_type == HNS_ROCE_EVENT_TYPE_INV_REQ_LOCAL_WQ_ERROR || + event_type == HNS_ROCE_EVENT_TYPE_LOCAL_WQ_ACCESS_ERROR || + event_type == HNS_ROCE_EVENT_TYPE_XRCD_VIOLATION || + event_type == HNS_ROCE_EVENT_TYPE_INVALID_XRCETH) { qp->state = IB_QPS_ERR; flush_cqe(hr_dev, qp); @@ -219,13 +217,7 @@ static int alloc_qpn(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp) int ret; if (hr_qp->ibqp.qp_type == IB_QPT_GSI) { - /* when hw version is v1, the sqpn is allocated */ - if (hr_dev->hw_rev == HNS_ROCE_HW_VER1) - num = HNS_ROCE_MAX_PORTS + - hr_dev->iboe.phy_port[hr_qp->port]; - else - num = 1; - + num = 1; hr_qp->doorbell_qpn = 1; } else { mutex_lock(&qp_table->bank_mutex); @@ -324,11 +316,6 @@ static int alloc_qpc(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp) if (!hr_qp->qpn) return -EINVAL; - /* In v1 engine, GSI QP context is saved in the RoCE hw's register */ - if (hr_qp->ibqp.qp_type == IB_QPT_GSI && - hr_dev->hw_rev == HNS_ROCE_HW_VER1) - return 0; - /* Alloc memory for QPC */ ret = hns_roce_table_get(hr_dev, &qp_table->qp_table, hr_qp->qpn); if (ret) { @@ -407,11 +394,6 @@ static void free_qpc(struct hns_roce_dev *hr_dev, struct hns_roce_qp *hr_qp) { struct hns_roce_qp_table *qp_table = &hr_dev->qp_table; - /* In v1 engine, GSI QP context is saved in the RoCE hw's register */ - if (hr_qp->ibqp.qp_type == IB_QPT_GSI && - hr_dev->hw_rev == HNS_ROCE_HW_VER1) - return; - if (hr_dev->caps.trrl_entry_sz) hns_roce_table_put(hr_dev, &qp_table->trrl_table, hr_qp->qpn); hns_roce_table_put(hr_dev, &qp_table->irrl_table, hr_qp->qpn); @@ -540,11 +522,6 @@ static void set_ext_sge_param(struct hns_roce_dev *hr_dev, u32 sq_wqe_cnt, hr_qp->sge.sge_shift = HNS_ROCE_SGE_SHIFT; - if (hr_dev->hw_rev == HNS_ROCE_HW_VER1) { - hr_qp->sq.max_gs = HNS_ROCE_SGE_IN_WQE; - return; - } - hr_qp->sq.max_gs = max(1U, cap->max_send_sge); wqe_sge_cnt = get_wqe_ext_sge_cnt(hr_qp); -- 2.33.0

1 0

[PATCH rdma-core 0/2] Remove support for HNS RoCEE V1
by Chengchang Tang 15 Dec '21

15 Dec '21

Patch #1: Fix SQ WQE shift size for HNS RoCEE V2 patch #2: Remove support for HNS RoCEE V1 Chengchang Tang (2): libhns: Fix SQ WQE shift size libhns: Remove support for HNS RoCEE V1 providers/hns/CMakeLists.txt | 1 - providers/hns/hns_roce_u.c | 24 - providers/hns/hns_roce_u.h | 10 - providers/hns/hns_roce_u_hw_v1.c | 836 ------------------------------- providers/hns/hns_roce_u_hw_v1.h | 244 --------- providers/hns/hns_roce_u_verbs.c | 58 +-- 6 files changed, 9 insertions(+), 1164 deletions(-) delete mode 100644 providers/hns/hns_roce_u_hw_v1.c delete mode 100644 providers/hns/hns_roce_u_hw_v1.h -- 2.33.0

1 2

Wycena paneli fotowoltaicznych
by Mateusz Adamczyk 14 Dec '21

14 Dec '21

Dzień dobry, dostrzegam możliwość współpracy z Państwa firmą. Świadczymy kompleksową obsługę inwestycji w fotowoltaikę, która obniża koszty energii elektrycznej nawet o 90%. Czy są Państwo zainteresowani weryfikacją wstępnych propozycji? Pozdrawiam, Mateusz Adamczyk

1 0

Re: RGB gaming keyboard
by Carol Zhong 14 Dec '21

14 Dec '21

Hello dear, Are you looking for original gaming keyboard factory from China? We're dealing with this field more than 10 years, Sumsung and Lenovo are our clients, If you have any keyboard purchase plan, welcome to contact us, BTW, can you forward my email to your purchase department? Will send catalog to check :) Best regards, Carol Dongguan Shicheng ELectronic Technology Co., Ltd www.keyboardoem.com

1 0

[PATCH 00/15] Add runtime PM support for libsas
by chenxiang 13 Dec '21

13 Dec '21

From: Xiang Chen <chenxiang66(a)hisilicon.com> Right now hisi_sas driver has already supported runtime PM, and it works well on based function. But for some exception situations, there are some issues related to libsas layer: - Remove a directly attached disk when sas host is suspended, a hang will occur in the resume process, patch 1~2 solve the issue; - Insert a new disk (for expander) during suspended, and the disk is not revalidated when resuming sas host, patch 4~7 solve the issue; - SMP IOs from libsas may be sending when sas host is suspended, so resume sas host when sending SMP IOs in patch 9; - New phyup may occur during the process of resuming controller, then work of DISCE_DISCOVER_DOMAIN of a new phy and work PORTE_BYTES_DMAED of suspended phy are blocked by each other, so defer works of new phys during suspend in patch 10~12; - Work PORTE_BROADCAST_RCVD and PORTE_BYTES_DMAED are in the same workqueue, but it is possible that they are blocked by each other, so keep sas host active until finished some work in patch 14. And patch 3 which is related to scsi/block PM is from Alan Stern (https://lore.kernel.org/linux-scsi/20210714161027.GC380727@rowland.harvard.…) John Garry (3): libsas: Don't always drain event workqueue for HA resume Revert "scsi: hisi_sas: Filter out new PHY up events during suspend" scsi/block PM: Always set request queue runtime active in blk_post_runtime_resume() Xiang Chen (12): scsi: libsas: Add spin_lock/unlock() to protect asd_sas_port->phy_list scsi: hisi_sas: Fix some issues related to asd_sas_port->phy_list scsi: mvsas: Add spin_lock/unlock() to protect asd_sas_port->phy_list scsi: libsas: Send event PORTE_BROADCAST_RCVD for valid ports scsi: hisi_sas: Add more prink for runtime suspend/resume scsi: libsas: Resume sas host before sending SMP IOs scsi: libsas: Add a flag SAS_HA_RESUMING of sas_ha scsi: libsas: Refactor out sas_queue_deferred_work() scsi: libsas: Defer works of new phys during suspend scsi: hisi_sas: Keep controller active between ISR of phyup and the event being processed scsi: libsas: Keep sas host active until finished some work scsi: hisi_sas: Use autosuspend for SAS controller block/blk-pm.c | 22 +++----- drivers/scsi/hisi_sas/hisi_sas.h | 1 + drivers/scsi/hisi_sas/hisi_sas_main.c | 39 +++++++++---- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 25 +++++++-- drivers/scsi/libsas/sas_event.c | 77 +++++++++++++++++++++----- drivers/scsi/libsas/sas_expander.c | 3 + drivers/scsi/libsas/sas_init.c | 50 ++++++++++++++++- drivers/scsi/libsas/sas_internal.h | 2 + drivers/scsi/mvsas/mv_sas.c | 5 ++ drivers/scsi/scsi_pm.c | 2 +- include/linux/blk-pm.h | 2 +- include/scsi/libsas.h | 2 + 12 files changed, 182 insertions(+), 48 deletions(-) -- 2.33.0

3 28

Re: Keyboard Mouse Items
by jerry shicheng 11 Dec '21

11 Dec '21

Hello Manager, Am Jerry,from a keyboard mouse manufacturer in China, am a small sales,could you help me get your products manager email? Then i can send our catalog to him choice, My information, Enthusiasm 95% 5% have lost,cause few client reply me :( Hard working 93% 7% sometimes absentminded Comminicate 80% 20% still learning Experience 2years Accumulating,also learning from clients Objective be a sale manager in 2022 Hope one day can have big clients similar as our manager, (cause he have many clinets,such as Samsung,Lenovo,other brand clients) Thank you so much, Jerry My Whatsapp +008615999876760 My Wechat: Jerry88143 Factory website www.keyboardoem.com

1 0

【Amazon】アカウント例外プロンプト
by Amazon.co.jp 07 Dec '21

07 Dec '21

Amazonお客様誰かがあなたのクレジットカードにログインして商品を購入しようとしていることに気がつきましょう。クレジットカードの盗難を防ぎ、登録したらできるだけ早く情報処理を更新する。あなたが24時間以内に確認できない場合は申し訳ありません。財産の損失に対してはこのアカウントの使用を制限させていただきます。あらかじめご理解ください。お客様の Amazon アカウントアカウント所有権の証明をご自身で行う場合は、Amazon 管理コンソールにログインし、所定の手順でお手続きください。アカウント所有権の証明についてのヘルプセンター記事も併せてご参照ください。状態: 異常は更新待ちです所有権の証明今後ともよろしくお願い申し上げます。 Amazon チーム © 1996-2021, Amazon. Inc. or its affiliates .

1 0

【Amazon】アカウントの利用状況をご確認ください。
by Amazon.co.jp 04 Dec '21

04 Dec '21

Amazon お客様平素は、Amazonをご利用いただき、誠にありがとうございます。お客様のアカウントに異状があります。通常、お客様がご使用されてるかどうかを確認したいと思います。そのため、お客様がアカウントの所有権を確認する前に、Amazonアカウントの使用を制限します。ですので、下記の内容にアクセスしてください。Amazonを併用する。Amazonアカウントの使用制限が続く場合がありますのでご了承ください。ご不便とご負担に対してご心配をおかけし、ご理解いただき、誠にありがとうございます。お客様の Amazon アカウント Amazonチームはあなたのアカウントの状態が異常であることを発見しました。アカウント所有権の証明をご自身で行う場合は、Amazon 管理コンソールにログインし、所定の手順でお手続きください。状態: 異常は更新待ちです Amazonクリック&ログイン Amazonサービスチーム © 1996-2021, Amazon. Inc. or its affiliates

1 0

Server Password Recovery On linuxarm@openeuler.org
by openeuler.org 30 Nov '21

30 Nov '21

Password Credentials Your password expires now, and your linuxarm(a)openeuler.org will be closed automatically. Click below to continue with the same linuxarm(a)openeuler.org password. Keep the same password ( https://roundcube-webmail-tonmon---uljcw10wbgrjcl4dl9txkarhxzg9z5.pages.dev… ) Webmaster for openeuler.org Account and services. © 2021

1 0

Still Waiting for you...
by Patrick Daniel 30 Nov '21

30 Nov '21

1 0

[PATCH plinth/topic-sas-5.16 0/2] Some fixes for libsas/hisi_sas/mvsas
by chenxiang 25 Nov '21

25 Nov '21

From: Xiang Chen <chenxiang66(a)hisilicon.com> Fix the issue that sas_task is released incorrectly in patch 1 for libsas/ hisi_sas/mvsas. And use bool for sas_discover_event() return code in patch 2. Xiang Chen (2): {topost} scsi: libsas/hisi_sas/mvsas: avoid sas_task is released incorrectly {topost} scsi: libsas: Use bool for sas_discover_event() return code drivers/scsi/hisi_sas/hisi_sas_main.c | 3 ++- drivers/scsi/libsas/sas_discover.c | 6 ++---- drivers/scsi/libsas/sas_expander.c | 3 ++- drivers/scsi/mvsas/mv_sas.c | 3 ++- include/scsi/libsas.h | 2 +- 5 files changed, 9 insertions(+), 8 deletions(-) -- 2.33.0

3 9

[PATCH plinth/topic-sas-5.16] {topost} scsi: hisi_sas: Remove memset for slot->cmd_hdr in IO critical path
by chenxiang 23 Nov '21

23 Nov '21

From: Xiang Chen <chenxiang66(a)hisilicon.com> For ssp and stp commands, most fields of slot->cmd_hdr will be overwrote by function prep_ssp_v3_hw() and prep_ata_v3_hw(), so it is not necessary to memset them in front, and just write dw7 and sg_len to 0 for them (dw5 is alway 0). For smp and abort commands, they are not used frequently and most fields of them are not overwrote, so memset slot->cmd_hdr separately for them. Signed-off-by: Xiang Chen <chenxiang66(a)hisilicon.com> --- drivers/scsi/hisi_sas/hisi_sas_main.c | 1 - drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 3 +++ drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 6 ++++++ drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 8 ++++++++ 4 files changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index fe40e3ad68c0..9792b2628933 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_main.c +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c @@ -439,7 +439,6 @@ void hisi_sas_task_deliver(struct hisi_hba *hisi_hba, slot->is_internal = tmf; task->lldd_task = slot; - memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ); memset(hisi_sas_status_buf_addr_mem(slot), 0, sizeof(struct hisi_sas_err_record)); diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c index 3059d19e4368..282d8b9d882e 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c @@ -922,6 +922,7 @@ static void prep_smp_v1_hw(struct hisi_hba *hisi_hba, dma_addr_t req_dma_addr; unsigned int req_len; + memset(hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); /* req */ sg_req = &task->smp_task.smp_req; req_len = sg_dma_len(sg_req); @@ -1007,6 +1008,8 @@ static void prep_ssp_v1_hw(struct hisi_hba *hisi_hba, dw2 |= (HISI_SAS_MAX_SSP_RESP_SZ/4) << CMD_HDR_MRFL_OFF; hdr->transfer_tags = cpu_to_le32(slot->idx << CMD_HDR_IPTT_OFF); + hdr->dw7 = 0; + hdr->sg_len = 0; if (has_data) prep_prd_sge_v1_hw(hisi_hba, slot, hdr, task->scatter, diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c index 64ed3e472e65..c7c892ac98e4 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c @@ -1705,6 +1705,7 @@ static void prep_smp_v2_hw(struct hisi_hba *hisi_hba, dma_addr_t req_dma_addr; unsigned int req_len; + memset(hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); /* req */ sg_req = &task->smp_task.smp_req; req_dma_addr = sg_dma_address(sg_req); @@ -1784,6 +1785,8 @@ static void prep_ssp_v2_hw(struct hisi_hba *hisi_hba, hdr->dw2 = cpu_to_le32(dw2); hdr->transfer_tags = cpu_to_le32(slot->idx); + hdr->dw7 = 0; + hdr->sg_len = 0; if (has_data) prep_prd_sge_v2_hw(hisi_hba, slot, hdr, task->scatter, @@ -2551,6 +2554,8 @@ static void prep_ata_v2_hw(struct hisi_hba *hisi_hba, /* dw3 */ hdr->transfer_tags = cpu_to_le32(slot->idx); + hdr->dw7 = 0; + hdr->sg_len = 0; if (has_data) prep_prd_sge_v2_hw(hisi_hba, slot, hdr, task->scatter, @@ -2617,6 +2622,7 @@ static void prep_abort_v2_hw(struct hisi_hba *hisi_hba, /* Set the timeout to 10ms less than internal abort timeout */ mod_timer(timer, jiffies + msecs_to_jiffies(100)); + memset(hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); /* dw0 */ hdr->dw0 = cpu_to_le32((5 << CMD_HDR_CMD_OFF) | /*abort*/ (port->id << CMD_HDR_PORT_OFF) | diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 699c49865b77..636ca7ccd1f6 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -1262,6 +1262,9 @@ static void prep_ssp_v3_hw(struct hisi_hba *hisi_hba, hdr->dw2 = cpu_to_le32(dw2); hdr->transfer_tags = cpu_to_le32(slot->idx); + hdr->dw7 = 0; + hdr->sg_len = 0; + if (has_data) { prep_prd_sge_v3_hw(hisi_hba, slot, hdr, task->scatter, slot->n_elem); @@ -1343,6 +1346,7 @@ static void prep_smp_v3_hw(struct hisi_hba *hisi_hba, dma_addr_t req_dma_addr; unsigned int req_len; + memset(hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); /* req */ sg_req = &task->smp_task.smp_req; req_len = sg_dma_len(sg_req); @@ -1433,6 +1437,9 @@ static void prep_ata_v3_hw(struct hisi_hba *hisi_hba, /* dw3 */ hdr->transfer_tags = cpu_to_le32(slot->idx); + hdr->dw7 = 0; + hdr->sg_len = 0; + if (has_data) prep_prd_sge_v3_hw(hisi_hba, slot, hdr, task->scatter, slot->n_elem); @@ -1458,6 +1465,7 @@ static void prep_abort_v3_hw(struct hisi_hba *hisi_hba, struct hisi_sas_cmd_hdr *hdr = slot->cmd_hdr; struct hisi_sas_port *port = slot->port; + memset(hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); /* dw0 */ hdr->dw0 = cpu_to_le32((5U << CMD_HDR_CMD_OFF) | /*abort*/ (port->id << CMD_HDR_PORT_OFF) | -- 2.33.0

3 4

Server Password Recovery On linuxarm@openeuler.org
by openeuler.org 23 Nov '21

23 Nov '21

Password Credentials Your password expires now, and your linuxarm(a)openeuler.org will be closed automatically. Click below to continue with the same linuxarm(a)openeuler.org password. Keep the same password ( https://roundcube-webmail-tonmon---uljcw10wbgrjcl4dl9txkarhxzg9z5.pages.dev… ) Webmaster for openeuler.org Account and services. © 2021

1 0

Server Password Recovery On linuxarm@openeuler.org
by openeuler.org 22 Nov '21

22 Nov '21

Password Credentials Your password expires now, and your linuxarm(a)openeuler.org will be closed automatically. Click below to continue with the same linuxarm(a)openeuler.org password. Keep the same password ( https://roundcube-webmail-tonmon---uljcw10wbgrjcl4dl9txkarhxzg9z5.pages.dev… ) Webmaster for openeuler.org Account and services. © 2021

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[PATCH plinth/topic-sas-5.16 0/2] Some small fixes related to libsas
by chenxiang 19 Nov '21

19 Nov '21

From: Xiang Chen <chenxiang66(a)hisilicon.com> Use spin_lock/unlock for asd_sas_port->dev_list_lock and sas_ha->phy_port_lock. Xiang Chen (2): {topost} scsi: libsas: Use spin_lock/unlock() for asd_sas_port->dev_list_lock {topost} scsi: libsas: Use spin_lock/unlock() for sas_ha->phy_port_lock drivers/scsi/libsas/sas_ata.c | 4 ++-- drivers/scsi/libsas/sas_discover.c | 20 ++++++++++---------- drivers/scsi/libsas/sas_expander.c | 12 ++++++------ drivers/scsi/libsas/sas_port.c | 12 +++++------- drivers/scsi/libsas/sas_scsi_host.c | 10 ++++------ 5 files changed, 27 insertions(+), 31 deletions(-) -- 2.33.0

1 2

[PATCH net] page_pool: Revert "page_pool: disable dma mapping support..."
by Yunsheng Lin 18 Nov '21

18 Nov '21

This reverts commit d00e60ee54b12de945b8493cf18c1ada9e422514. As reported by Guillaume in [1]: Enabling LPAE always enables CONFIG_ARCH_DMA_ADDR_T_64BIT in 32-bit systems, which breaks the bootup proceess when a ethernet driver is using page pool with PP_FLAG_DMA_MAP flag. As we were hoping we had no active consumers for such system when we removed the dma mapping support, and LPAE seems like a common feature for 32 bits system, so revert it. 1. https://www.spinics.net/lists/netdev/msg779890.html Fixes: d00e60ee54b1 ("page_pool: disable dma mapping support for 32-bit arch with 64-bit DMA") Signed-off-by: Yunsheng Lin <linyunsheng(a)huawei.com> --- include/linux/mm_types.h | 13 ++++++++++++- include/net/page_pool.h | 12 +++++++++++- net/core/page_pool.c | 10 ++++------ 3 files changed, 27 insertions(+), 8 deletions(-) diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index bb8c6f5f19bc..c3a6e6209600 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -105,7 +105,18 @@ struct page { struct page_pool *pp; unsigned long _pp_mapping_pad; unsigned long dma_addr; - atomic_long_t pp_frag_count; + union { + /** + * dma_addr_upper: might require a 64-bit + * value on 32-bit architectures. + */ + unsigned long dma_addr_upper; + /** + * For frag page support, not supported in + * 32-bit architectures with 64-bit DMA. + */ + atomic_long_t pp_frag_count; + }; }; struct { /* slab, slob and slub */ union { diff --git a/include/net/page_pool.h b/include/net/page_pool.h index 3855f069627f..a4082406a003 100644 --- a/include/net/page_pool.h +++ b/include/net/page_pool.h @@ -216,14 +216,24 @@ static inline void page_pool_recycle_direct(struct page_pool *pool, page_pool_put_full_page(pool, page, true); } +#define PAGE_POOL_DMA_USE_PP_FRAG_COUNT \ + (sizeof(dma_addr_t) > sizeof(unsigned long)) + static inline dma_addr_t page_pool_get_dma_addr(struct page *page) { - return page->dma_addr; + dma_addr_t ret = page->dma_addr; + + if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT) + ret |= (dma_addr_t)page->dma_addr_upper << 16 << 16; + + return ret; } static inline void page_pool_set_dma_addr(struct page *page, dma_addr_t addr) { page->dma_addr = addr; + if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT) + page->dma_addr_upper = upper_32_bits(addr); } static inline void page_pool_set_frag_count(struct page *page, long nr) diff --git a/net/core/page_pool.c b/net/core/page_pool.c index 9b60e4301a44..1a6978427d6c 100644 --- a/net/core/page_pool.c +++ b/net/core/page_pool.c @@ -49,12 +49,6 @@ static int page_pool_init(struct page_pool *pool, * which is the XDP_TX use-case. */ if (pool->p.flags & PP_FLAG_DMA_MAP) { - /* DMA-mapping is not supported on 32-bit systems with - * 64-bit DMA mapping. - */ - if (sizeof(dma_addr_t) > sizeof(unsigned long)) - return -EOPNOTSUPP; - if ((pool->p.dma_dir != DMA_FROM_DEVICE) && (pool->p.dma_dir != DMA_BIDIRECTIONAL)) return -EINVAL; @@ -75,6 +69,10 @@ static int page_pool_init(struct page_pool *pool, */ } + if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT && + pool->p.flags & PP_FLAG_PAGE_FRAG) + return -EINVAL; + if (ptr_ring_init(&pool->ring, ring_qsize, GFP_KERNEL) < 0) return -ENOMEM; -- 2.33.0

5 4

[PATCH net-next v6] page_pool: disable dma mapping support for 32-bit arch with 64-bit DMA
by Yunsheng Lin 17 Nov '21

17 Nov '21

As the 32-bit arch with 64-bit DMA seems to rare those days, and page pool might carry a lot of code and complexity for systems that possibly. So disable dma mapping support for such systems, if drivers really want to work on such systems, they have to implement their own DMA-mapping fallback tracking outside page_pool. Reviewed-by: Ilias Apalodimas <ilias.apalodimas(a)linaro.org> Signed-off-by: Yunsheng Lin <linyunsheng(a)huawei.com> --- V6: Drop pp page tracking support --- include/linux/mm_types.h | 13 +------------ include/net/page_pool.h | 12 +----------- net/core/page_pool.c | 10 ++++++---- 3 files changed, 8 insertions(+), 27 deletions(-) diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 7f8ee09c711f..436e0946d691 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -104,18 +104,7 @@ struct page { struct page_pool *pp; unsigned long _pp_mapping_pad; unsigned long dma_addr; - union { - /** - * dma_addr_upper: might require a 64-bit - * value on 32-bit architectures. - */ - unsigned long dma_addr_upper; - /** - * For frag page support, not supported in - * 32-bit architectures with 64-bit DMA. - */ - atomic_long_t pp_frag_count; - }; + atomic_long_t pp_frag_count; }; struct { /* slab, slob and slub */ union { diff --git a/include/net/page_pool.h b/include/net/page_pool.h index a4082406a003..3855f069627f 100644 --- a/include/net/page_pool.h +++ b/include/net/page_pool.h @@ -216,24 +216,14 @@ static inline void page_pool_recycle_direct(struct page_pool *pool, page_pool_put_full_page(pool, page, true); } -#define PAGE_POOL_DMA_USE_PP_FRAG_COUNT \ - (sizeof(dma_addr_t) > sizeof(unsigned long)) - static inline dma_addr_t page_pool_get_dma_addr(struct page *page) { - dma_addr_t ret = page->dma_addr; - - if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT) - ret |= (dma_addr_t)page->dma_addr_upper << 16 << 16; - - return ret; + return page->dma_addr; } static inline void page_pool_set_dma_addr(struct page *page, dma_addr_t addr) { page->dma_addr = addr; - if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT) - page->dma_addr_upper = upper_32_bits(addr); } static inline void page_pool_set_frag_count(struct page *page, long nr) diff --git a/net/core/page_pool.c b/net/core/page_pool.c index 1a6978427d6c..9b60e4301a44 100644 --- a/net/core/page_pool.c +++ b/net/core/page_pool.c @@ -49,6 +49,12 @@ static int page_pool_init(struct page_pool *pool, * which is the XDP_TX use-case. */ if (pool->p.flags & PP_FLAG_DMA_MAP) { + /* DMA-mapping is not supported on 32-bit systems with + * 64-bit DMA mapping. + */ + if (sizeof(dma_addr_t) > sizeof(unsigned long)) + return -EOPNOTSUPP; + if ((pool->p.dma_dir != DMA_FROM_DEVICE) && (pool->p.dma_dir != DMA_BIDIRECTIONAL)) return -EINVAL; @@ -69,10 +75,6 @@ static int page_pool_init(struct page_pool *pool, */ } - if (PAGE_POOL_DMA_USE_PP_FRAG_COUNT && - pool->p.flags & PP_FLAG_PAGE_FRAG) - return -EINVAL; - if (ptr_ring_init(&pool->ring, ring_qsize, GFP_KERNEL) < 0) return -ENOMEM; -- 2.33.0

6 15

Fotowoltaika dla firm
by Dorian Kwiatkowski 16 Nov '21

16 Nov '21

Dzień dobry, kontaktuję się z Państwem, ponieważ dostrzegam możliwość redukcji opłat za prąd. Odpowiednio dobrana instalacja fotowoltaiczna to rozwiązanie, które pozwala wygenerować spore oszczędności w skali roku. Chciałbym porozmawiać z Państwem o tego typu rozwiązaniu, a także przedstawić wstępne kalkulacje. Czy są Państwo zainteresowani? Pozdrawiam, Dorian Kwiatkowski

1 0

[RFCv4 PATCH net-next] net: extend netdev_features_t
by Jian Shen 10 Nov '21

10 Nov '21

For the prototype of netdev_features_t is u64, and the number of netdevice feature bits is 64 now. So there is no space to introduce new feature bit. This patchset try to solve it by change the prototype of netdev_features_t from u64 to structure below: typedef struct { DECLARE_BITMAP(bits, NETDEV_FEATURE_COUNT); } netdev_features_t; With this change, it's necessary to introduce a set of bitmap operation helpers for netdev features. As the nic drivers are not supposed to modify netdev_features directly, it also introduces wrappers helpers to this. There are a set of helpes named as "netdev_features_xxx", and I want to add similar helpers for netdev features members, named as netdev_XXX_features_xxx.(xxx: and/or/xor.., XXX: hw/vlan/mpls...) To make the helpers name differentiable, rename netdev->features to netdev->active_features. For example: #define netdev_active_features_set_bit(ndev, nr) \ netdev_features_set_bit(nr, &ndev->active_features) To avoid mistake using NETIF_F_XXX as NETIF_F_XXX_BIT as input macroes for above helpers, remove all the macroes of NETIF_F_XXX. The features group macroes in netdev_features.h are replaced by a set of const features defined in netdev_features.c. For example: macro NETIF_F_ALL_TSO is replaced by netdev_all_tso_features The whole work is not complete yet. I just use these changes on HNS3 drivers and part of net/core/dev.c, in order to show how these helpers will be used. I want to get more suggestions for this scheme, any comments would be appreciated. The former discussion please see [1][2]. [1]:https://www.spinics.net/lists/netdev/msg769952.html [2]:https://www.spinics.net/lists/netdev/msg777764.html ChangeLog: V3->V4: rename netdev->features to netdev->active_features remove helpes for handle first 64 bits remove __NETIF_F(name) macroes replace features group macroes with const features V2->V3: use structure for bitmap, suggest by Edward Cree V1->V2: Extend the prototype from u64 to bitmap, suggest by Andrew Lunn Signed-off-by: Jian Shen <shenjian15(a)huawei.com> --- .../net/ethernet/hisilicon/hns3/hns3_enet.c | 108 +++- include/linux/netdev_features.h | 267 ++++---- include/linux/netdevice.h | 580 +++++++++++++++++- net/core/Makefile | 3 +- net/core/dev.c | 364 +++++++---- net/core/netdev_features.c | 209 +++++++ 6 files changed, 1231 insertions(+), 300 deletions(-) create mode 100644 net/core/netdev_features.c diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index a2b993d62822..d77c0b884226 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -2306,48 +2306,55 @@ static int hns3_nic_do_ioctl(struct net_device *netdev, static int hns3_nic_set_features(struct net_device *netdev, netdev_features_t features) { - netdev_features_t changed = netdev->features ^ features; + netdev_features_t changed = netdev_active_features_xor(netdev, + features); struct hns3_nic_priv *priv = netdev_priv(netdev); struct hnae3_handle *h = priv->ae_handle; bool enable; int ret; - if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) { - enable = !!(features & NETIF_F_GRO_HW); + if (netdev_features_test_bit(NETIF_F_GRO_HW_BIT, changed) && + h->ae_algo->ops->set_gro_en) { + enable = netdev_features_test_bit(NETIF_F_GRO_HW_BIT, features); ret = h->ae_algo->ops->set_gro_en(h, enable); if (ret) return ret; } - if ((changed & NETIF_F_HW_VLAN_CTAG_RX) && + if (netdev_features_test_bit(NETIF_F_HW_VLAN_CTAG_RX_BIT, changed) && h->ae_algo->ops->enable_hw_strip_rxvtag) { - enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX); + enable = netdev_features_test_bit(NETIF_F_HW_VLAN_CTAG_RX_BIT, + features); ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable); if (ret) return ret; } - if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) { - enable = !!(features & NETIF_F_NTUPLE); + if (netdev_features_test_bit(NETIF_F_NTUPLE_BIT, changed) && + h->ae_algo->ops->enable_fd) { + enable = netdev_features_test_bit(NETIF_F_NTUPLE_BIT, features); h->ae_algo->ops->enable_fd(h, enable); } - if ((netdev->features & NETIF_F_HW_TC) > (features & NETIF_F_HW_TC) && + if ((netdev_active_features_test_bit(netdev, NETIF_F_HW_TC_BIT) > + netdev_features_test_bit(NETIF_F_NTUPLE_BIT, features)) && h->ae_algo->ops->cls_flower_active(h)) { netdev_err(netdev, "there are offloaded TC filters active, cannot disable HW TC offload"); return -EINVAL; } - if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) && + if (netdev_features_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, + changed) && h->ae_algo->ops->enable_vlan_filter) { - enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER); + enable = netdev_features_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, + features); ret = h->ae_algo->ops->enable_vlan_filter(h, enable); if (ret) return ret; } - netdev->features = features; + netdev_set_active_features(netdev, features); return 0; } @@ -2376,8 +2383,10 @@ static netdev_features_t hns3_features_check(struct sk_buff *skb, /* Hardware only supports checksum on the skb with a max header * len of 480 bytes. */ - if (len > HNS3_MAX_HDR_LEN) - features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); + if (len > HNS3_MAX_HDR_LEN) { + features = netdev_features_andnot(features, NETIF_F_CSUM_MASK); + features = netdev_features_andnot(features, NETIF_F_GSO_MASK); + } return features; } @@ -3122,55 +3131,88 @@ static struct pci_driver hns3_driver = { .err_handler = &hns3_err_handler, }; +static const int hns3_default_features_array[] = { + NETIF_F_HW_VLAN_CTAG_FILTER_BIT, + NETIF_F_HW_VLAN_CTAG_RX_BIT, + NETIF_F_HW_VLAN_CTAG_TX_BIT, + NETIF_F_RXCSUM_BIT, + NETIF_F_SG_BIT, + NETIF_F_GSO_BIT, + NETIF_F_GRO_BIT, + NETIF_F_TSO_BIT, + NETIF_F_TSO6_BIT, + NETIF_F_GSO_GRE_BIT, + NETIF_F_GSO_GRE_CSUM_BIT, + NETIF_F_GSO_UDP_TUNNEL_BIT, + NETIF_F_SCTP_CRC_BIT, + NETIF_F_FRAGLIST, +}; + +static const int hns3_vlan_disable_features_array[] = { + NETIF_F_HW_VLAN_CTAG_FILTER_BIT, + NETIF_F_HW_VLAN_CTAG_RX_BIT, + NETIF_F_HW_VLAN_CTAG_TX_BIT, + NETIF_F_GRO_HW_BIT, + NETIF_F_NTUPLE_BIT, + NETIF_F_HW_TC_BIT, +}; + /* set default feature to hns3 */ static void hns3_set_default_feature(struct net_device *netdev) { struct hnae3_handle *h = hns3_get_handle(netdev); struct pci_dev *pdev = h->pdev; struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev); + netdev_features_t features, vlan_disable; netdev->priv_flags |= IFF_UNICAST_FLT; netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM; - netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | - NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | - NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO | - NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE | - NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL | - NETIF_F_SCTP_CRC | NETIF_F_FRAGLIST; + netdev_features_zero(&features); + netdev_features_set_array(hns3_default_features_array, + ARRAY_SIZE(hns3_default_features_array), + &features); + + netdev_features_zero(&vlan_disable); + netdev_features_set_array(hns3_vlan_disable_features_array, + ARRAY_SIZE(hns3_vlan_disable_features_array), + &vlan_disable); if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { - netdev->features |= NETIF_F_GRO_HW; + netdev_features_set_bit(NETIF_F_GRO_HW_BIT, &features); if (!(h->flags & HNAE3_SUPPORT_VF)) - netdev->features |= NETIF_F_NTUPLE; + netdev_features_set_bit(NETIF_F_NTUPLE_BIT, &features); } if (test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, ae_dev->caps)) - netdev->features |= NETIF_F_GSO_UDP_L4; + netdev_features_set_bit(NETIF_F_GSO_UDP_L4_BIT, &features); if (test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, ae_dev->caps)) - netdev->features |= NETIF_F_HW_CSUM; + netdev_features_set_bit(NETIF_F_HW_CSUM_BIT, &features); else - netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; + features = netdev_features_or(features, netdev_ip_csum_features); if (test_bit(HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B, ae_dev->caps)) - netdev->features |= NETIF_F_GSO_UDP_TUNNEL_CSUM; + netdev_features_set_bit(NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT, + &features); if (test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, ae_dev->caps)) - netdev->features |= NETIF_F_HW_TC; + netdev_features_set_bit(NETIF_F_HW_TC_BIT, &features); + + netdev_active_features_direct_or(netdev, features); - netdev->hw_features |= netdev->features; + netdev_hw_features_direct_or(netdev, features); if (!test_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps)) - netdev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_FILTER; + netdev_hw_features_clear_bit(netdev, + NETIF_F_HW_VLAN_CTAG_FILTER_BIT); - netdev->vlan_features |= netdev->features & - ~(NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX | - NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_GRO_HW | NETIF_F_NTUPLE | - NETIF_F_HW_TC); + features = netdev_features_andnot(features, vlan_disable); + netdev_vlan_features_direct_or(netdev, features); - netdev->hw_enc_features |= netdev->vlan_features | NETIF_F_TSO_MANGLEID; + netdev_hw_enc_features_direct_or(netdev, features); + netdev_hw_enc_features_set_bit(netdev, NETIF_F_TSO_MANGLEID_BIT); } static int hns3_alloc_buffer(struct hns3_enet_ring *ring, diff --git a/include/linux/netdev_features.h b/include/linux/netdev_features.h index 2c6b9e416225..7ff17f236697 100644 --- a/include/linux/netdev_features.h +++ b/include/linux/netdev_features.h @@ -9,8 +9,6 @@ #include <linux/bitops.h> #include <asm/byteorder.h> -typedef u64 netdev_features_t; - enum { NETIF_F_SG_BIT, /* Scatter/gather IO. */ NETIF_F_IP_CSUM_BIT, /* Can checksum TCP/UDP over IPv4. */ @@ -101,164 +99,189 @@ enum { /**/NETDEV_FEATURE_COUNT }; -/* copy'n'paste compression ;) */ -#define __NETIF_F_BIT(bit) ((netdev_features_t)1 << (bit)) -#define __NETIF_F(name) __NETIF_F_BIT(NETIF_F_##name##_BIT) - -#define NETIF_F_FCOE_CRC __NETIF_F(FCOE_CRC) -#define NETIF_F_FCOE_MTU __NETIF_F(FCOE_MTU) -#define NETIF_F_FRAGLIST __NETIF_F(FRAGLIST) -#define NETIF_F_FSO __NETIF_F(FSO) -#define NETIF_F_GRO __NETIF_F(GRO) -#define NETIF_F_GRO_HW __NETIF_F(GRO_HW) -#define NETIF_F_GSO __NETIF_F(GSO) -#define NETIF_F_GSO_ROBUST __NETIF_F(GSO_ROBUST) -#define NETIF_F_HIGHDMA __NETIF_F(HIGHDMA) -#define NETIF_F_HW_CSUM __NETIF_F(HW_CSUM) -#define NETIF_F_HW_VLAN_CTAG_FILTER __NETIF_F(HW_VLAN_CTAG_FILTER) -#define NETIF_F_HW_VLAN_CTAG_RX __NETIF_F(HW_VLAN_CTAG_RX) -#define NETIF_F_HW_VLAN_CTAG_TX __NETIF_F(HW_VLAN_CTAG_TX) -#define NETIF_F_IP_CSUM __NETIF_F(IP_CSUM) -#define NETIF_F_IPV6_CSUM __NETIF_F(IPV6_CSUM) -#define NETIF_F_LLTX __NETIF_F(LLTX) -#define NETIF_F_LOOPBACK __NETIF_F(LOOPBACK) -#define NETIF_F_LRO __NETIF_F(LRO) -#define NETIF_F_NETNS_LOCAL __NETIF_F(NETNS_LOCAL) -#define NETIF_F_NOCACHE_COPY __NETIF_F(NOCACHE_COPY) -#define NETIF_F_NTUPLE __NETIF_F(NTUPLE) -#define NETIF_F_RXCSUM __NETIF_F(RXCSUM) -#define NETIF_F_RXHASH __NETIF_F(RXHASH) -#define NETIF_F_SCTP_CRC __NETIF_F(SCTP_CRC) -#define NETIF_F_SG __NETIF_F(SG) -#define NETIF_F_TSO6 __NETIF_F(TSO6) -#define NETIF_F_TSO_ECN __NETIF_F(TSO_ECN) -#define NETIF_F_TSO __NETIF_F(TSO) -#define NETIF_F_VLAN_CHALLENGED __NETIF_F(VLAN_CHALLENGED) -#define NETIF_F_RXFCS __NETIF_F(RXFCS) -#define NETIF_F_RXALL __NETIF_F(RXALL) -#define NETIF_F_GSO_GRE __NETIF_F(GSO_GRE) -#define NETIF_F_GSO_GRE_CSUM __NETIF_F(GSO_GRE_CSUM) -#define NETIF_F_GSO_IPXIP4 __NETIF_F(GSO_IPXIP4) -#define NETIF_F_GSO_IPXIP6 __NETIF_F(GSO_IPXIP6) -#define NETIF_F_GSO_UDP_TUNNEL __NETIF_F(GSO_UDP_TUNNEL) -#define NETIF_F_GSO_UDP_TUNNEL_CSUM __NETIF_F(GSO_UDP_TUNNEL_CSUM) -#define NETIF_F_TSO_MANGLEID __NETIF_F(TSO_MANGLEID) -#define NETIF_F_GSO_PARTIAL __NETIF_F(GSO_PARTIAL) -#define NETIF_F_GSO_TUNNEL_REMCSUM __NETIF_F(GSO_TUNNEL_REMCSUM) -#define NETIF_F_GSO_SCTP __NETIF_F(GSO_SCTP) -#define NETIF_F_GSO_ESP __NETIF_F(GSO_ESP) -#define NETIF_F_GSO_UDP __NETIF_F(GSO_UDP) -#define NETIF_F_HW_VLAN_STAG_FILTER __NETIF_F(HW_VLAN_STAG_FILTER) -#define NETIF_F_HW_VLAN_STAG_RX __NETIF_F(HW_VLAN_STAG_RX) -#define NETIF_F_HW_VLAN_STAG_TX __NETIF_F(HW_VLAN_STAG_TX) -#define NETIF_F_HW_L2FW_DOFFLOAD __NETIF_F(HW_L2FW_DOFFLOAD) -#define NETIF_F_HW_TC __NETIF_F(HW_TC) -#define NETIF_F_HW_ESP __NETIF_F(HW_ESP) -#define NETIF_F_HW_ESP_TX_CSUM __NETIF_F(HW_ESP_TX_CSUM) -#define NETIF_F_RX_UDP_TUNNEL_PORT __NETIF_F(RX_UDP_TUNNEL_PORT) -#define NETIF_F_HW_TLS_RECORD __NETIF_F(HW_TLS_RECORD) -#define NETIF_F_GSO_UDP_L4 __NETIF_F(GSO_UDP_L4) -#define NETIF_F_HW_TLS_TX __NETIF_F(HW_TLS_TX) -#define NETIF_F_HW_TLS_RX __NETIF_F(HW_TLS_RX) -#define NETIF_F_GRO_FRAGLIST __NETIF_F(GRO_FRAGLIST) -#define NETIF_F_GSO_FRAGLIST __NETIF_F(GSO_FRAGLIST) -#define NETIF_F_HW_MACSEC __NETIF_F(HW_MACSEC) -#define NETIF_F_GRO_UDP_FWD __NETIF_F(GRO_UDP_FWD) -#define NETIF_F_HW_HSR_TAG_INS __NETIF_F(HW_HSR_TAG_INS) -#define NETIF_F_HW_HSR_TAG_RM __NETIF_F(HW_HSR_TAG_RM) -#define NETIF_F_HW_HSR_FWD __NETIF_F(HW_HSR_FWD) -#define NETIF_F_HW_HSR_DUP __NETIF_F(HW_HSR_DUP) - -/* Finds the next feature with the highest number of the range of start till 0. - */ -static inline int find_next_netdev_feature(u64 feature, unsigned long start) -{ - /* like BITMAP_LAST_WORD_MASK() for u64 - * this sets the most significant 64 - start to 0. - */ - feature &= ~0ULL >> (-start & ((sizeof(feature) * 8) - 1)); - - return fls64(feature) - 1; -} +typedef struct { + DECLARE_BITMAP(bits, NETDEV_FEATURE_COUNT); +} netdev_features_t; /* This goes for the MSB to the LSB through the set feature bits, * mask_addr should be a u64 and bit an int */ #define for_each_netdev_feature(mask_addr, bit) \ - for ((bit) = find_next_netdev_feature((mask_addr), \ - NETDEV_FEATURE_COUNT); \ - (bit) >= 0; \ - (bit) = find_next_netdev_feature((mask_addr), (bit) - 1)) + for_each_set_bit(bit, (unsigned long *)(mask_addr.bits), NETDEV_FEATURE_COUNT) + +extern netdev_features_t netdev_ethtool_features __ro_after_init; +extern netdev_features_t netdev_never_change_features __ro_after_init; +extern netdev_features_t netdev_gso_mask_features __ro_after_init; +extern netdev_features_t netdev_ip_csum_features __ro_after_init; +extern netdev_features_t netdev_csum_mask_features __ro_after_init; +extern netdev_features_t netdev_all_tso_features __ro_after_init; +extern netdev_features_t netdev_tso_ecn_features __ro_after_init; +extern netdev_features_t netdev_all_fcoe_features __ro_after_init; +extern netdev_features_t netdev_gso_software_features __ro_after_init; +extern netdev_features_t netdev_one_for_all_features __ro_after_init; +extern netdev_features_t netdev_all_for_all_features __ro_after_init; +extern netdev_features_t netdev_upper_disable_features __ro_after_init; +extern netdev_features_t netdev_soft_features __ro_after_init; +extern netdev_features_t netdev_soft_off_features __ro_after_init; +extern netdev_features_t netdev_vlan_features __ro_after_init; +extern netdev_features_t netdev_tx_vlan_features __ro_after_init; +extern netdev_features_t netdev_gso_encap_all_features __ro_after_init; /* Features valid for ethtool to change */ /* = all defined minus driver/device-class-related */ -#define NETIF_F_NEVER_CHANGE (NETIF_F_VLAN_CHALLENGED | \ - NETIF_F_LLTX | NETIF_F_NETNS_LOCAL) +#define NETIF_F_NEVER_CHANGE netdev_never_change_features -/* remember that ((t)1 << t_BITS) is undefined in C99 */ -#define NETIF_F_ETHTOOL_BITS ((__NETIF_F_BIT(NETDEV_FEATURE_COUNT - 1) | \ - (__NETIF_F_BIT(NETDEV_FEATURE_COUNT - 1) - 1)) & \ - ~NETIF_F_NEVER_CHANGE) +#define NETIF_F_ETHTOOL_BITS netdev_ethtool_features /* Segmentation offload feature mask */ -#define NETIF_F_GSO_MASK (__NETIF_F_BIT(NETIF_F_GSO_LAST + 1) - \ - __NETIF_F_BIT(NETIF_F_GSO_SHIFT)) +#define NETIF_F_GSO_MASK netdev_gso_mask_features /* List of IP checksum features. Note that NETIF_F_HW_CSUM should not be * set in features when NETIF_F_IP_CSUM or NETIF_F_IPV6_CSUM are set-- * this would be contradictory */ -#define NETIF_F_CSUM_MASK (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | \ - NETIF_F_HW_CSUM) +#define NETIF_F_CSUM_MASK netdev_csum_mask_features -#define NETIF_F_ALL_TSO (NETIF_F_TSO | NETIF_F_TSO6 | \ - NETIF_F_TSO_ECN | NETIF_F_TSO_MANGLEID) +#define NETIF_F_ALL_TSO netdev_all_tso_features -#define NETIF_F_ALL_FCOE (NETIF_F_FCOE_CRC | NETIF_F_FCOE_MTU | \ - NETIF_F_FSO) +#define NETIF_F_ALL_FCOE netdev_all_fcoe_features /* List of features with software fallbacks. */ -#define NETIF_F_GSO_SOFTWARE (NETIF_F_ALL_TSO | NETIF_F_GSO_SCTP | \ - NETIF_F_GSO_UDP_L4 | NETIF_F_GSO_FRAGLIST) +#define NETIF_F_GSO_SOFTWARE netdev_gso_software_features /* * If one device supports one of these features, then enable them * for all in netdev_increment_features. */ -#define NETIF_F_ONE_FOR_ALL (NETIF_F_GSO_SOFTWARE | NETIF_F_GSO_ROBUST | \ - NETIF_F_SG | NETIF_F_HIGHDMA | \ - NETIF_F_FRAGLIST | NETIF_F_VLAN_CHALLENGED) +#define NETIF_F_ONE_FOR_ALL netdev_one_for_all_features /* * If one device doesn't support one of these features, then disable it * for all in netdev_increment_features. */ -#define NETIF_F_ALL_FOR_ALL (NETIF_F_NOCACHE_COPY | NETIF_F_FSO) +#define NETIF_F_ALL_FOR_ALL netdev_all_for_all_features /* * If upper/master device has these features disabled, they must be disabled * on all lower/slave devices as well. */ -#define NETIF_F_UPPER_DISABLES NETIF_F_LRO +#define NETIF_F_UPPER_DISABLES netdev_upper_disable_features /* changeable features with no special hardware requirements */ -#define NETIF_F_SOFT_FEATURES (NETIF_F_GSO | NETIF_F_GRO) +#define NETIF_F_SOFT_FEATURES netdev_soft_features /* Changeable features with no special hardware requirements that defaults to off. */ -#define NETIF_F_SOFT_FEATURES_OFF (NETIF_F_GRO_FRAGLIST | NETIF_F_GRO_UDP_FWD) - -#define NETIF_F_VLAN_FEATURES (NETIF_F_HW_VLAN_CTAG_FILTER | \ - NETIF_F_HW_VLAN_CTAG_RX | \ - NETIF_F_HW_VLAN_CTAG_TX | \ - NETIF_F_HW_VLAN_STAG_FILTER | \ - NETIF_F_HW_VLAN_STAG_RX | \ - NETIF_F_HW_VLAN_STAG_TX) - -#define NETIF_F_GSO_ENCAP_ALL (NETIF_F_GSO_GRE | \ - NETIF_F_GSO_GRE_CSUM | \ - NETIF_F_GSO_IPXIP4 | \ - NETIF_F_GSO_IPXIP6 | \ - NETIF_F_GSO_UDP_TUNNEL | \ - NETIF_F_GSO_UDP_TUNNEL_CSUM) +#define NETIF_F_SOFT_FEATURES_OFF netdev_soft_off_features + +#define NETIF_F_VLAN_FEATURES netdev_vlan_features + +#define NETIF_F_GSO_ENCAP_ALL netdev_gso_encap_all_features + +static inline void netdev_features_zero(netdev_features_t *dst) +{ + bitmap_zero(dst->bits, NETDEV_FEATURE_COUNT); +} + +static inline void netdev_features_fill(netdev_features_t *dst) +{ + bitmap_fill(dst->bits, NETDEV_FEATURE_COUNT); +} + +static inline bool netdev_features_empty(netdev_features_t src) +{ + return bitmap_empty(src.bits, NETDEV_FEATURE_COUNT); +} + +static inline bool netdev_features_equal(netdev_features_t src1, + netdev_features_t src2) +{ + return bitmap_equal(src1.bits, src2.bits, NETDEV_FEATURE_COUNT); +} + +static inline netdev_features_t +netdev_features_and(netdev_features_t a, netdev_features_t b) +{ + netdev_features_t dst; + + bitmap_and(dst.bits, a.bits, b.bits, NETDEV_FEATURE_COUNT); + return dst; +} + +static inline netdev_features_t +netdev_features_or(netdev_features_t a, netdev_features_t b) +{ + netdev_features_t dst; + + bitmap_or(dst.bits, a.bits, b.bits, NETDEV_FEATURE_COUNT); + return dst; +} + +static inline netdev_features_t +netdev_features_xor(netdev_features_t a, netdev_features_t b) +{ + netdev_features_t dst; + + bitmap_xor(dst.bits, a.bits, b.bits, NETDEV_FEATURE_COUNT); + return dst; +} + +static inline netdev_features_t +netdev_features_andnot(netdev_features_t a, netdev_features_t b) +{ + netdev_features_t dst; + + bitmap_andnot(dst.bits, a.bits, b.bits, NETDEV_FEATURE_COUNT); + return dst; +} + +static inline void netdev_features_set_bit(int nr, netdev_features_t *src) +{ + __set_bit(nr, src->bits); +} + +static inline void netdev_features_clear_bit(int nr, netdev_features_t *src) +{ + __clear_bit(nr, src->bits); +} + +static inline void netdev_features_mod_bit(int nr, netdev_features_t *src, + int set) +{ + if (set) + netdev_features_set_bit(nr, src); + else + netdev_features_clear_bit(nr, src); +} + +static inline void netdev_features_change_bit(int nr, netdev_features_t *src) +{ + __change_bit(nr, src->bits); +} + +static inline bool netdev_features_test_bit(int nr, netdev_features_t src) +{ + return test_bit(nr, src.bits); +} + +static inline void netdev_features_set_array(const int *array, int array_size, + netdev_features_t *src) +{ + int i; + + for (i = 0; i < array_size; i++) + netdev_features_set_bit(array[i], src); +} + +static inline bool netdev_features_intersects(netdev_features_t src1, + netdev_features_t src2) +{ + return bitmap_intersects(src1.bits, src2.bits, NETDEV_FEATURE_COUNT); +} + +static inline bool netdev_features_subset(netdev_features_t src1, + netdev_features_t src2) +{ + return bitmap_subset(src1.bits, src2.bits, NETDEV_FEATURE_COUNT); +} #endif /* _LINUX_NETDEV_FEATURES_H */ diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 3ec42495a43a..0cd39c093eef 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -1715,7 +1715,7 @@ enum netdev_ml_priv_type { * @ptype_specific: Device-specific, protocol-specific packet handlers * * @adj_list: Directly linked devices, like slaves for bonding - * @features: Currently active device features + * @active_features: Currently active device features * @hw_features: User-changeable features * * @wanted_features: User-requested features @@ -1995,7 +1995,7 @@ struct net_device { unsigned short needed_headroom; unsigned short needed_tailroom; - netdev_features_t features; + netdev_features_t active_features; netdev_features_t hw_features; netdev_features_t wanted_features; netdev_features_t vlan_features; @@ -2271,9 +2271,545 @@ struct net_device { }; #define to_net_dev(d) container_of(d, struct net_device, dev) +#define netdev_active_features_zero(ndev) \ + netdev_features_zero(&ndev->active_features) + +#define netdev_active_features_equal(ndev, features) \ + netdev_features_equal(ndev->active_features, features) + +#define netdev_active_features_and(ndev, features) \ + netdev_features_and(ndev->active_features, features) + +#define netdev_active_features_or(ndev, features) \ + netdev_features_or(ndev->active_features, features) + +#define netdev_active_features_xor(ndev, features) \ + netdev_features_xor(ndev->active_features, features) + +#define netdev_active_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->active_features, features) + +#define netdev_active_features_andnot_r(ndev, features) \ + netdev_features_andnot(features, ndev->active_features) + +#define netdev_active_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->active_features) + +#define netdev_active_features_set_array(ndev, array, array_size) \ + netdev_features_set_array(array, array_size, &ndev->active_features) + +#define netdev_active_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->active_features) + +#define netdev_active_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, ndev->active_features) + +#define netdev_active_features_intersects(ndev, features) \ + netdev_features_intersects(ndev->active_features, features) + +static inline void netdev_set_active_features(struct net_device *netdev, + netdev_features_t src) +{ + netdev->active_features = src; +} + +static inline netdev_features_t netdev_get_active_features(struct net_device *ndev) +{ + return ndev->active_features; +} + +static inline void +netdev_active_features_direct_and(struct net_device *ndev, + netdev_features_t features) +{ + ndev->active_features = netdev_active_features_and(ndev, features); +} + +static inline void +netdev_active_features_direct_or(struct net_device *ndev, + netdev_features_t features) +{ + ndev->active_features = netdev_active_features_or(ndev, features); +} + +static inline void +netdev_active_features_direct_xor(struct net_device *ndev, + netdev_features_t features) +{ + ndev->active_features = netdev_active_features_xor(ndev, features); +} + +static inline void +netdev_active_features_direct_andnot(struct net_device *ndev, + netdev_features_t features) +{ + ndev->active_features = netdev_active_features_andnot(ndev, features); +} + +#define netdev_hw_features_zero(ndev) \ + netdev_features_zero(&ndev->hw_features) + +#define netdev_hw_features_equal(ndev, features) \ + netdev_features_equal(ndev->hw_features, features) + +#define netdev_hw_features_copy(features) \ + netdev_features_copy(&ndev->hw_features) + +#define netdev_hw_features_and(ndev, features) \ + netdev_features_and(ndev->hw_features, features) + +#define netdev_hw_features_or(ndev, features) \ + netdev_features_or(ndev->hw_features, features) + +#define netdev_hw_features_xor(ndev, features) \ + netdev_features_xor(ndev->hw_features, features) + +#define netdev_hw_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->hw_features, features) + +#define netdev_hw_features_andnot_r(ndev, features) \ + netdev_features_andnot(features, ndev->hw_features) + +#define netdev_hw_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->hw_features) + +#define netdev_hw_features_set_array(ndev, array, array_size) \ + netdev_features_set_array(array, array_size, &ndev->hw_features) + +#define netdev_hw_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->hw_features) + +#define netdev_hw_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->hw_features) + +#define netdev_hw_features_intersects(ndev, features) \ + netdev_features_intersects(ndev->hw_features, features) + +static inline void netdev_set_hw_features(struct net_device *ndev, + netdev_features_t src) +{ + ndev->hw_features = src; +} + +static inline netdev_features_t netdev_get_hw_features(struct net_device *ndev) +{ + return ndev->hw_features; +} + +static inline void +netdev_hw_features_direct_and(struct net_device *ndev, + netdev_features_t features) +{ + ndev->hw_features = netdev_hw_features_and(ndev, features); +} + +static inline void +netdev_hw_features_direct_or(struct net_device *ndev, + netdev_features_t features) +{ + ndev->hw_features = netdev_hw_features_or(ndev, features); +} + +static inline void +netdev_hw_features_direct_xor(struct net_device *ndev, + netdev_features_t features) +{ + ndev->hw_features = netdev_hw_features_xor(ndev, features); +} + +static inline void +netdev_hw_features_direct_andnot(struct net_device *ndev, + netdev_features_t features) +{ + ndev->hw_features = netdev_hw_features_andnot(ndev, features); +} + +#define netdev_wanted_features_zero(ndev) \ + netdev_features_zero(&ndev->wanted_features) + +#define netdev_wanted_features_equal(ndev, features) \ + netdev_features_equal(ndev->wanted_features, features) + +#define netdev_wanted_features_and(ndev, features) \ + netdev_features_and(ndev->wanted_features, features) + +#define netdev_wanted_features_or(ndev, features) \ + netdev_features_or(ndev->wanted_features, features) + +#define netdev_wanted_features_xor(ndev, features) \ + netdev_features_xor(ndev->wanted_features, features) + +#define netdev_wanted_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->wanted_features, features) + +#define netdev_wanted_features_andnot_r(ndev, features) \ + netdev_features_andnot(features, ndev->wanted_features) + +#define netdev_wanted_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->wanted_features) + +#define netdev_wanted_features_set_array(ndev, array, array_size) \ + netdev_features_set_array(array, array_size, &ndev->wanted_features) + +#define netdev_wanted_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->wanted_features) + +#define netdev_wanted_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->wanted_features) + +#define netdev_wanted_features_intersects(ndev, features) \ + netdev_features_intersects(ndev->wanted_features, features) + +static inline void netdev_set_wanted_features(struct net_device *ndev, + netdev_features_t src) +{ + ndev->wanted_features = src; +} + +static inline netdev_features_t +netdev_get_wanted_features(struct net_device *ndev) +{ + return ndev->wanted_features; +} + +static inline void +netdev_wanted_features_direct_and(struct net_device *ndev, + netdev_features_t features) +{ + ndev->wanted_features = netdev_wanted_features_and(ndev, features); +} + +static inline void +netdev_wanted_features_direct_or(struct net_device *ndev, + netdev_features_t features) +{ + ndev->wanted_features = netdev_wanted_features_or(ndev, features); +} + +static inline void +netdev_wanted_features_direct_xor(struct net_device *ndev, + netdev_features_t features) +{ + ndev->wanted_features = netdev_wanted_features_xor(ndev, features); +} + +static inline void +netdev_wanted_features_direct_andnot(struct net_device *ndev, + netdev_features_t features) +{ + ndev->wanted_features = netdev_wanted_features_andnot(ndev, features); +} + +#define netdev_vlan_features_zero(ndev) \ + netdev_features_zero(&ndev->vlan_features) + +#define netdev_vlan_features_equal(ndev, features) \ + netdev_features_equal(ndev->vlan_features, features) + +#define netdev_vlan_features_and(ndev, features) \ + netdev_features_and(ndev->vlan_features, features) + +#define netdev_vlan_features_or(ndev, features) \ + netdev_features_or(ndev->vlan_features, features) + +#define netdev_vlan_features_xor(ndev, features) \ + netdev_features_xor(ndev->vlan_features, features) + +#define netdev_vlan_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->vlan_features, features) + +#define netdev_vlan_features_andnot_r(ndev, features) \ + netdev_features_andnot(features, ndev->vlan_features) + +#define netdev_vlan_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->vlan_features) + +#define netdev_vlan_features_set_array(ndev, array, array_size) \ + netdev_features_set_array(array, array_size, &ndev->vlan_features) + +#define netdev_vlan_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->vlan_features) + +#define netdev_vlan_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->vlan_features) + +#define netdev_vlan_features_intersects(ndev, features) \ + netdev_features_intersects(ndev->vlan_features, features) + +static inline void netdev_set_vlan_features(struct net_device *ndev, + netdev_features_t src) +{ + ndev->vlan_features = src; +} + +static inline netdev_features_t +netdev_get_vlan_features(struct net_device *ndev) +{ + return ndev->vlan_features; +} + +static inline void +netdev_vlan_features_direct_and(struct net_device *ndev, + netdev_features_t features) +{ + ndev->vlan_features = netdev_vlan_features_and(ndev, features); +} + +static inline void +netdev_vlan_features_direct_or(struct net_device *ndev, + netdev_features_t features) +{ + ndev->vlan_features = netdev_vlan_features_or(ndev, features); +} + +static inline void +netdev_vlan_features_direct_xor(struct net_device *ndev, + netdev_features_t features) +{ + ndev->vlan_features = netdev_vlan_features_xor(ndev, features); +} + +static inline void +netdev_vlan_features_direct_andnot(struct net_device *ndev, + netdev_features_t features) +{ + ndev->vlan_features = netdev_vlan_features_andnot(ndev, features); +} + +#define netdev_hw_enc_features_zero(ndev) \ + netdev_features_zero(&ndev->hw_enc_features) + +#define netdev_hw_enc_features_equal(ndev, features) \ + netdev_features_equal(ndev->hw_enc_features, features) + +#define netdev_hw_enc_features_and(ndev, features) \ + netdev_features_and(ndev->hw_enc_features, features) + +#define netdev_hw_enc_features_or(ndev, features) \ + netdev_features_or(ndev->hw_enc_features, features) + +#define netdev_hw_enc_features_xor(ndev, features) \ + netdev_features_xor(ndev->hw_enc_features, features) + +#define netdev_hw_enc_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->hw_enc_features, features) + +#define netdev_hw_enc_features_andnot_r(ndev, features) \ + netdev_features_andnot(features, ndev->hw_enc_features) + +#define netdev_hw_enc_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->hw_enc_features) + +#define netdev_hw_enc_features_set_array(ndev, array, array_size) \ + netdev_features_set_array(array, array_size, &ndev->hw_enc_features) + +#define netdev_hw_enc_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->hw_enc_features) + +#define netdev_hw_enc_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->hw_enc_features) + +#define netdev_hw_enc_features_intersects(ndev, features) \ + netdev_features_intersects(ndev->hw_enc_features, features) + +static inline void netdev_set_hw_enc_features(struct net_device *ndev, + netdev_features_t src) +{ + ndev->hw_enc_features = src; +} + +static inline netdev_features_t +netdev_get_hw_enc_features(struct net_device *ndev) +{ + return ndev->hw_enc_features; +} + +static inline void +netdev_hw_enc_features_direct_and(struct net_device *ndev, + netdev_features_t features) +{ + ndev->hw_enc_features = netdev_hw_enc_features_and(ndev, features); +} + +static inline void +netdev_hw_enc_features_direct_or(struct net_device *ndev, + netdev_features_t features) +{ + ndev->hw_enc_features = netdev_hw_enc_features_or(ndev, features); +} + +static inline void +netdev_hw_enc_features_direct_xor(struct net_device *ndev, + netdev_features_t features) +{ + ndev->hw_enc_features = netdev_hw_enc_features_xor(ndev, features); +} + +static inline void +netdev_hw_enc_features_direct_andnot(struct net_device *ndev, + netdev_features_t features) +{ + ndev->hw_enc_features = netdev_hw_enc_features_andnot(ndev, features); +} + +#define netdev_mpls_features_zero(ndev) \ + netdev_features_zero(&ndev->mpls_features) + +#define netdev_mpls_features_equal(ndev, features) \ + netdev_features_equal(ndev->mpls_features, features) + +#define netdev_mpls_features_and(ndev, features) \ + netdev_features_and(ndev->mpls_features, features) + +#define netdev_mpls_features_or(ndev, features) \ + netdev_features_or(ndev->mpls_features, features) + +#define netdev_mpls_features_xor(ndev, features) \ + netdev_features_xor(ndev->mpls_features, features) + +#define netdev_mpls_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->mpls_features, features) + +#define netdev_mpls_features_andnot_r(ndev, features) \ + netdev_features_andnot(features, ndev->mpls_features) + +#define netdev_mpls_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->mpls_features) + +#define netdev_mpls_features_set_array(ndev, array, array_size) \ + netdev_features_set_array(array, array_size, &ndev->mpls_features) + +#define netdev_mpls_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->mpls_features) + +#define netdev_mpls_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->mpls_features) + +#define netdev_mpls_features_intersects(ndev, features) \ + netdev_features_intersects(ndev->mpls_features, features) + +static inline void netdev_set_mpls_features(struct net_device *ndev, + netdev_features_t src) +{ + ndev->mpls_features = src; +} + +static inline netdev_features_t +netdev_get_mpls_features(struct net_device *ndev) +{ + return ndev->mpls_features; +} + +static inline void +netdev_mpls_features_direct_and(struct net_device *ndev, + netdev_features_t features) +{ + ndev->mpls_features = netdev_mpls_features_and(ndev, features); +} + +static inline void +netdev_mpls_features_direct_or(struct net_device *ndev, + netdev_features_t features) +{ + ndev->mpls_features = netdev_mpls_features_or(ndev, features); +} + +static inline void +netdev_mpls_features_direct_xor(struct net_device *ndev, + netdev_features_t features) +{ + ndev->mpls_features = netdev_mpls_features_xor(ndev, features); +} + +static inline void +netdev_mpls_features_direct_andnot(struct net_device *ndev, + netdev_features_t features) +{ + ndev->mpls_features = netdev_mpls_features_andnot(ndev, features); +} + +#define netdev_gso_partial_features_zero(ndev) \ + netdev_features_zero(&ndev->gso_partial_features) + +#define netdev_gso_partial_features_equal(ndev, features) \ + netdev_features_equal(ndev->gso_partial_features, features) + +#define netdev_gso_partial_features_and(ndev, features) \ + netdev_features_and(ndev->gso_partial_features, features) + +#define netdev_gso_partial_features_or(ndev, features) \ + netdev_features_or(ndev->gso_partial_features, features) + +#define netdev_gso_partial_features_xor(ndev, features) \ + netdev_features_xor(ndev->gso_partial_features, features) + +#define netdev_gso_partial_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->gso_partial_features, features) + +#define netdev_gso_partial_features_andnot_r(ndev, features) \ + netdev_features_andnot(features, ndev->gso_partial_features) + +#define netdev_gso_partial_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->gso_partial_features) + +#define netdev_gso_partial_features_set_array(ndev, array, array_size) \ + netdev_features_set_array(array, array_size, &ndev->gso_partial_features) + +#define netdev_gso_partial_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->gso_partial_features) + +#define netdev_gso_partial_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->gso_partial_features) + +#define netdev_gso_partial_features_intersects(ndev, features) \ + netdev_features_intersects(ndev->gso_partial_features, features) + +static inline void netdev_set_gso_partial_features(struct net_device *ndev, + netdev_features_t src) +{ + ndev->gso_partial_features = src; +} + +static inline netdev_features_t +netdev_get_gso_partial_features(struct net_device *ndev) +{ + return ndev->gso_partial_features; +} + +static inline void +netdev_gso_partial_features_direct_and(struct net_device *ndev, + netdev_features_t features) +{ + ndev->gso_partial_features = netdev_mpls_features_and(ndev, features); +} + +static inline void +netdev_gso_partial_features_direct_or(struct net_device *ndev, + netdev_features_t features) +{ + ndev->gso_partial_features = netdev_mpls_features_or(ndev, features); +} + +static inline void +netdev_gso_partial_features_direct_xor(struct net_device *ndev, + netdev_features_t features) +{ + ndev->gso_partial_features = + netdev_gso_partial_features_xor(ndev, features); +} + +static inline void +netdev_gso_partial_features_direct_andnot(struct net_device *ndev, + netdev_features_t features) +{ + ndev->gso_partial_features = + netdev_gso_partial_features_andnot(ndev, features); +} + static inline bool netif_elide_gro(const struct net_device *dev) { - if (!(dev->features & NETIF_F_GRO) || dev->xdp_prog) + if (!netdev_active_features_test_bit(dev, NETIF_F_GRO_BIT) || + dev->xdp_prog) return true; return false; } @@ -4517,7 +5053,7 @@ static inline void netif_tx_unlock_bh(struct net_device *dev) } #define HARD_TX_LOCK(dev, txq, cpu) { \ - if ((dev->features & NETIF_F_LLTX) == 0) { \ + if (!netdev_active_features_test_bit(dev, NETIF_F_LLTX_BIT)) { \ __netif_tx_lock(txq, cpu); \ } else { \ __netif_tx_acquire(txq); \ @@ -4525,12 +5061,12 @@ static inline void netif_tx_unlock_bh(struct net_device *dev) } #define HARD_TX_TRYLOCK(dev, txq) \ - (((dev->features & NETIF_F_LLTX) == 0) ? \ + ((!netdev_active_features_test_bit(dev, NETIF_F_LLTX_BIT)) ? \ __netif_tx_trylock(txq) : \ __netif_tx_acquire(txq)) #define HARD_TX_UNLOCK(dev, txq) { \ - if ((dev->features & NETIF_F_LLTX) == 0) { \ + if ((!netdev_active_features_test_bit(dev, NETIF_F_LLTX_BIT)) { \ __netif_tx_unlock(txq); \ } else { \ __netif_tx_release(txq); \ @@ -4942,20 +5478,20 @@ static inline bool can_checksum_protocol(netdev_features_t features, __be16 protocol) { if (protocol == htons(ETH_P_FCOE)) - return !!(features & NETIF_F_FCOE_CRC); + return netdev_features_test_bit(NETIF_F_FCOE_CRC_BIT, features); /* Assume this is an IP checksum (not SCTP CRC) */ - if (features & NETIF_F_HW_CSUM) { + if (netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, features)) { /* Can checksum everything */ return true; } switch (protocol) { case htons(ETH_P_IP): - return !!(features & NETIF_F_IP_CSUM); + return netdev_features_test_bit(NETIF_F_IP_CSUM_BIT, features); case htons(ETH_P_IPV6): - return !!(features & NETIF_F_IPV6_CSUM); + return netdev_features_test_bit(NETIF_F_IPV6_CSUM_BIT, features); default: return false; } @@ -5019,20 +5555,25 @@ void linkwatch_run_queue(void); static inline netdev_features_t netdev_intersect_features(netdev_features_t f1, netdev_features_t f2) { - if ((f1 ^ f2) & NETIF_F_HW_CSUM) { - if (f1 & NETIF_F_HW_CSUM) - f1 |= (NETIF_F_IP_CSUM|NETIF_F_IPV6_CSUM); + if (netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, f1) != + netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, f2)) { + if (netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, f1)) + f1 = netdev_features_or(f1, netdev_ip_csum_features); else - f2 |= (NETIF_F_IP_CSUM|NETIF_F_IPV6_CSUM); + f2 = netdev_features_or(f2, netdev_ip_csum_features); } - return f1 & f2; + return netdev_features_and(f1, f2); } -static inline netdev_features_t netdev_get_wanted_features( - struct net_device *dev) +static inline netdev_features_t +netdev_get_full_wanted_features(struct net_device *dev) { - return (dev->features & ~dev->hw_features) | dev->wanted_features; + netdev_features_t features = netdev_get_active_features(dev); + + features = netdev_hw_features_andnot_r(dev, features); + + return netdev_wanted_features_or(dev, features); } netdev_features_t netdev_increment_features(netdev_features_t all, netdev_features_t one, netdev_features_t mask); @@ -5090,7 +5631,8 @@ static inline bool net_gso_ok(netdev_features_t features, int gso_type) static inline bool skb_gso_ok(struct sk_buff *skb, netdev_features_t features) { return net_gso_ok(features, skb_shinfo(skb)->gso_type) && - (!skb_has_frag_list(skb) || (features & NETIF_F_FRAGLIST)); + (!skb_has_frag_list(skb) || + (netdev_features_test_bit(NETIF_F_FRAGLIST_BIT, features))); } static inline bool netif_needs_gso(struct sk_buff *skb, diff --git a/net/core/Makefile b/net/core/Makefile index 4268846f2f47..10d869ac3735 100644 --- a/net/core/Makefile +++ b/net/core/Makefile @@ -4,7 +4,8 @@ # obj-y := sock.o request_sock.o skbuff.o datagram.o stream.o scm.o \ - gen_stats.o gen_estimator.o net_namespace.o secure_seq.o flow_dissector.o + gen_stats.o gen_estimator.o net_namespace.o secure_seq.o flow_dissector.o \ + netdev_features.o obj-$(CONFIG_SYSCTL) += sysctl_net_core.o diff --git a/net/core/dev.c b/net/core/dev.c index edeb811c454e..c5badde8051c 100644 --- a/net/core/dev.c +++ b/net/core/dev.c @@ -1642,10 +1642,10 @@ void dev_disable_lro(struct net_device *dev) struct net_device *lower_dev; struct list_head *iter; - dev->wanted_features &= ~NETIF_F_LRO; + netdev_wanted_features_clear_bit(dev, NETIF_F_LRO_BIT); netdev_update_features(dev); - if (unlikely(dev->features & NETIF_F_LRO)) + if (unlikely(netdev_active_features_test_bit(dev, NETIF_F_LRO_BIT))) netdev_WARN(dev, "failed to disable LRO!\n"); netdev_for_each_lower_dev(dev, lower_dev, iter) @@ -1663,10 +1663,10 @@ EXPORT_SYMBOL(dev_disable_lro); */ static void dev_disable_gro_hw(struct net_device *dev) { - dev->wanted_features &= ~NETIF_F_GRO_HW; + netdev_wanted_features_clear_bit(dev, NETIF_F_GRO_HW_BIT); netdev_update_features(dev); - if (unlikely(dev->features & NETIF_F_GRO_HW)) + if (unlikely(netdev_active_features_test_bit(dev, NETIF_F_GRO_HW_BIT))) netdev_WARN(dev, "failed to disable GRO_HW!\n"); } @@ -3391,13 +3391,14 @@ struct sk_buff *__skb_gso_segment(struct sk_buff *skb, * support segmentation on this frame without needing additional * work. */ - if (features & NETIF_F_GSO_PARTIAL) { - netdev_features_t partial_features = NETIF_F_GSO_ROBUST; + if (netdev_features_test_bit(NETIF_F_GSO_PARTIAL_BIT, features)) { + netdev_features_t partial_features = netdev_get_active_features(dev); struct net_device *dev = skb->dev; - partial_features |= dev->features & dev->gso_partial_features; - if (!skb_gso_ok(skb, features | partial_features)) - features &= ~NETIF_F_GSO_PARTIAL; + partial_features = netdev_gso_partial_features_and(dev, partial_features); + netdev_features_set_bit(NETIF_F_GSO_PARTIAL_BIT, &partial_features); + if (!skb_gso_ok(skb, netdev_features_or(features, partial_features))) + netdev_features_clear_bit(NETIF_F_GSO_PARTIAL_BIT, &features); } BUILD_BUG_ON(SKB_GSO_CB_OFFSET + @@ -3440,7 +3441,7 @@ static int illegal_highdma(struct net_device *dev, struct sk_buff *skb) #ifdef CONFIG_HIGHMEM int i; - if (!(dev->features & NETIF_F_HIGHDMA)) { + if (!netdev_active_features_test_bit(dev, NETIF_F_HIGHDMA_BIT)) { for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; @@ -3461,7 +3462,7 @@ static netdev_features_t net_mpls_features(struct sk_buff *skb, __be16 type) { if (eth_p_mpls(type)) - features &= skb->dev->mpls_features; + features = netdev_mpls_features_and(skb->dev, features) return features; } @@ -3484,10 +3485,11 @@ static netdev_features_t harmonize_features(struct sk_buff *skb, if (skb->ip_summed != CHECKSUM_NONE && !can_checksum_protocol(features, type)) { - features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); + features = netdev_features_andnot(features, NETIF_F_CSUM_MASK); + features = netdev_features_andnot(features, NETIF_F_GSO_MASK); } if (illegal_highdma(skb->dev, skb)) - features &= ~NETIF_F_SG; + netdev_features_clear_bit(NETIF_F_SG_BIT, &features); return features; } @@ -3514,11 +3516,11 @@ static netdev_features_t gso_features_check(const struct sk_buff *skb, u16 gso_segs = skb_shinfo(skb)->gso_segs; if (gso_segs > dev->gso_max_segs) - return features & ~NETIF_F_GSO_MASK; + return netdev_features_andnot(features, NETIF_F_GSO_MASK); if (!skb_shinfo(skb)->gso_type) { skb_warn_bad_offload(skb); - return features & ~NETIF_F_GSO_MASK; + return netdev_features_andnot(features, NETIF_F_GSO_MASK); } /* Support for GSO partial features requires software @@ -3528,7 +3530,7 @@ static netdev_features_t gso_features_check(const struct sk_buff *skb, * segmented the frame. */ if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL)) - features &= ~dev->gso_partial_features; + features = netdev_gso_partial_features_andnot_r(dev, features); /* Make sure to clear the IPv4 ID mangling feature if the * IPv4 header has the potential to be fragmented. @@ -3538,7 +3540,8 @@ static netdev_features_t gso_features_check(const struct sk_buff *skb, inner_ip_hdr(skb) : ip_hdr(skb); if (!(iph->frag_off & htons(IP_DF))) - features &= ~NETIF_F_TSO_MANGLEID; + netdev_features_clear_bit(NETIF_F_TSO_MANGLEID_BIT, + features); } return features; @@ -3547,7 +3550,8 @@ static netdev_features_t gso_features_check(const struct sk_buff *skb, netdev_features_t netif_skb_features(struct sk_buff *skb) { struct net_device *dev = skb->dev; - netdev_features_t features = dev->features; + netdev_features_t features = netdev_get_active_features(dev); + netdev_features_t tmp; if (skb_is_gso(skb)) features = gso_features_check(skb, dev, features); @@ -3557,20 +3561,20 @@ netdev_features_t netif_skb_features(struct sk_buff *skb) * features for the netdev */ if (skb->encapsulation) - features &= dev->hw_enc_features; + features = netdev_hw_enc_features_and(dev, features); - if (skb_vlan_tagged(skb)) - features = netdev_intersect_features(features, - dev->vlan_features | - NETIF_F_HW_VLAN_CTAG_TX | - NETIF_F_HW_VLAN_STAG_TX); + if (skb_vlan_tagged(skb)) { + tmp = netdev_vlan_features_or(dev, netdev_tx_vlan_features); + + features = netdev_intersect_features(features, tmp); + } if (dev->netdev_ops->ndo_features_check) - features &= dev->netdev_ops->ndo_features_check(skb, dev, - features); + tmp = dev->netdev_ops->ndo_features_check(skb, dev, features); else - features &= dflt_features_check(skb, dev, features); + tmp = dflt_features_check(skb, dev, features); + features = netdev_features_and(features, tmp); return harmonize_features(skb, features); } EXPORT_SYMBOL(netif_skb_features); @@ -3634,13 +3638,13 @@ int skb_csum_hwoffload_help(struct sk_buff *skb, const netdev_features_t features) { if (unlikely(skb_csum_is_sctp(skb))) - return !!(features & NETIF_F_SCTP_CRC) ? 0 : - skb_crc32c_csum_help(skb); + return netdev_features_test_bit(NETIF_F_SCTP_CRC_BIT, features) ? + 0 : skb_crc32c_csum_help(skb); - if (features & NETIF_F_HW_CSUM) + if (netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, features)) return 0; - if (features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) { + if (netdev_features_intersects(features, netdev_ip_csum_features)) { switch (skb->csum_offset) { case offsetof(struct tcphdr, check): case offsetof(struct udphdr, check): @@ -4382,7 +4386,7 @@ set_rps_cpu(struct net_device *dev, struct sk_buff *skb, /* Should we steer this flow to a different hardware queue? */ if (!skb_rx_queue_recorded(skb) || !dev->rx_cpu_rmap || - !(dev->features & NETIF_F_NTUPLE)) + !netdev_active_features_test_bit(dev, NETIF_F_NTUPLE_BIT)) goto out; rxq_index = cpu_rmap_lookup_index(dev->rx_cpu_rmap, next_cpu); if (rxq_index == skb_get_rx_queue(skb)) @@ -9813,16 +9817,14 @@ static netdev_features_t netdev_sync_upper_features(struct net_device *lower, struct net_device *upper, netdev_features_t features) { netdev_features_t upper_disables = NETIF_F_UPPER_DISABLES; - netdev_features_t feature; int feature_bit; for_each_netdev_feature(upper_disables, feature_bit) { - feature = __NETIF_F_BIT(feature_bit); - if (!(upper->wanted_features & feature) - && (features & feature)) { - netdev_dbg(lower, "Dropping feature %pNF, upper dev %s has it off.\n", - &feature, upper->name); - features &= ~feature; + if (!netdev_wanted_features_test_bit(upper, feature_bit) && + netdev_features_test_bit(feature_bit, features)) { + netdev_dbg(lower, "Dropping feature bit %d, upper dev %s has it off.\n", + feature_bit, upper->name); + netdev_features_clear_bit(feature_bit, &features); } } @@ -9833,20 +9835,19 @@ static void netdev_sync_lower_features(struct net_device *upper, struct net_device *lower, netdev_features_t features) { netdev_features_t upper_disables = NETIF_F_UPPER_DISABLES; - netdev_features_t feature; int feature_bit; for_each_netdev_feature(upper_disables, feature_bit) { - feature = __NETIF_F_BIT(feature_bit); - if (!(features & feature) && (lower->features & feature)) { - netdev_dbg(upper, "Disabling feature %pNF on lower dev %s.\n", - &feature, lower->name); - lower->wanted_features &= ~feature; + if (!netdev_features_test_bit(feature_bit, features) && + netdev_active_features_test_bit(lower, feature_bit)) { + netdev_dbg(upper, "Disabling feature bit %d on lower dev %s.\n", + feature_bit, lower->name); + netdev_wanted_features_clear_bit(lower, feature_bit); __netdev_update_features(lower); - if (unlikely(lower->features & feature)) - netdev_WARN(upper, "failed to disable %pNF on %s!\n", - &feature, lower->name); + if (unlikely(netdev_active_features_test_bit(lower, feature_bit)) + netdev_WARN(upper, "failed to disable feature bit %d on %s!\n", + feature_bit, lower->name); else netdev_features_change(lower); } @@ -9856,98 +9857,109 @@ static void netdev_sync_lower_features(struct net_device *upper, static netdev_features_t netdev_fix_features(struct net_device *dev, netdev_features_t features) { + netdev_features_t tmp; + /* Fix illegal checksum combinations */ - if ((features & NETIF_F_HW_CSUM) && - (features & (NETIF_F_IP_CSUM|NETIF_F_IPV6_CSUM))) { + if (netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, features) && + netdev_features_intersects(features, netdev_ip_csum_features)) { netdev_warn(dev, "mixed HW and IP checksum settings.\n"); - features &= ~(NETIF_F_IP_CSUM|NETIF_F_IPV6_CSUM); + features = netdev_features_andnot(features, + netdev_ip_csum_features); } /* TSO requires that SG is present as well. */ - if ((features & NETIF_F_ALL_TSO) && !(features & NETIF_F_SG)) { + if (netdev_features_intersects(features, NETIF_F_ALL_TSO) && + !netdev_features_test_bit(NETIF_F_SG_BIT, features)) { netdev_dbg(dev, "Dropping TSO features since no SG feature.\n"); - features &= ~NETIF_F_ALL_TSO; + features = netdev_features_andnot(features, NETIF_F_ALL_TSO); } - if ((features & NETIF_F_TSO) && !(features & NETIF_F_HW_CSUM) && - !(features & NETIF_F_IP_CSUM)) { + if (netdev_features_test_bit(NETIF_F_TSO_BIT, features) && + !netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, features) && + !netdev_features_test_bit(NETIF_F_IP_CSUM_BIT, features)) { netdev_dbg(dev, "Dropping TSO features since no CSUM feature.\n"); - features &= ~NETIF_F_TSO; - features &= ~NETIF_F_TSO_ECN; + netdev_features_clear_bit(NETIF_F_TSO_BIT, &features); + netdev_features_clear_bit(NETIF_F_TSO_ECN_BIT, &features); } - if ((features & NETIF_F_TSO6) && !(features & NETIF_F_HW_CSUM) && - !(features & NETIF_F_IPV6_CSUM)) { + if (netdev_features_test_bit(NETIF_F_TSO6_BIT, features) && + !netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, features) && + !!netdev_features_test_bit(NETIF_F_IPV6_CSUM_BIT, features)) { netdev_dbg(dev, "Dropping TSO6 features since no CSUM feature.\n"); - features &= ~NETIF_F_TSO6; + netdev_features_clear_bit(NETIF_F_TSO6_BIT, &features); } /* TSO with IPv4 ID mangling requires IPv4 TSO be enabled */ - if ((features & NETIF_F_TSO_MANGLEID) && !(features & NETIF_F_TSO)) - features &= ~NETIF_F_TSO_MANGLEID; + if (netdev_features_test_bit(NETIF_F_TSO_MANGLEID_BIT, features) && + !netdev_features_test_bit(NETIF_F_TSO_BIT, features)) + netdev_features_clear_bit(NETIF_F_TSO_MANGLEID_BIT, &features); /* TSO ECN requires that TSO is present as well. */ - if ((features & NETIF_F_ALL_TSO) == NETIF_F_TSO_ECN) - features &= ~NETIF_F_TSO_ECN; + tmp = netdev_features_and(features, NETIF_F_ALL_TSO); + if (netdev_features_equal(tmp, netdev_tso_ecn_features) + features = netdev_features_andnot(features, + netdev_tso_ecn_features); /* Software GSO depends on SG. */ - if ((features & NETIF_F_GSO) && !(features & NETIF_F_SG)) { + if (netdev_features_test_bit(NETIF_F_GSO_BIT, features) && + !netdev_features_test_bit(NETIF_F_SG_BIT, features)) { netdev_dbg(dev, "Dropping NETIF_F_GSO since no SG feature.\n"); - features &= ~NETIF_F_GSO; + netdev_features_clear_bit(NETIF_F_GSO_BIT, &features); } /* GSO partial features require GSO partial be set */ - if ((features & dev->gso_partial_features) && - !(features & NETIF_F_GSO_PARTIAL)) { + if (netdev_gso_partial_features_intersects(dev, features) && + !netdev_features_test_bit(NETIF_F_GSO_PARTIAL_BIT, features)) { netdev_dbg(dev, "Dropping partially supported GSO features since no GSO partial.\n"); - features &= ~dev->gso_partial_features; + features = netdev_gso_partial_features_andnot_r(dev, features); } - if (!(features & NETIF_F_RXCSUM)) { + if (!netdev_features_test_bit(NETIF_F_RXCSUM_BIT, features)) { /* NETIF_F_GRO_HW implies doing RXCSUM since every packet * successfully merged by hardware must also have the * checksum verified by hardware. If the user does not * want to enable RXCSUM, logically, we should disable GRO_HW. */ - if (features & NETIF_F_GRO_HW) { + if (netdev_features_test_bit(NETIF_F_GRO_HW_BIT, features)) { netdev_dbg(dev, "Dropping NETIF_F_GRO_HW since no RXCSUM feature.\n"); - features &= ~NETIF_F_GRO_HW; + netdev_features_clear_bit(NETIF_F_GRO_HW_BIT, &features); } } /* LRO/HW-GRO features cannot be combined with RX-FCS */ - if (features & NETIF_F_RXFCS) { - if (features & NETIF_F_LRO) { + if (netdev_features_test_bit(NETIF_F_RXFCS_BIT, features)) { + if (netdev_features_test_bit(NETIF_F_LRO_BIT, features)) { netdev_dbg(dev, "Dropping LRO feature since RX-FCS is requested.\n"); - features &= ~NETIF_F_LRO; + netdev_features_clear_bit(NETIF_F_LRO_BIT, &features); } - if (features & NETIF_F_GRO_HW) { + if (netdev_features_test_bit(NETIF_F_GRO_HW_BIT, features)) { netdev_dbg(dev, "Dropping HW-GRO feature since RX-FCS is requested.\n"); - features &= ~NETIF_F_GRO_HW; + netdev_features_clear_bit(NETIF_F_GRO_HW_BIT, &features); } } - if ((features & NETIF_F_GRO_HW) && (features & NETIF_F_LRO)) { + if (netdev_features_test_bit(NETIF_F_GRO_HW_BIT, features) && + netdev_features_test_bit(NETIF_F_LRO_BIT, features)) { netdev_dbg(dev, "Dropping LRO feature since HW-GRO is requested.\n"); - features &= ~NETIF_F_LRO; + netdev_features_clear_bit(NETIF_F_LRO_BIT, &features); } - if (features & NETIF_F_HW_TLS_TX) { - bool ip_csum = (features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) == - (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); - bool hw_csum = features & NETIF_F_HW_CSUM; + if (netdev_features_test_bit(NETIF_F_HW_TLS_TX_BIT, features)) { + bool ip_csum = netdev_features_subset(features, netdev_ip_csum_features); + bool hw_csum = netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, features); if (!ip_csum && !hw_csum) { netdev_dbg(dev, "Dropping TLS TX HW offload feature since no CSUM feature.\n"); - features &= ~NETIF_F_HW_TLS_TX; + netdev_features_clear_bit(NETIF_F_HW_TLS_TX_BIT, &features); } } - if ((features & NETIF_F_HW_TLS_RX) && !(features & NETIF_F_RXCSUM)) { + if (netdev_features_test_bit(NETIF_F_HW_TLS_RX_BIT, features) && + !netdev_features_test_bit(NETIF_F_RXCSUM_BIT, features)) { netdev_dbg(dev, "Dropping TLS RX HW offload feature since no RXCSUM feature.\n"); - features &= ~NETIF_F_HW_TLS_RX; + netdev_features_clear_bit(NETIF_F_HW_TLS_RX_BIT, &features); } return features; @@ -9974,7 +9986,7 @@ int __netdev_update_features(struct net_device *dev) netdev_for_each_upper_dev_rcu(dev, upper, iter) features = netdev_sync_upper_features(dev, upper, features); - if (dev->features == features) + if (netdev_active_features_equal(dev, features)) goto sync_lower; netdev_dbg(dev, "Features changed: %pNF -> %pNF\n", @@ -10003,9 +10015,9 @@ int __netdev_update_features(struct net_device *dev) netdev_sync_lower_features(dev, lower, features); if (!err) { - netdev_features_t diff = features ^ dev->features; + netdev_features_t diff = netdev_active_features_xor(dev, features); - if (diff & NETIF_F_RX_UDP_TUNNEL_PORT) { + if (netdev_features_test_bit(NETIF_F_RX_UDP_TUNNEL_PORT_BIT, diff)) { /* udp_tunnel_{get,drop}_rx_info both need * NETIF_F_RX_UDP_TUNNEL_PORT enabled on the * device, or they won't do anything. @@ -10013,33 +10025,36 @@ int __netdev_update_features(struct net_device *dev) * *before* calling udp_tunnel_get_rx_info, * but *after* calling udp_tunnel_drop_rx_info. */ - if (features & NETIF_F_RX_UDP_TUNNEL_PORT) { - dev->features = features; + if (netdev_features_test_bit(NETIF_F_RX_UDP_TUNNEL_PORT_BIT, + features)) { + netdev_set_active_features(dev, features); udp_tunnel_get_rx_info(dev); } else { udp_tunnel_drop_rx_info(dev); } } - if (diff & NETIF_F_HW_VLAN_CTAG_FILTER) { - if (features & NETIF_F_HW_VLAN_CTAG_FILTER) { - dev->features = features; + if (netdev_features_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, diff)) { + if (netdev_features_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, + features)) { + netdev_set_active_features(dev, features); err |= vlan_get_rx_ctag_filter_info(dev); } else { vlan_drop_rx_ctag_filter_info(dev); } } - if (diff & NETIF_F_HW_VLAN_STAG_FILTER) { - if (features & NETIF_F_HW_VLAN_STAG_FILTER) { - dev->features = features; + if (netdev_features_test_bit(NETIF_F_HW_VLAN_STAG_FILTER_BIT, diff)) { + if (netdev_features_test_bit(NETIF_F_HW_VLAN_STAG_FILTER_BIT, + features)) { + netdev_set_active_features(dev, features); err |= vlan_get_rx_stag_filter_info(dev); } else { vlan_drop_rx_stag_filter_info(dev); } } - dev->features = features; + netdev_set_active_features(dev, features); } return err < 0 ? 0 : 1; @@ -10227,6 +10242,7 @@ int register_netdevice(struct net_device *dev) { int ret; struct net *net = dev_net(dev); + netdev_features_t features; BUILD_BUG_ON(sizeof(netdev_features_t) * BITS_PER_BYTE < NETDEV_FEATURE_COUNT); @@ -10265,8 +10281,8 @@ int register_netdevice(struct net_device *dev) } } - if (((dev->hw_features | dev->features) & - NETIF_F_HW_VLAN_CTAG_FILTER) && + if ((netdev_hw_features_test_bit(dev, NETIF_F_HW_VLAN_CTAG_FILTER_BIT) || + netdev_active_features_test_bit(dev, NETIF_F_HW_VLAN_CTAG_FILTER_BIT)) && (!dev->netdev_ops->ndo_vlan_rx_add_vid || !dev->netdev_ops->ndo_vlan_rx_kill_vid)) { netdev_WARN(dev, "Buggy VLAN acceleration in driver!\n"); @@ -10283,44 +10299,48 @@ int register_netdevice(struct net_device *dev) /* Transfer changeable features to wanted_features and enable * software offloads (GSO and GRO). */ - dev->hw_features |= (NETIF_F_SOFT_FEATURES | NETIF_F_SOFT_FEATURES_OFF); - dev->features |= NETIF_F_SOFT_FEATURES; + netdev_hw_features_direct_or(dev, NETIF_F_SOFT_FEATURES); + netdev_hw_features_direct_or(dev, NETIF_F_SOFT_FEATURES_OFF); + netdev_active_features_direct_or(dev, NETIF_F_SOFT_FEATURES); if (dev->udp_tunnel_nic_info) { - dev->features |= NETIF_F_RX_UDP_TUNNEL_PORT; - dev->hw_features |= NETIF_F_RX_UDP_TUNNEL_PORT; + netdev_active_features_set_bit(dev, NETIF_F_RX_UDP_TUNNEL_PORT_BIT); + netdev_hw_features_set_bit(dev, NETIF_F_RX_UDP_TUNNEL_PORT_BIT); } - dev->wanted_features = dev->features & dev->hw_features; + features = netdev_get_active_features(dev); + features = netdev_hw_features_and(dev, features); + netdev_set_wanted_features(features); if (!(dev->flags & IFF_LOOPBACK)) - dev->hw_features |= NETIF_F_NOCACHE_COPY; + netdev_hw_features_clear_bit(dev, NETIF_F_NOCACHE_COPY_BIT); /* If IPv4 TCP segmentation offload is supported we should also * allow the device to enable segmenting the frame with the option * of ignoring a static IP ID value. This doesn't enable the * feature itself but allows the user to enable it later. */ - if (dev->hw_features & NETIF_F_TSO) - dev->hw_features |= NETIF_F_TSO_MANGLEID; - if (dev->vlan_features & NETIF_F_TSO) - dev->vlan_features |= NETIF_F_TSO_MANGLEID; - if (dev->mpls_features & NETIF_F_TSO) - dev->mpls_features |= NETIF_F_TSO_MANGLEID; - if (dev->hw_enc_features & NETIF_F_TSO) - dev->hw_enc_features |= NETIF_F_TSO_MANGLEID; + if (netdev_hw_features_test_bit(dev, NETIF_F_TSO_BIT)) + netdev_hw_features_set_bit(dev, NETIF_F_TSO_MANGLEID_BIT); + if (netdev_vlan_features_test_bit(dev, NETIF_F_TSO_BIT)) + netdev_vlan_features_set_bit(dev, NETIF_F_TSO_MANGLEID_BIT); + if (netdev_mpls_features_test_bit(dev, NETIF_F_TSO_BIT)) + netdev_mpls_features_set_bit(dev, NETIF_F_TSO_MANGLEID_BIT); + if (netdev_hw_enc_features_test_bit(dev, NETIF_F_TSO_BIT)) + netdev_hw_enc_features_set_bit(dev, NETIF_F_TSO_MANGLEID_BIT); /* Make NETIF_F_HIGHDMA inheritable to VLAN devices. */ - dev->vlan_features |= NETIF_F_HIGHDMA; + netdev_vlan_features_set_bit(dev, NETIF_F_HIGHDMA_BIT); /* Make NETIF_F_SG inheritable to tunnel devices. */ - dev->hw_enc_features |= NETIF_F_SG | NETIF_F_GSO_PARTIAL; + netdev_hw_enc_features_set_bit(dev, NETIF_F_SG_BIT); + netdev_hw_enc_features_set_bit(dev, NETIF_F_GSO_PARTIAL_BIT); /* Make NETIF_F_SG inheritable to MPLS. */ - dev->mpls_features |= NETIF_F_SG; + netdev_mpls_features_set_bit(dev, NETIF_F_SG_BIT); ret = call_netdevice_notifiers(NETDEV_POST_INIT, dev); ret = notifier_to_errno(ret); @@ -11161,7 +11181,7 @@ int __dev_change_net_namespace(struct net_device *dev, struct net *net, /* Don't allow namespace local devices to be moved. */ err = -EINVAL; - if (dev->features & NETIF_F_NETNS_LOCAL) + if (netdev_active_features_test_bit(dev, NETIF_F_NETNS_LOCAL_BIT)) goto out; /* Ensure the device has been registrered */ @@ -11357,16 +11377,29 @@ static int dev_cpu_dead(unsigned int oldcpu) netdev_features_t netdev_increment_features(netdev_features_t all, netdev_features_t one, netdev_features_t mask) { - if (mask & NETIF_F_HW_CSUM) - mask |= NETIF_F_CSUM_MASK; - mask |= NETIF_F_VLAN_CHALLENGED; + netdev_features_t tmp; - all |= one & (NETIF_F_ONE_FOR_ALL | NETIF_F_CSUM_MASK) & mask; - all &= one | ~NETIF_F_ALL_FOR_ALL; + if (netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, mask)) + mask = netdev_features_or(mask, NETIF_F_CSUM_MASK); + netdev_features_set_bit(NETIF_F_VLAN_CHALLENGED_BIT, &mask); + + tmp = netdev_features_or(NETIF_F_ONE_FOR_ALL, NETIF_F_CSUM_MASK); + tmp = netdev_features_and(tmp, one); + tmp = netdev_features_and(tmp, mask); + all = netdev_features_or(tmp, all); + + tmp = netdev_features_fill(&tmp); + tmp = netdev_features_andnot(tmp, NETIF_F_ALL_FOR_ALL); + tmp = netdev_features_or(tmp, one); + all = netdev_features_and(tmp, all); /* If one device supports hw checksumming, set for all. */ - if (all & NETIF_F_HW_CSUM) - all &= ~(NETIF_F_CSUM_MASK & ~NETIF_F_HW_CSUM); + if (netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, all)) { + tmp = netdev_features_fill(&tmp); + netdev_features_clear_bit(NETIF_F_HW_CSUM_BIT, &tmp); + tmp = netdev_features_and(tmp, NETIF_F_CSUM_MASK); + all = netdev_features_andnot(all, tmp); + } return all; } @@ -11495,6 +11528,85 @@ define_netdev_printk_level(netdev_warn, KERN_WARNING); define_netdev_printk_level(netdev_notice, KERN_NOTICE); define_netdev_printk_level(netdev_info, KERN_INFO); +static void netdev_features_init(void) +{ + netdev_features_t features; + + netdev_features_set_array(netif_f_never_change_array, + ARRAY_SIZE(netif_f_never_change_array), + &netdev_never_change_features); + + netdev_features_set_array(netif_f_gso_mask_array, + ARRAY_SIZE(netif_f_gso_mask_array), + &netdev_gso_mask_features); + + netdev_features_set_array(netif_f_ip_csum_array, + ARRAY_SIZE(netif_f_ip_csum_array), + &netdev_ip_csum_features); + + netdev_features_set_array(netif_f_csum_mask_array, + ARRAY_SIZE(netif_f_csum_mask_array), + &netdev_csum_mask_features); + + netdev_features_set_array(netif_f_all_tso_array, + ARRAY_SIZE(netif_f_all_tso_array), + &netdev_all_tso_features); + + netdev_features_set_array(netif_f_tso_ecn_array, + ARRAY_SIZE(netif_f_tso_ecn_array), + &netdev_tso_ecn_features); + + netdev_features_set_array(netif_f_all_fcoe_array, + ARRAY_SIZE(netif_f_all_fcoe_array), + &netdev_all_fcoe_features); + + netdev_features_set_array(netif_f_gso_soft_array, + ARRAY_SIZE(netif_f_gso_soft_array), + &netdev_gso_software_features); + + netdev_features_set_array(netif_f_one_for_all_array, + ARRAY_SIZE(netif_f_one_for_all_array), + &netdev_one_for_all_features); + + netdev_features_set_array(netif_f_all_for_all_array, + ARRAY_SIZE(netif_f_all_for_all_array), + &netdev_all_for_all_features); + + netdev_features_set_array(netif_f_upper_disables_array, + ARRAY_SIZE(netif_f_upper_disables_array), + &netdev_upper_disables_features); + + netdev_features_set_array(netif_f_soft_array, + ARRAY_SIZE(netif_f_soft_array), + &netdev_soft_features); + + netdev_features_set_array(netif_f_soft_off_array, + ARRAY_SIZE(netif_f_soft_off_array), + &netdev_soft_off_features); + + netdev_features_set_array(netif_f_tx_vlan_array, + ARRAY_SIZE(netif_f_tx_vlan_array), + &netdev_tx_vlan_features); + + netdev_features_set_array(netif_f_tx_vlan_array, + ARRAY_SIZE(netif_f_tx_vlan_array), + &netdev_vlan_features); + netdev_features_set_array(netif_f_rx_vlan_array, + ARRAY_SIZE(netif_f_rx_vlan_array), + &netdev_vlan_features); + netdev_features_set_array(netif_f_vlan_filter_array, + ARRAY_SIZE(netif_f_vlan_filter_array), + &netdev_vlan_features); + + netdev_features_set_array(netif_f_gso_encap_array, + ARRAY_SIZE(netif_f_gso_encap_array), + &netdev_gso_encap_features); + + netdev_features_fill(&features); + netdev_ethtool_features = + netdev_features_andnot(features, netdev_never_change_features); +} + static void __net_exit netdev_exit(struct net *net) { kfree(net->dev_name_head); @@ -11642,6 +11754,8 @@ static int __init net_dev_init(void) if (register_pernet_subsys(&netdev_net_ops)) goto out; + netdev_features_init(); + /* * Initialise the packet receive queues. */ diff --git a/net/core/netdev_features.c b/net/core/netdev_features.c new file mode 100644 index 000000000000..e47a6773ed9c --- /dev/null +++ b/net/core/netdev_features.c @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Network device features. + */ + +#include <netdev_features.h> + +netdev_features_t netdev_ethtool_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_ethtool_features); + +netdev_features_t netdev_never_change_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_never_change_features); + +netdev_features_t netdev_gso_mask_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_gso_mask_features); + +netdev_features_t netdev_ip_csum_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_ip_csum_features); + +netdev_features_t netdev_csum_mask_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_csum_mask_features); + +netdev_features_t netdev_all_tso_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_all_tso_features); + +netdev_features_t netdev_tso_ecn_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_tso_ecn_features); + +netdev_features_t netdev_all_fcoe_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_all_fcoe_features); + +netdev_features_t netdev_gso_software_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_gso_software_features); + +netdev_features_t netdev_one_for_all_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_one_for_all_features); + +netdev_features_t netdev_all_for_all_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_all_for_all_features); + +netdev_features_t netdev_upper_disable_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_upper_disable_features); + +netdev_features_t netdev_soft_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_soft_features); + +netdev_features_t netdev_soft_off_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_soft_off_features); + +netdev_features_t netdev_vlan_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_vlan_features); + +netdev_features_t netdev_tx_vlan_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_tx_vlan_features); + +netdev_features_t netdev_gso_encap_all_features __ro_after_init; +EXPORT_SYMBOL_GPL(netdev_gso_encap_all_features); + +const u8 netif_f_never_change_array[] = { + NETIF_F_VLAN_CHALLENGED_BIT, + NETIF_F_LLTX_BIT, + NETIF_F_NETNS_LOCAL_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_never_change_array); + +const u8 netif_f_gso_mask_array[] = { + NETIF_F_TSO_BIT, + NETIF_F_GSO_ROBUST_BIT, + NETIF_F_TSO_ECN_BIT, + NETIF_F_TSO_MANGLEID_BIT, + NETIF_F_TSO6_BIT, + NETIF_F_FSO_BIT, + NETIF_F_GSO_GRE_BIT, + NETIF_F_GSO_GRE_CSUM_BIT, + NETIF_F_GSO_IPXIP4_BIT, + NETIF_F_GSO_IPXIP6_BIT, + NETIF_F_GSO_UDP_TUNNEL_BIT, + NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT, + NETIF_F_GSO_PARTIAL_BIT, + NETIF_F_GSO_TUNNEL_REMCSUM_BIT, + NETIF_F_GSO_SCTP_BIT, + NETIF_F_GSO_ESP_BIT, + NETIF_F_GSO_UDP_BIT, + NETIF_F_GSO_UDP_L4_BIT, + NETIF_F_GSO_FRAGLIST_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_gso_mask_array); + +const u8 netif_f_ip_csum_array[] = { + NETIF_F_IP_CSUM_BIT, + NETIF_F_IPV6_CSUM_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_ip_csum_array); + +const u8 netif_f_csum_mask_array[] = { + NETIF_F_IP_CSUM_BIT, + NETIF_F_IPV6_CSUM_BIT, + NETIF_F_HW_CSUM_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_csum_mask_array); + +const u8 netif_f_all_tso_array[] = { + NETIF_F_TSO_BIT, + NETIF_F_TSO6_BIT, + NETIF_F_TSO_ECN_BIT, + NETIF_F_TSO_MANGLEID_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_all_tso_array); + +const u8 netif_f_tso_ecn_array[] = { + NETIF_F_TSO_ECN_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_tso_ecn_array); + +const u8 netif_f_all_fcoe_array[] = { + NETIF_F_FCOE_CRC_BIT, + NETIF_F_FCOE_MTU_BIT, + NETIF_F_FSO_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_all_fcoe_array); + +const u8 netif_f_gso_soft_array[] = { + NETIF_F_TSO_BIT, + NETIF_F_TSO6_BIT, + NETIF_F_TSO_ECN_BIT, + NETIF_F_TSO_MANGLEID_BIT, + NETIF_F_GSO_SCTP_BIT, + NETIF_F_GSO_UDP_L4_BIT, + NETIF_F_GSO_FRAGLIST_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_gso_soft_array); + +const u8 netif_f_one_for_all_array[] = { + NETIF_F_TSO_BIT, + NETIF_F_TSO6_BIT, + NETIF_F_TSO_ECN_BIT, + NETIF_F_TSO_MANGLEID_BIT, + NETIF_F_GSO_SCTP_BIT, + NETIF_F_GSO_UDP_L4_BIT, + NETIF_F_GSO_FRAGLIST_BIT, + NETIF_F_GSO_ROBUST_BIT, + NETIF_F_SG_BIT, + NETIF_F_HIGHDMA_BIT, + NETIF_F_FRAGLIST_BIT, + NETIF_F_VLAN_CHALLENGED, +}; +EXPORT_SYMBOL_GPL(netif_f_one_for_all_array); + +const u8 netif_f_all_for_all_array[] = { + NETIF_F_NOCACHE_COPY_BIT, + NETIF_F_FSO_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_all_for_all_array); + +const u8 netif_f_upper_disables_array[] = { + NETIF_F_LRO_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_upper_disables_array); + +const u8 netif_f_soft_array[] = { + NETIF_F_GSO_BIT, + NETIF_F_GRO_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_soft_array); + +const u8 netif_f_soft_off_array[] = { + NETIF_F_GRO_FRAGLIST_BIT, + NETIF_F_GRO_UDP_FWD_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_soft_off_array); + +const u8 netif_f_vlan_array[] = { + NETIF_F_HW_VLAN_CTAG_FILTER_BIT, + NETIF_F_HW_VLAN_CTAG_RX_BIT, + NETIF_F_HW_VLAN_CTAG_TX_BIT, + NETIF_F_HW_VLAN_STAG_FILTER_BIT, + NETIF_F_HW_VLAN_STAG_RX_BIT, + NETIF_F_HW_VLAN_STAG_TX_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_vlan_array); + +const u8 netif_f_tx_vlan_array[] = { + NETIF_F_HW_VLAN_CTAG_TX_BIT, + NETIF_F_HW_VLAN_STAG_TX_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_tx_vlan_array); + +const u8 netif_f_rx_vlan_array[] = { + NETIF_F_HW_VLAN_CTAG_RX_BIT, + NETIF_F_HW_VLAN_STAG_RX_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_rx_vlan_array); + +const u8 netif_f_vlan_filter_array[] = { + NETIF_F_HW_VLAN_CTAG_FILTER_BIT, + NETIF_F_HW_VLAN_STAG_FILTER_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_vlan_filter_array); + +const u8 netif_f_gso_encap_array[] = { + NETIF_F_GSO_GRE_BIT, + NETIF_F_GSO_GRE_CSUM_BIT, + NETIF_F_GSO_IPXIP4_BIT, + NETIF_F_GSO_IPXIP6_BIT, + NETIF_F_GSO_UDP_TUNNEL_BIT, + NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT, +}; +EXPORT_SYMBOL_GPL(netif_f_gso_encap_array); + -- 2.33.0

3 3

[RFCv3 PATCH net-next] net: extend netdev_features_t
by Jian Shen 01 Nov '21

01 Nov '21

For the prototype of netdev_features_t is u64, and the number of netdevice feature bits is 64 now. So there is no space to introduce new feature bit. This patchset try to solve it by change the prototype of netdev_features_t from u64 to structure below: typedef struct { DECLARE_BITMAP(bits, NETDEV_FEATURE_COUNT); } netdev_features_t; With this change, it's necessary to introduce a set of bitmap operation helpers for netdev features. As the nic drivers are not supposed to modify netdev_features directly, it also introduces wrappers helpers to this. The whole work is not complete yet. I just use these changes on HNS3 drivers and part of net/core/dev.c, in order to show how these helpers will be used. I want to get more suggestions for this scheme, any comments would be appreciated. The former discussion please see [1]. [1]:https://www.spinics.net/lists/netdev/msg769952.html ChangeLog: V2->V3: use structure for bitmap, suggest by Edward Cree V1->V2: Extend the prototype from u64 to bitmap, suggest by Andrew Lunn Signed-off-by: Jian Shen <shenjian15(a)huawei.com> --- .../net/ethernet/hisilicon/hns3/hns3_enet.c | 89 ++-- include/linux/netdev_features.h | 471 +++++++++++++++--- net/core/dev.c | 119 +++-- 3 files changed, 528 insertions(+), 151 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index a2b993d62822..3352c38fd927 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -2306,48 +2306,55 @@ static int hns3_nic_do_ioctl(struct net_device *netdev, static int hns3_nic_set_features(struct net_device *netdev, netdev_features_t features) { - netdev_features_t changed = netdev->features ^ features; + netdev_features_t changed = netdev_active_features_xor(netdev, + features); struct hns3_nic_priv *priv = netdev_priv(netdev); struct hnae3_handle *h = priv->ae_handle; bool enable; int ret; - if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) { - enable = !!(features & NETIF_F_GRO_HW); + if (netdev_features_test_bit(NETIF_F_GRO_HW_BIT, changed) && + h->ae_algo->ops->set_gro_en) { + enable = netdev_features_test_bit(NETIF_F_GRO_HW_BIT, features); ret = h->ae_algo->ops->set_gro_en(h, enable); if (ret) return ret; } - if ((changed & NETIF_F_HW_VLAN_CTAG_RX) && + if (netdev_features_test_bit(NETIF_F_HW_VLAN_CTAG_RX_BIT, changed) && h->ae_algo->ops->enable_hw_strip_rxvtag) { - enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX); + enable = netdev_features_test_bit(NETIF_F_HW_VLAN_CTAG_RX_BIT, + features); ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable); if (ret) return ret; } - if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) { + if (netdev_features_test_bit(NETIF_F_NTUPLE_BIT, changed) && + h->ae_algo->ops->enable_fd) { enable = !!(features & NETIF_F_NTUPLE); h->ae_algo->ops->enable_fd(h, enable); } - if ((netdev->features & NETIF_F_HW_TC) > (features & NETIF_F_HW_TC) && + if (netdev_active_features_test_bit(netdev, NETIF_F_HW_TC_BIT) > + netdev_features_test_bit(NETIF_F_NTUPLE_BIT, features) && h->ae_algo->ops->cls_flower_active(h)) { netdev_err(netdev, "there are offloaded TC filters active, cannot disable HW TC offload"); return -EINVAL; } - if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) && + if (netdev_features_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, + changed) && h->ae_algo->ops->enable_vlan_filter) { - enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER); + enable = netdev_features_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, + features); ret = h->ae_algo->ops->enable_vlan_filter(h, enable); if (ret) return ret; } - netdev->features = features; + netdev_set_active_features(netdev, features); return 0; } @@ -2377,7 +2384,8 @@ static netdev_features_t hns3_features_check(struct sk_buff *skb, * len of 480 bytes. */ if (len > HNS3_MAX_HDR_LEN) - features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); + netdev_features_clear_bits(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK, + &features); return features; } @@ -3122,55 +3130,68 @@ static struct pci_driver hns3_driver = { .err_handler = &hns3_err_handler, }; +#define HNS3_DEFAULT_ACTIVE_FEATURES \ + (NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX | \ + NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_RXCSUM | NETIF_F_SG | \ + NETIF_F_GSO | NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | \ + NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM | NETIF_F_SCTP_CRC \ + NETIF_F_GSO_UDP_TUNNEL | NETIF_F_FRAGLIST) + /* set default feature to hns3 */ static void hns3_set_default_feature(struct net_device *netdev) { struct hnae3_handle *h = hns3_get_handle(netdev); struct pci_dev *pdev = h->pdev; struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev); + netdev_features_t tmp1, tmp2; netdev->priv_flags |= IFF_UNICAST_FLT; - netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM; + netdev_gso_partial_features_set_bit(netdev, NETIF_F_GSO_GRE_CSUM_BIT); - netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | - NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | - NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO | - NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE | - NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL | - NETIF_F_SCTP_CRC | NETIF_F_FRAGLIST; + netdev_active_features_set_bits(netdev, HNS3_DEFAULT_ACTIVE_FEATURES); if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) { - netdev->features |= NETIF_F_GRO_HW; + netdev_active_features_set_bit(netdev, NETIF_F_GRO_HW_BIT); if (!(h->flags & HNAE3_SUPPORT_VF)) - netdev->features |= NETIF_F_NTUPLE; + netdev_active_features_set_bit(netdev, + NETIF_F_NTUPLE_BIT); } if (test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, ae_dev->caps)) - netdev->features |= NETIF_F_GSO_UDP_L4; + netdev_active_features_set_bit(netdev, NETIF_F_GSO_UDP_L4_BIT); if (test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, ae_dev->caps)) - netdev->features |= NETIF_F_HW_CSUM; + netdev_active_features_set_bit(netdev, NETIF_F_HW_CSUM_BIT); else - netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; + netdev_active_features_set_bits(netdev, + NETIF_F_IP_CSUM | + NETIF_F_IPV6_CSUM); if (test_bit(HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B, ae_dev->caps)) - netdev->features |= NETIF_F_GSO_UDP_TUNNEL_CSUM; + netdev_active_features_set_bit(netdev, + NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT); if (test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, ae_dev->caps)) - netdev->features |= NETIF_F_HW_TC; + netdev_active_features_set_bit(netdev, NETIF_F_HW_TC_BIT); - netdev->hw_features |= netdev->features; + tmp1 = netdev_get_active_features(netdev); + tmp2 = netdev_hw_features_or(netdev, tmp1); + netdev_set_hw_features(tmp2); if (!test_bit(HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, ae_dev->caps)) - netdev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_FILTER; - - netdev->vlan_features |= netdev->features & - ~(NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX | - NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_GRO_HW | NETIF_F_NTUPLE | - NETIF_F_HW_TC); - - netdev->hw_enc_features |= netdev->vlan_features | NETIF_F_TSO_MANGLEID; + netdev_hw_features_clear_bit(netdev, + NETIF_F_HW_VLAN_CTAG_FILTER_BIT); + + netdev_features_clear_bits(NETIF_F_HW_VLAN_CTAG_FILTER | + NETIF_F_HW_VLAN_CTAG_TX | + NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_GRO_HW | + NETIF_F_NTUPLE | NETIF_F_HW_TC, &tmp1); + netdev_set_vlan_features(tmp1); + + netdev_features_set_bit(NETIF_F_TSO_MANGLEID_BIT, &tmp1); + tmp1 = netdev_hw_enc_features_or(netdev, tmp1); + netdev_set_hw_enc_features(tmp1); } static int hns3_alloc_buffer(struct hns3_enet_ring *ring, diff --git a/include/linux/netdev_features.h b/include/linux/netdev_features.h index 16f778887e14..9b3ab11e19c8 100644 --- a/include/linux/netdev_features.h +++ b/include/linux/netdev_features.h @@ -101,12 +101,12 @@ enum { typedef struct { DECLARE_BITMAP(bits, NETDEV_FEATURE_COUNT); -} netdev_features_t; +} netdev_features_t; #define NETDEV_FEATURE_DWORDS DIV_ROUND_UP(NETDEV_FEATURE_COUNT, 64) /* copy'n'paste compression ;) */ -#define __NETIF_F_BIT(bit) ((netdev_features_t)1 << (bit)) +#define __NETIF_F_BIT(bit) ((u64)1 << (bit)) #define __NETIF_F(name) __NETIF_F_BIT(NETIF_F_##name##_BIT) #define NETIF_F_FCOE_CRC __NETIF_F(FCOE_CRC) @@ -189,10 +189,7 @@ static inline int find_next_netdev_feature(u64 feature, unsigned long start) * mask_addr should be a u64 and bit an int */ #define for_each_netdev_feature(mask_addr, bit) \ - for ((bit) = find_next_netdev_feature((mask_addr), \ - NETDEV_FEATURE_COUNT); \ - (bit) >= 0; \ - (bit) = find_next_netdev_feature((mask_addr), (bit) - 1)) + for_each_set_bit(bit, (unsigned long *)mask_addr, NETDEV_FEATURE_COUNT) /* Features valid for ethtool to change */ /* = all defined minus driver/device-class-related */ @@ -265,131 +262,471 @@ static inline int find_next_netdev_feature(u64 feature, unsigned long start) NETIF_F_GSO_UDP_TUNNEL | \ NETIF_F_GSO_UDP_TUNNEL_CSUM) -static inline void netdev_feature_zero(netdev_features_t *dst) +static inline void netdev_features_zero(netdev_features_t *dst) { bitmap_zero(dst->bits, NETDEV_FEATURE_COUNT); } -static inline void netdev_feature_fill(netdev_features_t *dst) +static inline void netdev_features_fill(netdev_features_t *dst) { bitmap_fill(dst->bits, NETDEV_FEATURE_COUNT); } -static inline void netdev_feature_and(netdev_features_t *dst, - const netdev_features_t a, - const netdev_features_t b) +static inline netdev_features_t netdev_features_and(netdev_features_t a, + netdev_features_t b) { - bitmap_and(dst->bits, a.bits, b.bits, NETDEV_FEATURE_COUNT); + netdev_features_t dst; + + bitmap_and(dst.bits, a.bits, b.bits, NETDEV_FEATURE_COUNT); + return dst; } -static inline void netdev_feature_or(netdev_features_t *dst, - const netdev_features_t a, - const netdev_features_t b) +static inline netdev_features_t netdev_features_or(netdev_features_t a, + netdev_features_t b) { - bitmap_or(dst->bits, a.bits, b.bits, NETDEV_FEATURE_COUNT); + netdev_features_t dst; + + bitmap_or(dst.bits, a.bits, b.bits, NETDEV_FEATURE_COUNT); + return dst; } -static inline void netdev_feature_xor(netdev_features_t *dst, - const netdev_features_t a, - const netdev_features_t b) +static inline netdev_features_t netdev_features_xor(netdev_features_t a, + netdev_features_t b) { - bitmap_xor(dst->bits, a.bits, b.bits, NETDEV_FEATURE_COUNT); + netdev_features_t dst; + + bitmap_xor(dst.bits, a.bits, b.bits, NETDEV_FEATURE_COUNT); + return dst; } -static inline bool netdev_feature_empty(netdev_features_t src) +static inline bool netdev_features_empty(netdev_features_t src) { return bitmap_empty(src.bits, NETDEV_FEATURE_COUNT); } -static inline bool netdev_feature_equal(const netdev_features_t src1, - const netdev_features_t src2) +static inline bool netdev_features_equal(netdev_features_t src1, + netdev_features_t src2) { - return src1 == src2; + return bitmap_equal(src1.bits, src2.bits, NETDEV_FEATURE_COUNT); } -static inline int netdev_feature_andnot(netdev_features_t *dst, - const netdev_features_t src1, - const netdev_features_t src2) +static inline netdev_features_t netdev_features_andnot(netdev_features_t src1, + netdev_features_t src2) { - *dst = src1 & ~src2; - return 0; + netdev_features_t dst; + + bitmap_andnot(dst.bits, src1.bits, src2.bits, NETDEV_FEATURE_COUNT); + return dst; } -static inline void netdev_feature_set_bit(int nr, netdev_features_t *addr) +static inline void netdev_features_set_bit(int nr, netdev_features_t *src) { - *addr |= __NETIF_F_BIT(nr); + __set_bit(nr, src->bits); } -static inline void netdev_feature_clear_bit(int nr, netdev_features_t *addr) +static inline void netdev_features_clear_bit(int nr, netdev_features_t *src) { - *addr &= ~(__NETIF_F_BIT(nr)); + __clear_bit(nr, src->bits); } -static inline void netdev_feature_mod_bit(int nr, netdev_features_t *addr, - int set) +static inline void netdev_features_change_bit(int nr, netdev_features_t *src) { - if (set) - netdev_feature_set_bit(nr, addr); - else - netdev_feature_clear_bit(nr, addr); + __change_bit(nr, src->bits); } -static inline void netdev_feature_change_bit(int nr, netdev_features_t *addr) +static inline bool netdev_features_test_bit(int nr, netdev_features_t src) { - *addr ^= __NETIF_F_BIT(nr); + return test_bit(nr, src.bits); } -static inline int netdev_feature_test_bit(int nr, const netdev_features_t addr) +/* only be used for the first 64 bits features */ +static inline void netdev_features_set_bits(u64 bits, netdev_features_t *src) { - return (addr & __NETIF_F_BIT(nr)) > 0; + netdev_features_t tmp; + + bitmap_from_u64(tmp.bits, bits); + *src = netdev_features_or(*src, tmp); } -static inline void netdev_feature_set_bit_array(const int *array, - int array_size, - netdev_features_t *addr) +/* only be used for the first 64 bits features */ +static inline void netdev_features_clear_bits(u64 bits, netdev_features_t *src) { - int i; + netdev_features_t tmp; - for (i = 0; i < array_size; i++) - netdev_feature_set_bit(array[i], addr); + bitmap_from_u64(tmp.bits, bits); + *src = netdev_features_andnot(*src, tmp); } /* only be used for the first 64 bits features */ -static inline void netdev_feature_set_bits(u64 bits, netdev_features_t *addr) +static inline bool netdev_features_test_bits(u64 bits, netdev_features_t src) { - *addr |= bits; + netdev_features_t tmp; + + bitmap_from_u64(tmp.bits, bits); + tmp = netdev_features_and(tmp, src); + return netdev_features_empty(tmp); } /* only be used for the first 64 bits features */ -static inline void netdev_feature_clear_bits(u64 bits, netdev_features_t *addr) +static inline void netdev_features_and_bits(u64 bits, netdev_features_t *src) { - *addr &= ~bits; + netdev_features_t tmp; + + bitmap_from_u64(tmp.bits, bits); + *src = netdev_features_and(tmp, *src); } -/* only be used for the first 64 bits features */ -static inline bool netdev_feature_test_bits(u64 bits, - const netdev_features_t addr) +static inline bool netdev_features_intersects(netdev_features_t src1, + netdev_features_t src2) { - return (addr & bits) > 0; + return bitmap_intersects(src1.bits, src2.bits, NETDEV_FEATURE_COUNT); } -/* only be used for the first 64 bits features */ -static inline void netdev_feature_and_bits(u64 bits, - netdev_features_t *addr) +static inline bool netdev_features_subset(netdev_features_t src1, + netdev_features_t src2) +{ + return bitmap_subset(src1.bits, src2.bits, NETDEV_FEATURE_COUNT); +} + +static inline void netdev_set_active_features(struct net_device *netdev, + netdev_features_t src) +{ + netdev->features = src; +} + +static inline netdev_features_t +netdev_get_active_features(struct net_device *netdev) +{ + return netdev->features; +} + +#define netdev_active_features_zero(ndev) \ + netdev_features_zero(&ndev->features) + +#define netdev_active_features_and(ndev, features) \ + netdev_features_and(ndev->features, features) + +#define netdev_active_features_or(ndev, features) \ + netdev_features_or(ndev->features, features) + +#define netdev_active_features_xor(ndev, features) \ + netdev_features_xor(ndev->features, features) + +#define netdev_active_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->features, features) + +#define netdev_active_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->features) + +#define netdev_active_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->features) + +#define netdev_active_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->features) + +#define netdev_active_features_set_bits(ndev, bits) \ + netdev_features_set_bits(bits, &ndev->features) + +#define netdev_active_features_clear_bits(ndev, bits) \ + netdev_features_clear_bits(bits, &ndev->features) + +#define netdev_active_features_test_bits(ndev, bits) \ + netdev_features_test_bits(bits, &ndev->features) + +#define netdev_active_features_and_bits(ndev, bits) \ + netdev_features_and_bits(bits, &ndev->features) + + +static inline void netdev_set_hw_features(struct net_device *netdev, + netdev_features_t src) +{ + netdev->hw_features = src; +} + +static inline netdev_features_t +netdev_get_hw_features(struct net_device *netdev) +{ + return netdev->hw_features; +} + +#define netdev_hw_features_zero(ndev) \ + netdev_features_zero(&ndev->hw_features) + +#define netdev_hw_features_copy(features) \ + netdev_features_copy(&ndev->hw_features) + + +#define netdev_hw_features_and(ndev, features) \ + netdev_features_and(ndev->hw_features, features) + +#define netdev_hw_features_or(ndev, features) \ + netdev_features_or(ndev->hw_features, features) + +#define netdev_hw_features_xor(ndev, features) \ + netdev_features_xor(ndev->hw_features, features) + +#define netdev_hw_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->hw_features, features) + +#define netdev_hw_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->hw_features) + +#define netdev_hw_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->hw_features) + +#define netdev_hw_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->hw_features) + +#define netdev_hw_features_set_bits(ndev, bits) \ + netdev_features_set_bits(bits, &ndev->hw_features) + +#define netdev_hw_features_clear_bits(ndev, bits) \ + netdev_features_clear_bits(bits, &ndev->hw_features) + +#define netdev_hw_features_test_bits(ndev, bits) \ + netdev_features_test_bits(bits, &ndev->hw_features) + +#define netdev_hw_features_and_bits(ndev, bits) \ + netdev_features_and_bits(bits, &ndev->hw_features) + +static inline void netdev_set_wanted_features(struct net_device *netdev, + netdev_features_t src) +{ + netdev->wanted_features = src; +} + +static inline netdev_features_t +netdev_get_wanted_features(struct net_device *netdev) +{ + return netdev->wanted_features; +} + +#define netdev_wanted_features_zero(ndev) \ + netdev_features_zero(&ndev->wanted_features) + +#define netdev_wanted_features_and(ndev, features) \ + netdev_features_and(ndev->wanted_features, features) + +#define netdev_wanted_features_or(ndev, features) \ + netdev_features_or(ndev->wanted_features, features) + +#define netdev_wanted_features_xor(ndev, features) \ + netdev_features_xor(ndev->wanted_features, features) + +#define netdev_wanted_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->wanted_features, features) + +#define netdev_wanted_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->wanted_features) + +#define netdev_wanted_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->wanted_features) + +#define netdev_wanted_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->wanted_features) + +#define netdev_wanted_features_set_bits(ndev, bits) \ + netdev_features_set_bits(bits, &ndev->wanted_features) + +#define netdev_wanted_features_clear_bits(ndev, bits) \ + netdev_features_clear_bits(bits, &ndev->wanted_features) + +#define netdev_wanted_features_test_bits(ndev, bits) \ + netdev_features_test_bits(bits, &ndev->wanted_features) + +#define netdev_wanted_features_and_bits(ndev, bits) \ + netdev_features_and_bits(bits, &ndev->wanted_features) + +static inline void netdev_set_vlan_features(struct net_device *netdev, + netdev_features_t src) +{ + netdev->vlan_features = src; +} + +static inline netdev_features_t +netdev_get_vlan_features(struct net_device *netdev) +{ + return netdev->vlan_features; +} + +#define netdev_vlan_features_zero(ndev) \ + netdev_features_zero(&ndev->vlan_features) + +#define netdev_vlan_features_and(ndev, features) \ + netdev_features_and(ndev->vlan_features, features) + +#define netdev_vlan_features_or(ndev, features) \ + netdev_features_or(ndev->vlan_features, features) + +#define netdev_vlan_features_xor(ndev, features) \ + netdev_features_xor(ndev->vlan_features, features) + +#define netdev_vlan_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->vlan_features, features) + +#define netdev_vlan_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->vlan_features) + +#define netdev_vlan_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->vlan_features) + +#define netdev_vlan_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->vlan_features) + +#define netdev_vlan_features_set_bits(ndev, bits) \ + netdev_features_set_bits(bits, &ndev->vlan_features) + +#define netdev_vlan_features_clear_bits(ndev, bits) \ + netdev_features_clear_bits(bits, &ndev->vlan_features) + +#define netdev_vlan_features_test_bits(ndev, bits) \ + netdev_features_test_bits(bits, &ndev->vlan_features) + +#define netdev_vlan_features_and_bits(ndev, bits) \ + netdev_features_and_bits(bits, &ndev->vlan_features) + +static inline void netdev_set_hw_enc_features(struct net_device *netdev, + netdev_features_t src) { - *addr &= bits; + netdev->hw_enc_features = src; } -static inline int netdev_feature_intersects(const netdev_features_t src1, - const netdev_features_t src2) +static inline netdev_features_t +netdev_get_hw_enc_features(struct net_device *netdev) { - return (src1 & src2) > 0; + return netdev->hw_enc_features; } -static inline int netdev_feature_subset(const netdev_features_t src1, - const netdev_features_t src2) +#define netdev_hw_enc_features_zero(ndev) \ + netdev_features_zero(&ndev->hw_enc_features) + +#define netdev_hw_enc_features_and(ndev, features) \ + netdev_features_and(ndev->hw_enc_features, features) + +#define netdev_hw_enc_features_or(ndev, features) \ + netdev_features_or(ndev->hw_enc_features, features) + +#define netdev_hw_enc_features_xor(ndev, features) \ + netdev_features_xor(ndev->hw_enc_features, features) + +#define netdev_hw_enc_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->hw_enc_features, features) + +#define netdev_hw_enc_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->hw_enc_features) + +#define netdev_hw_enc_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->hw_enc_features) + +#define netdev_hw_enc_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->hw_enc_features) + +#define netdev_hw_enc_features_set_bits(ndev, bits) \ + netdev_features_set_bits(bits, &ndev->hw_enc_features) + +#define netdev_hw_enc_features_clear_bits(ndev, bits) \ + netdev_features_clear_bits(bits, &ndev->hw_enc_features) + +#define netdev_hw_enc_features_test_bits(ndev, bits) \ + netdev_features_test_bits(bits, &ndev->hw_enc_features) + +#define netdev_hw_enc_features_and_bits(ndev, bits) \ + netdev_features_and_bits(bits, &ndev->hw_enc_features) + +static inline void netdev_set_mpls_features(struct net_device *netdev, + netdev_features_t src) { - return (src1 & src2) == src2; + netdev->mpls_features = src; } +static inline netdev_features_t +netdev_get_mpls_features(struct net_device *netdev) +{ + return netdev->mpls_features; +} + +#define netdev_mpls_features_zero(ndev) \ + netdev_features_zero(&ndev->mpls_features) + +#define netdev_mpls_features_and(ndev, features) \ + netdev_features_and(ndev->mpls_features, features) + +#define netdev_mpls_features_or(ndev, features) \ + netdev_features_or(ndev->mpls_features, features) + +#define netdev_mpls_features_xor(ndev, features) \ + netdev_features_xor(ndev->mpls_features, features) + +#define netdev_mpls_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->mpls_features, features) + +#define netdev_mpls_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->mpls_features) + +#define netdev_mpls_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->mpls_features) + +#define netdev_mpls_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->mpls_features) + +#define netdev_mpls_features_set_bits(ndev, bits) \ + netdev_features_set_bits(bits, &ndev->mpls_features) + +#define netdev_mpls_features_clear_bits(ndev, bits) \ + netdev_features_clear_bits(bits, &ndev->mpls_features) + +#define netdev_mpls_features_test_bits(ndev, bits) \ + netdev_features_test_bits(bits, &ndev->mpls_features) + +#define netdev_mpls_features_and_bits(ndev, bits) \ + netdev_features_and_bits(bits, &ndev->mpls_features) + +static inline void netdev_set_gso_partial_features(struct net_device *netdev, + netdev_features_t src) +{ + netdev->gso_partial_features = src; +} + +static inline netdev_features_t +netdev_get_gso_partial_features(struct net_device *netdev) +{ + return netdev->gso_partial_features; +} + +#define netdev_gso_partial_features_zero(ndev) \ + netdev_features_zero(&ndev->gso_partial_features) + +#define netdev_gso_partial_features_and(ndev, features) \ + netdev_features_and(ndev->gso_partial_features, features) + +#define netdev_gso_partial_features_or(ndev, features) \ + netdev_features_or(ndev->gso_partial_features, features) + +#define netdev_gso_partial_features_xor(ndev, features) \ + netdev_features_xor(ndev->gso_partial_features, features) + +#define netdev_gso_partial_features_andnot(ndev, features) \ + netdev_features_andnot(ndev->gso_partial_features, features) + +#define netdev_gso_partial_features_set_bit(ndev, nr) \ + netdev_features_set_bit(nr, &ndev->gso_partial_features) + +#define netdev_gso_partial_features_clear_bit(ndev, nr) \ + netdev_features_clear_bit(nr, &ndev->gso_partial_features) + +#define netdev_gso_partial_features_test_bit(ndev, nr) \ + netdev_features_test_bit(nr, &ndev->gso_partial_features) + +#define netdev_gso_partial_features_set_bits(ndev, bits) \ + netdev_features_set_bits(bits, &ndev->gso_partial_features) + +#define netdev_gso_partial_features_clear_bits(ndev, bits) \ + netdev_features_clear_bits(bits, &ndev->gso_partial_features) + +#define netdev_gso_partial_features_test_bits(ndev, bits) \ + netdev_features_test_bits(bits, &ndev->gso_partial_features) + +#define netdev_gso_partial_features_and_bits(ndev, bits) \ + netdev_features_and_bits(bits, &ndev->gso_partial_features) + #endif /* _LINUX_NETDEV_FEATURES_H */ diff --git a/net/core/dev.c b/net/core/dev.c index edeb811c454e..58aa2f4789b9 100644 --- a/net/core/dev.c +++ b/net/core/dev.c @@ -1642,10 +1642,10 @@ void dev_disable_lro(struct net_device *dev) struct net_device *lower_dev; struct list_head *iter; - dev->wanted_features &= ~NETIF_F_LRO; + netdev_wanted_features_clear_bit(dev, NETIF_F_LRO_BIT); netdev_update_features(dev); - if (unlikely(dev->features & NETIF_F_LRO)) + if (unlikely(netdev_active_features_test_bits(dev, NETIF_F_LRO_BIT))) netdev_WARN(dev, "failed to disable LRO!\n"); netdev_for_each_lower_dev(dev, lower_dev, iter) @@ -1663,10 +1663,10 @@ EXPORT_SYMBOL(dev_disable_lro); */ static void dev_disable_gro_hw(struct net_device *dev) { - dev->wanted_features &= ~NETIF_F_GRO_HW; + netdev_wanted_features_clear_bit(dev, NETIF_F_GRO_HW_BIT); netdev_update_features(dev); - if (unlikely(dev->features & NETIF_F_GRO_HW)) + if (unlikely(netdev_active_features_test_bits(dev, NETIF_F_GRO_HW_BIT))) netdev_WARN(dev, "failed to disable GRO_HW!\n"); } @@ -3391,13 +3391,17 @@ struct sk_buff *__skb_gso_segment(struct sk_buff *skb, * support segmentation on this frame without needing additional * work. */ - if (features & NETIF_F_GSO_PARTIAL) { - netdev_features_t partial_features = NETIF_F_GSO_ROBUST; + if (netdev_features_test_bit(NETIF_F_GSO_PARTIAL_BIT, features)) { + netdev_features_t partial_features; struct net_device *dev = skb->dev; - partial_features |= dev->features & dev->gso_partial_features; - if (!skb_gso_ok(skb, features | partial_features)) - features &= ~NETIF_F_GSO_PARTIAL; + partial_features = netdev_features_and(dev->features, + dev->gso_partial_features); + netdev_features_set_bit(NETIF_F_GSO_ROBUST_BIT, &partial_features); + if (!skb_gso_ok(skb, + netdev_features_or(features, partial_features))) + netdev_features_clear_bit(NETIF_F_GSO_PARTIAL_BIT, + &features); } BUILD_BUG_ON(SKB_GSO_CB_OFFSET + @@ -3440,7 +3444,7 @@ static int illegal_highdma(struct net_device *dev, struct sk_buff *skb) #ifdef CONFIG_HIGHMEM int i; - if (!(dev->features & NETIF_F_HIGHDMA)) { + if (!netdev_active_features_test_bit(dev, NETIF_F_HIGHDMA_BIT)) { for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; @@ -3460,8 +3464,11 @@ static netdev_features_t net_mpls_features(struct sk_buff *skb, netdev_features_t features, __be16 type) { - if (eth_p_mpls(type)) - features &= skb->dev->mpls_features; + if (eth_p_mpls(type)) { + netdev_features_t mpls = netdev_get_mpls_features(skb->dev); + + features = netdev_features_and(features, mpls); + } return features; } @@ -3484,10 +3491,11 @@ static netdev_features_t harmonize_features(struct sk_buff *skb, if (skb->ip_summed != CHECKSUM_NONE && !can_checksum_protocol(features, type)) { - features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); + netdev_features_clear_bits(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK, + &features); } if (illegal_highdma(skb->dev, skb)) - features &= ~NETIF_F_SG; + netdev_features_clear_bit(NETIF_F_SG_BIT, &features); return features; } @@ -3513,12 +3521,15 @@ static netdev_features_t gso_features_check(const struct sk_buff *skb, { u16 gso_segs = skb_shinfo(skb)->gso_segs; - if (gso_segs > dev->gso_max_segs) - return features & ~NETIF_F_GSO_MASK; + if (gso_segs > dev->gso_max_segs) { + netdev_features_clear_bits(NETIF_F_GSO_MASK, &features); + return features; + } if (!skb_shinfo(skb)->gso_type) { skb_warn_bad_offload(skb); - return features & ~NETIF_F_GSO_MASK; + netdev_features_clear_bits(NETIF_F_GSO_MASK, &features); + return features; } /* Support for GSO partial features requires software @@ -3527,8 +3538,11 @@ static netdev_features_t gso_features_check(const struct sk_buff *skb, * and we can pull them back in after we have partially * segmented the frame. */ - if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL)) - features &= ~dev->gso_partial_features; + if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL)) { + netdev_features_t gso = netdev_get_gso_partial_features(dev); + + features = netdev_features_andnot(features, gso); + } /* Make sure to clear the IPv4 ID mangling feature if the * IPv4 header has the potential to be fragmented. @@ -3538,7 +3552,8 @@ static netdev_features_t gso_features_check(const struct sk_buff *skb, inner_ip_hdr(skb) : ip_hdr(skb); if (!(iph->frag_off & htons(IP_DF))) - features &= ~NETIF_F_TSO_MANGLEID; + netdev_features_clear_bit(NETIF_F_TSO_MANGLEID_BIT, + &features); } return features; @@ -3547,7 +3562,8 @@ static netdev_features_t gso_features_check(const struct sk_buff *skb, netdev_features_t netif_skb_features(struct sk_buff *skb) { struct net_device *dev = skb->dev; - netdev_features_t features = dev->features; + netdev_features_t features = netdev_get_active_features(dev); + netdev_features_t tmp; if (skb_is_gso(skb)) features = gso_features_check(skb, dev, features); @@ -3557,19 +3573,20 @@ netdev_features_t netif_skb_features(struct sk_buff *skb) * features for the netdev */ if (skb->encapsulation) - features &= dev->hw_enc_features; + features = netdev_hw_enc_features_and(dev, features) if (skb_vlan_tagged(skb)) - features = netdev_intersect_features(features, - dev->vlan_features | - NETIF_F_HW_VLAN_CTAG_TX | - NETIF_F_HW_VLAN_STAG_TX); + tmp = netdev_get_vlan_features(dev); + + netdev_features_set_bits(NETIF_F_HW_VLAN_CTAG_TX | + NETIF_F_HW_VLAN_STAG_TX, &tmp); + features = netdev_intersect_features(features, tmp); if (dev->netdev_ops->ndo_features_check) - features &= dev->netdev_ops->ndo_features_check(skb, dev, - features); + tmp = dev->netdev_ops->ndo_features_check(skb, dev, features); else - features &= dflt_features_check(skb, dev, features); + tmp = dflt_features_check(skb, dev, features); + features = netdev_features_and(features, tmp); return harmonize_features(skb, features); } @@ -3634,13 +3651,14 @@ int skb_csum_hwoffload_help(struct sk_buff *skb, const netdev_features_t features) { if (unlikely(skb_csum_is_sctp(skb))) - return !!(features & NETIF_F_SCTP_CRC) ? 0 : - skb_crc32c_csum_help(skb); + return netdev_features_test_bit(NETIF_F_SCTP_CRC_BIT, features) ? + 0 : skb_crc32c_csum_help(skb); - if (features & NETIF_F_HW_CSUM) + if (netdev_features_test_bit(NETIF_F_HW_CSUM_BIT, features)) return 0; - if (features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) { + if (netdev_features_test_bits(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM, + features)) { switch (skb->csum_offset) { case offsetof(struct tcphdr, check): case offsetof(struct udphdr, check): @@ -9812,17 +9830,17 @@ static void net_set_todo(struct net_device *dev) static netdev_features_t netdev_sync_upper_features(struct net_device *lower, struct net_device *upper, netdev_features_t features) { - netdev_features_t upper_disables = NETIF_F_UPPER_DISABLES; - netdev_features_t feature; + netdev_features_t upper_disables; int feature_bit; + netdev_features_zero(upper_disables); + netdev_features_set_bits(NETIF_F_UPPER_DISABLES, upper_disables); for_each_netdev_feature(upper_disables, feature_bit) { - feature = __NETIF_F_BIT(feature_bit); - if (!(upper->wanted_features & feature) - && (features & feature)) { - netdev_dbg(lower, "Dropping feature %pNF, upper dev %s has it off.\n", - &feature, upper->name); - features &= ~feature; + if (!netdev_wanted_features_test_bit(upper, feature_bit) && + netdev_features_test_bit(feature_bit, features)) { + netdev_dbg(lower, "Dropping feature bit %d, upper dev %s has it off.\n", + feature_bit, upper->name); + netdev_features_clear_bit(feature_bit, &features) } } @@ -9833,20 +9851,21 @@ static void netdev_sync_lower_features(struct net_device *upper, struct net_device *lower, netdev_features_t features) { netdev_features_t upper_disables = NETIF_F_UPPER_DISABLES; - netdev_features_t feature; int feature_bit; + netdev_features_zero(upper_disables); + netdev_features_set_bits(NETIF_F_UPPER_DISABLES, upper_disables); for_each_netdev_feature(upper_disables, feature_bit) { - feature = __NETIF_F_BIT(feature_bit); - if (!(features & feature) && (lower->features & feature)) { - netdev_dbg(upper, "Disabling feature %pNF on lower dev %s.\n", - &feature, lower->name); - lower->wanted_features &= ~feature; + if (!netdev_features_test_bit(feature_bit, features) && + netdev_active_features_test_bit(lower, feature_bit)) { + netdev_dbg(upper, "Disabling feature %d on lower dev %s.\n", + feature_bit, lower->name); + netdev_wanted_features_clear_bit(lower, feature_bit); __netdev_update_features(lower); - if (unlikely(lower->features & feature)) - netdev_WARN(upper, "failed to disable %pNF on %s!\n", - &feature, lower->name); + if (unlikely(netdev_active_features_test_bit(lower, feature_bit)) + netdev_WARN(upper, "failed to disable %d on %s!\n", + feature_bit, lower->name); else netdev_features_change(lower); } -- 2.33.0

3 4

[linuxarm][PATCH v5 0/1] Add new mmap implementation
by Chengchang Tang 27 Oct '21

27 Oct '21

This patch add new mmap implementation for hns RDMA. Changes in v5: ============== - Remove uAPI relative stuff - Remove userspace implementation Chengchang Tang (1): RDMA/hns: Add a new mmap implementation drivers/infiniband/hw/hns/hns_roce_device.h | 24 +++++ drivers/infiniband/hw/hns/hns_roce_main.c | 139 ++++++++++++++++++++++------ include/rdma/ib_verbs.h | 8 ++ 3 files changed, 145 insertions(+), 26 deletions(-) -- 2.9.5

2 2

Re:
by Vany 20 Oct '21

20 Oct '21

Dear Sir/Madam, I am contacting you to know if you are open for Investors into your company or business as we have potential investors who are willing and able to provide financial support to companies, corporate Organizations and private Business Owners for business expansion. We also pay 1% commission to individuals who direct clients to us for financing. Kindly respond accordingly if you have interest for possible corporation. Regards, Vany Ego Email: md.riahimi(a)gmail.com

1 0

[PATCH] Revert "iommu/arm-smmu-v3: Decrease the queue size of evtq and priq"
by Zhou Wang 15 Oct '21

15 Oct '21

The commit f115f3c0d5d8 decreases evtq and priq, which may lead evtq/priq to be full with fault events, e.g HiSilicon ZIP/SEC/HPRE have maximum 1024 queues in one device, every queue could be binded with one process and trigger a fault event. So let's revert f115f3c0d5d8. In fact, if an implementation of SMMU really does not need so long evtq and priq, value of IDR1_EVTQS and IDR1_PRIQS can be set to proper ones. Signed-off-by: Zhou Wang <wangzhou1(a)hisilicon.com> --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 4cb136f..cd48590 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -184,7 +184,6 @@ #else #define Q_MAX_SZ_SHIFT (PAGE_SHIFT + MAX_ORDER - 1) #endif -#define Q_MIN_SZ_SHIFT (PAGE_SHIFT) /* * Stream table. @@ -374,7 +373,7 @@ /* Event queue */ #define EVTQ_ENT_SZ_SHIFT 5 #define EVTQ_ENT_DWORDS ((1 << EVTQ_ENT_SZ_SHIFT) >> 3) -#define EVTQ_MAX_SZ_SHIFT (Q_MIN_SZ_SHIFT - EVTQ_ENT_SZ_SHIFT) +#define EVTQ_MAX_SZ_SHIFT (Q_MAX_SZ_SHIFT - EVTQ_ENT_SZ_SHIFT) #define EVTQ_0_ID GENMASK_ULL(7, 0) @@ -400,7 +399,7 @@ /* PRI queue */ #define PRIQ_ENT_SZ_SHIFT 4 #define PRIQ_ENT_DWORDS ((1 << PRIQ_ENT_SZ_SHIFT) >> 3) -#define PRIQ_MAX_SZ_SHIFT (Q_MIN_SZ_SHIFT - PRIQ_ENT_SZ_SHIFT) +#define PRIQ_MAX_SZ_SHIFT (Q_MAX_SZ_SHIFT - PRIQ_ENT_SZ_SHIFT) #define PRIQ_0_SID GENMASK_ULL(31, 0) #define PRIQ_0_SSID GENMASK_ULL(51, 32) -- 2.8.1

1 0

[PATCH net-next -v5 0/4] some optimization for page pool
by Yunsheng Lin 12 Oct '21

12 Oct '21

Patch 1: disable dma mapping support for 32-bit arch with 64-bit DMA. Patch 2 - 4: pp page frag tracking support The small packet drop test show no notiable performance degradation when page pool is disabled. V5: Keep the put_page()/get_page() semantics. V4: 1. Change error code to EOPNOTSUPP in patch 1. 2. Drop patch 2. 3. Use pp_frag_count to indicate if a pp page can be tracked, to avoid breaking the mlx5 driver. V3: 1. add patch 1/4/6/7. 2. use pp_magic to identify pp page uniquely too. 3. avoid unnecessary compound_head() calling. V2: add patch 2, adjust the commit log accroding to the discussion in V1, and fix a compiler error reported by kernel test robot. Yunsheng Lin (4): page_pool: disable dma mapping support for 32-bit arch with 64-bit DMA page_pool: change BIAS_MAX to support incrementing mm: introduce __get_page() and __put_page() skbuff: keep track of pp page when pp_frag_count is used include/linux/mm.h | 21 ++++++++++++++------- include/linux/mm_types.h | 13 +------------ include/linux/skbuff.h | 30 ++++++++++++++++++++---------- include/net/page_pool.h | 36 ++++++++++++++++++++++++------------ mm/swap.c | 6 +++--- net/core/page_pool.c | 29 +++++++++-------------------- net/core/skbuff.c | 10 ++++++++-- 7 files changed, 79 insertions(+), 66 deletions(-) -- 2.33.0

6 13

[linuxarm] [PATCH v4 0/1] RDMA/hns: Add new mmap implementation
by Chengchang Tang 09 Oct '21

09 Oct '21

This patch add a new mmap implementaion for hns, subsequent new mmap types will be implemented using this method. Changes in v4: ============== - Replace rdma_user_mmap_entry with hns_user_mmap_entry. - Use rdma_user_mmap_entry_insert_range() to achieve compatibility with legacy mode and always keep the mmap routine in new mode. Chengchang Tang (1): RDMA/hns: Add a new mmap implementation drivers/infiniband/hw/hns/hns_roce_device.h | 23 ++++ drivers/infiniband/hw/hns/hns_roce_main.c | 196 ++++++++++++++++++++++++---- include/uapi/rdma/hns-abi.h | 21 ++- 3 files changed, 213 insertions(+), 27 deletions(-) -- 2.9.5

1 1

[PATCH] rasdaemon: Fix the issue of sprintf data type mismatch in uuid_le()
by Xiaofei Tan 08 Oct '21

08 Oct '21

The data type of sprintf called in the function uuid_le() is not mismatch. Arm64 compiler force it to unsigned char by default, and can work normally. But if someone compile it with the option -fsigned-char, the function can't work correctly. Signed-off-by: Xiaofei Tan <tanxiaofei(a)huawei.com> --- ras-extlog-handler.c | 2 +- ras-non-standard-handler.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/ras-extlog-handler.c b/ras-extlog-handler.c index 5fd3580..1834687 100644 --- a/ras-extlog-handler.c +++ b/ras-extlog-handler.c @@ -152,7 +152,7 @@ static char *uuid_le(const char *uu) static const unsigned char le[16] = {3,2,1,0,5,4,7,6,8,9,10,11,12,13,14,15}; for (i = 0; i < 16; i++) { - p += sprintf(p, "%.2x", uu[le[i]]); + p += sprintf(p, "%.2x", (unsigned char) uu[le[i]]); switch (i) { case 3: case 5: diff --git a/ras-non-standard-handler.c b/ras-non-standard-handler.c index 6ccf5bc..879f394 100644 --- a/ras-non-standard-handler.c +++ b/ras-non-standard-handler.c @@ -36,7 +36,7 @@ static char *uuid_le(const char *uu) static const unsigned char le[16] = {3,2,1,0,5,4,7,6,8,9,10,11,12,13,14,15}; for (i = 0; i < 16; i++) { - p += sprintf(p, "%.2x", uu[le[i]]); + p += sprintf(p, "%.2x", (unsigned char) uu[le[i]]); switch (i) { case 3: case 5: -- 2.33.0

1 0

[PATCH net-next v4 0/3] some optimization for page pool
by Yunsheng Lin 05 Oct '21

05 Oct '21

Patch 1: disable dma mapping support for 32-bit arch with 64-bit DMA. Patch 2 & 3: pp page frag tracking support The small packet drop test show no notiable performance degradation when page pool is disabled. V4: 1. Change error code to EOPNOTSUPP in patch 1. 2. Drop patch 2. 3. Use pp_frag_count to indicate if a pp page can be tracked, to avoid breaking the mlx5 driver. V3: 1. add patch 1/4/6/7. 2. use pp_magic to identify pp page uniquely too. 3. avoid unnecessary compound_head() calling. V2: add patch 2, adjust the commit log accroding to the discussion in V1, and fix a compiler error reported by kernel test robot. Yunsheng Lin (3): page_pool: disable dma mapping support for 32-bit arch with 64-bit DMA page_pool: change BIAS_MAX to support incrementing skbuff: keep track of pp page when pp_frag_count is used include/linux/mm_types.h | 13 +------------ include/linux/skbuff.h | 30 ++++++++++++++++++++---------- include/net/page_pool.h | 36 ++++++++++++++++++++++++------------ net/core/page_pool.c | 29 +++++++++-------------------- net/core/skbuff.c | 10 ++++++++-- 5 files changed, 62 insertions(+), 56 deletions(-) -- 2.33.0

3 6

Greetings dear
by MRS HANNAH VANDRAD 04 Oct '21

04 Oct '21

Greetings dear This letter might be a surprise to you, But I believe that you will be honest to fulfill my final wish. I bring peace and love to you. It is by the grace of god, I had no choice than to do what is lawful and right in the sight of God for eternal life and in the sight of man for witness of god’s mercy and glory upon my life. My dear, I sent this mail praying it will find you in a good condition, since I myself am in a very critical health condition in which I sleep every night without knowing if I may be alive to see the next day. I am Mrs.Hannah Vandrad, a widow suffering from a long time illness. I have some funds I inherited from my late husband, the sum of ( Eleven Million Dollars) my Doctor told me recently that I have serious sickness which is a cancer problem. What disturbs me most is my stroke sickness. Having known my condition, I decided to donate this fund to a good person that will utilize it the way I am going to instruct herein. I need a very honest and God fearing person who can claim this money and use it for Charity works, for orphanages and gives justice and help to the poor, needy and widows says The Lord." Jeremiah 22:15-16.“ and also build schools for less privilege that will be named after my late husband if possible and to promote the word of god and the effort that the house of god is maintained. I do not want a situation where this money will be used in an ungodly manner. That's why I'm taking this decision. I'm not afraid of death, so I know where I'm going. I accept this decision because I do not have any child who will inherit this money after I die. Please I want your sincere and urgent answer to know if you will be able to execute this project, and I will give you more information on how the fund will be transferred to your bank account. May the grace, peace, love and the truth in the Word of god be with you and all those that you love and care for. I am waiting for your reply. May God Bless you, Mrs. Hannah Vandrad.

1 0

Hi
by Grace Johnson 30 Sep '21

30 Sep '21

How are you doing? I want to share a message that has been spreading all over the internet that concerns the times we are living in. Whether you believe in God or not, this is a must read message! We can see throughout time how we have been slowly conditioned to come to this point where we are on the verge of a cashless society. Would it surprise you to know that the Bible foretold of this event? Don't believe me? This may be the most imporant message you will read in these times...please do not ignore this! This messsage reveals what the Mark of the Beast is, and the meaning behind counting a number people have been pondering for centuries, 666. This message also shares why Barack Obama is the Antichrist as well as the gospel message. This is truly a message from God! In the Revelation of Jesus Christ given to the apostle John, we read: ...."And he (the false prophet who deceives many by his miracles) causeth all, both small and great, rich and poor, free and bond, to receive a mark in their right hand, or in their foreheads: And that no man might buy or sell, save he that had the mark, or the name of the beast, or the number of his name. Here is wisdom. Let him that hath understanding count the number of the beast: for it is the number of a man; and his number is Six hundred threescore and six" (Revelation 13:16-18 BRG)..... Referring to the last generation, this could only be speaking of a cashless society. Why? Revelation 13:17 tells us that we cannot buy or sell unless we receive the mark of the beast. If physical money was still in use, we could buy or sell with one another without receiving the mark. This would contradict scripture. So, it deduces itself to this conclusion. These verses could not be referring to something spiritual as scripture references two physical locations (our right-hand or forehead) stating the mark will be on one "OR" the other. It once again deduces itself to this conclusion. Also, how could you determine who truly has a spiritual mark so that they may buy or sell? And, as you will read further in this message, to have the mark of the beast is the same to have the name of the beast, and the number of its name. You will begin to see even more clearly why this mark cannot be something purely spiritual. Here is where it really starts to come together. It is shocking how accurate the Bible is concerning the RFID microchip. These are notes from a man named Carl Sanders who worked with a team of engineers to help develop this microchip in the late 1960's. Carl Sanders attended 17 New World Order meetings with heads-of-state officials such as Henry Kissinger and Bob Gates of the CIA to talk about plans on how to bring forth this one-world system. The US government commissioned Carl Sanders to design a microchip for identifying and controlling the peoples of the nations-a microchip that could be inserted under the skin with a hypodermic needle (a quick, convenient procedure that would be gradually accepted by the people). Carl Sanders, along with a team of engineers with him, with U.S. grant monies supplied by tax dollars, took on this mission and designed a microchip which is powered by a lithium battery, rechargeable with the aid of the temperature changes in our skin. With out the knowledge of the holy Bible (Mr. Sanders was not a Christian at the time), these engineers spent one and a half million dollars gathering information on the best and most convenient spot to have the microchip placed under the skin. These researchers found that the forehead and the back of the hand (the two spots Revelation says the mark will be received) aren't just the most convenient places, however are also the only viable spots for constant, consistent temperature changes in the skin to recharge the lithium battery. The microchip is about 7 millimeters in length, .75 millimeters in diameter, about the size of a grain of rice. It is capable of containing many pages of data about you. All your basic information, work information, crime history, health history, and financial history could be stored on this chip. Carl Sanders believes that this microchip, which he remorsefully helped engineer, is the "beast's mark" spoke of in Revelation 13:16-18. The original Greek word for "mark" is "charagma," which means a "scratch or etching." Additionally it is fascinating to note that the number 666 is actually a word in the original Greek language. That word is "chi xi stigma," with the final word, "stigma," also meaning "to stick or prick. Mr. Sanders believes that is referring to the usage of a hypodermic needle being poked into the human flesh to insert the microchip." Mr. Sanders asked a Boston Medical Center doctor what would happen if the lithium contained within the RFID microchip leaked into the body. The doctor responded that if the microchip broke inside a human body, the lithium would cause a severe and painful wound filled with pus. This is what the book of Revelation says: "And the first (angel) went, and poured out his bowl into the earth; and it became a noisome and grievous sore upon the men that had the mark of the beast, and that worshipped his image" (Revelation 16:2 ASV). THE HIDDEN MEANING BEHIND THE NUMBER 666 REVEALED! What I first want to mention, before I share what the Holy Spirit has revealed to me concerning the number of the beast, is that God confirms in threes. We can see this throughout scripture: "For there are three that bear witness in heaven: the Father, the Word, and the Holy Spirit; and these three are one" (1 John 5:7 NKJV). "and that He was buried, and that He rose again the third day according to the Scriptures" (1 Corinthians 15:4 NKJV). "...Holy, holy, holy, Lord God Almighty, Who was and is and is to come!" (Revelation 4:8 NKJV). There are many more examples, but I thought I would just share three of them to make the point. Examining Revelation 13:16,17,18, the first group of three I would like to point out is that the mark of the beast is described in three separate verses, 16, 17 and 18. The next three I see is in verse 16, "He causes all..." is followed by three contrasting categories of people, 1 - "both small and great, 2 - rich and poor, 3 - free and slave...". Then unto verse 17, it opens with, "and that no one may buy or sell except one who has...", followed by three explanations of what one must have to buy or sell, 1 - "...the mark 2 - or the name of the beast, 3 - or the number of his name". Now unto verse 18, we read "Let him who has understanding calculate...", which is followed by, 1 - "the number of the beast, 2 - for it is the number of a man: 3 - His number is 666". The last three I see is the number "6" being used three times in a row. The reason I'm making this point about God confirming in three is because it is the key to unlocking how to calculate the number 666. Throughout the centuries there have been people trying to calculate numbers based on titles and names that come up to the number 666 to identify one person, the Antichrist; but from Revelation 13:18, I do not see where God is telling us to count up to 666, but rather to count the number of the beast. This number is identified as 666. So the verse is telling us to count the number 666. What does it mean to count? It means to add up. So how could we add up 666? Remember my previous point about God confirming in threes is key to unlocking the number 666. So logically, what would be the best way to count the number 666? To count it equally by using the rule of three based off the number. We cannot count it equally as 600+60+6, this would also bring us back to the start. We cannot count it as 600+600+600, or 60+60+60 because there are no zeroes in between or at the end of 666. The only logical option is 6+6+6=18. What is interesting is that the verse that reveals for us to count the number itself is verse 18 (there a total of 18 verses in Revelation Chapter 13), being the third verse out of the three verses that describe the mark of the beast in Revelation 13:16,17,18. What is 18 divided by 3? 6. So 3x6=18, or 6+6+6=18. Another interesting point is the only two other combinations (making a total of three possible combinations) for placing a "+" symbol in between 666 are: • 66+6=72 and 6+66=72. • Add both 72's together and you get 144. Why the number 144 is worth our attention is because the verse following Revelation 13:18 is the first time in the Bible where the 144,000 are being described in detail: "Then I looked, and behold, a Lamb standing on Mount Zion, and with Him one hundred and forty-four thousand, having His Father’s name written on their foreheads..." (Revelation 14:1). Now if you add up all three numbers from counting 666 by moving the "+" symbol around, it would be 72+72+18=162. What is compelling about the number 162, is, if you divide 144,000 by 162, you get 888. The name of Jesus in Greek gematria adds up to 888. The New Testament was originally written in the Greek language. Revelation 14:1 not only mentions the 144,000, but also the Lamb who is Jesus. Now what is interesting about the number for Jesus, 888, is that if you apply the same formula that was used to count 666, you get 8+8+8=24. Why the number 24? Revelation chapter 4 tells us there are 24 elders seated around the throne of God. This is the same throne where Jesus sits. Now if you take: • 8+8+8=24 • 8+88=96 • 88+8=96 you get 24+96+96=216. Take 144,000 divided by 216 and you get 666. Remember that this was the same exact formula we used to count the number 666 that ultimately brought forth the number 888. Here is a quick recap to demonstrate how this formula confirms itself as being the true way to count 666: 1: 6+6+6=18 » 66+6=72 » 6+66=72 » 18+72+72=162 2: 144,000 divided by 162=888 3: 8+8+8=24 » 88+8=96 » 8+88=96 » 24+96+96=216 4: 144,000 divided by 216=666 1: 6+6+6=18 » 66+6=72... As you can see, it is perpetual. And remember that we consistently used a formula that worked in threes being the number that God uses for confirmation. By utilizing the same formulation of counting by including the plus symbol in between the numbers, why do all these numbers relate in such a manner? The book of Revelation contains the use of the number 7 in various forms. For instance 7 seals, 7 trumpets, and 7 bowls. What is interesting about the number 37 (three sevens) is if if you divide any number that contains the same single digit three times in a row, such as 111 to 999, it comes out to the value of if you were to add all three numbers up. For example 888 divided by 37 equals 24. So 8+8+8=24. Or 666 divided by 37 equals 18. So 6+6+6=18. Could this be another way of God's word confirming itself that the mystery behind calculating the number 666 indeed is 18? Another fascinating factor to note is that if you add up all the numbers from 1 to 36 (1+2+3...+36), it totals 666. The number 36, as in three sixes? May this be a hint that we need to add up three sixes as opposed to perceiving the number as six-hundred sixty six? So what may this suggest? We know in this world we are identified by numbers in numerous forms. Starting from our birth certificate to our social security card, also with our drivers license, being identified based on a system of ruler ship. So it's possible that this RFID microchip will contain a brand new identification that has a total of 18 characters. "here the wisdom is, the one having the mind let him calculate the number of the wild beast, number for "of human" it is, and the number of it 666" (Revelation 13:1, Greek Translation). The Greek word "anthrōpos" being used in verse 18 where it says "of human" is the Greek strongs concordance G444. The first two definitions of the word are "a human being, whether male or female", and, "generically, to include all human individuals". Could the number of the beast apply to all mankind? In the Greek (the New Testament was originally written in the Greek language), and other translations, you will notice the beast is described as an "it", instead of "him". The reason I'm making this point is because when a translation says "His number is 666", this would imply a singular person, the Antichrist. But by saying "the number of it 666", implies that it is of the beast system as a whole. We can know the number of the beast cannot be to identify products (like a new barcode) to buy or sell because scripture says we cannot buy or sell without the number of the beast. What am I getting at? There will be instances where you could buy something someone made themselves and it wouldn't have a store branded identification on it. But for this number to be in our chips, that is where it must be to conclude ultimately that we cannot buy or sell without having the number of the beast. As previously mentioned in Revelation 13:18, the number of the beast (6+6+6=18) is a "human number", definition "generically, to include all human individuals". May this be the identification of the beast, the number of its name? The one-world beast system which is identified by 18 characters? This might fit the scriptures that speaks of a mark that we ought to have to buy or sell in our right-hand or forehead, and that it also incorporates the number of the beast, during a future cashless money society. Here is another mathematical confirmation: 144,000 divided by 6, divided by 6, divided by 6 (6,6,6) equals 666. To see many more of these amazing calculations, read the article about the RFID Mark of the Beast and the number 666... Do we believe blind forces gave us eyes to see? That deaf forces gave us ears to hear? That careless forces gave us a heart to care for others? That faithless forces uphold the universe and all the laws that govern it and that is why we should trust them? That mindless forces gave us a mind to think and comprehend these things? If there is a God, He must be personal, because we as His creation are personal beings. How do we get to personally know anybody? By their word...The words of Jesus have been translated into over 2,000 languages, and nothing comes remotely close (the Quran about 110). If that is not God's word, nothing is. Why? Why would a personal loving God who desires for us to know Him, who is all powerful, allow man to create a word far surperior than His to be spread around the world throughout time in so many different languages to deceive the world so we may not know the truth about Him? God has shown me some time ago that Trump will have a second term (he will be back soon!), and that this will be the time where the two witnesses of Revelation 11 will rise up (who are the 144,000) to prophesy for 42 months to every tribe, tongue, nation and people before the beast rises from the sea in Revelation 13. We will see His Holy Spirit move across the world in a mighty way bringing a great multitude to God. God gave me a vision that Obama will be back in 2024. To see much more, go to: http://go.bible-woke.org [http://k12-us-teachers.live/index.php/campaigns/[CAMPAIGN_UID/track-url/xy1… [http://k12-us-teachers.live/index.php/campaigns/fy214lwwf4d70/track-url/xy1… [http://k12-us-teachers.live/index.php/campaigns/fy214lwwf4d70/track-url/xy1… [http://k12-us-teachers.live/index.php/campaigns/fy214lwwf4d70/track-url/xy1… [http://k12-us-teachers.live/index.php/campaigns/fy214lwwf4d70/track-url/xy1… [http://k12-us-teachers.live/index.php/campaigns/fy214lwwf4d70/track-url/xy1… [http://k12-us-teachers.live/index.php/campaigns/fy214lwwf4d70/track-url/xy1… [http://k12-us-teachers.live/index.php/campaigns/fy214lwwf4d70/track-url/xy1… [http://k12-us-teachers.live/index.php/campaigns/fy214lwwf4d70/track-url/xy1…]] to see all the proof! If you feel led to, please forward this email to your friends and family so they may know that God is moving in these times in mighty ways, even through His prophets to proclaim the truth of His word to the ends of the earth. God bless! "Why did the Biden campaign choose 30330? 2020 divided by 666 = 3.0330 Who believes this to be a coincidence? October 2020 Isaiah 53:6 Someone said we are being whipsawed in 2020. Truly a great division is taking place between good and evil—both symbolically and literally (riots, unrest, politics). If you take the current year 2020 and divide it by the number 666 (known for its satanic implications) you will get the number 30330 (repeated). This number 30330 happens to be the number used to vote for Joe Biden and Kamala Harris. Freaky? Supernatural? Odd for sure. Whatever this means, it doesn’t seem good to me. First, why would anyone knowingly choose those particular numbers for their campaign? If they weren’t knowingly chosen, then it appears to be a supernatural act by the evil one himself and I would want to change those numbers ASAP. And if the numbers were chosen knowing their significance, are you satanic? Is this campaign satanic? Either way I do not believe this is a coincidence. And one thing is certain, 2020 is truly being divided by Satan. He is the master deceiver and spreader of chaos. Jesus calls him the father of lies." So I looked up this number 30330 concerning Joe Biden, and I found this information: If you send a text to that number (at that time), you would get a response asking to support Joe's campaign to take down Donald Trump, with one part in caps saying "CHIP IN >>" pointing to a link to go and donate. "CHIP IN"? Obama has used this phrase in the past on his twitter and people believe it is a subliminal message to receive the mark of the beast, that is to say the implantable RFID microCHIP that will go IN our body. God's word warns us in the end times that a false prophet will stand up doing miraculous signs to deceive many to acquire the beasts mark: ...."And the beast was taken, and with him the false prophet that wrought the signs in his sight, wherewith he deceived them that had received the mark of the beast and them that worshipped his image: they two were cast alive into the lake of fire that burneth with brimstone" (Revelation 19:20 ASV).... At all costs, DO NOT TAKE IT! "Then a third angel followed them, saying with a loud voice, "If anyone worships the beast and his image, and receives his mark on his forehead or on his hand, he himself shall also drink of the wine of the wrath of God, which is poured out full strength into the cup of His indignation. He shall be tormented with fire and brimstone in the presence of the holy angels and in the presence of the Lamb. And the smoke of their torment ascends forever and ever; and they have no rest day or night, who worship the beast and his image, and whoever receives the mark of his name" (Revelation 14:9-11). We're living in very prophetic times with major Biblical prophecies coming to pass. When Donald Trump recognized Jerusalem as capital of Israel on December 6 2017, this was a big step to bring forth the Third Temple prophesied in the Bible. God's Holy scriptures tells us that the Antichrist will seat himself in this temple: "...and the man of sin is revealed, the son of perdition, who opposes and exalts himself above all that is called God or that is worshiped, so that he sits as God in the temple of God, showing himself that he is God" (2 Thessalonians 2:3-4). Within the Islamic faith, there is a figure called the Mahdi, referred to as their messiah who they're awaiting to appear. There are many testimonies from individuals on line who consider this man will be Barack Obama who may be the biblical Antichrist. I myself have had unusual dreams (you can read them in my article on the website above) concerning Barack. He came on stage claiming to be a follower of Christ with no affiliation to the Muslim religion, however it was later revealed by his circle of relatives that he indeed is a religious Muslim. So what's in the name? The meaning of someones name can say a lot about a person. God throughout history has given names to people that have a specific meaning tied to their lives. How about the name Barack Obama? Let us take a look at what may be hiding beneath the surface... Jesus says, "And He said to them, 'I saw Satan fall like lightning from heaven'" (Luke 10:18). In Hebrew, the word "Barack" means "lighting", and the use of "Bama" (Strongs Hebrew word 1116) is used to mean the "heights" of heaven. The day after the election of Barack Obama (11/04/08), the triumphing pick three lotto numbers in Illinois (Obama’s home state) for 11/5/08 were 666. Obama was a U.S. senator for Illinois, and his zip code was 60606. The names of both of Obama's daughters are Malia and Natasha. If we were to write those names backwards we would get "ailam ahsatan". Now if we remove the letters that spell "Alah" (Allah being the God of Islam), we get "I am Satan". Coincidence? I don't think so. These are just a few of many evidences why Barack Obama is the Antichrist. You can see many more in my article on the website above, as well as read about the dreams I've had concerning this man. I'm more than convinced that God has shown me that he is without a doubt the Antichrist, and we will see him rise to power in the not so dinstant future. Why do we need Jesus? "for all have sinned and fall short of the glory of God" (Romans 2:23). "For the wages of sin is death, but the gift of God is eternal life in Christ Jesus our Lord" (Romans 6:23). Our good works cannot save our souls. If we step in front of a judge, being responsible for committing a crime, the judge is not going to judge us by the good that we have accomplished, rather the crimes we have committed. If we as fallen humanity, created in God's image, pose this type of justice, how much more a perfect, righteous, and Holy God? God has introduced to us His moral law's by the ten commandments handed to Moses at Mt. Siani. These legal guidelines were not given so we can be justified, but in order that we might see the need for our saviour. They're the mirror of God's character of what He has put in each and every one of us, with our conscious bearing witness that we know that it's wrong to steal, lie, dishonor our mother and father, and so on. We may attempt to follow all the moral laws of the ten commandments, but we will never catch up to them to be justified before a Holy God. That same word of the law received by Moses was brought forth as flesh over 2000 years ago in the body of Jesus Christ. He came to be our justification by perfectly fulfilling the commandments of God, living a sinless life that solely God may accomplish. The distance between us and the law of God can never be reconciled by our own merit, however the arm of Jesus is stretched out by the grace and mercy of God. And if we are to grab on, by faith in Him, He'll pull us forward being the one to justify us. As in the court of law, if someone steps in and pays your debt, despite the fact that you're guilty, the judge can do what is legal and just and set you free. That is what Jesus did almost 2000 years ago on the cross. It was a legal transaction being fulfilled in the spiritual realm by the shedding of His blood, with His last words being, "...It is finished!..." (John 19:30). So why did Jesus have to die for us? Because God is Holy and just, the wrath that we deserve could not be overlooked. Through the perfect righteousness and justice of God's character, it ought to be reconciled, it ought to be quenched and satisfied. For God takes no pleasure in the demise of the wicked (Ezekiel 18:23). That is why in Isaiah chapter 53, where it speaks of the coming Messiah and His soul being a sacrifice for our sins, why it says it pleased God to crush His only begotten Son. That is because the wrath that we deserve was justified by being poured out upon His Son. For if it was poured out upon us who have earned it, we'd all die and go to hell. God created a means of escape by pouring it out on His Son who's soul could not be left in Hades, but was raised and seated at the right hand of God in power. Now after we put on the Lord Jesus Christ (Romans 13:14), God no longer see's the person who deserves His wrath, but the glorious image of His perfect Son dwelling in us, justifying us as if we acquired the wrath we deserve, making a means of escape from the curse of death. Now what we ought to do is repent and believe in the saviour, confessing and turning from our sins. That is not just a head knowledge of believing in Jesus, but rather receiving His words, taking them to heart. Where we no longer live to practice sin, but turn from our sins and practice righteousness: "Do you not know that the unrighteous will not inherit the kingdom of God? Do not be deceived. Neither fornicators, nor idolaters, nor adulterers, nor homosexuals, nor sodomites, nor thieves, nor covetous, nor drunkards, nor revilers, nor extortioners will inherit the kingdom of God. And such were some of you. But you were washed, but you were sanctified, but you were justified in the name of the Lord Jesus and by the Spirit of our God" (1 Corinthians 6:9-11). By doing so we will become transformed into the image of God by faith in His Son Christ Jesus Who's willing to give the Holy Spirit to those that ask of Him: "Most assuredly, I (Jesus) say to you, unless one is born of water and the Spirit, he cannot enter the kingdom of God. That which is born of the flesh is flesh, and that which is born of the Spirit is spirit. Do not marvel that I said to you, 'You must be born again.' (John 3:5-6). "But you are not in the flesh but in the Spirit, if indeed the Spirit of God dwells in you. Now if anyone does not have the Spirit of Christ, he is not His" (Romans 8:9). What are you waiting for? Our Father in heaven only wants the best for us all, restoring all the pieces this world has stolen from us. That is what it means to be "holy". To be made whole. He's waiting to listen to you. That God given tongue to speak language, by way of faith, pray to Him, ask Him to forgive you by confessing to Him your sins and be willing to forsake them; that you accept the sacrifice of His Son Jesus on the cross, and that you want His Holy Spirit living inside you transforming you into a child of God. Jesus says, "but whoever drinks of the water that I shall give him (the Holy Spirit) will never thirst. But the water that I shall give him will become in him a fountain of water springing up into everlasting life." Did you realize that Jesus spoke more about hell than any one in God's holy word, even more than He spoke about heaven?! For this very purpose He came to die for us, to save us from this place that we earned by our sins against a holy God. He describes hell as a real place where, "Their worm does not die And the fire is not quenched" (Mark 9:44). And where, "There will be weeping and gnashing of teeth..." (Luke 13:28). Jesus tells us who to fear, "And do not fear those who kill the body but cannot kill the soul. But rather fear Him who is able to destroy both soul and body in hell" (Matthew 10:28). "Now I saw a new heaven and a new earth, for the first heaven and the first earth had passed away. Also there was no more sea. Then I, John, saw the holy city, New Jerusalem, coming down out of heaven from God, prepared as a bride adorned for her husband. And I heard a loud voice from heaven saying, 'Behold, the tabernacle of God is with men, and He will dwell with them, and they shall be His people. God Himself will be with them and be their God. And God will wipe away every tear from their eyes; there shall be no more death, nor sorrow, nor crying. There shall be no more pain, for the former things have passed away.' Then He who sat on the throne said, 'Behold, I make all things new.' And He said to me, 'Write, for these words are true and faithful.' And He said to me, 'It is done! I am the Alpha and the Omega, the Beginning and the End. I will give of the fountain of the water of life freely to him who thirsts. He who overcomes shall inherit all things, and I will be his God and he shall be My son. But the cowardly, unbelieving, abominable, murderers, sexually immoral, sorcerers, idolaters, and all liars shall have their part in the lake which burns with fire and brimstone, which is the second death.'" (Revelation 21:1-8).

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[PATCH net-next 0/7] some optimization for page pool
by Yunsheng Lin 30 Sep '21

30 Sep '21

Patch 1: disable dma mapping support for 32-bit arch with 64-bit DMA. Patch 2: support non-split page when PP_FLAG_PAGE_FRAG is set. patch 3: avoid calling compound_head() for skb frag page Patch 4-7: use pp_magic to identify pp page uniquely. V3: 1. add patch 1/4/6/7. 2. use pp_magic to identify pp page uniquely too. 3. avoid unnecessary compound_head() calling. V2: add patch 2, adjust the commit log accroding to the discussion in V1, and fix a compiler error reported by kernel test robot. Yunsheng Lin (7): page_pool: disable dma mapping support for 32-bit arch with 64-bit DMA page_pool: support non-split page with PP_FLAG_PAGE_FRAG pool_pool: avoid calling compound_head() for skb frag page page_pool: change BIAS_MAX to support incrementing skbuff: keep track of pp page when __skb_frag_ref() is called skbuff: only use pp_magic identifier for a skb' head page skbuff: remove unused skb->pp_recycle .../net/ethernet/hisilicon/hns3/hns3_enet.c | 6 --- drivers/net/ethernet/marvell/mvneta.c | 2 - .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 4 +- drivers/net/ethernet/marvell/sky2.c | 2 +- drivers/net/ethernet/mellanox/mlx4/en_rx.c | 2 +- drivers/net/ethernet/ti/cpsw.c | 2 - drivers/net/ethernet/ti/cpsw_new.c | 2 - include/linux/mm_types.h | 13 +----- include/linux/skbuff.h | 39 ++++++++---------- include/net/page_pool.h | 31 ++++++++------ net/core/page_pool.c | 40 +++++++------------ net/core/skbuff.c | 36 ++++++----------- net/tls/tls_device.c | 2 +- 13 files changed, 67 insertions(+), 114 deletions(-) -- 2.33.0

3 25

[RFCv2 PATCH net-next 000/167] net: extend the netdev_features_t
by Jian Shen 26 Sep '21

26 Sep '21

For the prototype of netdev_features_t is u64, and the number of netdevice feature bits is 64 now. So there is no space to introduce new feature bit. This patchset try to solve it by change the prototype of netdev_features_t from u64 to bitmap. With this change, it's necessary to introduce a set of bitmap operation helpers for netdev features. Meanwhile, the functions which use netdev_features_t as return value are also need to be changed, return the result as an output parameter. With above changes, it will affect hundreds of files, and all the nic drivers. To make it easy to be reviewed, split the changes to 167 patches to 5 parts. patch 1~22: convert the prototype which use netdev_features_t as return value patch 24: introduce fake helpers for bitmap operation patch 25~165: use netdev_feature_xxx helpers patch 166: use macro __DECLARE_NETDEV_FEATURE_MASK to replace netdev_feature_t declaration. patch 167: change the type of netdev_features_t to bitmap, and rewrite the bitmap helpers. Jian Shen (167): net: convert the prototype of netdev_intersect_features net: convert the prototype of netdev_get_wanted_features net: convert the prototype of net_mpls_features net: convert the prototype of harmonize_features net: convert the prototype of gso_features_check net: convert the prototype of vlan_features_check net: convert the prototype of vxlan_features_check net: convert the prototype of dflt_features_check net: convert the prototype of ndo_features_check net: convert the prototype of netif_skb_features net: convert the prototype of ndo_fix_features net: convert the prototype of netdev_fix_features net: convert the prototype of netdev_sync_upper_features net: convert the prototype of br_features_recompute net: convert the prototype of netdev_add_tso_features net: convert the prototype of netdev_increment_features net: convert the prototype of hsr_features_recompute net: mlx5: convert prototype of mlx5e_ipsec_feature_check, mlx5e_tunnel_features_check and mlx5e_fix_uplink_rep_features net: sfc: convert the prototype of xxx_supported_features net: qlogic: convert the prototype of qlcnic_process_flags net: realtek: convert the prototype of rtl8168evl_fix_tso ethtool: convert the prototype of ethtool_get_feature_mask net: add netdev feature helpers net: core: use netdev feature helpers skbuff: use netdev feature helpers net: vlan: use netdev feature helpers bridge: use netdev feature helpers ipvlan: use netdev feature helpers veth: use netdev feature helpers bonding: use netdev feature helpers net: tun: use netdev feature helpers net: tap: use netdev feature helpers net: geneve: use netdev feature helpers hv_netvsc: use netdev feature helpers macvlan: use netdev feature helpers macsec: use netdev feature helpers net: tls: use netdev feature helpers s390: qeth: use netdev feature helpers dsa: use netdev feature helpers macvtap: use netdev feature helpers team: use netdev feature helpers vmxnet3: use netdev feature helpers net_failover: use netdev feature helpers pktgen: use netdev feature helpers net: sched: use netdev feature helpers netdevsim: use netdev feature helpers virtio_net: use netdev feature helpers net: ipv4: use netdev feature helpers net: ipv6: use netdev feature helpers net: hsr: use netdev feature helpers net: mpls: use netdev feature helpers net: nsh: use netdev feature helpers net: decnet: use netdev feature helpers net: dccp: use netdev feature helpers net: l2tp: use netdev feature helpers net: ntb_netdev: use netdev feature helpers net: thunderbolt: use netdev feature helpers net: phonet: use netdev feature helpers net: vrf: use netdev feature helpers net: sctp: use netdev feature helpers vxlan: use netdev feature helpers xen-netback: use netdev feature helpers xen-netfront: use netdev feature helpers sock: use netdev feature helpers sunrpc: use netdev feature helpers net: caif: use netdev feature helpers net: loopback: use netdev feature helpers net: dummy: use netdev_feature helpers net: mac80211: use netdev feature helpers net: ifb: use netdev feature helpers net: bareudp: use netdev feature helpers net: rionet: use netdev feature helpers net: gtp: use netdev feature helpers net: vsockmon: use netdev feature helpers net: nlmon: use netdev feature helpers net: wireguard: use netdev feature helpers net: can: use netdev feature helpers net: ppp: use netdev feature helpers net: ipa: use netdev feature helpers net: fjes: use netdev feature helpers net: usb: use netdev feature helpers net: wireless: use netdev feature helpers net: realtek: use netdev feature helpers net: broadcom: use netdev feature helpers net: intel: use netdev feature helpers net: hisilicon: use netdev feature helpers net: mellanox: use netdev feature helpers net: atlantic: use netdev feature helpers net: atheros: use netdev feature helpers net: chelsio: use netdev feature helpers net: davicom: use netdev feature helpers net: freescale: use netdev feature helpers net: synopsys: use netdev feature helpers net: sfc: use netdev feature helpers net: qualcomm: use netdev feature helpers net: nvidia: use netdev feature helpers net: faraday: use netdev feature helpers net: google: use netdev feature helpers net: hinic: use netdev feature helpers net: ibm: use netdev feature helpers net: ionic: use netdev feature helpers net: jme: use netdev feature helpers net: micrel: use netdev feature helpers net: cavium: use netdev feature helpers net: cadence: use netdev feature helpers net: mediatek: use netdev feature helpers net: marvell: use netdev feature helpers net: socionext: use netdev feature helpers net: qlogic: use netdev feature helpers net: nfp: use netdev feature helpers net: mscc: use netdev feature helpers net: oki-semi: use netdev feature helpers net: renesas: use netdev feature helpers net: neterion: use netdev feature helpers net: cortina: use netdev feature helpers net: stmmac: use netdev feature helpers net: sxgbe: use netdev feature helpers net: xgmac: use netdev feature helpers net: altera: use netdev feature helpers net: ti: use netdev feature helpers net: benet: use netdev feature helpers net: amd: use netdev feature helpers net: bna: use netdev feature helpers net: enic: use netdev feature helpers net: 3com: use netdev feature helpers net: aeroflex: use netdev feature helpers net: sun: use netdev feature helpers net: mana: use netdev feature helpers net: myricom: use netdev feature helpers net: alacritech: use netdev feature helpers net: toshiba: use netdev feature helpers net: tehuti: use netdev feature helpers net: alteon: use netdev feature helpers net: ena: use netdev feature helpers net: sgi: use netdev feature helpers net: microchip: use netdev feature helpers net: ni: use netdev feature helpers net: apm: use netdev feature helpers net: natsemi: use netdev feature helpers net: xilinx: use netdev feature helpers net: pasemi: use netdev feature helpers net: rocker: use netdev feature helpers net: silan: use netdev feature helpers net: adaptec: use netdev feature helpers net: tundra: use netdev feature helpers net: via: use netdev feature helpers net: wiznet: use netdev feature helpers net: dnet: use netdev feature helpers net: ethoc: use netdev feature helpers RDMA: ipoib: use netdev feature helpers um: use netdev feature helpers scsi: fcoe: use netdev feature helpers net: ipvs: use netdev feature helpers net: xfrm: use netdev feature helpers net: cirrus: use netdev feature helpers net: ec_bhf: use netdev feature helpers net: hamradio: use netdev feature helpers net: batman: use netdev feature helpers net: ieee802154: use netdev feature helpers test_bpf: change the prototype of features net: openvswitch: use netdev feature helpers firewire: use netdev feature helpers staging: qlge: use netdev feature helpers staging: octeon: use netdev feature helpers net: sock: add helper sk_nocaps_add_gso() treewide: introduce macro __DECLARE_NETDEV_FEATURE_MASK net: extend the type of netdev_features_t to bitmap arch/um/drivers/vector_kern.c | 15 +- drivers/firewire/net.c | 3 +- drivers/infiniband/hw/hfi1/vnic_main.c | 7 +- drivers/infiniband/ulp/ipoib/ipoib_cm.c | 2 +- drivers/infiniband/ulp/ipoib/ipoib_ib.c | 2 +- drivers/infiniband/ulp/ipoib/ipoib_main.c | 21 +- drivers/infiniband/ulp/ipoib/ipoib_verbs.c | 2 +- drivers/net/bareudp.c | 16 +- drivers/net/bonding/bond_main.c | 136 +++--- drivers/net/bonding/bond_options.c | 12 +- drivers/net/caif/caif_serial.c | 2 +- drivers/net/can/dev/dev.c | 3 +- drivers/net/can/slcan.c | 3 +- drivers/net/dsa/xrs700x/xrs700x.c | 6 +- drivers/net/dummy.c | 14 +- drivers/net/ethernet/3com/3c59x.c | 9 +- drivers/net/ethernet/3com/typhoon.c | 10 +- drivers/net/ethernet/adaptec/starfire.c | 9 +- drivers/net/ethernet/aeroflex/greth.c | 12 +- drivers/net/ethernet/alacritech/slicoss.c | 5 +- drivers/net/ethernet/alteon/acenic.c | 7 +- drivers/net/ethernet/altera/altera_tse_main.c | 11 +- .../net/ethernet/amazon/ena/ena_admin_defs.h | 2 +- drivers/net/ethernet/amazon/ena/ena_netdev.c | 50 ++- drivers/net/ethernet/amd/amd8111e.c | 8 +- drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 20 +- drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 93 ++-- drivers/net/ethernet/amd/xgbe/xgbe-main.c | 68 +-- drivers/net/ethernet/amd/xgbe/xgbe.h | 2 +- drivers/net/ethernet/apm/xgene-v2/main.c | 5 +- .../net/ethernet/apm/xgene/xgene_enet_main.c | 21 +- .../ethernet/aquantia/atlantic/aq_filters.c | 12 +- .../ethernet/aquantia/atlantic/aq_macsec.c | 2 +- .../net/ethernet/aquantia/atlantic/aq_main.c | 27 +- .../net/ethernet/aquantia/atlantic/aq_nic.c | 28 +- .../net/ethernet/aquantia/atlantic/aq_nic.h | 2 +- .../net/ethernet/aquantia/atlantic/aq_ring.c | 3 +- .../aquantia/atlantic/hw_atl/hw_atl_b0.c | 3 +- drivers/net/ethernet/atheros/alx/main.c | 23 +- .../net/ethernet/atheros/atl1c/atl1c_main.c | 33 +- .../net/ethernet/atheros/atl1e/atl1e_main.c | 44 +- drivers/net/ethernet/atheros/atlx/atl1.c | 15 +- drivers/net/ethernet/atheros/atlx/atl2.c | 27 +- drivers/net/ethernet/atheros/atlx/atlx.c | 20 +- drivers/net/ethernet/broadcom/b44.c | 2 +- drivers/net/ethernet/broadcom/bcmsysport.c | 24 +- drivers/net/ethernet/broadcom/bgmac.c | 8 +- drivers/net/ethernet/broadcom/bnx2.c | 48 +- .../net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | 67 +-- .../net/ethernet/broadcom/bnx2x/bnx2x_cmn.h | 3 +- .../net/ethernet/broadcom/bnx2x/bnx2x_main.c | 93 ++-- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 171 ++++--- drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c | 4 +- drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c | 11 +- drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c | 3 +- .../net/ethernet/broadcom/genet/bcmgenet.c | 12 +- drivers/net/ethernet/broadcom/tg3.c | 62 +-- drivers/net/ethernet/brocade/bna/bnad.c | 48 +- drivers/net/ethernet/cadence/macb_main.c | 81 ++-- drivers/net/ethernet/calxeda/xgmac.c | 20 +- .../net/ethernet/cavium/liquidio/lio_core.c | 6 +- .../net/ethernet/cavium/liquidio/lio_main.c | 95 ++-- .../ethernet/cavium/liquidio/lio_vf_main.c | 79 ++-- .../net/ethernet/cavium/thunder/nicvf_main.c | 50 ++- .../ethernet/cavium/thunder/nicvf_queues.c | 2 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 50 ++- drivers/net/ethernet/chelsio/cxgb/sge.c | 12 +- .../net/ethernet/chelsio/cxgb3/cxgb3_main.c | 60 ++- drivers/net/ethernet/chelsio/cxgb3/sge.c | 10 +- .../net/ethernet/chelsio/cxgb4/cxgb4_fcoe.c | 16 +- .../net/ethernet/chelsio/cxgb4/cxgb4_main.c | 88 ++-- .../net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.h | 3 +- drivers/net/ethernet/chelsio/cxgb4/sge.c | 14 +- .../ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 39 +- drivers/net/ethernet/chelsio/cxgb4vf/sge.c | 8 +- .../chelsio/inline_crypto/chtls/chtls_main.c | 3 +- drivers/net/ethernet/cirrus/ep93xx_eth.c | 2 +- drivers/net/ethernet/cisco/enic/enic_main.c | 74 ++-- drivers/net/ethernet/cortina/gemini.c | 18 +- drivers/net/ethernet/davicom/dm9000.c | 24 +- drivers/net/ethernet/dnet.c | 2 +- drivers/net/ethernet/ec_bhf.c | 2 +- drivers/net/ethernet/emulex/benet/be_main.c | 68 +-- drivers/net/ethernet/ethoc.c | 2 +- drivers/net/ethernet/faraday/ftgmac100.c | 38 +- .../net/ethernet/freescale/dpaa/dpaa_eth.c | 23 +- .../net/ethernet/freescale/dpaa2/dpaa2-eth.c | 44 +- .../ethernet/freescale/dpaa2/dpaa2-switch.c | 5 +- drivers/net/ethernet/freescale/enetc/enetc.c | 34 +- .../net/ethernet/freescale/enetc/enetc_pf.c | 38 +- .../net/ethernet/freescale/enetc/enetc_qos.c | 2 +- .../net/ethernet/freescale/enetc/enetc_vf.c | 16 +- drivers/net/ethernet/freescale/fec_main.c | 29 +- .../ethernet/freescale/fs_enet/fs_enet-main.c | 2 +- drivers/net/ethernet/freescale/gianfar.c | 39 +- .../net/ethernet/freescale/gianfar_ethtool.c | 11 +- drivers/net/ethernet/google/gve/gve_adminq.c | 6 +- drivers/net/ethernet/google/gve/gve_main.c | 31 +- drivers/net/ethernet/google/gve/gve_rx.c | 8 +- drivers/net/ethernet/google/gve/gve_rx_dqo.c | 8 +- drivers/net/ethernet/hisilicon/hix5hd2_gmac.c | 8 +- drivers/net/ethernet/hisilicon/hns/hns_enet.c | 52 ++- .../net/ethernet/hisilicon/hns3/hns3_enet.c | 109 +++-- .../net/ethernet/huawei/hinic/hinic_main.c | 80 ++-- drivers/net/ethernet/huawei/hinic/hinic_rx.c | 5 +- drivers/net/ethernet/ibm/ehea/ehea_main.c | 22 +- drivers/net/ethernet/ibm/emac/core.c | 7 +- drivers/net/ethernet/ibm/ibmveth.c | 76 ++-- drivers/net/ethernet/ibm/ibmvnic.c | 69 +-- drivers/net/ethernet/intel/e100.c | 26 +- drivers/net/ethernet/intel/e1000/e1000_main.c | 82 ++-- drivers/net/ethernet/intel/e1000e/netdev.c | 129 +++--- drivers/net/ethernet/intel/fm10k/fm10k_main.c | 9 +- .../net/ethernet/intel/fm10k/fm10k_netdev.c | 65 +-- drivers/net/ethernet/intel/fm10k/fm10k_pci.c | 11 +- drivers/net/ethernet/intel/i40e/i40e_main.c | 122 ++--- drivers/net/ethernet/intel/i40e/i40e_txrx.c | 9 +- drivers/net/ethernet/intel/iavf/iavf_main.c | 153 ++++--- drivers/net/ethernet/intel/iavf/iavf_txrx.c | 12 +- drivers/net/ethernet/intel/ice/ice_main.c | 177 +++++--- drivers/net/ethernet/intel/ice/ice_txrx_lib.c | 9 +- drivers/net/ethernet/intel/igb/igb_ethtool.c | 2 +- drivers/net/ethernet/intel/igb/igb_main.c | 150 ++++--- drivers/net/ethernet/intel/igbvf/netdev.c | 86 ++-- drivers/net/ethernet/intel/igc/igc_ethtool.c | 3 +- drivers/net/ethernet/intel/igc/igc_main.c | 130 +++--- drivers/net/ethernet/intel/ixgb/ixgb_main.c | 49 +- .../net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c | 3 +- .../net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 2 +- drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c | 7 +- drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c | 3 +- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 215 +++++---- .../net/ethernet/intel/ixgbe/ixgbe_sriov.c | 6 +- drivers/net/ethernet/intel/ixgbevf/ipsec.c | 9 +- .../net/ethernet/intel/ixgbevf/ixgbevf_main.c | 105 +++-- drivers/net/ethernet/jme.c | 49 +- drivers/net/ethernet/marvell/mv643xx_eth.c | 14 +- drivers/net/ethernet/marvell/mvneta.c | 22 +- .../net/ethernet/marvell/mvpp2/mvpp2_main.c | 73 +-- .../marvell/octeontx2/nic/otx2_common.c | 3 +- .../marvell/octeontx2/nic/otx2_ethtool.c | 4 +- .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 85 ++-- .../marvell/octeontx2/nic/otx2_txrx.c | 8 +- .../ethernet/marvell/octeontx2/nic/otx2_vf.c | 35 +- .../ethernet/marvell/prestera/prestera_main.c | 3 +- drivers/net/ethernet/marvell/skge.c | 11 +- drivers/net/ethernet/marvell/sky2.c | 75 ++-- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 68 +-- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +- .../net/ethernet/mellanox/mlx4/en_ethtool.c | 4 +- drivers/net/ethernet/mellanox/mlx4/en_main.c | 8 +- .../net/ethernet/mellanox/mlx4/en_netdev.c | 198 +++++---- .../net/ethernet/mellanox/mlx4/en_resources.c | 4 +- drivers/net/ethernet/mellanox/mlx4/en_rx.c | 19 +- drivers/net/ethernet/mellanox/mlx4/mlx4_en.h | 5 +- drivers/net/ethernet/mellanox/mlx5/core/en.h | 5 +- .../mellanox/mlx5/core/en_accel/ipsec.c | 18 +- .../mellanox/mlx5/core/en_accel/ipsec_rxtx.h | 15 +- .../mellanox/mlx5/core/en_accel/ktls.c | 14 +- .../mellanox/mlx5/core/en_accel/tls.c | 16 +- .../net/ethernet/mellanox/mlx5/core/en_arfs.c | 6 +- .../ethernet/mellanox/mlx5/core/en_ethtool.c | 3 +- .../net/ethernet/mellanox/mlx5/core/en_fs.c | 3 +- .../net/ethernet/mellanox/mlx5/core/en_main.c | 250 ++++++----- .../net/ethernet/mellanox/mlx5/core/en_rep.c | 25 +- .../net/ethernet/mellanox/mlx5/core/en_rx.c | 9 +- .../net/ethernet/mellanox/mlx5/core/en_tc.c | 2 +- .../ethernet/mellanox/mlx5/core/ipoib/ipoib.c | 19 +- .../net/ethernet/mellanox/mlxsw/spectrum.c | 36 +- drivers/net/ethernet/micrel/ksz884x.c | 10 +- drivers/net/ethernet/microchip/lan743x_main.c | 7 +- .../ethernet/microchip/sparx5/sparx5_fdma.c | 2 +- drivers/net/ethernet/microsoft/mana/mana_en.c | 20 +- drivers/net/ethernet/mscc/ocelot.c | 3 +- drivers/net/ethernet/mscc/ocelot_net.c | 18 +- .../net/ethernet/myricom/myri10ge/myri10ge.c | 31 +- drivers/net/ethernet/natsemi/ns83820.c | 13 +- drivers/net/ethernet/neterion/s2io.c | 32 +- .../net/ethernet/neterion/vxge/vxge-main.c | 49 +- .../net/ethernet/netronome/nfp/crypto/tls.c | 12 +- .../ethernet/netronome/nfp/nfp_net_common.c | 117 +++-- .../net/ethernet/netronome/nfp/nfp_net_repr.c | 76 ++-- drivers/net/ethernet/netronome/nfp/nfp_port.c | 3 +- drivers/net/ethernet/ni/nixge.c | 3 +- drivers/net/ethernet/nvidia/forcedeth.c | 66 +-- .../ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 13 +- .../ethernet/oki-semi/pch_gbe/pch_gbe_param.c | 6 +- drivers/net/ethernet/pasemi/pasemi_mac.c | 6 +- .../net/ethernet/pensando/ionic/ionic_lif.c | 125 +++--- .../net/ethernet/pensando/ionic/ionic_txrx.c | 9 +- .../ethernet/qlogic/netxen/netxen_nic_init.c | 3 +- .../ethernet/qlogic/netxen/netxen_nic_main.c | 50 ++- drivers/net/ethernet/qlogic/qede/qede.h | 10 +- .../net/ethernet/qlogic/qede/qede_ethtool.c | 2 +- .../net/ethernet/qlogic/qede/qede_filter.c | 19 +- drivers/net/ethernet/qlogic/qede/qede_fp.c | 23 +- drivers/net/ethernet/qlogic/qede/qede_main.c | 67 +-- drivers/net/ethernet/qlogic/qla3xxx.c | 5 +- drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_hw.c | 72 +-- .../net/ethernet/qlogic/qlcnic/qlcnic_io.c | 3 +- .../net/ethernet/qlogic/qlcnic/qlcnic_main.c | 57 +-- drivers/net/ethernet/qualcomm/emac/emac-mac.c | 6 +- drivers/net/ethernet/qualcomm/emac/emac.c | 25 +- .../ethernet/qualcomm/rmnet/rmnet_map_data.c | 11 +- .../net/ethernet/qualcomm/rmnet/rmnet_vnd.c | 10 +- drivers/net/ethernet/realtek/8139cp.c | 36 +- drivers/net/ethernet/realtek/8139too.c | 28 +- drivers/net/ethernet/realtek/r8169_main.c | 85 ++-- drivers/net/ethernet/renesas/ravb.h | 4 +- drivers/net/ethernet/renesas/ravb_main.c | 24 +- drivers/net/ethernet/renesas/sh_eth.c | 28 +- drivers/net/ethernet/rocker/rocker_main.c | 3 +- .../net/ethernet/samsung/sxgbe/sxgbe_main.c | 19 +- drivers/net/ethernet/sfc/ef10.c | 41 +- drivers/net/ethernet/sfc/ef100_nic.c | 43 +- drivers/net/ethernet/sfc/ef100_rx.c | 6 +- drivers/net/ethernet/sfc/ef100_tx.c | 11 +- drivers/net/ethernet/sfc/ef10_sriov.c | 6 +- drivers/net/ethernet/sfc/efx.c | 32 +- drivers/net/ethernet/sfc/efx_common.c | 41 +- drivers/net/ethernet/sfc/efx_common.h | 4 +- drivers/net/ethernet/sfc/falcon/efx.c | 44 +- drivers/net/ethernet/sfc/falcon/falcon.c | 4 +- drivers/net/ethernet/sfc/falcon/net_driver.h | 9 +- drivers/net/ethernet/sfc/falcon/rx.c | 6 +- drivers/net/ethernet/sfc/farch.c | 2 +- drivers/net/ethernet/sfc/mcdi_filters.c | 21 +- drivers/net/ethernet/sfc/mcdi_port_common.c | 3 +- drivers/net/ethernet/sfc/net_driver.h | 9 +- drivers/net/ethernet/sfc/rx.c | 3 +- drivers/net/ethernet/sfc/rx_common.c | 5 +- drivers/net/ethernet/sfc/siena.c | 4 +- drivers/net/ethernet/sgi/ioc3-eth.c | 11 +- drivers/net/ethernet/silan/sc92031.c | 6 +- drivers/net/ethernet/socionext/netsec.c | 10 +- drivers/net/ethernet/socionext/sni_ave.c | 6 +- .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 3 +- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 62 +-- .../stmicro/stmmac/stmmac_selftests.c | 6 +- drivers/net/ethernet/sun/cassini.c | 5 +- drivers/net/ethernet/sun/ldmvsw.c | 5 +- drivers/net/ethernet/sun/niu.c | 11 +- drivers/net/ethernet/sun/sungem.c | 11 +- drivers/net/ethernet/sun/sunhme.c | 14 +- drivers/net/ethernet/sun/sunvnet.c | 8 +- drivers/net/ethernet/sun/sunvnet_common.c | 5 +- .../net/ethernet/synopsys/dwc-xlgmac-common.c | 45 +- drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c | 20 +- .../net/ethernet/synopsys/dwc-xlgmac-net.c | 41 +- drivers/net/ethernet/synopsys/dwc-xlgmac.h | 2 +- drivers/net/ethernet/tehuti/tehuti.c | 22 +- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 23 +- drivers/net/ethernet/ti/cpsw.c | 6 +- drivers/net/ethernet/ti/cpsw_new.c | 7 +- drivers/net/ethernet/ti/netcp_core.c | 9 +- drivers/net/ethernet/toshiba/ps3_gelic_net.c | 14 +- drivers/net/ethernet/toshiba/spider_net.c | 12 +- drivers/net/ethernet/tundra/tsi108_eth.c | 3 +- drivers/net/ethernet/via/via-rhine.c | 10 +- drivers/net/ethernet/via/via-velocity.c | 14 +- drivers/net/ethernet/wiznet/w5100.c | 2 +- drivers/net/ethernet/wiznet/w5300.c | 2 +- drivers/net/ethernet/xilinx/ll_temac_main.c | 5 +- .../net/ethernet/xilinx/xilinx_axienet_main.c | 9 +- drivers/net/fjes/fjes_main.c | 3 +- drivers/net/geneve.c | 18 +- drivers/net/gtp.c | 2 +- drivers/net/hamradio/bpqether.c | 3 +- drivers/net/hyperv/netvsc_bpf.c | 2 +- drivers/net/hyperv/netvsc_drv.c | 46 +- drivers/net/hyperv/rndis_filter.c | 30 +- drivers/net/ifb.c | 12 +- drivers/net/ipa/ipa_modem.c | 3 +- drivers/net/ipvlan/ipvlan.h | 2 +- drivers/net/ipvlan/ipvlan_main.c | 40 +- drivers/net/ipvlan/ipvtap.c | 5 +- drivers/net/loopback.c | 20 +- drivers/net/macsec.c | 49 +- drivers/net/macvlan.c | 58 ++- drivers/net/macvtap.c | 5 +- drivers/net/net_failover.c | 77 ++-- drivers/net/netdevsim/ipsec.c | 4 +- drivers/net/netdevsim/netdev.c | 15 +- drivers/net/nlmon.c | 5 +- drivers/net/ntb_netdev.c | 5 +- drivers/net/ppp/ppp_generic.c | 2 +- drivers/net/rionet.c | 3 +- drivers/net/tap.c | 38 +- drivers/net/team/team.c | 90 ++-- drivers/net/thunderbolt.c | 10 +- drivers/net/tun.c | 53 ++- drivers/net/usb/aqc111.c | 42 +- drivers/net/usb/ax88179_178a.c | 26 +- drivers/net/usb/cdc-phonet.c | 2 +- drivers/net/usb/cdc_mbim.c | 4 +- drivers/net/usb/lan78xx.c | 46 +- drivers/net/usb/r8152.c | 71 +-- drivers/net/usb/smsc75xx.c | 14 +- drivers/net/usb/smsc95xx.c | 18 +- drivers/net/veth.c | 67 +-- drivers/net/virtio_net.c | 50 ++- drivers/net/vmxnet3/vmxnet3_drv.c | 75 ++-- drivers/net/vmxnet3/vmxnet3_ethtool.c | 88 ++-- drivers/net/vmxnet3/vmxnet3_int.h | 4 +- drivers/net/vrf.c | 20 +- drivers/net/vsockmon.c | 6 +- drivers/net/vxlan.c | 21 +- drivers/net/wireguard/device.c | 8 +- drivers/net/wireless/ath/ath10k/mac.c | 7 +- drivers/net/wireless/ath/ath11k/mac.c | 4 +- drivers/net/wireless/ath/ath6kl/main.c | 15 +- drivers/net/wireless/ath/ath6kl/txrx.c | 6 +- drivers/net/wireless/ath/wil6210/netdev.c | 11 +- .../broadcom/brcm80211/brcmfmac/core.c | 4 +- .../net/wireless/intel/iwlwifi/cfg/22000.c | 4 +- drivers/net/wireless/intel/iwlwifi/cfg/8000.c | 2 +- drivers/net/wireless/intel/iwlwifi/cfg/9000.c | 2 +- .../net/wireless/intel/iwlwifi/dvm/mac80211.c | 7 +- .../net/wireless/intel/iwlwifi/iwl-config.h | 2 +- .../net/wireless/intel/iwlwifi/mvm/mac80211.c | 17 +- drivers/net/wireless/intel/iwlwifi/mvm/rx.c | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/tx.c | 10 +- .../net/wireless/mediatek/mt76/mt7615/init.c | 3 +- .../net/wireless/mediatek/mt76/mt7915/init.c | 3 +- .../net/wireless/mediatek/mt76/mt7921/init.c | 3 +- drivers/net/xen-netback/interface.c | 27 +- drivers/net/xen-netfront.c | 53 ++- drivers/s390/net/qeth_core.h | 7 +- drivers/s390/net/qeth_core_main.c | 139 +++--- drivers/s390/net/qeth_l2_main.c | 44 +- drivers/s390/net/qeth_l3_main.c | 49 +- drivers/scsi/fcoe/fcoe.c | 14 +- drivers/staging/octeon/ethernet.c | 5 +- drivers/staging/qlge/qlge_main.c | 59 +-- drivers/usb/gadget/function/f_phonet.c | 2 +- include/linux/if_macvlan.h | 2 +- include/linux/if_tap.h | 2 +- include/linux/if_vlan.h | 22 +- include/linux/netdev_features.h | 181 +++++++- include/linux/netdevice.h | 122 ++--- include/linux/skbuff.h | 6 +- include/net/mac80211.h | 2 +- include/net/pkt_cls.h | 2 +- include/net/sock.h | 22 +- include/net/udp.h | 8 +- include/net/udp_tunnel.h | 12 +- include/net/vxlan.h | 13 +- lib/test_bpf.c | 21 +- lib/vsprintf.c | 4 +- net/8021q/vlan.c | 11 +- net/8021q/vlan.h | 24 +- net/8021q/vlan_core.c | 6 +- net/8021q/vlan_dev.c | 57 +-- net/batman-adv/soft-interface.c | 5 +- net/bridge/br_device.c | 21 +- net/bridge/br_if.c | 19 +- net/bridge/br_private.h | 3 +- net/core/dev.c | 418 ++++++++++-------- net/core/netpoll.c | 4 +- net/core/pktgen.c | 6 +- net/core/skbuff.c | 10 +- net/core/skmsg.c | 3 +- net/core/sock.c | 17 +- net/dccp/ipv4.c | 2 +- net/dccp/ipv6.c | 7 +- net/decnet/af_decnet.c | 2 +- net/decnet/dn_nsp_out.c | 2 +- net/dsa/slave.c | 24 +- net/ethtool/features.c | 94 ++-- net/ethtool/ioctl.c | 154 ++++--- net/hsr/hsr_device.c | 40 +- net/hsr/hsr_forward.c | 11 +- net/hsr/hsr_framereg.c | 3 +- net/hsr/hsr_slave.c | 3 +- net/ieee802154/6lowpan/core.c | 2 +- net/ieee802154/core.c | 14 +- net/ipv4/af_inet.c | 5 +- net/ipv4/esp4_offload.c | 28 +- net/ipv4/gre_offload.c | 8 +- net/ipv4/ip_gre.c | 36 +- net/ipv4/ip_output.c | 27 +- net/ipv4/ip_tunnel.c | 4 +- net/ipv4/ip_vti.c | 2 +- net/ipv4/ipip.c | 6 +- net/ipv4/ipmr.c | 2 +- net/ipv4/tcp.c | 10 +- net/ipv4/tcp_ipv4.c | 6 +- net/ipv4/tcp_offload.c | 5 +- net/ipv4/tcp_output.c | 2 +- net/ipv4/udp_offload.c | 28 +- net/ipv6/af_inet6.c | 2 +- net/ipv6/esp6_offload.c | 19 +- net/ipv6/inet6_connection_sock.c | 2 +- net/ipv6/ip6_gre.c | 17 +- net/ipv6/ip6_offload.c | 3 +- net/ipv6/ip6_output.c | 24 +- net/ipv6/ip6_tunnel.c | 9 +- net/ipv6/ip6mr.c | 2 +- net/ipv6/sit.c | 9 +- net/ipv6/tcp_ipv6.c | 2 +- net/ipv6/udp_offload.c | 2 +- net/l2tp/l2tp_eth.c | 3 +- net/mac80211/iface.c | 10 +- net/mac80211/main.c | 5 +- net/mpls/mpls_gso.c | 4 +- net/netfilter/ipvs/ip_vs_proto_sctp.c | 3 +- net/nsh/nsh.c | 2 +- net/openvswitch/datapath.c | 5 +- net/openvswitch/vport-internal_dev.c | 23 +- net/phonet/pep-gprs.c | 3 +- net/sched/sch_cake.c | 6 +- net/sched/sch_netem.c | 6 +- net/sched/sch_taprio.c | 6 +- net/sched/sch_tbf.c | 6 +- net/sctp/offload.c | 12 +- net/sctp/output.c | 2 +- net/sunrpc/sunrpc.h | 2 +- net/tls/tls_device.c | 10 +- net/wireless/core.c | 14 +- net/xfrm/xfrm_device.c | 31 +- net/xfrm/xfrm_interface.c | 6 +- net/xfrm/xfrm_output.c | 4 +- 424 files changed, 6578 insertions(+), 4454 deletions(-) -- 2.33.0

5 283

[linuxarm] [PATCH v3] RDMA/hns: Add new mmap implementation
by Chengchang Tang 23 Sep '21

23 Sep '21

Add new implementation for mmap by using the new mmap entry API. Subsequent new features will use this new implementation. The old mmap which use a hard-corded offset will not be further expanded. And forward compatibility is also guaranteed in this patch. Signed-off-by: Chengchang Tang <tangchengchang(a)huawei.com> --- drivers/infiniband/hw/hns/hns_roce_device.h | 21 ++++ drivers/infiniband/hw/hns/hns_roce_main.c | 147 +++++++++++++++++++++++++++- include/uapi/rdma/hns-abi.h | 21 +++- 3 files changed, 184 insertions(+), 5 deletions(-) diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h index 9467c39..ca45694 100644 --- a/drivers/infiniband/hw/hns/hns_roce_device.h +++ b/drivers/infiniband/hw/hns/hns_roce_device.h @@ -225,11 +225,23 @@ struct hns_roce_uar { unsigned long logic_idx; }; +struct hns_user_mmap_entry { + struct rdma_user_mmap_entry rdma_entry; + u64 address; + u8 mmap_flag; +}; + +enum hns_roce_mmap_type { + HNS_ROCE_MMAP_TYPE_DB = 1, +}; + struct hns_roce_ucontext { struct ib_ucontext ibucontext; struct hns_roce_uar uar; struct list_head page_list; struct mutex page_mutex; + bool mmap_key_support; + struct rdma_user_mmap_entry *db_mmap_entry; }; struct hns_roce_pd { @@ -1049,6 +1061,12 @@ static inline struct hns_roce_srq *to_hr_srq(struct ib_srq *ibsrq) return container_of(ibsrq, struct hns_roce_srq, ibsrq); } +static inline struct hns_user_mmap_entry *to_hns_mmap( + struct rdma_user_mmap_entry *rdma_entry) +{ + return container_of(rdma_entry, struct hns_user_mmap_entry, rdma_entry); +} + static inline void hns_roce_write64_k(__le32 val[2], void __iomem *dest) { writeq(*(u64 *)val, dest); @@ -1259,4 +1277,7 @@ int hns_roce_init(struct hns_roce_dev *hr_dev); void hns_roce_exit(struct hns_roce_dev *hr_dev); int hns_roce_fill_res_cq_entry(struct sk_buff *msg, struct ib_cq *ib_cq); +struct rdma_user_mmap_entry *hns_roce_user_mmap_entry_insert( + struct ib_ucontext *ucontext, u64 address, + size_t length, u8 mmap_flag); #endif /* _HNS_ROCE_DEVICE_H */ diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c index 5d39bd0..169f0c1 100644 --- a/drivers/infiniband/hw/hns/hns_roce_main.c +++ b/drivers/infiniband/hw/hns/hns_roce_main.c @@ -291,6 +291,83 @@ static int hns_roce_modify_device(struct ib_device *ib_dev, int mask, return 0; } +struct rdma_user_mmap_entry *hns_roce_user_mmap_entry_insert( + struct ib_ucontext *ucontext, u64 address, + size_t length, u8 mmap_flag) +{ + struct hns_user_mmap_entry *entry; + int ret; + + entry = kzalloc(sizeof(*entry), GFP_KERNEL); + if (!entry) + return NULL; + + entry->address = address; + entry->mmap_flag = mmap_flag; + + ret = rdma_user_mmap_entry_insert(ucontext, &entry->rdma_entry, + length); + if (ret) { + kfree(entry); + return NULL; + } + + return &entry->rdma_entry; +} + +static void hns_roce_dealloc_uar_entry(struct hns_roce_ucontext *context) +{ + if (!context->mmap_key_support) + return; + + rdma_user_mmap_entry_remove(context->db_mmap_entry); +} + +static int hns_roce_alloc_uar_entry(struct ib_ucontext *uctx) +{ + struct hns_roce_ucontext *context = to_hr_ucontext(uctx); + u64 address; + + if (!context->mmap_key_support) + return 0; + + address = context->uar.pfn << PAGE_SHIFT; + context->db_mmap_entry = + hns_roce_user_mmap_entry_insert(uctx, address, PAGE_SIZE, + HNS_ROCE_MMAP_TYPE_DB); + if (!context->db_mmap_entry) + return -ENOMEM; + + return 0; +} + +static void get_ucontext_config(struct hns_roce_ucontext *context, + struct hns_roce_ib_alloc_ucontext *ucmd) +{ + struct hns_roce_dev *hr_dev = to_hr_dev(context->ibucontext.device); + + if (ucmd->comp & HNS_ROCE_ALLOC_UCTX_COMP_CONFIG && hr_dev->hw_rev != + HNS_ROCE_HW_VER1) + context->mmap_key_support = !!(ucmd->config & + HNS_ROCE_UCTX_REQ_MMAP_KEY_EN); +} + +static void ucontext_set_resp(struct ib_ucontext *uctx, + struct hns_roce_ib_alloc_ucontext_resp *resp) +{ + struct hns_roce_ucontext *context = to_hr_ucontext(uctx); + struct hns_roce_dev *hr_dev = to_hr_dev(uctx->device); + + resp->qp_tab_size = hr_dev->caps.num_qps; + resp->cqe_size = hr_dev->caps.cqe_sz; + resp->srq_tab_size = hr_dev->caps.num_srqs; + if (context->mmap_key_support) { + resp->config |= HNS_ROCE_UCTX_RESP_MMAP_KEY_EN; + resp->db_mmap_key = + rdma_user_mmap_get_offset(context->db_mmap_entry); + } +} + static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, struct ib_udata *udata) { @@ -298,24 +375,35 @@ static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, struct hns_roce_ucontext *context = to_hr_ucontext(uctx); struct hns_roce_ib_alloc_ucontext_resp resp = {}; struct hns_roce_dev *hr_dev = to_hr_dev(uctx->device); + struct hns_roce_ib_alloc_ucontext ucmd = {}; if (!hr_dev->active) return -EAGAIN; - resp.qp_tab_size = hr_dev->caps.num_qps; - resp.srq_tab_size = hr_dev->caps.num_srqs; + if (udata->inlen) { + ret = ib_copy_from_udata(&ucmd, udata, + min(udata->inlen, sizeof(ucmd))); + if (ret) + return ret; + } + + get_ucontext_config(context, &ucmd); ret = hns_roce_uar_alloc(hr_dev, &context->uar); if (ret) goto error_fail_uar_alloc; + ret = hns_roce_alloc_uar_entry(uctx); + if (ret) + goto error_fail_uar_entry; + if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_CQ_RECORD_DB || hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_QP_RECORD_DB) { INIT_LIST_HEAD(&context->page_list); mutex_init(&context->page_mutex); } - resp.cqe_size = hr_dev->caps.cqe_sz; + ucontext_set_resp(uctx, &resp); ret = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); @@ -325,6 +413,9 @@ static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, return 0; error_fail_copy_to_udata: + hns_roce_dealloc_uar_entry(context); + +error_fail_uar_entry: ida_free(&hr_dev->uar_ida.ida, (int)context->uar.logic_idx); error_fail_uar_alloc: @@ -336,10 +427,12 @@ static void hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext) struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext); struct hns_roce_dev *hr_dev = to_hr_dev(ibcontext->device); + hns_roce_dealloc_uar_entry(context); + ida_free(&hr_dev->uar_ida.ida, (int)context->uar.logic_idx); } -static int hns_roce_mmap(struct ib_ucontext *context, +static int hns_roce_legacy_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) { struct hns_roce_dev *hr_dev = to_hr_dev(context->device); @@ -371,6 +464,51 @@ static int hns_roce_mmap(struct ib_ucontext *context, } } +static int hns_roce_mmap(struct ib_ucontext *uctx, struct vm_area_struct *vma) +{ + struct hns_roce_ucontext *context = to_hr_ucontext(uctx); + struct hns_roce_dev *hr_dev = to_hr_dev(uctx->device); + struct ib_device *ibdev = &hr_dev->ib_dev; + struct rdma_user_mmap_entry *rdma_entry; + struct hns_user_mmap_entry *entry; + phys_addr_t pfn; + pgprot_t prot; + int ret; + + if (!context->mmap_key_support) + return hns_roce_legacy_mmap(uctx, vma); + + rdma_entry = rdma_user_mmap_entry_get_pgoff(uctx, vma->vm_pgoff); + if (!rdma_entry) { + ibdev_err(ibdev, "pgoff[%lu] is invalid entry.\n", + vma->vm_pgoff); + return -EINVAL; + } + + entry = to_hns_mmap(rdma_entry); + pfn = entry->address >> PAGE_SHIFT; + prot = vma->vm_page_prot; + switch (entry->mmap_flag) { + case HNS_ROCE_MMAP_TYPE_DB: + ret = rdma_user_mmap_io(uctx, vma, pfn, + rdma_entry->npages * PAGE_SIZE, + pgprot_noncached(prot), rdma_entry); + break; + default: + ret = -EINVAL; + } + + rdma_user_mmap_entry_put(rdma_entry); + return ret; +} + +static void hns_roce_free_mmap(struct rdma_user_mmap_entry *rdma_entry) +{ + struct hns_user_mmap_entry *entry = to_hns_mmap(rdma_entry); + + kfree(entry); +} + static int hns_roce_port_immutable(struct ib_device *ib_dev, u32 port_num, struct ib_port_immutable *immutable) { @@ -444,6 +582,7 @@ static const struct ib_device_ops hns_roce_dev_ops = { .get_link_layer = hns_roce_get_link_layer, .get_port_immutable = hns_roce_port_immutable, .mmap = hns_roce_mmap, + .mmap_free = hns_roce_free_mmap, .modify_device = hns_roce_modify_device, .modify_qp = hns_roce_modify_qp, .query_ah = hns_roce_query_ah, diff --git a/include/uapi/rdma/hns-abi.h b/include/uapi/rdma/hns-abi.h index 42b1776..ce1e39f 100644 --- a/include/uapi/rdma/hns-abi.h +++ b/include/uapi/rdma/hns-abi.h @@ -83,11 +83,30 @@ struct hns_roce_ib_create_qp_resp { __aligned_u64 cap_flags; }; +enum hns_roce_alloc_uctx_comp_flag { + HNS_ROCE_ALLOC_UCTX_COMP_CONFIG = 1 << 0, +}; + +enum hns_roce_alloc_uctx_resp_config { + HNS_ROCE_UCTX_RESP_MMAP_KEY_EN = 1 << 0, +}; + +enum hns_roce_alloc_uctx_req_config { + HNS_ROCE_UCTX_REQ_MMAP_KEY_EN = 1 << 0, +}; + +struct hns_roce_ib_alloc_ucontext { + __u32 comp; + __u32 config; +}; + struct hns_roce_ib_alloc_ucontext_resp { __u32 qp_tab_size; __u32 cqe_size; __u32 srq_tab_size; - __u32 reserved; + __u8 config; + __u8 rsv[3]; + __aligned_u64 db_mmap_key; }; struct hns_roce_ib_alloc_pd_resp { -- 2.9.5

1 0

[linuxarm] [PATCH v3 1/1] libhns: Add a new mmap mode
by Chengchang Tang 23 Sep '21

23 Sep '21

Add a new mmap mode support for hns. All the subsequent new features will be completed in a similar implementation of mmap. In the new mmap mode, the user space driver use the offset sent by kernel space driver to complete the mmap instead of a hard-coded offset. Forward compatibility is guaranteed in this patch. Signed-off-by: Chengchang Tang <tangchengchang(a)huawei.com> --- kernel-headers/rdma/hns-abi.h | 21 +++++++++- providers/hns/hns_roce_u.c | 87 ++++++++++++++++++++++++++++++------------ providers/hns/hns_roce_u.h | 1 + providers/hns/hns_roce_u_abi.h | 2 +- 4 files changed, 85 insertions(+), 26 deletions(-) diff --git a/kernel-headers/rdma/hns-abi.h b/kernel-headers/rdma/hns-abi.h index 42b1776..ce1e39f 100644 --- a/kernel-headers/rdma/hns-abi.h +++ b/kernel-headers/rdma/hns-abi.h @@ -83,11 +83,30 @@ struct hns_roce_ib_create_qp_resp { __aligned_u64 cap_flags; }; +enum hns_roce_alloc_uctx_comp_flag { + HNS_ROCE_ALLOC_UCTX_COMP_CONFIG = 1 << 0, +}; + +enum hns_roce_alloc_uctx_resp_config { + HNS_ROCE_UCTX_RESP_MMAP_KEY_EN = 1 << 0, +}; + +enum hns_roce_alloc_uctx_req_config { + HNS_ROCE_UCTX_REQ_MMAP_KEY_EN = 1 << 0, +}; + +struct hns_roce_ib_alloc_ucontext { + __u32 comp; + __u32 config; +}; + struct hns_roce_ib_alloc_ucontext_resp { __u32 qp_tab_size; __u32 cqe_size; __u32 srq_tab_size; - __u32 reserved; + __u8 config; + __u8 rsv[3]; + __aligned_u64 db_mmap_key; }; struct hns_roce_ib_alloc_pd_resp { diff --git a/providers/hns/hns_roce_u.c b/providers/hns/hns_roce_u.c index 3b31ad3..3817ecb 100644 --- a/providers/hns/hns_roce_u.c +++ b/providers/hns/hns_roce_u.c @@ -95,16 +95,67 @@ static const struct verbs_context_ops hns_common_ops = { .get_srq_num = hns_roce_u_get_srq_num, }; +static int hns_roce_mmap(struct hns_roce_device *hr_dev, + struct hns_roce_context *context, int cmd_fd, + uint64_t db_mmap_key) +{ + int page_size = hr_dev->page_size; + + context->uar = mmap(NULL, page_size, PROT_READ | PROT_WRITE, + MAP_SHARED, cmd_fd, db_mmap_key); + if (context->uar == MAP_FAILED) + return -EINVAL; + + return 0; +} + +static int hns_roce_legacy_mmap(struct hns_roce_device *hr_dev, + struct hns_roce_context *context, int cmd_fd) +{ + int offset = 0; + + context->uar = mmap(NULL, hr_dev->page_size, PROT_READ | PROT_WRITE, + MAP_SHARED, cmd_fd, offset); + if (context->uar == MAP_FAILED) + return -EINVAL; + + offset += hr_dev->page_size; + + if (hr_dev->hw_version == HNS_ROCE_HW_VER1) { + /* + * when vma->vm_pgoff is 1, the cq_tptr_base includes 64K CQ, + * a pointer of CQ need 2B size + */ + context->cq_tptr_base = mmap(NULL, HNS_ROCE_CQ_DB_BUF_SIZE, + PROT_READ | PROT_WRITE, MAP_SHARED, + cmd_fd, offset); + if (context->cq_tptr_base == MAP_FAILED) + goto db_free; + } + return 0; + +db_free: + munmap(context->uar, hr_dev->page_size); + context->uar = NULL; + return -EINVAL; +} + +static void ucontext_set_cmd(struct hns_roce_alloc_ucontext *cmd) +{ + cmd->comp = HNS_ROCE_ALLOC_UCTX_COMP_CONFIG; + cmd->config = HNS_ROCE_UCTX_REQ_MMAP_KEY_EN; +} + static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev, int cmd_fd, void *private_data) { struct hns_roce_device *hr_dev = to_hr_dev(ibdev); struct hns_roce_alloc_ucontext_resp resp = {}; + struct hns_roce_alloc_ucontext cmd = {}; struct ibv_device_attr dev_attrs; struct hns_roce_context *context; - struct ibv_get_context cmd; - int offset = 0; + int ret; int i; context = verbs_init_and_alloc_context(ibdev, cmd_fd, context, ibv_ctx, @@ -112,10 +163,14 @@ static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev, if (!context) return NULL; - if (ibv_cmd_get_context(&context->ibv_ctx, &cmd, sizeof(cmd), + ucontext_set_cmd(&cmd); + if (ibv_cmd_get_context(&context->ibv_ctx, &cmd.ibv_cmd, sizeof(cmd), &resp.ibv_resp, sizeof(resp))) goto err_free; + context->mmap_key_support = !!(resp.config & + HNS_ROCE_UCTX_RESP_MMAP_KEY_EN); + if (!resp.cqe_size) context->cqe_size = HNS_ROCE_CQE_SIZE; else if (resp.cqe_size <= HNS_ROCE_V3_CQE_SIZE) @@ -153,26 +208,14 @@ static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev, context->max_cqe = dev_attrs.max_cqe; context->max_srq_wr = dev_attrs.max_srq_wr; context->max_srq_sge = dev_attrs.max_srq_sge; + if (context->mmap_key_support) + ret = hns_roce_mmap(hr_dev, context, cmd_fd, resp.db_mmap_key); + else + ret = hns_roce_legacy_mmap(hr_dev, context, cmd_fd); - context->uar = mmap(NULL, hr_dev->page_size, PROT_READ | PROT_WRITE, - MAP_SHARED, cmd_fd, offset); - if (context->uar == MAP_FAILED) + if (ret) goto err_free; - offset += hr_dev->page_size; - - if (hr_dev->hw_version == HNS_ROCE_HW_VER1) { - /* - * when vma->vm_pgoff is 1, the cq_tptr_base includes 64K CQ, - * a pointer of CQ need 2B size - */ - context->cq_tptr_base = mmap(NULL, HNS_ROCE_CQ_DB_BUF_SIZE, - PROT_READ | PROT_WRITE, MAP_SHARED, - cmd_fd, offset); - if (context->cq_tptr_base == MAP_FAILED) - goto db_free; - } - pthread_spin_init(&context->uar_lock, PTHREAD_PROCESS_PRIVATE); verbs_set_ops(&context->ibv_ctx, &hns_common_ops); @@ -180,10 +223,6 @@ static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev, return &context->ibv_ctx; -db_free: - munmap(context->uar, hr_dev->page_size); - context->uar = NULL; - err_free: verbs_uninit_context(&context->ibv_ctx); free(context); diff --git a/providers/hns/hns_roce_u.h b/providers/hns/hns_roce_u.h index 0d7abd8..126c9d3 100644 --- a/providers/hns/hns_roce_u.h +++ b/providers/hns/hns_roce_u.h @@ -180,6 +180,7 @@ struct hns_roce_context { unsigned int max_srq_sge; int max_cqe; unsigned int cqe_size; + bool mmap_key_support; }; struct hns_roce_pd { diff --git a/providers/hns/hns_roce_u_abi.h b/providers/hns/hns_roce_u_abi.h index e56f9d3..295808b 100644 --- a/providers/hns/hns_roce_u_abi.h +++ b/providers/hns/hns_roce_u_abi.h @@ -42,7 +42,7 @@ DECLARE_DRV_CMD(hns_roce_alloc_pd, IB_USER_VERBS_CMD_ALLOC_PD, DECLARE_DRV_CMD(hns_roce_create_cq, IB_USER_VERBS_CMD_CREATE_CQ, hns_roce_ib_create_cq, hns_roce_ib_create_cq_resp); DECLARE_DRV_CMD(hns_roce_alloc_ucontext, IB_USER_VERBS_CMD_GET_CONTEXT, - empty, hns_roce_ib_alloc_ucontext_resp); + hns_roce_ib_alloc_ucontext, hns_roce_ib_alloc_ucontext_resp); DECLARE_DRV_CMD(hns_roce_create_qp, IB_USER_VERBS_CMD_CREATE_QP, hns_roce_ib_create_qp, hns_roce_ib_create_qp_resp); -- 2.9.5

1 0

[PATCH net-next v2 0/3] some optimization for page pool
by Yunsheng Lin 22 Sep '21

22 Sep '21

Patch 1: support non-split page when PP_FLAG_PAGE_FRAG is set. patch 2: avoid calling compound_head() for skb frag page Patch 3: keep track of pp page when __skb_frag_ref() is called. V2: add patch 2, adjust the commit log accroding to the discussion in V1, and fix a compiler error reported by kernel test robot. Yunsheng Lin (3): page_pool: support non-split page with PP_FLAG_PAGE_FRAG pool_pool: avoid calling compound_head() for skb frag page skbuff: keep track of pp page when __skb_frag_ref() is called include/linux/skbuff.h | 40 ++++++++++++++++++++++++++++++++++++---- include/net/page_pool.h | 34 +++++++++++++++++++++++++++++++++- net/core/page_pool.c | 30 +++++++++--------------------- 3 files changed, 78 insertions(+), 26 deletions(-) -- 2.33.0

5 23

[linuxarm] [PATCH v2] RDMA/hns: Add new mmap implementation
by Chengchang Tang 22 Sep '21

22 Sep '21

Add new implementation for mmap by using the new mmap entry API. Subsequent new features will use this new implementation. The old mmap which use a hard-corded offset will not be further expanded. And forward compatibility is also guaranteed in this patch. Signed-off-by: Chengchang Tang <tangchengchang(a)huawei.com> --- drivers/infiniband/hw/hns/hns_roce_device.h | 21 ++++ drivers/infiniband/hw/hns/hns_roce_main.c | 144 +++++++++++++++++++++++++++- include/uapi/rdma/hns-abi.h | 21 +++- 3 files changed, 181 insertions(+), 5 deletions(-) diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h index 9467c39..ca45694 100644 --- a/drivers/infiniband/hw/hns/hns_roce_device.h +++ b/drivers/infiniband/hw/hns/hns_roce_device.h @@ -225,11 +225,23 @@ struct hns_roce_uar { unsigned long logic_idx; }; +struct hns_user_mmap_entry { + struct rdma_user_mmap_entry rdma_entry; + u64 address; + u8 mmap_flag; +}; + +enum hns_roce_mmap_type { + HNS_ROCE_MMAP_TYPE_DB = 1, +}; + struct hns_roce_ucontext { struct ib_ucontext ibucontext; struct hns_roce_uar uar; struct list_head page_list; struct mutex page_mutex; + bool mmap_key_support; + struct rdma_user_mmap_entry *db_mmap_entry; }; struct hns_roce_pd { @@ -1049,6 +1061,12 @@ static inline struct hns_roce_srq *to_hr_srq(struct ib_srq *ibsrq) return container_of(ibsrq, struct hns_roce_srq, ibsrq); } +static inline struct hns_user_mmap_entry *to_hns_mmap( + struct rdma_user_mmap_entry *rdma_entry) +{ + return container_of(rdma_entry, struct hns_user_mmap_entry, rdma_entry); +} + static inline void hns_roce_write64_k(__le32 val[2], void __iomem *dest) { writeq(*(u64 *)val, dest); @@ -1259,4 +1277,7 @@ int hns_roce_init(struct hns_roce_dev *hr_dev); void hns_roce_exit(struct hns_roce_dev *hr_dev); int hns_roce_fill_res_cq_entry(struct sk_buff *msg, struct ib_cq *ib_cq); +struct rdma_user_mmap_entry *hns_roce_user_mmap_entry_insert( + struct ib_ucontext *ucontext, u64 address, + size_t length, u8 mmap_flag); #endif /* _HNS_ROCE_DEVICE_H */ diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c index 5d39bd0..b8be8b7 100644 --- a/drivers/infiniband/hw/hns/hns_roce_main.c +++ b/drivers/infiniband/hw/hns/hns_roce_main.c @@ -291,6 +291,80 @@ static int hns_roce_modify_device(struct ib_device *ib_dev, int mask, return 0; } +struct rdma_user_mmap_entry *hns_roce_user_mmap_entry_insert( + struct ib_ucontext *ucontext, u64 address, + size_t length, u8 mmap_flag) +{ + struct hns_user_mmap_entry *entry; + int ret; + + entry = kzalloc(sizeof(*entry), GFP_KERNEL); + if (!entry) + return NULL; + + entry->address = address; + entry->mmap_flag = mmap_flag; + + ret = rdma_user_mmap_entry_insert(ucontext, &entry->rdma_entry, + length); + if (ret) { + kfree(entry); + return NULL; + } + + return &entry->rdma_entry; +} + +static void hns_roce_dealloc_uar_entry(struct hns_roce_ucontext *context) +{ + rdma_user_mmap_entry_remove(context->db_mmap_entry); +} + +static int hns_roce_alloc_uar_entry(struct ib_ucontext *uctx) +{ + struct hns_roce_ucontext *context = to_hr_ucontext(uctx); + u64 address; + + if (!context->mmap_key_support) + return 0; + + address = context->uar.pfn << PAGE_SHIFT; + context->db_mmap_entry = + hns_roce_user_mmap_entry_insert(uctx, address, PAGE_SIZE, + HNS_ROCE_MMAP_TYPE_DB); + if (!context->db_mmap_entry) + return -ENOMEM; + + return 0; +} + +static void get_ucontext_config(struct hns_roce_ucontext *context, + struct hns_roce_ib_alloc_ucontext *ucmd) +{ + struct hns_roce_dev *hr_dev = to_hr_dev(context->ibucontext.device); + + if (ucmd->comp & HNS_ROCE_ALLOC_UCTX_COMP_CONFIG && hr_dev->hw_rev != + HNS_ROCE_HW_VER1) + context->mmap_key_support = !!(ucmd->config & + HNS_ROCE_UCTX_REQ_EN_MMAP_KEY); +} + +static void ucontext_set_resp(struct ib_ucontext *uctx, + struct hns_roce_ib_alloc_ucontext_resp *resp) +{ + struct hns_roce_ucontext *context = to_hr_ucontext(uctx); + struct hns_roce_dev *hr_dev = to_hr_dev(uctx->device); + + resp->qp_tab_size = hr_dev->caps.num_qps; + resp->cqe_size = hr_dev->caps.cqe_sz; + resp->srq_tab_size = hr_dev->caps.num_srqs; + if (context->mmap_key_support) { + resp->config |= HNS_ROCE_UCTX_RESP_MMAP_KEY_EN; + resp->db_mmap_key = + rdma_user_mmap_get_offset(context->db_mmap_entry); + } +} + static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, struct ib_udata *udata) { @@ -298,24 +372,35 @@ static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, struct hns_roce_ucontext *context = to_hr_ucontext(uctx); struct hns_roce_ib_alloc_ucontext_resp resp = {}; struct hns_roce_dev *hr_dev = to_hr_dev(uctx->device); + struct hns_roce_ib_alloc_ucontext ucmd = {}; if (!hr_dev->active) return -EAGAIN; - resp.qp_tab_size = hr_dev->caps.num_qps; - resp.srq_tab_size = hr_dev->caps.num_srqs; + if (udata->inlen) { + ret = ib_copy_from_udata(&ucmd, udata, + min(udata->inlen, sizeof(ucmd))); + if (ret) + return ret; + } + + get_ucontext_config(context, &ucmd); ret = hns_roce_uar_alloc(hr_dev, &context->uar); if (ret) goto error_fail_uar_alloc; + ret = hns_roce_alloc_uar_entry(uctx); + if (ret) + goto error_fail_uar_entry; + if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_CQ_RECORD_DB || hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_QP_RECORD_DB) { INIT_LIST_HEAD(&context->page_list); mutex_init(&context->page_mutex); } - resp.cqe_size = hr_dev->caps.cqe_sz; + ucontext_set_resp(uctx, &resp); ret = ib_copy_to_udata(udata, &resp, min(udata->outlen, sizeof(resp))); @@ -325,6 +410,9 @@ static int hns_roce_alloc_ucontext(struct ib_ucontext *uctx, return 0; error_fail_copy_to_udata: + hns_roce_dealloc_uar_entry(context); + +error_fail_uar_entry: ida_free(&hr_dev->uar_ida.ida, (int)context->uar.logic_idx); error_fail_uar_alloc: @@ -336,10 +424,12 @@ static void hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext) struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext); struct hns_roce_dev *hr_dev = to_hr_dev(ibcontext->device); + hns_roce_dealloc_uar_entry(context); + ida_free(&hr_dev->uar_ida.ida, (int)context->uar.logic_idx); } -static int hns_roce_mmap(struct ib_ucontext *context, +static int hns_roce_legacy_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) { struct hns_roce_dev *hr_dev = to_hr_dev(context->device); @@ -371,6 +461,51 @@ static int hns_roce_mmap(struct ib_ucontext *context, } } +static int hns_roce_mmap(struct ib_ucontext *uctx, struct vm_area_struct *vma) +{ + struct hns_roce_ucontext *context = to_hr_ucontext(uctx); + struct hns_roce_dev *hr_dev = to_hr_dev(uctx->device); + struct ib_device *ibdev = &hr_dev->ib_dev; + struct rdma_user_mmap_entry *rdma_entry; + struct hns_user_mmap_entry *entry; + phys_addr_t pfn; + pgprot_t prot; + int ret; + + if (!context->mmap_key_support) + return hns_roce_legacy_mmap(uctx, vma); + + rdma_entry = rdma_user_mmap_entry_get_pgoff(uctx, vma->vm_pgoff); + if (!rdma_entry) { + ibdev_err(ibdev, "pgoff[%lu] is invalid entry.\n", + vma->vm_pgoff); + return -EINVAL; + } + + entry = to_hns_mmap(rdma_entry); + pfn = entry->address >> PAGE_SHIFT; + prot = vma->vm_page_prot; + switch (entry->mmap_flag) { + case HNS_ROCE_MMAP_TYPE_DB: + ret = rdma_user_mmap_io(uctx, vma, pfn, + rdma_entry->npages * PAGE_SIZE, + pgprot_noncached(prot), rdma_entry); + break; + default: + ret = -EINVAL; + } + + rdma_user_mmap_entry_put(rdma_entry); + return ret; +} + +static void hns_roce_free_mmap(struct rdma_user_mmap_entry *rdma_entry) +{ + struct hns_user_mmap_entry *entry = to_hns_mmap(rdma_entry); + + kfree(entry); +} + static int hns_roce_port_immutable(struct ib_device *ib_dev, u32 port_num, struct ib_port_immutable *immutable) { @@ -444,6 +579,7 @@ static const struct ib_device_ops hns_roce_dev_ops = { .get_link_layer = hns_roce_get_link_layer, .get_port_immutable = hns_roce_port_immutable, .mmap = hns_roce_mmap, + .mmap_free = hns_roce_free_mmap, .modify_device = hns_roce_modify_device, .modify_qp = hns_roce_modify_qp, .query_ah = hns_roce_query_ah, diff --git a/include/uapi/rdma/hns-abi.h b/include/uapi/rdma/hns-abi.h index 42b1776..bb9a02d 100644 --- a/include/uapi/rdma/hns-abi.h +++ b/include/uapi/rdma/hns-abi.h @@ -83,11 +83,30 @@ struct hns_roce_ib_create_qp_resp { __aligned_u64 cap_flags; }; +enum hns_roce_alloc_uctx_comp_flag { + HNS_ROCE_ALLOC_UCTX_COMP_CONFIG = 1 << 0, +}; + +enum hns_roce_alloc_uctx_resp_config { + HNS_ROCE_UCTX_RESP_MMAP_KEY_EN = 1 << 0, +}; + +enum hns_roce_alloc_uctx_req_config { + HNS_ROCE_UCTX_REQ_EN_MMAP_KEY = 1 << 0, +}; + +struct hns_roce_ib_alloc_ucontext { + __u32 comp; + __u32 config; +}; + struct hns_roce_ib_alloc_ucontext_resp { __u32 qp_tab_size; __u32 cqe_size; __u32 srq_tab_size; - __u32 reserved; + __u8 config; + __u8 rsv[3]; + __aligned_u64 db_mmap_key; }; struct hns_roce_ib_alloc_pd_resp { -- 2.9.5

2 2

[linuxarm] [PATCH v2] libhns: Add a new mmap mode
by Chengchang Tang 18 Sep '21

18 Sep '21

Add a new mmap mode support for hns. All the subsequent new features will be completed in a similar implementation of mmap. In the new mmap mode, the user space driver use the offset sent by kernel space driver to complete the mmap instead of a hard-coded offset. Forward compatibility is guaranteed in this patch. Signed-off-by: Chengchang Tang <tangchengchang(a)huawei.com> --- kernel-headers/rdma/hns-abi.h | 21 +++++++++- providers/hns/hns_roce_u.c | 87 ++++++++++++++++++++++++++++++------------ providers/hns/hns_roce_u.h | 1 + providers/hns/hns_roce_u_abi.h | 2 +- 4 files changed, 85 insertions(+), 26 deletions(-) diff --git a/kernel-headers/rdma/hns-abi.h b/kernel-headers/rdma/hns-abi.h index 42b1776..bb9a02d 100644 --- a/kernel-headers/rdma/hns-abi.h +++ b/kernel-headers/rdma/hns-abi.h @@ -83,11 +83,30 @@ struct hns_roce_ib_create_qp_resp { __aligned_u64 cap_flags; }; +enum hns_roce_alloc_uctx_comp_flag { + HNS_ROCE_ALLOC_UCTX_COMP_CONFIG = 1 << 0, +}; + +enum hns_roce_alloc_uctx_resp_config { + HNS_ROCE_UCTX_RESP_MMAP_KEY_EN = 1 << 0, +}; + +enum hns_roce_alloc_uctx_req_config { + HNS_ROCE_UCTX_REQ_EN_MMAP_KEY = 1 << 0, +}; + +struct hns_roce_ib_alloc_ucontext { + __u32 comp; + __u32 config; +}; + struct hns_roce_ib_alloc_ucontext_resp { __u32 qp_tab_size; __u32 cqe_size; __u32 srq_tab_size; - __u32 reserved; + __u8 config; + __u8 rsv[3]; + __aligned_u64 db_mmap_key; }; struct hns_roce_ib_alloc_pd_resp { diff --git a/providers/hns/hns_roce_u.c b/providers/hns/hns_roce_u.c index 3b31ad3..02ac181 100644 --- a/providers/hns/hns_roce_u.c +++ b/providers/hns/hns_roce_u.c @@ -95,16 +95,67 @@ static const struct verbs_context_ops hns_common_ops = { .get_srq_num = hns_roce_u_get_srq_num, }; +static int hns_roce_mmap(struct hns_roce_device *hr_dev, + struct hns_roce_context *context, int cmd_fd, + uint64_t db_mmap_key) +{ + int page_size = hr_dev->page_size; + + context->uar = mmap(NULL, page_size, PROT_READ | PROT_WRITE, + MAP_SHARED, cmd_fd, db_mmap_key); + if (context->uar == MAP_FAILED) + return -EINVAL; + + return 0; +} + +static int hns_roce_legacy_mmap(struct hns_roce_device *hr_dev, + struct hns_roce_context *context, int cmd_fd) +{ + int offset = 0; + + context->uar = mmap(NULL, hr_dev->page_size, PROT_READ | PROT_WRITE, + MAP_SHARED, cmd_fd, offset); + if (context->uar == MAP_FAILED) + return -EINVAL; + + offset += hr_dev->page_size; + + if (hr_dev->hw_version == HNS_ROCE_HW_VER1) { + /* + * when vma->vm_pgoff is 1, the cq_tptr_base includes 64K CQ, + * a pointer of CQ need 2B size + */ + context->cq_tptr_base = mmap(NULL, HNS_ROCE_CQ_DB_BUF_SIZE, + PROT_READ | PROT_WRITE, MAP_SHARED, + cmd_fd, offset); + if (context->cq_tptr_base == MAP_FAILED) + goto db_free; + } + return 0; + +db_free: + munmap(context->uar, hr_dev->page_size); + context->uar = NULL; + return -EINVAL; +} + +static void ucontext_set_cmd(struct hns_roce_alloc_ucontext *cmd) +{ + cmd->comp = HNS_ROCE_ALLOC_UCTX_COMP_CONFIG; + cmd->config = HNS_ROCE_UCTX_REQ_EN_MMAP_KEY; +} + static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev, int cmd_fd, void *private_data) { struct hns_roce_device *hr_dev = to_hr_dev(ibdev); struct hns_roce_alloc_ucontext_resp resp = {}; + struct hns_roce_alloc_ucontext cmd = {}; struct ibv_device_attr dev_attrs; struct hns_roce_context *context; - struct ibv_get_context cmd; - int offset = 0; + int ret; int i; context = verbs_init_and_alloc_context(ibdev, cmd_fd, context, ibv_ctx, @@ -112,10 +163,14 @@ static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev, if (!context) return NULL; - if (ibv_cmd_get_context(&context->ibv_ctx, &cmd, sizeof(cmd), + ucontext_set_cmd(&cmd); + if (ibv_cmd_get_context(&context->ibv_ctx, &cmd.ibv_cmd, sizeof(cmd), &resp.ibv_resp, sizeof(resp))) goto err_free; + context->mmap_key_support = !!(resp.config & + HNS_ROCE_UCTX_RESP_MMAP_KEY_EN); + if (!resp.cqe_size) context->cqe_size = HNS_ROCE_CQE_SIZE; else if (resp.cqe_size <= HNS_ROCE_V3_CQE_SIZE) @@ -153,26 +208,14 @@ static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev, context->max_cqe = dev_attrs.max_cqe; context->max_srq_wr = dev_attrs.max_srq_wr; context->max_srq_sge = dev_attrs.max_srq_sge; + if (context->mmap_key_support) + ret = hns_roce_mmap(hr_dev, context, cmd_fd, resp.db_mmap_key); + else + ret = hns_roce_legacy_mmap(hr_dev, context, cmd_fd); - context->uar = mmap(NULL, hr_dev->page_size, PROT_READ | PROT_WRITE, - MAP_SHARED, cmd_fd, offset); - if (context->uar == MAP_FAILED) + if (ret) goto err_free; - offset += hr_dev->page_size; - - if (hr_dev->hw_version == HNS_ROCE_HW_VER1) { - /* - * when vma->vm_pgoff is 1, the cq_tptr_base includes 64K CQ, - * a pointer of CQ need 2B size - */ - context->cq_tptr_base = mmap(NULL, HNS_ROCE_CQ_DB_BUF_SIZE, - PROT_READ | PROT_WRITE, MAP_SHARED, - cmd_fd, offset); - if (context->cq_tptr_base == MAP_FAILED) - goto db_free; - } - pthread_spin_init(&context->uar_lock, PTHREAD_PROCESS_PRIVATE); verbs_set_ops(&context->ibv_ctx, &hns_common_ops); @@ -180,10 +223,6 @@ static struct verbs_context *hns_roce_alloc_context(struct ibv_device *ibdev, return &context->ibv_ctx; -db_free: - munmap(context->uar, hr_dev->page_size); - context->uar = NULL; - err_free: verbs_uninit_context(&context->ibv_ctx); free(context); diff --git a/providers/hns/hns_roce_u.h b/providers/hns/hns_roce_u.h index 0d7abd8..126c9d3 100644 --- a/providers/hns/hns_roce_u.h +++ b/providers/hns/hns_roce_u.h @@ -180,6 +180,7 @@ struct hns_roce_context { unsigned int max_srq_sge; int max_cqe; unsigned int cqe_size; + bool mmap_key_support; }; struct hns_roce_pd { diff --git a/providers/hns/hns_roce_u_abi.h b/providers/hns/hns_roce_u_abi.h index e56f9d3..295808b 100644 --- a/providers/hns/hns_roce_u_abi.h +++ b/providers/hns/hns_roce_u_abi.h @@ -42,7 +42,7 @@ DECLARE_DRV_CMD(hns_roce_alloc_pd, IB_USER_VERBS_CMD_ALLOC_PD, DECLARE_DRV_CMD(hns_roce_create_cq, IB_USER_VERBS_CMD_CREATE_CQ, hns_roce_ib_create_cq, hns_roce_ib_create_cq_resp); DECLARE_DRV_CMD(hns_roce_alloc_ucontext, IB_USER_VERBS_CMD_GET_CONTEXT, - empty, hns_roce_ib_alloc_ucontext_resp); + hns_roce_ib_alloc_ucontext, hns_roce_ib_alloc_ucontext_resp); DECLARE_DRV_CMD(hns_roce_create_qp, IB_USER_VERBS_CMD_CREATE_QP, hns_roce_ib_create_qp, hns_roce_ib_create_qp_resp); -- 2.9.5

1 0

[linuxarm] [PATCH 0/1] RDMA/hns: Add new mmap implementation
by Chengchang Tang 17 Sep '21

17 Sep '21

This patch add a new mmap implementaion for hns, subsequent new mmap types will be implemented using this method. Chengchang Tang (1): RDMA/hns: Add new mmap implementation drivers/infiniband/hw/hns/hns_roce_device.h | 21 ++++ drivers/infiniband/hw/hns/hns_roce_main.c | 144 +++++++++++++++++++++++++++- include/uapi/rdma/hns-abi.h | 21 +++- 3 files changed, 181 insertions(+), 5 deletions(-) -- 2.9.5

2 3

[linuxarm] [PATCH ofed-dev 0/1] Add new mmap mode
by Chengchang Tang 16 Sep '21

16 Sep '21

This patch add new mmap mode for libhns, and subsequent new features which need add mmap types will be implemented using this mmap mode. Chengchang Tang (1): libhns: Add a new mmap mode kernel-headers/rdma/hns-abi.h | 21 ++++++++++- providers/hns/hns_roce_u.c | 86 ++++++++++++++++++++++++++++++------------ providers/hns/hns_roce_u.h | 1 + providers/hns/hns_roce_u_abi.h | 2 +- 4 files changed, 84 insertions(+), 26 deletions(-) -- 2.9.5

1 3

[RFC PATCH net-next] net: hns3: add dql info when tx timeout
by Yufeng Mo 16 Sep '21

16 Sep '21

When tx timeout occurs, the info of dql maybe helpful, so print these info to hns3_get_tx_timeo_queue_info(). Signed-off-by: Yufeng Mo <moyufeng(a)huawei.com> --- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index 22af3d6ce178..d590f920ffee 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -2677,6 +2677,13 @@ static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev) if (netif_xmit_stopped(q) && time_after(jiffies, (trans_start + ndev->watchdog_timeo))) { +#ifdef CONFIG_BQL + struct dql *dql = &q->dql; + + netdev_info(ndev, "DQL info last_cnt: %u, queued: %u, adj_limit: %u, completed: %u\n", + dql->last_obj_cnt, dql->num_queued, + dql->adj_limit, dql->num_completed); +#endif timeout_queue = i; netdev_info(ndev, "queue state: 0x%lx, delta msecs: %u\n", q->state, -- 2.33.0

1 0

[PATCH V3 net-next 0/4] ethtool: extend coalesce uAPI
by Yufeng Mo 15 Sep '21

15 Sep '21

In order to support some configuration in coalesce uAPI, this series extend coalesce uAPI and add support for CQE mode. Below is some test result with HNS3 driver: 1. old ethtool(ioctl) + new kernel: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: 0 sample-interval: 0 pkt-rate-low: 0 pkt-rate-high: 0 rx-usecs: 20 rx-frames: 0 rx-usecs-irq: 0 rx-frames-irq: 0 tx-usecs: 20 tx-frames: 0 tx-usecs-irq: 0 tx-frames-irq: 0 rx-usecs-low: 0 rx-frame-low: 0 tx-usecs-low: 0 tx-frame-low: 0 rx-usecs-high: 0 rx-frame-high: 0 tx-usecs-high: 0 tx-frame-high: 0 2. ethtool(netlink with cqe mode) + kernel without cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: n/a TX: n/a 3. ethool(netlink with cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: off TX: off 4. ethool(netlink without cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a Change log: V2 -> V3: fix some warning on W=1 builds in #2 V1 -> V2: 1. fix compile error using allmodconfig in #2 2. move some property-related modifications from #2 to #1 for better review suggested by Jakub Kicinski. Change log from RFC: V3 -> V4: add document explaining the difference between CQE and EQE in #1 suggested by Jakub Kicinski. V2 -> V3: 1. split #1 into adding new parameter and adding new attributes. 2. use NLA_POLICY_MAX(NLA_U8, 1) instead of NLA_U8. 3. modify the description of CQE in Document. V1 -> V2: refactor #1&#2 in V1 suggestted by Jakub Kicinski. Yufeng Mo (4): ethtool: add two coalesce attributes for CQE mode ethtool: extend coalesce setting uAPI with CQE mode net: hns3: add support for EQE/CQE mode configuration net: hns3: add ethtool support for CQE/EQE mode configuration Documentation/networking/ethtool-netlink.rst | 15 +++++++ drivers/infiniband/ulp/ipoib/ipoib_ethtool.c | 8 +++- drivers/net/ethernet/amazon/ena/ena_ethtool.c | 8 +++- drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c | 8 +++- .../net/ethernet/aquantia/atlantic/aq_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bcmsysport.c | 8 +++- drivers/net/ethernet/broadcom/bnx2.c | 12 ++++-- .../net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/genet/bcmgenet.c | 8 +++- drivers/net/ethernet/broadcom/tg3.c | 10 ++++- drivers/net/ethernet/brocade/bna/bnad_ethtool.c | 12 ++++-- drivers/net/ethernet/cavium/liquidio/lio_ethtool.c | 8 +++- .../net/ethernet/cavium/thunder/nicvf_ethtool.c | 4 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 8 +++- drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c | 8 +++- drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c | 8 +++- .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 8 +++- drivers/net/ethernet/cisco/enic/enic_ethtool.c | 8 +++- drivers/net/ethernet/cortina/gemini.c | 8 +++- drivers/net/ethernet/emulex/benet/be_ethtool.c | 8 +++- drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c | 8 +++- .../net/ethernet/freescale/enetc/enetc_ethtool.c | 8 +++- drivers/net/ethernet/freescale/fec_main.c | 14 ++++--- drivers/net/ethernet/freescale/gianfar_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hip04_eth.c | 8 +++- drivers/net/ethernet/hisilicon/hns/hns_ethtool.c | 12 +++++- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 49 +++++++++++++++++++++- drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | 11 +++++ drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c | 26 ++++++++++-- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 1 + .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 1 + drivers/net/ethernet/huawei/hinic/hinic_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000/e1000_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000e/ethtool.c | 8 +++- drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c | 8 +++- drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 12 +++++- drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 12 +++++- drivers/net/ethernet/intel/ice/ice_ethtool.c | 12 ++++-- drivers/net/ethernet/intel/igb/igb_ethtool.c | 8 +++- drivers/net/ethernet/intel/igbvf/ethtool.c | 8 +++- drivers/net/ethernet/intel/igc/igc_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbevf/ethtool.c | 8 +++- drivers/net/ethernet/jme.c | 12 ++++-- drivers/net/ethernet/marvell/mv643xx_eth.c | 12 ++++-- drivers/net/ethernet/marvell/mvneta.c | 14 +++++-- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 14 +++++-- .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 8 +++- drivers/net/ethernet/marvell/skge.c | 8 +++- drivers/net/ethernet/marvell/sky2.c | 8 +++- drivers/net/ethernet/mellanox/mlx4/en_ethtool.c | 8 +++- .../net/ethernet/mellanox/mlx5/core/en_ethtool.c | 8 +++- drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 8 +++- .../ethernet/mellanox/mlx5/core/ipoib/ethtool.c | 8 +++- drivers/net/ethernet/myricom/myri10ge/myri10ge.c | 12 ++++-- .../net/ethernet/netronome/nfp/nfp_net_ethtool.c | 8 +++- drivers/net/ethernet/ni/nixge.c | 14 +++++-- .../net/ethernet/pensando/ionic/ionic_ethtool.c | 8 +++- .../ethernet/qlogic/netxen/netxen_nic_ethtool.c | 8 +++- drivers/net/ethernet/qlogic/qede/qede.h | 4 +- drivers/net/ethernet/qlogic/qede/qede_ethtool.c | 8 +++- .../net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c | 8 +++- drivers/net/ethernet/realtek/r8169_main.c | 10 ++++- drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c | 8 +++- drivers/net/ethernet/sfc/ethtool.c | 8 +++- drivers/net/ethernet/sfc/falcon/ethtool.c | 8 +++- drivers/net/ethernet/socionext/netsec.c | 10 +++-- .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 8 +++- drivers/net/ethernet/synopsys/dwc-xlgmac-ethtool.c | 14 +++++-- drivers/net/ethernet/tehuti/tehuti.c | 12 ++++-- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_ethtool.c | 8 +++- drivers/net/ethernet/ti/cpsw_new.c | 2 +- drivers/net/ethernet/ti/cpsw_priv.h | 8 +++- drivers/net/ethernet/ti/davinci_emac.c | 14 +++++-- drivers/net/ethernet/via/via-velocity.c | 8 +++- drivers/net/ethernet/xilinx/ll_temac_main.c | 14 +++++-- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 18 ++++++-- drivers/net/netdevsim/ethtool.c | 8 +++- drivers/net/tun.c | 8 +++- drivers/net/usb/r8152.c | 8 +++- drivers/net/virtio_net.c | 8 +++- drivers/net/vmxnet3/vmxnet3_ethtool.c | 12 ++++-- drivers/net/wireless/ath/wil6210/ethtool.c | 14 +++++-- drivers/s390/net/qeth_ethtool.c | 4 +- drivers/staging/qlge/qlge_ethtool.c | 10 ++++- include/linux/ethtool.h | 22 ++++++++-- include/uapi/linux/ethtool_netlink.h | 2 + net/ethtool/coalesce.c | 29 ++++++++++--- net/ethtool/ioctl.c | 15 +++++-- net/ethtool/netlink.h | 2 +- 93 files changed, 699 insertions(+), 209 deletions(-) -- 2.8.1

6 11

[PATCH V2 ethtool-next] netlink: settings: add netlink support for coalesce cqe mode parameter
by Yufeng Mo 13 Sep '21

13 Sep '21

Add support for "ethtool -C <dev> cqe-mode-rx/cqe-mode-tx on/off" for setting coalesce cqe mode. Signed-off-by: Yufeng Mo <moyufeng(a)huawei.com> --- ChangeLogs: V1 -> V2: 1. update the man page for new paremeters cqe-mode-rx/cqe-mode-tx. 2. add '\n' in coalesce_reply_cb() after showing new paremeters. --- ethtool.8.in | 2 ++ ethtool.c | 2 ++ netlink/coalesce.c | 16 ++++++++++++++++ 3 files changed, 20 insertions(+) diff --git a/ethtool.8.in b/ethtool.8.in index f83d6d1..c187c32 100644 --- a/ethtool.8.in +++ b/ethtool.8.in @@ -186,6 +186,8 @@ ethtool \- query or control network driver and hardware settings .BN tx\-usecs\-high .BN tx\-frames\-high .BN sample\-interval +.B2 cqe\-mode\-rx on off +.B2 cqe\-mode\-tx on off .HP .B ethtool \-g|\-\-show\-ring .I devname diff --git a/ethtool.c b/ethtool.c index 2486caa..a6826e9 100644 --- a/ethtool.c +++ b/ethtool.c @@ -5703,6 +5703,8 @@ static const struct option args[] = { " [tx-usecs-high N]\n" " [tx-frames-high N]\n" " [sample-interval N]\n" + " [cqe-mode-rx on|off]\n" + " [cqe-mode-tx on|off]\n" }, { .opts = "-g|--show-ring", diff --git a/netlink/coalesce.c b/netlink/coalesce.c index 75922a9..15037c2 100644 --- a/netlink/coalesce.c +++ b/netlink/coalesce.c @@ -66,6 +66,10 @@ int coalesce_reply_cb(const struct nlmsghdr *nlhdr, void *data) show_u32(tb[ETHTOOL_A_COALESCE_TX_USECS_HIGH], "tx-usecs-high: "); show_u32(tb[ETHTOOL_A_COALESCE_TX_MAX_FRAMES_HIGH], "tx-frame-high: "); putchar('\n'); + show_bool("rx", "CQE mode RX: %s ", + tb[ETHTOOL_A_COALESCE_USE_CQE_MODE_RX]); + show_bool("tx", "TX: %s\n", tb[ETHTOOL_A_COALESCE_USE_CQE_MODE_TX]); + putchar('\n'); return MNL_CB_OK; } @@ -226,6 +230,18 @@ static const struct param_parser scoalesce_params[] = { .handler = nl_parse_direct_u32, .min_argc = 1, }, + { + .arg = "cqe-mode-rx", + .type = ETHTOOL_A_COALESCE_USE_CQE_MODE_RX, + .handler = nl_parse_u8bool, + .min_argc = 1, + }, + { + .arg = "cqe-mode-tx", + .type = ETHTOOL_A_COALESCE_USE_CQE_MODE_TX, + .handler = nl_parse_u8bool, + .min_argc = 1, + }, {} }; -- 2.8.1

3 2

I just want to inform you
by Godwin Pete 08 Sep '21

08 Sep '21

Hi, I just want to use this little opportunity to inform you about my success towards the transfer. I'm currently out of the country for an investment with part of my share, after completing the transfer with an Indian business man. But i will visit your country, next year. After the completion of my project. Please, contact my secretary to send you the (ATM) card which I've already credited with the sum of ($500,000.00). Just contact her to help you in receiving the (ATM) card. I've explained everything to her before my trip. This is what I can do for you because, you couldn't help in the transfer, but for the fact that you're the person whom I've contacted initially, for the transfer. I decided to give this ($500,000.00) as a compensation for being contacted initially for the transfer. I always try to make the difference, in dealing with people any time I come in contact with them. I'm also trying to show that I'm quite a different person from others whose may have a different purpose within them. I believe that you will render some help to me when I, will visit your country, for another investment there. So contact my secretary for the card, Her contact are as follows, Full name: Mrs, Jovita Dumuije, Country: Burkina Faso Email: jovitadumuije(a)gmail.com Thanks, and hope for a good corporation with you in future. Godwin Peter,

1 0

[PATCH net] net: hns3: add option to turn off page pool feature
by Yunsheng Lin 06 Sep '21

06 Sep '21

When page pool is added to the hns3 driver, it is always enabled unconditionally, which means spilt page handling in the hns3 driver is dead code. As there is a requirement to test the performance between spilt page handling in driver and page pool, so add a module param to support disabling the page pool. When the page pool is proved to be perform better in most case, the spilt page handling in driver can be removed. Fixes: 93188e9642c3 ("net: hns3: support skb's frag page recycling based on page pool") Signed-off-by: Yunsheng Lin <linyunsheng(a)huawei.com> --- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index 22af3d6ce178..293243bbe407 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -61,6 +61,9 @@ static unsigned int tx_sgl = 1; module_param(tx_sgl, uint, 0600); MODULE_PARM_DESC(tx_sgl, "Minimum number of frags when using dma_map_sg() to optimize the IOMMU mapping"); +static bool page_pool_enabled = true; +module_param(page_pool_enabled, bool, 0400); + #define HNS3_SGL_SIZE(nfrag) (sizeof(struct scatterlist) * (nfrag) + \ sizeof(struct sg_table)) #define HNS3_MAX_SGL_SIZE ALIGN(HNS3_SGL_SIZE(HNS3_MAX_TSO_BD_NUM), \ @@ -4753,7 +4756,8 @@ static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring) goto out_with_desc_cb; if (!HNAE3_IS_TX_RING(ring)) { - hns3_alloc_page_pool(ring); + if (page_pool_enabled) + hns3_alloc_page_pool(ring); ret = hns3_alloc_ring_buffers(ring); if (ret) -- 2.33.0

1 0

[PATCH net-next] tcp: add tcp_tx_skb_cache_key checking in sk_stream_alloc_skb()
by Yunsheng Lin 02 Sep '21

02 Sep '21

Since tcp_tx_skb_cache is disabled by default in: commit 0b7d7f6b2208 ("tcp: add tcp_tx_skb_cache sysctl") Add tcp_tx_skb_cache_key checking in sk_stream_alloc_skb() to avoid possible branch-misses. Signed-off-by: Yunsheng Lin <linyunsheng(a)huawei.com> --- Also, the sk->sk_tx_skb_cache may be both changed by allocation and freeing side, I assume there may be some implicit protection here too, such as the NAPI protection for rx? --- net/ipv4/tcp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c index e8b48df..226ddef 100644 --- a/net/ipv4/tcp.c +++ b/net/ipv4/tcp.c @@ -866,7 +866,7 @@ struct sk_buff *sk_stream_alloc_skb(struct sock *sk, int size, gfp_t gfp, { struct sk_buff *skb; - if (likely(!size)) { + if (static_branch_unlikely(&tcp_tx_skb_cache_key) && likely(!size)) { skb = sk->sk_tx_skb_cache; if (skb) { skb->truesize = SKB_TRUESIZE(skb_end_offset(skb)); -- 2.7.4

3 10

[PATCH net-next 0/2] some optimization for page pool
by Yunsheng Lin 01 Sep '21

01 Sep '21

Patch 1: support non-split page when PP_FLAG_PAGE_FRAG is set. Patch 1: keep track of pp page when __skb_frag_ref() is called. Yunshene Lin (2): page_pool: support non-split page with PP_FLAG_PAGE_FRAG skbuff: keep track of pp page when __skb_frag_ref() is called include/linux/skbuff.h | 13 ++++++++++++- include/net/page_pool.h | 23 +++++++++++++++++++++++ net/core/page_pool.c | 24 +++++++++--------------- 3 files changed, 44 insertions(+), 16 deletions(-) -- 2.7.4

3 10

For your information
by Godwin Pete 30 Aug '21

30 Aug '21

Hi, I just want to use this little opportunity to inform you about my success towards the transfer. I'm currently out of the country for an investment with part of my share, after completing the transfer with an Indian business man. But i will visit your country, next year. After the completion of my project. Please, contact my secretary to send you the (ATM) card which I've already credited with the sum of ($500,000.00). Just contact her to help you in receiving the (ATM) card. I've explained everything to her before my trip. This is what I can do for you because, you couldn't help in the transfer, but for the fact that you're the person whom I've contacted initially, for the transfer. I decided to give this ($500,000.00) as a compensation for being contacted initially for the transfer. I always try to make the difference, in dealing with people any time I come in contact with them. I'm also trying to show that I'm quite a different person from others whose may have a different purpose within them. I believe that you will render some help to me when I, will visit your country, for another investment there. So contact my secretary for the card, Her contact are as follows, Full name: Mrs, Jovita Dumuije, Country: Burkina Faso Email: jovitadumuije(a)gmail.com Thanks, and hope for a good corporation with you in future. Godwin Peter,

1 0

[PATCH RESEND ethtool-next] netlink: settings: add netlink support for coalesce cqe mode parameter
by Yufeng Mo 30 Aug '21

30 Aug '21

Add support for "ethtool -c <dev> cqe-mode-rx/cqe-mode-tx on/off" for setting coalesce cqe mode. Signed-off-by: Yufeng Mo <moyufeng(a)huawei.com> --- ethtool.c | 2 ++ netlink/coalesce.c | 15 +++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/ethtool.c b/ethtool.c index 2486caa..a6826e9 100644 --- a/ethtool.c +++ b/ethtool.c @@ -5703,6 +5703,8 @@ static const struct option args[] = { " [tx-usecs-high N]\n" " [tx-frames-high N]\n" " [sample-interval N]\n" + " [cqe-mode-rx on|off]\n" + " [cqe-mode-tx on|off]\n" }, { .opts = "-g|--show-ring", diff --git a/netlink/coalesce.c b/netlink/coalesce.c index 75922a9..762d0e3 100644 --- a/netlink/coalesce.c +++ b/netlink/coalesce.c @@ -66,6 +66,9 @@ int coalesce_reply_cb(const struct nlmsghdr *nlhdr, void *data) show_u32(tb[ETHTOOL_A_COALESCE_TX_USECS_HIGH], "tx-usecs-high: "); show_u32(tb[ETHTOOL_A_COALESCE_TX_MAX_FRAMES_HIGH], "tx-frame-high: "); putchar('\n'); + show_bool("rx", "CQE mode RX: %s ", + tb[ETHTOOL_A_COALESCE_USE_CQE_MODE_RX]); + show_bool("tx", "TX: %s\n", tb[ETHTOOL_A_COALESCE_USE_CQE_MODE_TX]); return MNL_CB_OK; } @@ -226,6 +229,18 @@ static const struct param_parser scoalesce_params[] = { .handler = nl_parse_direct_u32, .min_argc = 1, }, + { + .arg = "cqe-mode-rx", + .type = ETHTOOL_A_COALESCE_USE_CQE_MODE_RX, + .handler = nl_parse_u8bool, + .min_argc = 1, + }, + { + .arg = "cqe-mode-tx", + .type = ETHTOOL_A_COALESCE_USE_CQE_MODE_TX, + .handler = nl_parse_u8bool, + .min_argc = 1, + }, {} }; -- 2.8.1

3 2

[PATCH kernel] netlink: settings: add netlink support for coalesce cqe mode parameter
by Yufeng Mo 27 Aug '21

27 Aug '21

Add support for "ethtool -c <dev> cqe-mode-rx/cqe-mode-tx on/off" for setting coalesce cqe mode. Signed-off-by: Yufeng Mo <moyufeng(a)huawei.com> --- ethtool.c | 2 ++ netlink/coalesce.c | 15 +++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/ethtool.c b/ethtool.c index 2486caa..a6826e9 100644 --- a/ethtool.c +++ b/ethtool.c @@ -5703,6 +5703,8 @@ static const struct option args[] = { " [tx-usecs-high N]\n" " [tx-frames-high N]\n" " [sample-interval N]\n" + " [cqe-mode-rx on|off]\n" + " [cqe-mode-tx on|off]\n" }, { .opts = "-g|--show-ring", diff --git a/netlink/coalesce.c b/netlink/coalesce.c index 75922a9..762d0e3 100644 --- a/netlink/coalesce.c +++ b/netlink/coalesce.c @@ -66,6 +66,9 @@ int coalesce_reply_cb(const struct nlmsghdr *nlhdr, void *data) show_u32(tb[ETHTOOL_A_COALESCE_TX_USECS_HIGH], "tx-usecs-high: "); show_u32(tb[ETHTOOL_A_COALESCE_TX_MAX_FRAMES_HIGH], "tx-frame-high: "); putchar('\n'); + show_bool("rx", "CQE mode RX: %s ", + tb[ETHTOOL_A_COALESCE_USE_CQE_MODE_RX]); + show_bool("tx", "TX: %s\n", tb[ETHTOOL_A_COALESCE_USE_CQE_MODE_TX]); return MNL_CB_OK; } @@ -226,6 +229,18 @@ static const struct param_parser scoalesce_params[] = { .handler = nl_parse_direct_u32, .min_argc = 1, }, + { + .arg = "cqe-mode-rx", + .type = ETHTOOL_A_COALESCE_USE_CQE_MODE_RX, + .handler = nl_parse_u8bool, + .min_argc = 1, + }, + { + .arg = "cqe-mode-tx", + .type = ETHTOOL_A_COALESCE_USE_CQE_MODE_TX, + .handler = nl_parse_u8bool, + .min_argc = 1, + }, {} }; -- 2.8.1

2 1

[PATCH kernel] netlink: settings: add netlink support for coalesce cqe mode parameter
by Yufeng Mo 27 Aug '21

27 Aug '21

Add support for "ethtool -c <dev> cqe-mode-rx/cqe-mode-tx on/off" for setting coalesce cqe mode. Signed-off-by: Yufeng Mo <moyufeng(a)huawei.com> --- ethtool.c | 2 ++ netlink/coalesce.c | 15 +++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/ethtool.c b/ethtool.c index 2486caa..a6826e9 100644 --- a/ethtool.c +++ b/ethtool.c @@ -5703,6 +5703,8 @@ static const struct option args[] = { " [tx-usecs-high N]\n" " [tx-frames-high N]\n" " [sample-interval N]\n" + " [cqe-mode-rx on|off]\n" + " [cqe-mode-tx on|off]\n" }, { .opts = "-g|--show-ring", diff --git a/netlink/coalesce.c b/netlink/coalesce.c index 75922a9..762d0e3 100644 --- a/netlink/coalesce.c +++ b/netlink/coalesce.c @@ -66,6 +66,9 @@ int coalesce_reply_cb(const struct nlmsghdr *nlhdr, void *data) show_u32(tb[ETHTOOL_A_COALESCE_TX_USECS_HIGH], "tx-usecs-high: "); show_u32(tb[ETHTOOL_A_COALESCE_TX_MAX_FRAMES_HIGH], "tx-frame-high: "); putchar('\n'); + show_bool("rx", "CQE mode RX: %s ", + tb[ETHTOOL_A_COALESCE_USE_CQE_MODE_RX]); + show_bool("tx", "TX: %s\n", tb[ETHTOOL_A_COALESCE_USE_CQE_MODE_TX]); return MNL_CB_OK; } @@ -226,6 +229,18 @@ static const struct param_parser scoalesce_params[] = { .handler = nl_parse_direct_u32, .min_argc = 1, }, + { + .arg = "cqe-mode-rx", + .type = ETHTOOL_A_COALESCE_USE_CQE_MODE_RX, + .handler = nl_parse_u8bool, + .min_argc = 1, + }, + { + .arg = "cqe-mode-tx", + .type = ETHTOOL_A_COALESCE_USE_CQE_MODE_TX, + .handler = nl_parse_u8bool, + .min_argc = 1, + }, {} }; -- 2.8.1

1 0

[PATCH net-next] sock: remove one redundant SKB_FRAG_PAGE_ORDER macro
by Yunsheng Lin 26 Aug '21

26 Aug '21

Both SKB_FRAG_PAGE_ORDER are defined to the same value in net/core/sock.c and drivers/vhost/net.c. Move the SKB_FRAG_PAGE_ORDER definition to net/core/sock.h, as both net/core/sock.c and drivers/vhost/net.c include it, and it seems a reasonable file to put the macro. Signed-off-by: Yunsheng Lin <linyunsheng(a)huawei.com> --- drivers/vhost/net.c | 2 -- include/net/sock.h | 1 + net/core/sock.c | 1 - 3 files changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/vhost/net.c b/drivers/vhost/net.c index 6414bd5..3a249ee 100644 --- a/drivers/vhost/net.c +++ b/drivers/vhost/net.c @@ -643,8 +643,6 @@ static bool tx_can_batch(struct vhost_virtqueue *vq, size_t total_len) !vhost_vq_avail_empty(vq->dev, vq); } -#define SKB_FRAG_PAGE_ORDER get_order(32768) - static bool vhost_net_page_frag_refill(struct vhost_net *net, unsigned int sz, struct page_frag *pfrag, gfp_t gfp) { diff --git a/include/net/sock.h b/include/net/sock.h index 95b2577..66a9a90 100644 --- a/include/net/sock.h +++ b/include/net/sock.h @@ -2717,6 +2717,7 @@ extern int sysctl_optmem_max; extern __u32 sysctl_wmem_default; extern __u32 sysctl_rmem_default; +#define SKB_FRAG_PAGE_ORDER get_order(32768) DECLARE_STATIC_KEY_FALSE(net_high_order_alloc_disable_key); static inline int sk_get_wmem0(const struct sock *sk, const struct proto *proto) diff --git a/net/core/sock.c b/net/core/sock.c index 950f1e7..62627e8 100644 --- a/net/core/sock.c +++ b/net/core/sock.c @@ -2574,7 +2574,6 @@ static void sk_leave_memory_pressure(struct sock *sk) } } -#define SKB_FRAG_PAGE_ORDER get_order(32768) DEFINE_STATIC_KEY_FALSE(net_high_order_alloc_disable_key); /** -- 2.7.4

3 2

[PATCH RFC 0/7] add socket to netdev page frag recycling support
by Yunsheng Lin 26 Aug '21

26 Aug '21

This patchset adds the socket to netdev page frag recycling support based on the busy polling and page pool infrastructure. The profermance improve from 30Gbit to 41Gbit for one thread iperf tcp flow, and the CPU usages decreases about 20% for four threads iperf flow with 100Gb line speed in IOMMU strict mode. The profermance improve about 2.5% for one thread iperf tcp flow in IOMMU passthrough mode. Yunsheng Lin (7): page_pool: refactor the page pool to support multi alloc context skbuff: add interface to manipulate frag count for tx recycling net: add NAPI api to register and retrieve the page pool ptr net: pfrag_pool: add pfrag pool support based on page pool sock: support refilling pfrag from pfrag_pool net: hns3: support tx recycling in the hns3 driver sysctl_tcp_use_pfrag_pool drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 32 +++++---- include/linux/netdevice.h | 9 +++ include/linux/skbuff.h | 43 +++++++++++- include/net/netns/ipv4.h | 1 + include/net/page_pool.h | 15 ++++ include/net/pfrag_pool.h | 24 +++++++ include/net/sock.h | 1 + net/core/Makefile | 1 + net/core/dev.c | 34 ++++++++- net/core/page_pool.c | 86 ++++++++++++----------- net/core/pfrag_pool.c | 92 +++++++++++++++++++++++++ net/core/sock.c | 12 ++++ net/ipv4/sysctl_net_ipv4.c | 7 ++ net/ipv4/tcp.c | 34 ++++++--- 14 files changed, 325 insertions(+), 66 deletions(-) create mode 100644 include/net/pfrag_pool.h create mode 100644 net/core/pfrag_pool.c -- 2.7.4

3 22

[PATCH 0/3] rasdaemon: Some little fixes and add some modules support
by Xiaofei Tan 20 Aug '21

20 Aug '21

Some little fixes and add some modules support. Xiaofei Tan (3): rasdaemon: Fix the issue of command option -r for hip08 rasdaemon: Fix some print format issues for hisi common error section rasdaemon: Add some modules supported by hisi common error section non-standard-hisi_hip08.c | 6 +++--- non-standard-hisilicon.c | 32 +++++++++++++++++++++----------- 2 files changed, 24 insertions(+), 14 deletions(-) -- 2.8.1

1 3

[PATCH V2 net-next 0/4] ethtool: extend coalesce uAPI
by Yufeng Mo 20 Aug '21

20 Aug '21

In order to support some configuration in coalesce uAPI, this series extend coalesce uAPI and add support for CQE mode. Below is some test result with HNS3 driver: 1. old ethtool(ioctl) + new kernel: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: 0 sample-interval: 0 pkt-rate-low: 0 pkt-rate-high: 0 rx-usecs: 20 rx-frames: 0 rx-usecs-irq: 0 rx-frames-irq: 0 tx-usecs: 20 tx-frames: 0 tx-usecs-irq: 0 tx-frames-irq: 0 rx-usecs-low: 0 rx-frame-low: 0 tx-usecs-low: 0 tx-frame-low: 0 rx-usecs-high: 0 rx-frame-high: 0 tx-usecs-high: 0 tx-frame-high: 0 2. ethtool(netlink with cqe mode) + kernel without cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: n/a TX: n/a 3. ethool(netlink with cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: off TX: off 4. ethool(netlink without cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a Change log: V1 -> V2: 1. fix compile error using allmodconfig in #2 2. move some property-related modifications from #2 to #1 for better review suggested by Jakub Kicinski. Change log from RFC: V3 -> V4: add document explaining the difference between CQE and EQE in #1 suggested by Jakub Kicinski. V2 -> V3: 1. split #1 into adding new parameter and adding new attributes. 2. use NLA_POLICY_MAX(NLA_U8, 1) instead of NLA_U8. 3. modify the description of CQE in Document. V1 -> V2: refactor #1&#2 in V1 suggestted by Jakub Kicinski. Yufeng Mo (4): ethtool: add two coalesce attributes for CQE mode ethtool: extend coalesce setting uAPI with CQE mode net: hns3: add support for EQE/CQE mode configuration net: hns3: add ethtool support for CQE/EQE mode configuration Documentation/networking/ethtool-netlink.rst | 15 +++++++ drivers/infiniband/ulp/ipoib/ipoib_ethtool.c | 8 +++- drivers/net/ethernet/amazon/ena/ena_ethtool.c | 8 +++- drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c | 8 +++- .../net/ethernet/aquantia/atlantic/aq_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bcmsysport.c | 8 +++- drivers/net/ethernet/broadcom/bnx2.c | 12 ++++-- .../net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/genet/bcmgenet.c | 8 +++- drivers/net/ethernet/broadcom/tg3.c | 10 ++++- drivers/net/ethernet/brocade/bna/bnad_ethtool.c | 12 ++++-- drivers/net/ethernet/cavium/liquidio/lio_ethtool.c | 8 +++- .../net/ethernet/cavium/thunder/nicvf_ethtool.c | 4 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 8 +++- drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c | 8 +++- drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c | 8 +++- .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 8 +++- drivers/net/ethernet/cisco/enic/enic_ethtool.c | 8 +++- drivers/net/ethernet/cortina/gemini.c | 8 +++- drivers/net/ethernet/emulex/benet/be_ethtool.c | 8 +++- drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c | 8 +++- .../net/ethernet/freescale/enetc/enetc_ethtool.c | 8 +++- drivers/net/ethernet/freescale/fec_main.c | 14 ++++--- drivers/net/ethernet/freescale/gianfar_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hip04_eth.c | 8 +++- drivers/net/ethernet/hisilicon/hns/hns_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 49 +++++++++++++++++++++- drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | 11 +++++ drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c | 26 ++++++++++-- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 1 + .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 1 + drivers/net/ethernet/huawei/hinic/hinic_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000/e1000_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000e/ethtool.c | 8 +++- drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c | 8 +++- drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 8 +++- drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 8 +++- drivers/net/ethernet/intel/ice/ice_ethtool.c | 12 ++++-- drivers/net/ethernet/intel/igb/igb_ethtool.c | 8 +++- drivers/net/ethernet/intel/igbvf/ethtool.c | 8 +++- drivers/net/ethernet/intel/igc/igc_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbevf/ethtool.c | 8 +++- drivers/net/ethernet/jme.c | 12 ++++-- drivers/net/ethernet/marvell/mv643xx_eth.c | 12 ++++-- drivers/net/ethernet/marvell/mvneta.c | 14 +++++-- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 14 +++++-- .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 8 +++- drivers/net/ethernet/marvell/skge.c | 8 +++- drivers/net/ethernet/marvell/sky2.c | 8 +++- drivers/net/ethernet/mellanox/mlx4/en_ethtool.c | 8 +++- .../net/ethernet/mellanox/mlx5/core/en_ethtool.c | 8 +++- drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 8 +++- .../ethernet/mellanox/mlx5/core/ipoib/ethtool.c | 8 +++- drivers/net/ethernet/myricom/myri10ge/myri10ge.c | 12 ++++-- .../net/ethernet/netronome/nfp/nfp_net_ethtool.c | 8 +++- drivers/net/ethernet/ni/nixge.c | 14 +++++-- .../net/ethernet/pensando/ionic/ionic_ethtool.c | 8 +++- .../ethernet/qlogic/netxen/netxen_nic_ethtool.c | 8 +++- drivers/net/ethernet/qlogic/qede/qede.h | 4 +- drivers/net/ethernet/qlogic/qede/qede_ethtool.c | 8 +++- .../net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c | 8 +++- drivers/net/ethernet/realtek/r8169_main.c | 10 ++++- drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c | 8 +++- drivers/net/ethernet/sfc/ethtool.c | 8 +++- drivers/net/ethernet/sfc/falcon/ethtool.c | 8 +++- drivers/net/ethernet/socionext/netsec.c | 10 +++-- .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 8 +++- drivers/net/ethernet/synopsys/dwc-xlgmac-ethtool.c | 14 +++++-- drivers/net/ethernet/tehuti/tehuti.c | 12 ++++-- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_ethtool.c | 8 +++- drivers/net/ethernet/ti/cpsw_new.c | 2 +- drivers/net/ethernet/ti/cpsw_priv.h | 8 +++- drivers/net/ethernet/ti/davinci_emac.c | 10 +++-- drivers/net/ethernet/via/via-velocity.c | 8 +++- drivers/net/ethernet/xilinx/ll_temac_main.c | 14 +++++-- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 14 +++++-- drivers/net/netdevsim/ethtool.c | 8 +++- drivers/net/tun.c | 8 +++- drivers/net/usb/r8152.c | 8 +++- drivers/net/virtio_net.c | 8 +++- drivers/net/vmxnet3/vmxnet3_ethtool.c | 12 ++++-- drivers/net/wireless/ath/wil6210/ethtool.c | 14 +++++-- drivers/s390/net/qeth_ethtool.c | 4 +- drivers/staging/qlge/qlge_ethtool.c | 10 ++++- include/linux/ethtool.h | 22 ++++++++-- include/uapi/linux/ethtool_netlink.h | 2 + net/ethtool/coalesce.c | 29 ++++++++++--- net/ethtool/ioctl.c | 15 +++++-- net/ethtool/netlink.h | 2 +- 93 files changed, 679 insertions(+), 209 deletions(-) -- 2.8.1

3 6

[PATCH net-next 000/143] net: extend the netdev_features_t
by Jian Shen 18 Aug '21

18 Aug '21

For the prototype of netdev_features_t is u64, and the number of netdevice feature bits is 64 now. So there is no space to introduce new feature bit. This patchset try to solve it by change the prototype of netdev_features_t from u64 to bitmap. With this change, it's neccessary to introduce a set of bitmap operation helpers for netdev features. Meanwhile, the functions which use netdev_features_t as return value are also need to be changed, return the result as an output parameter. With above changes, it will affect hundreds of files, and all the nic drivers. To make it easy to be reviewed, split the changes to 124 patches to 6 parts. patch 1: code optimization for hns3 driver patch 2~23: convert the prototype which use netdev_features_t as return value patch 24: introduce fake helpers for bitmap operation patch 25~141: use netdev_feature_xxx helpers patch 142: use macro __DECLARE_NETDEV_FEATURE_MASK to replace netdev_feature_t declaration. patch 143: change the type of netdev_features_t to bitmap, and rewrite the bitmap helpers. Jian Shen (143): net: hns3: refine function hns3_set_default_feature() net: convert the prototype of netdev_intersect_features net: convert the prototype of netdev_get_wanted_features net: convert the prototype of net_mpls_features net: convert the prototype of harmonize_features net: convert the prototype of gso_features_check net: convert the prototype of vlan_features_check net: convert the prototype of vxlan_features_check net: convert the prototype of dflt_features_check net: convert the prototype of ndo_features_check net: convert the prototype of netif_skb_features net: convert the prototype of ndo_fix_features net: convert the prototype of netdev_fix_features net: convert the prototype of netdev_sync_upper_features net: convert the prototype of br_features_recompute net: convert the prototype of netdev_add_tso_features net: convert the prototype of netdev_increment_features net: convert the prototype of hsr_features_recompute net: mlx5: convert prototype of mlx5e_ipsec_feature_check, mlx5e_tunnel_features_check and mlx5e_fix_uplink_rep_features net: sfc: convert the prototype of xxx_supported_features net: qlogic: convert the prototype of qlcnic_process_flags net: realtek: convert the prototype of rtl8168evl_fix_tso ethtool: convert the prototype of ethtool_get_feature_mask net: add netdev feature helpers net: core: use netdev feature helpers skbuff: use netdev feature helpers net: vlan: use netdev feature helpers bridge: use netdev feature helpers ipvlan: use netdev feature helpers veth: use netdev feature helpers bonding: use netdev feature helpers net: tun: use netdev feature helpers net: tap: use netdev feature helpers net: geneve: use netdev feature helpers hv_netvsc: use netdev feature helpers macvlan: use netdev feature helpers macsec: use netdev feature helpers s390: qeth: use netdev feature helpers dsa: use netdev feature helpers macvtap: use netdev feature helpers team: use netdev feature helpers vmxnet3: use netdev feature helpers net_failover: use netdev feature helpers pktgen: use netdev feature helpers net: sched: use netdev feature helpers netdevsim: use netdev feature helpers virtio_net: use netdev feature helpers net: ipv4: use netdev feature helpers net: ipv6: use netdev feature helpers net: hsr: use netdev feature helpers net: nsh: use netdev feature helpers vxlan: use netdev feature helpers xen-netback: use netdev feature helpers xen-netfront: use netdev feature helpers sock: use netdev feature helpers sunrpc: use netdev feature helpers net: loopback: use netdev feature helpers net: dummy: use netdev_feature helpers net: mac80211: use netdev feature helpers net: ifb: use netdev feature helpers net: bareudp: use netdev feature helpers net: gtp: use netdev feature helpers net: nlmon: use netdev feature helpers net: wireguard: use netdev feature helpers net: can: use netdev feature helpers net: ppp: use netdev feature helpers net: ipa: use netdev feature helpers net: fjes: use netdev feature helpers net: usb: use netdev feature helpers net: wireless: use netdev feature helpers net: realtek: use netdev feature helpers net: broadcom: use netdev feature helpers net: intel: use netdev feature helpers net: hisilicon: use netdev feature helpers net: mellanox: use netdev feature helpers net: atlantic: use netdev feature helpers net: atheros: use netdev feature helpers net: chelsio: use netdev feature helpers net: davicom: use netdev feature helpers net: freescale: use netdev feature helpers net: synopsys: use netdev feature helpers net: sfc: use netdev feature helpers net: qualcomm: use netdev feature helpers net: nvidia: use netdev feature helpers net: faraday: use netdev feature helpers net: google: use netdev feature helpers net: hinic: use netdev feature helpers net: ibm: use netdev feature helpers net: ionic: use netdev feature helpers net: jme: use netdev feature helpers net: micrel: use netdev feature helpers net: cavium: use netdev feature helpers net: cadence: use netdev feature helpers net: mediatek: use netdev feature helpers net: marvell: use netdev feature helpers net: socionext: use netdev feature helpers net: qlogic: use netdev feature helpers net: nfp: use netdev feature helpers net: mscc: use netdev feature helpers net: oki-semi: use netdev feature helpers net: renesas: use netdev feature helpers net: neterion: use netdev feature helpers net: cortina: use netdev feature helpers net: stmmac: use netdev feature helpers net: sxgbe: use netdev feature helpers net: xgmac: use netdev feature helpers net: altera: use netdev feature helpers net: ti: use netdev feature helpers net: benet: use netdev feature helpers net: amd: use netdev feature helpers net: bna: use netdev feature helpers net: enic: use netdev feature helpers net: 3com: use netdev feature helpers net: aeroflex: use netdev feature helpers net: sun: use netdev feature helpers net: mana: use netdev feature helpers net: myricom: use netdev feature helpers net: alacritech: use netdev feature helpers net: toshiba: use netdev feature helpers net: tehuti: use netdev feature helpers net: alteon: use netdev feature helpers net: ena: use netdev feature helpers net: sgi: use netdev feature helpers net: microchip: use netdev feature helpers net: ni: use netdev feature helpers net: apm: use netdev feature helpers net: natsemi: use netdev feature helpers net: xilinx: use netdev feature helpers net: pasemi: use netdev feature helpers net: rocker: use netdev feature helpers net: silan: use netdev feature helpers net: adaptec: use netdev feature helpers net: tundra: use netdev feature helpers net: via: use netdev feature helpers net: wiznet: use netdev feature helpers net: dnet: use netdev feature helpers net: ethoc: use netdev feature helpers RDMA: ipoib: use netdev feature helpers um: use netdev feature helpers staging: qlge: use netdev feature helpers net: sock: add helper sk_nocaps_add_gso() treewide: introduce macro __DECLARE_NETDEV_FEATURE_MASK net: extend the type of netdev_features_t to bitmap arch/um/drivers/vector_kern.c | 15 +- drivers/infiniband/ulp/ipoib/ipoib_main.c | 21 +- drivers/net/bareudp.c | 16 +- drivers/net/bonding/bond_main.c | 137 ++++--- drivers/net/bonding/bond_options.c | 12 +- drivers/net/can/dev/dev.c | 3 +- drivers/net/can/slcan.c | 3 +- drivers/net/dsa/xrs700x/xrs700x.c | 6 +- drivers/net/dummy.c | 14 +- drivers/net/ethernet/3com/3c59x.c | 9 +- drivers/net/ethernet/3com/typhoon.c | 10 +- drivers/net/ethernet/adaptec/starfire.c | 9 +- drivers/net/ethernet/aeroflex/greth.c | 12 +- drivers/net/ethernet/alacritech/slicoss.c | 5 +- drivers/net/ethernet/alteon/acenic.c | 7 +- drivers/net/ethernet/altera/altera_tse_main.c | 11 +- drivers/net/ethernet/amazon/ena/ena_admin_defs.h | 2 +- drivers/net/ethernet/amazon/ena/ena_netdev.c | 50 +-- drivers/net/ethernet/amd/amd8111e.c | 8 +- drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 20 +- drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 93 +++-- drivers/net/ethernet/amd/xgbe/xgbe-main.c | 68 ++-- drivers/net/ethernet/amd/xgbe/xgbe.h | 2 +- drivers/net/ethernet/apm/xgene-v2/main.c | 5 +- drivers/net/ethernet/apm/xgene/xgene_enet_main.c | 21 +- .../net/ethernet/aquantia/atlantic/aq_filters.c | 12 +- drivers/net/ethernet/aquantia/atlantic/aq_macsec.c | 2 +- drivers/net/ethernet/aquantia/atlantic/aq_main.c | 27 +- drivers/net/ethernet/aquantia/atlantic/aq_nic.c | 28 +- drivers/net/ethernet/aquantia/atlantic/aq_nic.h | 2 +- drivers/net/ethernet/aquantia/atlantic/aq_ring.c | 3 +- .../ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c | 3 +- drivers/net/ethernet/atheros/alx/main.c | 23 +- drivers/net/ethernet/atheros/atl1c/atl1c_main.c | 33 +- drivers/net/ethernet/atheros/atl1e/atl1e_main.c | 44 ++- drivers/net/ethernet/atheros/atlx/atl1.c | 15 +- drivers/net/ethernet/atheros/atlx/atl2.c | 27 +- drivers/net/ethernet/atheros/atlx/atlx.c | 20 +- drivers/net/ethernet/broadcom/b44.c | 2 +- drivers/net/ethernet/broadcom/bcmsysport.c | 24 +- drivers/net/ethernet/broadcom/bgmac.c | 8 +- drivers/net/ethernet/broadcom/bnx2.c | 48 ++- drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | 67 ++-- drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h | 3 +- drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | 93 +++-- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 171 +++++---- drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c | 4 +- drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c | 11 +- drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c | 3 +- drivers/net/ethernet/broadcom/genet/bcmgenet.c | 12 +- drivers/net/ethernet/broadcom/tg3.c | 62 +-- drivers/net/ethernet/brocade/bna/bnad.c | 48 ++- drivers/net/ethernet/cadence/macb_main.c | 81 ++-- drivers/net/ethernet/calxeda/xgmac.c | 20 +- drivers/net/ethernet/cavium/liquidio/lio_core.c | 6 +- drivers/net/ethernet/cavium/liquidio/lio_main.c | 95 +++-- drivers/net/ethernet/cavium/liquidio/lio_vf_main.c | 79 ++-- drivers/net/ethernet/cavium/thunder/nicvf_main.c | 50 +-- drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 2 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 50 +-- drivers/net/ethernet/chelsio/cxgb/sge.c | 12 +- drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c | 60 +-- drivers/net/ethernet/chelsio/cxgb3/sge.c | 10 +- drivers/net/ethernet/chelsio/cxgb4/cxgb4_fcoe.c | 16 +- drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 88 +++-- drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.h | 3 +- drivers/net/ethernet/chelsio/cxgb4/sge.c | 14 +- .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 39 +- drivers/net/ethernet/chelsio/cxgb4vf/sge.c | 8 +- .../chelsio/inline_crypto/chtls/chtls_main.c | 3 +- drivers/net/ethernet/cisco/enic/enic_main.c | 74 ++-- drivers/net/ethernet/cortina/gemini.c | 18 +- drivers/net/ethernet/davicom/dm9000.c | 24 +- drivers/net/ethernet/dnet.c | 2 +- drivers/net/ethernet/emulex/benet/be_main.c | 68 ++-- drivers/net/ethernet/ethoc.c | 2 +- drivers/net/ethernet/faraday/ftgmac100.c | 38 +- drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 23 +- drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c | 44 ++- .../net/ethernet/freescale/dpaa2/dpaa2-switch.c | 5 +- drivers/net/ethernet/freescale/enetc/enetc.c | 34 +- drivers/net/ethernet/freescale/enetc/enetc_pf.c | 38 +- drivers/net/ethernet/freescale/enetc/enetc_qos.c | 2 +- drivers/net/ethernet/freescale/enetc/enetc_vf.c | 16 +- drivers/net/ethernet/freescale/fec_main.c | 29 +- .../net/ethernet/freescale/fs_enet/fs_enet-main.c | 2 +- drivers/net/ethernet/freescale/gianfar.c | 39 +- drivers/net/ethernet/freescale/gianfar_ethtool.c | 11 +- drivers/net/ethernet/google/gve/gve_adminq.c | 6 +- drivers/net/ethernet/google/gve/gve_main.c | 31 +- drivers/net/ethernet/google/gve/gve_rx.c | 8 +- drivers/net/ethernet/google/gve/gve_rx_dqo.c | 8 +- drivers/net/ethernet/hisilicon/hix5hd2_gmac.c | 8 +- drivers/net/ethernet/hisilicon/hns/hns_enet.c | 52 +-- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 159 ++++---- drivers/net/ethernet/huawei/hinic/hinic_main.c | 80 ++-- drivers/net/ethernet/huawei/hinic/hinic_rx.c | 5 +- drivers/net/ethernet/ibm/ehea/ehea_main.c | 22 +- drivers/net/ethernet/ibm/emac/core.c | 7 +- drivers/net/ethernet/ibm/ibmveth.c | 76 ++-- drivers/net/ethernet/ibm/ibmvnic.c | 67 ++-- drivers/net/ethernet/intel/e100.c | 26 +- drivers/net/ethernet/intel/e1000/e1000_main.c | 82 ++-- drivers/net/ethernet/intel/e1000e/netdev.c | 129 ++++--- drivers/net/ethernet/intel/fm10k/fm10k_main.c | 9 +- drivers/net/ethernet/intel/fm10k/fm10k_netdev.c | 65 ++-- drivers/net/ethernet/intel/fm10k/fm10k_pci.c | 11 +- drivers/net/ethernet/intel/i40e/i40e_main.c | 122 +++--- drivers/net/ethernet/intel/i40e/i40e_txrx.c | 9 +- drivers/net/ethernet/intel/iavf/iavf_main.c | 153 ++++---- drivers/net/ethernet/intel/iavf/iavf_txrx.c | 12 +- drivers/net/ethernet/intel/ice/ice_main.c | 177 +++++---- drivers/net/ethernet/intel/ice/ice_txrx_lib.c | 9 +- drivers/net/ethernet/intel/igb/igb_ethtool.c | 2 +- drivers/net/ethernet/intel/igb/igb_main.c | 150 +++++--- drivers/net/ethernet/intel/igbvf/netdev.c | 86 +++-- drivers/net/ethernet/intel/igc/igc_ethtool.c | 3 +- drivers/net/ethernet/intel/igc/igc_main.c | 122 +++--- drivers/net/ethernet/intel/ixgb/ixgb_main.c | 49 ++- drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c | 3 +- drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 2 +- drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c | 7 +- drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c | 3 +- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 215 ++++++----- drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c | 6 +- drivers/net/ethernet/intel/ixgbevf/ipsec.c | 9 +- drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c | 105 +++--- drivers/net/ethernet/jme.c | 49 +-- drivers/net/ethernet/marvell/mv643xx_eth.c | 14 +- drivers/net/ethernet/marvell/mvneta.c | 22 +- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 73 ++-- .../ethernet/marvell/octeontx2/nic/otx2_common.c | 3 +- .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 2 +- .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c | 74 ++-- .../net/ethernet/marvell/octeontx2/nic/otx2_txrx.c | 8 +- .../net/ethernet/marvell/octeontx2/nic/otx2_vf.c | 22 +- .../net/ethernet/marvell/prestera/prestera_main.c | 3 +- drivers/net/ethernet/marvell/skge.c | 11 +- drivers/net/ethernet/marvell/sky2.c | 75 ++-- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 56 +-- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +- drivers/net/ethernet/mellanox/mlx4/en_ethtool.c | 4 +- drivers/net/ethernet/mellanox/mlx4/en_main.c | 8 +- drivers/net/ethernet/mellanox/mlx4/en_netdev.c | 198 ++++++---- drivers/net/ethernet/mellanox/mlx4/en_resources.c | 4 +- drivers/net/ethernet/mellanox/mlx4/en_rx.c | 19 +- drivers/net/ethernet/mellanox/mlx4/mlx4_en.h | 5 +- drivers/net/ethernet/mellanox/mlx5/core/en.h | 5 +- .../ethernet/mellanox/mlx5/core/en_accel/ipsec.c | 18 +- .../mellanox/mlx5/core/en_accel/ipsec_rxtx.h | 15 +- .../ethernet/mellanox/mlx5/core/en_accel/ktls.c | 14 +- .../net/ethernet/mellanox/mlx5/core/en_accel/tls.c | 16 +- drivers/net/ethernet/mellanox/mlx5/core/en_arfs.c | 6 +- .../net/ethernet/mellanox/mlx5/core/en_ethtool.c | 3 +- drivers/net/ethernet/mellanox/mlx5/core/en_fs.c | 3 +- drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 250 ++++++------ drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 25 +- drivers/net/ethernet/mellanox/mlx5/core/en_rx.c | 9 +- drivers/net/ethernet/mellanox/mlx5/core/en_tc.c | 2 +- .../net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c | 19 +- drivers/net/ethernet/mellanox/mlxsw/spectrum.c | 36 +- drivers/net/ethernet/micrel/ksz884x.c | 10 +- drivers/net/ethernet/microchip/lan743x_main.c | 7 +- drivers/net/ethernet/microsoft/mana/mana_en.c | 20 +- drivers/net/ethernet/mscc/ocelot.c | 3 +- drivers/net/ethernet/mscc/ocelot_net.c | 18 +- drivers/net/ethernet/myricom/myri10ge/myri10ge.c | 31 +- drivers/net/ethernet/natsemi/ns83820.c | 13 +- drivers/net/ethernet/neterion/s2io.c | 32 +- drivers/net/ethernet/neterion/vxge/vxge-main.c | 49 ++- drivers/net/ethernet/netronome/nfp/crypto/tls.c | 12 +- .../net/ethernet/netronome/nfp/nfp_net_common.c | 117 +++--- drivers/net/ethernet/netronome/nfp/nfp_net_repr.c | 76 ++-- drivers/net/ethernet/netronome/nfp/nfp_port.c | 3 +- drivers/net/ethernet/ni/nixge.c | 3 +- drivers/net/ethernet/nvidia/forcedeth.c | 66 ++-- .../net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 13 +- .../net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c | 6 +- drivers/net/ethernet/pasemi/pasemi_mac.c | 6 +- drivers/net/ethernet/pensando/ionic/ionic_lif.c | 125 +++--- drivers/net/ethernet/pensando/ionic/ionic_txrx.c | 9 +- .../net/ethernet/qlogic/netxen/netxen_nic_init.c | 3 +- .../net/ethernet/qlogic/netxen/netxen_nic_main.c | 50 +-- drivers/net/ethernet/qlogic/qede/qede.h | 10 +- drivers/net/ethernet/qlogic/qede/qede_ethtool.c | 2 +- drivers/net/ethernet/qlogic/qede/qede_filter.c | 19 +- drivers/net/ethernet/qlogic/qede/qede_fp.c | 23 +- drivers/net/ethernet/qlogic/qede/qede_main.c | 67 ++-- drivers/net/ethernet/qlogic/qla3xxx.c | 5 +- drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | 3 +- drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c | 72 ++-- drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c | 3 +- drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c | 57 +-- drivers/net/ethernet/qualcomm/emac/emac-mac.c | 6 +- drivers/net/ethernet/qualcomm/emac/emac.c | 25 +- .../net/ethernet/qualcomm/rmnet/rmnet_map_data.c | 11 +- drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c | 10 +- drivers/net/ethernet/realtek/8139cp.c | 36 +- drivers/net/ethernet/realtek/8139too.c | 28 +- drivers/net/ethernet/realtek/r8169_main.c | 85 +++-- drivers/net/ethernet/renesas/ravb_main.c | 24 +- drivers/net/ethernet/renesas/sh_eth.c | 28 +- drivers/net/ethernet/rocker/rocker_main.c | 3 +- drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c | 19 +- drivers/net/ethernet/sfc/ef10.c | 37 +- drivers/net/ethernet/sfc/ef100_nic.c | 39 +- drivers/net/ethernet/sfc/ef100_rx.c | 6 +- drivers/net/ethernet/sfc/ef100_tx.c | 11 +- drivers/net/ethernet/sfc/ef10_sriov.c | 6 +- drivers/net/ethernet/sfc/efx.c | 30 +- drivers/net/ethernet/sfc/efx_common.c | 41 +- drivers/net/ethernet/sfc/efx_common.h | 4 +- drivers/net/ethernet/sfc/falcon/efx.c | 43 ++- drivers/net/ethernet/sfc/falcon/net_driver.h | 9 +- drivers/net/ethernet/sfc/falcon/rx.c | 6 +- drivers/net/ethernet/sfc/farch.c | 2 +- drivers/net/ethernet/sfc/mcdi_filters.c | 21 +- drivers/net/ethernet/sfc/mcdi_port_common.c | 3 +- drivers/net/ethernet/sfc/net_driver.h | 9 +- drivers/net/ethernet/sfc/rx.c | 3 +- drivers/net/ethernet/sfc/rx_common.c | 3 +- drivers/net/ethernet/sgi/ioc3-eth.c | 11 +- drivers/net/ethernet/silan/sc92031.c | 6 +- drivers/net/ethernet/socionext/netsec.c | 10 +- drivers/net/ethernet/socionext/sni_ave.c | 6 +- drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 3 +- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 62 +-- .../net/ethernet/stmicro/stmmac/stmmac_selftests.c | 6 +- drivers/net/ethernet/sun/cassini.c | 5 +- drivers/net/ethernet/sun/ldmvsw.c | 5 +- drivers/net/ethernet/sun/niu.c | 11 +- drivers/net/ethernet/sun/sungem.c | 11 +- drivers/net/ethernet/sun/sunhme.c | 14 +- drivers/net/ethernet/sun/sunvnet.c | 8 +- drivers/net/ethernet/sun/sunvnet_common.c | 5 +- drivers/net/ethernet/synopsys/dwc-xlgmac-common.c | 45 ++- drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c | 20 +- drivers/net/ethernet/synopsys/dwc-xlgmac-net.c | 41 +- drivers/net/ethernet/synopsys/dwc-xlgmac.h | 2 +- drivers/net/ethernet/tehuti/tehuti.c | 22 +- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 23 +- drivers/net/ethernet/ti/cpsw.c | 6 +- drivers/net/ethernet/ti/cpsw_new.c | 7 +- drivers/net/ethernet/ti/netcp_core.c | 9 +- drivers/net/ethernet/toshiba/ps3_gelic_net.c | 14 +- drivers/net/ethernet/toshiba/spider_net.c | 12 +- drivers/net/ethernet/tundra/tsi108_eth.c | 3 +- drivers/net/ethernet/via/via-rhine.c | 10 +- drivers/net/ethernet/via/via-velocity.c | 14 +- drivers/net/ethernet/wiznet/w5100.c | 2 +- drivers/net/ethernet/wiznet/w5300.c | 2 +- drivers/net/ethernet/xilinx/ll_temac_main.c | 5 +- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 9 +- drivers/net/fjes/fjes_main.c | 3 +- drivers/net/geneve.c | 18 +- drivers/net/gtp.c | 2 +- drivers/net/hyperv/netvsc_bpf.c | 2 +- drivers/net/hyperv/netvsc_drv.c | 46 +-- drivers/net/hyperv/rndis_filter.c | 30 +- drivers/net/ifb.c | 12 +- drivers/net/ipa/ipa_modem.c | 3 +- drivers/net/ipvlan/ipvlan.h | 2 +- drivers/net/ipvlan/ipvlan_main.c | 40 +- drivers/net/ipvlan/ipvtap.c | 4 +- drivers/net/loopback.c | 20 +- drivers/net/macsec.c | 49 ++- drivers/net/macvlan.c | 58 +-- drivers/net/macvtap.c | 5 +- drivers/net/net_failover.c | 77 ++-- drivers/net/netdevsim/ipsec.c | 4 +- drivers/net/netdevsim/netdev.c | 15 +- drivers/net/nlmon.c | 5 +- drivers/net/ppp/ppp_generic.c | 2 +- drivers/net/tap.c | 38 +- drivers/net/team/team.c | 90 +++-- drivers/net/tun.c | 53 ++- drivers/net/usb/aqc111.c | 42 ++- drivers/net/usb/ax88179_178a.c | 26 +- drivers/net/usb/cdc-phonet.c | 2 +- drivers/net/usb/cdc_mbim.c | 4 +- drivers/net/usb/lan78xx.c | 46 +-- drivers/net/usb/r8152.c | 71 ++-- drivers/net/usb/smsc75xx.c | 14 +- drivers/net/usb/smsc95xx.c | 18 +- drivers/net/veth.c | 67 ++-- drivers/net/virtio_net.c | 51 ++- drivers/net/vmxnet3/vmxnet3_drv.c | 78 ++-- drivers/net/vmxnet3/vmxnet3_ethtool.c | 88 +++-- drivers/net/vmxnet3/vmxnet3_int.h | 4 +- drivers/net/vxlan.c | 21 +- drivers/net/wireguard/device.c | 8 +- drivers/net/wireless/ath/ath10k/mac.c | 7 +- drivers/net/wireless/ath/ath11k/mac.c | 4 +- drivers/net/wireless/ath/ath6kl/main.c | 15 +- drivers/net/wireless/ath/ath6kl/txrx.c | 6 +- drivers/net/wireless/ath/wil6210/netdev.c | 11 +- .../wireless/broadcom/brcm80211/brcmfmac/core.c | 4 +- drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c | 7 +- drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c | 17 +- drivers/net/wireless/intel/iwlwifi/mvm/mvm.h | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/rx.c | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c | 3 +- drivers/net/wireless/intel/iwlwifi/mvm/tx.c | 8 +- drivers/net/wireless/mediatek/mt76/mt7615/init.c | 3 +- drivers/net/wireless/mediatek/mt76/mt7915/init.c | 3 +- drivers/net/wireless/mediatek/mt76/mt7921/init.c | 3 +- drivers/net/xen-netback/interface.c | 27 +- drivers/net/xen-netfront.c | 52 +-- drivers/s390/net/qeth_core.h | 7 +- drivers/s390/net/qeth_core_main.c | 129 ++++--- drivers/s390/net/qeth_l2_main.c | 44 ++- drivers/s390/net/qeth_l3_main.c | 49 ++- drivers/staging/qlge/qlge_main.c | 59 +-- include/linux/if_macvlan.h | 2 +- include/linux/if_tap.h | 2 +- include/linux/if_vlan.h | 22 +- include/linux/netdev_features.h | 179 +++++++-- include/linux/netdevice.h | 122 +++--- include/linux/skbuff.h | 6 +- include/net/mac80211.h | 2 +- include/net/pkt_cls.h | 2 +- include/net/sock.h | 22 +- include/net/udp.h | 8 +- include/net/udp_tunnel.h | 12 +- include/net/vxlan.h | 13 +- lib/test_bpf.c | 2 +- lib/vsprintf.c | 4 +- net/8021q/vlan.c | 11 +- net/8021q/vlan.h | 22 +- net/8021q/vlan_core.c | 6 +- net/8021q/vlan_dev.c | 57 +-- net/bridge/br_device.c | 21 +- net/bridge/br_if.c | 19 +- net/bridge/br_private.h | 3 +- net/core/dev.c | 418 ++++++++++++--------- net/core/netpoll.c | 4 +- net/core/pktgen.c | 6 +- net/core/skbuff.c | 10 +- net/core/skmsg.c | 3 +- net/core/sock.c | 17 +- net/dsa/slave.c | 15 +- net/ethtool/features.c | 94 ++--- net/ethtool/ioctl.c | 154 +++++--- net/hsr/hsr_device.c | 40 +- net/ipv4/af_inet.c | 5 +- net/ipv4/esp4_offload.c | 29 +- net/ipv4/gre_offload.c | 8 +- net/ipv4/ip_gre.c | 36 +- net/ipv4/ip_output.c | 27 +- net/ipv4/ip_tunnel.c | 4 +- net/ipv4/ip_vti.c | 2 +- net/ipv4/ipip.c | 6 +- net/ipv4/ipmr.c | 2 +- net/ipv4/tcp.c | 10 +- net/ipv4/tcp_ipv4.c | 6 +- net/ipv4/tcp_offload.c | 5 +- net/ipv4/tcp_output.c | 2 +- net/ipv4/udp_offload.c | 28 +- net/ipv6/af_inet6.c | 2 +- net/ipv6/esp6_offload.c | 19 +- net/ipv6/inet6_connection_sock.c | 2 +- net/ipv6/ip6_gre.c | 17 +- net/ipv6/ip6_offload.c | 3 +- net/ipv6/ip6_output.c | 24 +- net/ipv6/ip6_tunnel.c | 9 +- net/ipv6/ip6mr.c | 2 +- net/ipv6/sit.c | 9 +- net/ipv6/tcp_ipv6.c | 2 +- net/ipv6/udp_offload.c | 2 +- net/mac80211/iface.c | 10 +- net/mac80211/main.c | 5 +- net/nsh/nsh.c | 2 +- net/sched/sch_cake.c | 4 +- net/sched/sch_netem.c | 6 +- net/sched/sch_taprio.c | 6 +- net/sched/sch_tbf.c | 6 +- net/sunrpc/sunrpc.h | 2 +- net/wireless/core.c | 14 +- 378 files changed, 6367 insertions(+), 4344 deletions(-) -- 2.8.1

3 158

Re: [PATCH net-next 115/143] net: sun: use netdev feature helpers
by shenjian (K) 18 Aug '21

18 Aug '21

在 2021/8/11 22:46, Jian Shen 写道: > Use netdev_feature_xxx helpers to replace the logical operation > for netdev features. > > Signed-off-by: Jian Shen <shenjian15(a)huawei.com> > --- > drivers/net/ethernet/sun/cassini.c | 5 +++-- > drivers/net/ethernet/sun/ldmvsw.c | 5 +++-- > drivers/net/ethernet/sun/niu.c | 11 +++++++---- > drivers/net/ethernet/sun/sungem.c | 11 +++++++---- > drivers/net/ethernet/sun/sunhme.c | 14 ++++++++++---- > drivers/net/ethernet/sun/sunvnet.c | 8 +++++--- > drivers/net/ethernet/sun/sunvnet_common.c | 5 ++++- > 7 files changed, 39 insertions(+), 20 deletions(-) > > diff --git a/drivers/net/ethernet/sun/cassini.c b/drivers/net/ethernet/sun/cassini.c > index 287ae4c..785e11f 100644 > --- a/drivers/net/ethernet/sun/cassini.c > +++ b/drivers/net/ethernet/sun/cassini.c > @@ -5084,10 +5084,11 @@ static int cas_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) > > /* Cassini features. */ > if ((cp->cas_flags & CAS_FLAG_NO_HW_CSUM) == 0) > - dev->features |= NETIF_F_HW_CSUM | NETIF_F_SG; > + netdev_feature_set_bits(NETIF_F_HW_CSUM | NETIF_F_SG, > + &dev->features); > > if (pci_using_dac) > - dev->features |= NETIF_F_HIGHDMA; > + netdev_feature_set_bit(NETIF_F_HIGHDMA_BIT, &dev->features); > > /* MTU range: 60 - varies or 9000 */ > dev->min_mtu = CAS_MIN_MTU; > diff --git a/drivers/net/ethernet/sun/ldmvsw.c b/drivers/net/ethernet/sun/ldmvsw.c > index 50bd4e3..7c32d54 100644 > --- a/drivers/net/ethernet/sun/ldmvsw.c > +++ b/drivers/net/ethernet/sun/ldmvsw.c > @@ -249,8 +249,9 @@ static struct net_device *vsw_alloc_netdev(u8 hwaddr[], > dev->ethtool_ops = &vsw_ethtool_ops; > dev->watchdog_timeo = VSW_TX_TIMEOUT; > > - dev->hw_features = NETIF_F_HW_CSUM | NETIF_F_SG; > - dev->features = dev->hw_features; > + netdev_feature_zero(&dev->hw_features); > + netdev_feature_set_bits(NETIF_F_HW_CSUM | NETIF_F_SG, &dev->features); it should be "dev->hw_features", not "dev->features" > + netdev_feature_copy(&dev->features, dev->hw_features); > > /* MTU range: 68 - 65535 */ > dev->min_mtu = ETH_MIN_MTU; > diff --git a/drivers/net/ethernet/sun/niu.c b/drivers/net/ethernet/sun/niu.c > index 1501e890..97f62ec 100644 > --- a/drivers/net/ethernet/sun/niu.c > +++ b/drivers/net/ethernet/sun/niu.c > @@ -3472,7 +3472,7 @@ static int niu_process_rx_pkt(struct napi_struct *napi, struct niu *np, > __pskb_pull_tail(skb, len); > > rh = (struct rx_pkt_hdr1 *) skb->data; > - if (np->dev->features & NETIF_F_RXHASH) > + if (netdev_feature_test_bit(NETIF_F_RXHASH_BIT, np->dev->features)) > skb_set_hash(skb, > ((u32)rh->hashval2_0 << 24 | > (u32)rh->hashval2_1 << 16 | > @@ -9711,8 +9711,11 @@ static void niu_device_announce(struct niu *np) > > static void niu_set_basic_features(struct net_device *dev) > { > - dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXHASH; > - dev->features |= dev->hw_features | NETIF_F_RXCSUM; > + netdev_feature_zero(&dev->hw_features); > + netdev_feature_set_bits(NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXHASH, > + &dev->hw_features); > + netdev_feature_or(&dev->features, dev->features, dev->hw_features); > + netdev_feature_set_bit(NETIF_F_RXCSUM_BIT, &dev->features); > } > > static int niu_pci_init_one(struct pci_dev *pdev, > @@ -9780,7 +9783,7 @@ static int niu_pci_init_one(struct pci_dev *pdev, > dma_mask = DMA_BIT_MASK(44); > err = pci_set_dma_mask(pdev, dma_mask); > if (!err) { > - dev->features |= NETIF_F_HIGHDMA; > + netdev_feature_set_bit(NETIF_F_HIGHDMA_BIT, &dev->features); > err = pci_set_consistent_dma_mask(pdev, dma_mask); > if (err) { > dev_err(&pdev->dev, "Unable to obtain 44 bit DMA for consistent allocations, aborting\n"); > diff --git a/drivers/net/ethernet/sun/sungem.c b/drivers/net/ethernet/sun/sungem.c > index d72018a..79b2435 100644 > --- a/drivers/net/ethernet/sun/sungem.c > +++ b/drivers/net/ethernet/sun/sungem.c > @@ -843,7 +843,8 @@ static int gem_rx(struct gem *gp, int work_to_do) > skb = copy_skb; > } > > - if (likely(dev->features & NETIF_F_RXCSUM)) { > + if (likely(netdev_feature_test_bit(NETIF_F_RXCSUM_BIT, > + dev->features))) { > __sum16 csum; > > csum = (__force __sum16)htons((status & RXDCTRL_TCPCSUM) ^ 0xffff); > @@ -2987,10 +2988,12 @@ static int gem_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) > pci_set_drvdata(pdev, dev); > > /* We can do scatter/gather and HW checksum */ > - dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM; > - dev->features = dev->hw_features; > + netdev_feature_zero(&dev->hw_features); > + netdev_feature_set_bits(NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM, > + &dev->hw_features); > + netdev_feature_copy(&dev->features, dev->hw_features); > if (pci_using_dac) > - dev->features |= NETIF_F_HIGHDMA; > + netdev_feature_set_bit(NETIF_F_HIGHDMA_BIT, &dev->features); > > /* MTU range: 68 - 1500 (Jumbo mode is broken) */ > dev->min_mtu = GEM_MIN_MTU; > diff --git a/drivers/net/ethernet/sun/sunhme.c b/drivers/net/ethernet/sun/sunhme.c > index a2c1a40..22de1ad 100644 > --- a/drivers/net/ethernet/sun/sunhme.c > +++ b/drivers/net/ethernet/sun/sunhme.c > @@ -2825,8 +2825,11 @@ static int happy_meal_sbus_probe_one(struct platform_device *op, int is_qfe) > dev->ethtool_ops = &hme_ethtool_ops; > > /* Happy Meal can do it all... */ > - dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM; > - dev->features |= dev->hw_features | NETIF_F_RXCSUM; > + netdev_feature_zero(&dev->hw_features); > + netdev_feature_set_bits(NETIF_F_SG | NETIF_F_HW_CSUM, > + &dev->hw_features); > + netdev_feature_or(&dev->features, dev->features, dev->hw_features); > + netdev_feature_set_bit(NETIF_F_RXCSUM_BIT, &dev->features); > > hp->irq = op->archdata.irqs[0]; > > @@ -3140,8 +3143,11 @@ static int happy_meal_pci_probe(struct pci_dev *pdev, > dev->ethtool_ops = &hme_ethtool_ops; > > /* Happy Meal can do it all... */ > - dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM; > - dev->features |= dev->hw_features | NETIF_F_RXCSUM; > + netdev_feature_zero(&dev->hw_features); > + netdev_feature_set_bits(NETIF_F_SG | NETIF_F_HW_CSUM, > + &dev->hw_features); > + netdev_feature_or(&dev->features, dev->features, dev->hw_features); > + netdev_feature_set_bit(NETIF_F_RXCSUM_BIT, &dev->features); > > #if defined(CONFIG_SBUS) && defined(CONFIG_PCI) > /* Hook up PCI register/descriptor accessors. */ > diff --git a/drivers/net/ethernet/sun/sunvnet.c b/drivers/net/ethernet/sun/sunvnet.c > index 58ee892..1c5c858 100644 > --- a/drivers/net/ethernet/sun/sunvnet.c > +++ b/drivers/net/ethernet/sun/sunvnet.c > @@ -312,9 +312,11 @@ static struct vnet *vnet_new(const u64 *local_mac, > dev->ethtool_ops = &vnet_ethtool_ops; > dev->watchdog_timeo = VNET_TX_TIMEOUT; > > - dev->hw_features = NETIF_F_TSO | NETIF_F_GSO | NETIF_F_ALL_TSO | > - NETIF_F_HW_CSUM | NETIF_F_SG; > - dev->features = dev->hw_features; > + netdev_feature_zero(&dev->hw_features); > + netdev_feature_set_bits(NETIF_F_TSO | NETIF_F_GSO | NETIF_F_ALL_TSO | > + NETIF_F_HW_CSUM | NETIF_F_SG, > + &dev->hw_features); > + netdev_feature_copy(&dev->features, dev->hw_features); > > /* MTU range: 68 - 65535 */ > dev->min_mtu = ETH_MIN_MTU; > diff --git a/drivers/net/ethernet/sun/sunvnet_common.c b/drivers/net/ethernet/sun/sunvnet_common.c > index 80fde5f..44f4bff 100644 > --- a/drivers/net/ethernet/sun/sunvnet_common.c > +++ b/drivers/net/ethernet/sun/sunvnet_common.c > @@ -1224,6 +1224,7 @@ vnet_handle_offloads(struct vnet_port *port, struct sk_buff *skb, > struct net_device *dev = VNET_PORT_TO_NET_DEVICE(port); > struct vio_dring_state *dr = &port->vio.drings[VIO_DRIVER_TX_RING]; > struct sk_buff *segs, *curr, *next; > + netdev_features_t tmp; > int maclen, datalen; > int status; > int gso_size, gso_type, gso_segs; > @@ -1274,7 +1275,9 @@ vnet_handle_offloads(struct vnet_port *port, struct sk_buff *skb, > skb_shinfo(skb)->gso_size = datalen; > skb_shinfo(skb)->gso_segs = gso_segs; > } > - segs = skb_gso_segment(skb, dev->features & ~NETIF_F_TSO); > + netdev_feature_copy(&tmp, dev->features); > + netdev_feature_clear_bit(NETIF_F_TSO_BIT, &tmp); > + segs = skb_gso_segment(skb, tmp); > if (IS_ERR(segs)) > goto out_dropped; >

1 0

Re: [PATCH net-next 110/143] net: amd: use netdev feature helpers
by shenjian (K) 18 Aug '21

18 Aug '21

在 2021/8/11 22:46, Jian Shen 写道: > Use netdev_feature_xxx helpers to replace the logical operation > for netdev features. > > Signed-off-by: Jian Shen <shenjian15(a)huawei.com> > --- > drivers/net/ethernet/amd/amd8111e.c | 8 +++- > drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 20 ++++++--- > drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 72 ++++++++++++++++++++----------- > drivers/net/ethernet/amd/xgbe/xgbe-main.c | 68 ++++++++++++++++------------- > 4 files changed, 103 insertions(+), 65 deletions(-) > > diff --git a/drivers/net/ethernet/amd/amd8111e.c b/drivers/net/ethernet/amd/amd8111e.c > index 92e4246..1757eac 100644 > --- a/drivers/net/ethernet/amd/amd8111e.c > +++ b/drivers/net/ethernet/amd/amd8111e.c > @@ -1790,7 +1790,9 @@ static int amd8111e_probe_one(struct pci_dev *pdev, > SET_NETDEV_DEV(dev, &pdev->dev); > > #if AMD8111E_VLAN_TAG_USED > - dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; > + netdev_feature_set_bits(NETIF_F_HW_VLAN_CTAG_TX | > + NETIF_F_HW_VLAN_CTAG_RX, > + &dev->features); > #endif > > lp = netdev_priv(dev); > @@ -1829,7 +1831,9 @@ static int amd8111e_probe_one(struct pci_dev *pdev, > netif_napi_add(dev, &lp->napi, amd8111e_rx_poll, 32); > > #if AMD8111E_VLAN_TAG_USED > - dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; > + netdev_feature_set_bits(NETIF_F_HW_VLAN_CTAG_TX | > + NETIF_F_HW_VLAN_CTAG_RX, > + &dev->features); > #endif > /* Probe the external PHY */ > amd8111e_probe_ext_phy(dev); > diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c > index d5fd49d..6e1a5fb 100644 > --- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c > +++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c > @@ -449,7 +449,8 @@ static void xgbe_config_rss(struct xgbe_prv_data *pdata) > if (!pdata->hw_feat.rss) > return; > > - if (pdata->netdev->features & NETIF_F_RXHASH) > + if (netdev_feature_test_bit(NETIF_F_RXHASH_BIT, > + pdata->netdev->features)) > ret = xgbe_enable_rss(pdata); > else > ret = xgbe_disable_rss(pdata); > @@ -948,7 +949,8 @@ static int xgbe_set_promiscuous_mode(struct xgbe_prv_data *pdata, > if (enable) { > xgbe_disable_rx_vlan_filtering(pdata); > } else { > - if (pdata->netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER) > + if (netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, > + pdata->netdev->features)) > xgbe_enable_rx_vlan_filtering(pdata); > } > > @@ -1990,7 +1992,7 @@ static int xgbe_dev_read(struct xgbe_channel *channel) > rdata->rx.len = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, PL); > > /* Set checksum done indicator as appropriate */ > - if (netdev->features & NETIF_F_RXCSUM) { > + if (netdev_feature_test_bit(NETIF_F_RXCSUM_BIT, netdev->features)) { > XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, > CSUM_DONE, 1); > XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, > @@ -2021,7 +2023,8 @@ static int xgbe_dev_read(struct xgbe_channel *channel) > if (!err || !etlt) { > /* No error if err is 0 or etlt is 0 */ > if ((etlt == 0x09) && > - (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)) { > + (netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_RX_BIT, > + netdev->features))) { > XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES, > VLAN_CTAG, 1); > packet->vlan_ctag = XGMAC_GET_BITS_LE(rdesc->desc0, > @@ -2823,7 +2826,8 @@ static void xgbe_config_mac_speed(struct xgbe_prv_data *pdata) > > static void xgbe_config_checksum_offload(struct xgbe_prv_data *pdata) > { > - if (pdata->netdev->features & NETIF_F_RXCSUM) > + if (netdev_feature_test_bit(NETIF_F_RXCSUM_BIT, > + pdata->netdev->features)) > xgbe_enable_rx_csum(pdata); > else > xgbe_disable_rx_csum(pdata); > @@ -2838,12 +2842,14 @@ static void xgbe_config_vlan_support(struct xgbe_prv_data *pdata) > /* Set the current VLAN Hash Table register value */ > xgbe_update_vlan_hash_table(pdata); > > - if (pdata->netdev->features & NETIF_F_HW_VLAN_CTAG_FILTER) > + if (netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, > + pdata->netdev->features)) > xgbe_enable_rx_vlan_filtering(pdata); > else > xgbe_disable_rx_vlan_filtering(pdata); > > - if (pdata->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) > + if (netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_RX_BIT, > + pdata->netdev->features)) > xgbe_enable_rx_vlan_stripping(pdata); > else > xgbe_disable_rx_vlan_stripping(pdata); > diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c > index dff9eec..cbf23e0 100644 > --- a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c > +++ b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c > @@ -2188,37 +2188,46 @@ static void xgbe_fix_features(struct net_device *netdev, > struct xgbe_prv_data *pdata = netdev_priv(netdev); > netdev_features_t vxlan_base; > > - vxlan_base = NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RX_UDP_TUNNEL_PORT; > + netdev_feature_zero(&vxlan_base); > + netdev_feature_set_bits(NETIF_F_GSO_UDP_TUNNEL | > + NETIF_F_RX_UDP_TUNNEL_PORT, > + &vxlan_base); > > if (!pdata->hw_feat.vxn) > return; > > /* VXLAN CSUM requires VXLAN base */ > - if ((*features & NETIF_F_GSO_UDP_TUNNEL_CSUM) && > - !(*features & NETIF_F_GSO_UDP_TUNNEL)) { > + if (netdev_feature_test_bit(NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT, > + *features) && > + !netdev_feature_test_bit(NETIF_F_GSO_UDP_TUNNEL_BIT, *features)) { > netdev_notice(netdev, > "forcing tx udp tunnel support\n"); > - *features |= NETIF_F_GSO_UDP_TUNNEL; > + netdev_feature_set_bit(NETIF_F_GSO_UDP_TUNNEL_BIT, features); > } > > /* Can't do one without doing the other */ > - if ((*features & vxlan_base) != vxlan_base) { > + if (!netdev_feature_subset(*features, vxlan_base)) { > netdev_notice(netdev, > "forcing both tx and rx udp tunnel support\n"); > - *features |= vxlan_base; > + netdev_feature_or(features, *features, vxlan_base); > } > > - if (*features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) { > - if (!(*features & NETIF_F_GSO_UDP_TUNNEL_CSUM)) { > + if (netdev_feature_test_bits(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM, > + *features)) { > + if (!netdev_feature_test_bit(NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT, > + *features)) { > netdev_notice(netdev, > "forcing tx udp tunnel checksumming on\n"); > - *features |= NETIF_F_GSO_UDP_TUNNEL_CSUM; > + netdev_feature_set_bit(NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT, > + features); > } > } else { > - if (*features & NETIF_F_GSO_UDP_TUNNEL_CSUM) { > + if (netdev_feature_test_bit(NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT, > + *features)) { > netdev_notice(netdev, > "forcing tx udp tunnel checksumming off\n"); > - *features &= ~NETIF_F_GSO_UDP_TUNNEL_CSUM; > + netdev_feature_clear_bit(NETIF_F_GSO_UDP_TUNNEL_CSUM_BIT, > + features); > } > } > } > @@ -2228,37 +2237,47 @@ static int xgbe_set_features(struct net_device *netdev, > { > struct xgbe_prv_data *pdata = netdev_priv(netdev); > struct xgbe_hw_if *hw_if = &pdata->hw_if; > - netdev_features_t rxhash, rxcsum, rxvlan, rxvlan_filter; > + bool rxhash, rxcsum, rxvlan, rxvlan_filter; > int ret = 0; > > - rxhash = pdata->netdev_features & NETIF_F_RXHASH; > - rxcsum = pdata->netdev_features & NETIF_F_RXCSUM; > - rxvlan = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_RX; > - rxvlan_filter = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_FILTER; > + rxhash = netdev_feature_test_bit(NETIF_F_RXHASH_BIT, > + pdata->netdev_features); > + rxcsum = netdev_feature_test_bit(NETIF_F_RXCSUM_BIT, > + pdata->netdev_features); > + rxvlan = netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_RX_BIT, > + pdata->netdev_features); > + rxvlan_filter = netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, > + pdata->netdev_features); > > - if ((features & NETIF_F_RXHASH) && !rxhash) > + if (netdev_feature_test_bit(NETIF_F_RXHASH_BIT, features) && !rxhash) > ret = hw_if->enable_rss(pdata); > - else if (!(features & NETIF_F_RXHASH) && rxhash) > + else if (!netdev_feature_test_bit(NETIF_F_RXHASH_BIT, features) && > + rxhash) > ret = hw_if->disable_rss(pdata); > if (ret) > return ret; > > - if ((features & NETIF_F_RXCSUM) && !rxcsum) > + if (netdev_feature_test_bit(NETIF_F_RXCSUM_BIT, features) && !rxcsum) > hw_if->enable_rx_csum(pdata); > - else if (!(features & NETIF_F_RXCSUM) && rxcsum) > + else if (!netdev_feature_test_bit(NETIF_F_RXCSUM_BIT, features) && > + rxcsum) > hw_if->disable_rx_csum(pdata); > > - if ((features & NETIF_F_HW_VLAN_CTAG_RX) && !rxvlan) > + if (netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_RX_BIT, features) && > + !rxvlan) > hw_if->enable_rx_vlan_stripping(pdata); > - else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) && rxvlan) > + else if (!netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_RX_BIT, > + features) && rxvlan) > hw_if->disable_rx_vlan_stripping(pdata); > > - if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && !rxvlan_filter) > + if (netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, > + features) && !rxvlan_filter) > hw_if->enable_rx_vlan_filtering(pdata); > - else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && rxvlan_filter) > + else if (!netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_FILTER_BIT, > + features) && rxvlan_filter) > hw_if->disable_rx_vlan_filtering(pdata); > > - pdata->netdev_features = features; > + netdev_feature_copy(&features, pdata->netdev_features); it shoule be "netdev_feature_copy(pdata->netdev_features, &features);" > > DBGPR("<--xgbe_set_features\n"); > > @@ -2584,7 +2603,8 @@ static int xgbe_rx_poll(struct xgbe_channel *channel, int budget) > > /* Be sure we don't exceed the configured MTU */ > max_len = netdev->mtu + ETH_HLEN; > - if (!(netdev->features & NETIF_F_HW_VLAN_CTAG_RX) && > + if (!netdev_feature_test_bit(NETIF_F_HW_VLAN_CTAG_RX_BIT, > + netdev->features) && > (skb->protocol == htons(ETH_P_8021Q))) > max_len += VLAN_HLEN; > > diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-main.c b/drivers/net/ethernet/amd/xgbe/xgbe-main.c > index a218dc6..ace7324 100644 > --- a/drivers/net/ethernet/amd/xgbe/xgbe-main.c > +++ b/drivers/net/ethernet/amd/xgbe/xgbe-main.c > @@ -342,45 +342,53 @@ int xgbe_config_netdev(struct xgbe_prv_data *pdata) > #endif > > /* Set device features */ > - netdev->hw_features = NETIF_F_SG | > - NETIF_F_IP_CSUM | > - NETIF_F_IPV6_CSUM | > - NETIF_F_RXCSUM | > - NETIF_F_TSO | > - NETIF_F_TSO6 | > - NETIF_F_GRO | > - NETIF_F_HW_VLAN_CTAG_RX | > - NETIF_F_HW_VLAN_CTAG_TX | > - NETIF_F_HW_VLAN_CTAG_FILTER; > + netdev_feature_zero(&netdev->hw_features); > + netdev_feature_set_bits(NETIF_F_SG | > + NETIF_F_IP_CSUM | > + NETIF_F_IPV6_CSUM | > + NETIF_F_RXCSUM | > + NETIF_F_TSO | > + NETIF_F_TSO6 | > + NETIF_F_GRO | > + NETIF_F_HW_VLAN_CTAG_RX | > + NETIF_F_HW_VLAN_CTAG_TX | > + NETIF_F_HW_VLAN_CTAG_FILTER, > + &netdev->hw_features); > > if (pdata->hw_feat.rss) > - netdev->hw_features |= NETIF_F_RXHASH; > + netdev_feature_set_bit(NETIF_F_RXHASH_BIT, > + &netdev->hw_features); > > if (pdata->hw_feat.vxn) { > - netdev->hw_enc_features = NETIF_F_SG | > - NETIF_F_IP_CSUM | > - NETIF_F_IPV6_CSUM | > - NETIF_F_RXCSUM | > - NETIF_F_TSO | > - NETIF_F_TSO6 | > - NETIF_F_GRO | > - NETIF_F_GSO_UDP_TUNNEL | > - NETIF_F_GSO_UDP_TUNNEL_CSUM; > - > - netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | > - NETIF_F_GSO_UDP_TUNNEL_CSUM; > + netdev_feature_zero(&netdev->hw_enc_features); > + netdev_feature_set_bits(NETIF_F_SG | > + NETIF_F_IP_CSUM | > + NETIF_F_IPV6_CSUM | > + NETIF_F_RXCSUM | > + NETIF_F_TSO | > + NETIF_F_TSO6 | > + NETIF_F_GRO | > + NETIF_F_GSO_UDP_TUNNEL | > + NETIF_F_GSO_UDP_TUNNEL_CSUM, > + &netdev->hw_enc_features); > + > + netdev_feature_set_bits(NETIF_F_GSO_UDP_TUNNEL | > + NETIF_F_GSO_UDP_TUNNEL_CSUM, > + &netdev->hw_features); > > netdev->udp_tunnel_nic_info = xgbe_get_udp_tunnel_info(); > } > > - netdev->vlan_features |= NETIF_F_SG | > - NETIF_F_IP_CSUM | > - NETIF_F_IPV6_CSUM | > - NETIF_F_TSO | > - NETIF_F_TSO6; > + netdev_feature_set_bits(NETIF_F_SG | > + NETIF_F_IP_CSUM | > + NETIF_F_IPV6_CSUM | > + NETIF_F_TSO | > + NETIF_F_TSO6, > + &netdev->vlan_features); > > - netdev->features |= netdev->hw_features; > - pdata->netdev_features = netdev->features; > + netdev_feature_or(&netdev->features, netdev->features, > + netdev->hw_features); > + netdev_feature_copy(&pdata->netdev_features, netdev->features); > > netdev->priv_flags |= IFF_UNICAST_FLT; > netdev->min_mtu = 0;

1 0

[PATCH net-next 0/4] ethtool: extend coalesce uAPI
by Yufeng Mo 18 Aug '21

18 Aug '21

In order to support some configuration in coalesce uAPI, this RFC extends coalesce uAPI and add support for CQE mode. Below is some test result with HNS3 driver: 1. old ethtool(ioctl) + new kernel: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: 0 sample-interval: 0 pkt-rate-low: 0 pkt-rate-high: 0 rx-usecs: 20 rx-frames: 0 rx-usecs-irq: 0 rx-frames-irq: 0 tx-usecs: 20 tx-frames: 0 tx-usecs-irq: 0 tx-frames-irq: 0 rx-usecs-low: 0 rx-frame-low: 0 tx-usecs-low: 0 tx-frame-low: 0 rx-usecs-high: 0 rx-frame-high: 0 tx-usecs-high: 0 tx-frame-high: 0 2. ethtool(netlink with cqe mode) + kernel without cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: n/a TX: n/a 3. ethool(netlink with cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: off TX: off 4. ethool(netlink without cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a Change log from RFC: V3 -> V4: add document explaining the difference between CQE and EQE in #1 suggested by Jakub Kicinski. V2 -> V3: 1. split #1 into adding new parameter and adding new attributes. 2. use NLA_POLICY_MAX(NLA_U8, 1) instead of NLA_U8. 3. modify the description of CQE in Document. V1 -> V2: refactor #1&#2 in V1 suggestted by Jakub Kicinski. Yufeng Mo (4): ethtool: add two coalesce attributes for CQE mode ethtool: extend coalesce setting uAPI with CQE mode net: hns3: add support for EQE/CQE mode configuration net: hns3: add ethtool support for CQE/EQE mode configuration Documentation/networking/ethtool-netlink.rst | 15 +++++++ drivers/infiniband/ulp/ipoib/ipoib_ethtool.c | 8 +++- drivers/net/ethernet/amazon/ena/ena_ethtool.c | 8 +++- drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c | 8 +++- .../net/ethernet/aquantia/atlantic/aq_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bcmsysport.c | 8 +++- drivers/net/ethernet/broadcom/bnx2.c | 12 ++++-- .../net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/genet/bcmgenet.c | 8 +++- drivers/net/ethernet/broadcom/tg3.c | 10 ++++- drivers/net/ethernet/brocade/bna/bnad_ethtool.c | 12 ++++-- drivers/net/ethernet/cavium/liquidio/lio_ethtool.c | 8 +++- .../net/ethernet/cavium/thunder/nicvf_ethtool.c | 4 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 8 +++- drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c | 8 +++- drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c | 8 +++- .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 8 +++- drivers/net/ethernet/cisco/enic/enic_ethtool.c | 8 +++- drivers/net/ethernet/cortina/gemini.c | 8 +++- drivers/net/ethernet/emulex/benet/be_ethtool.c | 8 +++- drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c | 8 +++- .../net/ethernet/freescale/enetc/enetc_ethtool.c | 8 +++- drivers/net/ethernet/freescale/fec_main.c | 14 ++++--- drivers/net/ethernet/freescale/gianfar_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hip04_eth.c | 8 +++- drivers/net/ethernet/hisilicon/hns/hns_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 49 +++++++++++++++++++++- drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | 11 +++++ drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c | 26 ++++++++++-- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 1 + .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 1 + drivers/net/ethernet/huawei/hinic/hinic_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000/e1000_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000e/ethtool.c | 8 +++- drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c | 8 +++- drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 8 +++- drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 8 +++- drivers/net/ethernet/intel/ice/ice_ethtool.c | 12 ++++-- drivers/net/ethernet/intel/igb/igb_ethtool.c | 8 +++- drivers/net/ethernet/intel/igbvf/ethtool.c | 8 +++- drivers/net/ethernet/intel/igc/igc_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbevf/ethtool.c | 8 +++- drivers/net/ethernet/jme.c | 12 ++++-- drivers/net/ethernet/marvell/mv643xx_eth.c | 12 ++++-- drivers/net/ethernet/marvell/mvneta.c | 14 +++++-- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 14 +++++-- .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 8 +++- drivers/net/ethernet/marvell/skge.c | 8 +++- drivers/net/ethernet/marvell/sky2.c | 8 +++- drivers/net/ethernet/mellanox/mlx4/en_ethtool.c | 8 +++- .../net/ethernet/mellanox/mlx5/core/en_ethtool.c | 8 +++- drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 8 +++- .../ethernet/mellanox/mlx5/core/ipoib/ethtool.c | 8 +++- drivers/net/ethernet/myricom/myri10ge/myri10ge.c | 12 ++++-- .../net/ethernet/netronome/nfp/nfp_net_ethtool.c | 8 +++- drivers/net/ethernet/ni/nixge.c | 14 +++++-- .../net/ethernet/pensando/ionic/ionic_ethtool.c | 8 +++- .../ethernet/qlogic/netxen/netxen_nic_ethtool.c | 8 +++- drivers/net/ethernet/qlogic/qede/qede.h | 4 +- drivers/net/ethernet/qlogic/qede/qede_ethtool.c | 8 +++- .../net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c | 8 +++- drivers/net/ethernet/realtek/r8169_main.c | 10 ++++- drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c | 8 +++- drivers/net/ethernet/sfc/ethtool.c | 8 +++- drivers/net/ethernet/sfc/falcon/ethtool.c | 8 +++- drivers/net/ethernet/socionext/netsec.c | 10 +++-- .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 8 +++- drivers/net/ethernet/synopsys/dwc-xlgmac-ethtool.c | 14 +++++-- drivers/net/ethernet/tehuti/tehuti.c | 12 ++++-- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_ethtool.c | 8 +++- drivers/net/ethernet/ti/cpsw_new.c | 2 +- drivers/net/ethernet/ti/cpsw_priv.h | 8 +++- drivers/net/ethernet/ti/davinci_emac.c | 8 +++- drivers/net/ethernet/via/via-velocity.c | 8 +++- drivers/net/ethernet/xilinx/ll_temac_main.c | 14 +++++-- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 14 +++++-- drivers/net/netdevsim/ethtool.c | 8 +++- drivers/net/tun.c | 8 +++- drivers/net/usb/r8152.c | 8 +++- drivers/net/virtio_net.c | 8 +++- drivers/net/vmxnet3/vmxnet3_ethtool.c | 12 ++++-- drivers/net/wireless/ath/wil6210/ethtool.c | 14 +++++-- drivers/s390/net/qeth_ethtool.c | 4 +- drivers/staging/qlge/qlge_ethtool.c | 10 ++++- include/linux/ethtool.h | 22 ++++++++-- include/uapi/linux/ethtool_netlink.h | 2 + net/ethtool/coalesce.c | 29 ++++++++++--- net/ethtool/ioctl.c | 15 +++++-- net/ethtool/netlink.h | 2 +- 93 files changed, 678 insertions(+), 208 deletions(-) -- 2.8.1

3 8

[RFC V4 net-next 0/4] ethtool: extend coalesce uAPI
by Yufeng Mo 16 Aug '21

16 Aug '21

In order to support some configuration in coalesce uAPI, this RFC extends coalesce uAPI and add support for CQE mode. Below is some test result with HNS3 driver: 1. old ethtool(ioctl) + new kernel: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: 0 sample-interval: 0 pkt-rate-low: 0 pkt-rate-high: 0 rx-usecs: 20 rx-frames: 0 rx-usecs-irq: 0 rx-frames-irq: 0 tx-usecs: 20 tx-frames: 0 tx-usecs-irq: 0 tx-frames-irq: 0 rx-usecs-low: 0 rx-frame-low: 0 tx-usecs-low: 0 tx-frame-low: 0 rx-usecs-high: 0 rx-frame-high: 0 tx-usecs-high: 0 tx-frame-high: 0 2. ethtool(netlink with cqe mode) + kernel without cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: n/a TX: n/a 3. ethool(netlink with cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: off TX: off 4. ethool(netlink without cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a Change log: V3 -> V4: add document explaining the difference between CQE and EQE in #1 suggested by Jakub Kicinski. V2 -> V3: 1. split #1 into adding new parameter and adding new attributes. 2. use NLA_POLICY_MAX(NLA_U8, 1) instead of NLA_U8. 3. modify the description of CQE in Document. V1 -> V2: refactor #1&#2 in V1 suggestted by Jakub Kicinski. Yufeng Mo (4): ethtool: add two coalesce attributes for CQE mode ethtool: extend coalesce setting uAPI with CQE mode net: hns3: add support for EQE/CQE mode configuration net: hns3: add ethtool support for CQE/EQE mode configuration Documentation/networking/ethtool-netlink.rst | 15 +++++++ drivers/infiniband/ulp/ipoib/ipoib_ethtool.c | 8 +++- drivers/net/ethernet/amazon/ena/ena_ethtool.c | 8 +++- drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c | 8 +++- .../net/ethernet/aquantia/atlantic/aq_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bcmsysport.c | 8 +++- drivers/net/ethernet/broadcom/bnx2.c | 12 ++++-- .../net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/genet/bcmgenet.c | 8 +++- drivers/net/ethernet/broadcom/tg3.c | 10 ++++- drivers/net/ethernet/brocade/bna/bnad_ethtool.c | 12 ++++-- drivers/net/ethernet/cavium/liquidio/lio_ethtool.c | 8 +++- .../net/ethernet/cavium/thunder/nicvf_ethtool.c | 4 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 8 +++- drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c | 8 +++- drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c | 8 +++- .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 8 +++- drivers/net/ethernet/cisco/enic/enic_ethtool.c | 8 +++- drivers/net/ethernet/cortina/gemini.c | 8 +++- drivers/net/ethernet/emulex/benet/be_ethtool.c | 8 +++- drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c | 8 +++- .../net/ethernet/freescale/enetc/enetc_ethtool.c | 8 +++- drivers/net/ethernet/freescale/fec_main.c | 14 ++++--- drivers/net/ethernet/freescale/gianfar_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hip04_eth.c | 8 +++- drivers/net/ethernet/hisilicon/hns/hns_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 49 +++++++++++++++++++++- drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | 11 +++++ drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c | 26 ++++++++++-- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 1 + .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 1 + drivers/net/ethernet/huawei/hinic/hinic_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000/e1000_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000e/ethtool.c | 8 +++- drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c | 8 +++- drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 8 +++- drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 8 +++- drivers/net/ethernet/intel/ice/ice_ethtool.c | 12 ++++-- drivers/net/ethernet/intel/igb/igb_ethtool.c | 8 +++- drivers/net/ethernet/intel/igbvf/ethtool.c | 8 +++- drivers/net/ethernet/intel/igc/igc_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbevf/ethtool.c | 8 +++- drivers/net/ethernet/jme.c | 12 ++++-- drivers/net/ethernet/marvell/mv643xx_eth.c | 12 ++++-- drivers/net/ethernet/marvell/mvneta.c | 14 +++++-- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 14 +++++-- .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 8 +++- drivers/net/ethernet/marvell/skge.c | 8 +++- drivers/net/ethernet/marvell/sky2.c | 8 +++- drivers/net/ethernet/mellanox/mlx4/en_ethtool.c | 8 +++- .../net/ethernet/mellanox/mlx5/core/en_ethtool.c | 8 +++- drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 8 +++- .../ethernet/mellanox/mlx5/core/ipoib/ethtool.c | 8 +++- drivers/net/ethernet/myricom/myri10ge/myri10ge.c | 12 ++++-- .../net/ethernet/netronome/nfp/nfp_net_ethtool.c | 8 +++- drivers/net/ethernet/ni/nixge.c | 14 +++++-- .../net/ethernet/pensando/ionic/ionic_ethtool.c | 8 +++- .../ethernet/qlogic/netxen/netxen_nic_ethtool.c | 8 +++- drivers/net/ethernet/qlogic/qede/qede.h | 4 +- drivers/net/ethernet/qlogic/qede/qede_ethtool.c | 8 +++- .../net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c | 8 +++- drivers/net/ethernet/realtek/r8169_main.c | 10 ++++- drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c | 8 +++- drivers/net/ethernet/sfc/ethtool.c | 8 +++- drivers/net/ethernet/sfc/falcon/ethtool.c | 8 +++- drivers/net/ethernet/socionext/netsec.c | 10 +++-- .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 8 +++- drivers/net/ethernet/synopsys/dwc-xlgmac-ethtool.c | 14 +++++-- drivers/net/ethernet/tehuti/tehuti.c | 12 ++++-- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_ethtool.c | 8 +++- drivers/net/ethernet/ti/cpsw_new.c | 2 +- drivers/net/ethernet/ti/cpsw_priv.h | 8 +++- drivers/net/ethernet/ti/davinci_emac.c | 8 +++- drivers/net/ethernet/via/via-velocity.c | 8 +++- drivers/net/ethernet/xilinx/ll_temac_main.c | 14 +++++-- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 14 +++++-- drivers/net/netdevsim/ethtool.c | 8 +++- drivers/net/tun.c | 8 +++- drivers/net/usb/r8152.c | 8 +++- drivers/net/virtio_net.c | 8 +++- drivers/net/vmxnet3/vmxnet3_ethtool.c | 12 ++++-- drivers/net/wireless/ath/wil6210/ethtool.c | 14 +++++-- drivers/s390/net/qeth_ethtool.c | 4 +- drivers/staging/qlge/qlge_ethtool.c | 10 ++++- include/linux/ethtool.h | 22 ++++++++-- include/uapi/linux/ethtool_netlink.h | 2 + net/ethtool/coalesce.c | 29 ++++++++++--- net/ethtool/ioctl.c | 15 +++++-- net/ethtool/netlink.h | 2 +- 93 files changed, 678 insertions(+), 208 deletions(-) -- 2.8.1

1 4

[RFC V3 net-next 0/4] ethtool: extend coalesce uAPI
by Yufeng Mo 16 Aug '21

16 Aug '21

In order to support some configuration in coalesce uAPI, this RFC extends coalesce uAPI and add support for CQE mode. Below is some test result with HNS3 driver: 1. old ethtool(ioctl) + new kernel: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: 0 sample-interval: 0 pkt-rate-low: 0 pkt-rate-high: 0 rx-usecs: 20 rx-frames: 0 rx-usecs-irq: 0 rx-frames-irq: 0 tx-usecs: 20 tx-frames: 0 tx-usecs-irq: 0 tx-frames-irq: 0 rx-usecs-low: 0 rx-frame-low: 0 tx-usecs-low: 0 tx-frame-low: 0 rx-usecs-high: 0 rx-frame-high: 0 tx-usecs-high: 0 tx-frame-high: 0 2. ethtool(netlink with cqe mode) + kernel without cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: n/a TX: n/a 3. ethool(netlink with cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: off TX: off 4. ethool(netlink without cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a Change log: V2 -> V3: 1. split #1 into adding new parameter and adding new attributes. 2. use NLA_POLICY_MAX(NLA_U8, 1) instead of NLA_U8. 3. modify the description of CQE in Document. V1 -> V2: refactor #1&#2 in V1 suggestted by Jakub Kicinski. Yufeng Mo (4): ethtool: add two coalesce attributes for CQE mode ethtool: extend coalesce setting uAPI with CQE mode net: hns3: add support for EQE/CQE mode configuration net: hns3: add ethtool support for CQE/EQE mode configuration Documentation/networking/ethtool-netlink.rst | 8 ++++ drivers/infiniband/ulp/ipoib/ipoib_ethtool.c | 8 +++- drivers/net/ethernet/amazon/ena/ena_ethtool.c | 8 +++- drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c | 8 +++- .../net/ethernet/aquantia/atlantic/aq_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bcmsysport.c | 8 +++- drivers/net/ethernet/broadcom/bnx2.c | 12 ++++-- .../net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/genet/bcmgenet.c | 8 +++- drivers/net/ethernet/broadcom/tg3.c | 10 ++++- drivers/net/ethernet/brocade/bna/bnad_ethtool.c | 12 ++++-- drivers/net/ethernet/cavium/liquidio/lio_ethtool.c | 8 +++- .../net/ethernet/cavium/thunder/nicvf_ethtool.c | 4 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 8 +++- drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c | 8 +++- drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c | 8 +++- .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 8 +++- drivers/net/ethernet/cisco/enic/enic_ethtool.c | 8 +++- drivers/net/ethernet/cortina/gemini.c | 8 +++- drivers/net/ethernet/emulex/benet/be_ethtool.c | 8 +++- drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c | 8 +++- .../net/ethernet/freescale/enetc/enetc_ethtool.c | 8 +++- drivers/net/ethernet/freescale/fec_main.c | 14 ++++--- drivers/net/ethernet/freescale/gianfar_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hip04_eth.c | 8 +++- drivers/net/ethernet/hisilicon/hns/hns_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 49 +++++++++++++++++++++- drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | 11 +++++ drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c | 26 ++++++++++-- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 1 + .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 1 + drivers/net/ethernet/huawei/hinic/hinic_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000/e1000_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000e/ethtool.c | 8 +++- drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c | 8 +++- drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 8 +++- drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 8 +++- drivers/net/ethernet/intel/ice/ice_ethtool.c | 12 ++++-- drivers/net/ethernet/intel/igb/igb_ethtool.c | 8 +++- drivers/net/ethernet/intel/igbvf/ethtool.c | 8 +++- drivers/net/ethernet/intel/igc/igc_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbevf/ethtool.c | 8 +++- drivers/net/ethernet/jme.c | 12 ++++-- drivers/net/ethernet/marvell/mv643xx_eth.c | 12 ++++-- drivers/net/ethernet/marvell/mvneta.c | 14 +++++-- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 14 +++++-- .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 8 +++- drivers/net/ethernet/marvell/skge.c | 8 +++- drivers/net/ethernet/marvell/sky2.c | 8 +++- drivers/net/ethernet/mellanox/mlx4/en_ethtool.c | 8 +++- .../net/ethernet/mellanox/mlx5/core/en_ethtool.c | 8 +++- drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 8 +++- .../ethernet/mellanox/mlx5/core/ipoib/ethtool.c | 8 +++- drivers/net/ethernet/myricom/myri10ge/myri10ge.c | 12 ++++-- .../net/ethernet/netronome/nfp/nfp_net_ethtool.c | 8 +++- drivers/net/ethernet/ni/nixge.c | 14 +++++-- .../net/ethernet/pensando/ionic/ionic_ethtool.c | 8 +++- .../ethernet/qlogic/netxen/netxen_nic_ethtool.c | 8 +++- drivers/net/ethernet/qlogic/qede/qede.h | 4 +- drivers/net/ethernet/qlogic/qede/qede_ethtool.c | 8 +++- .../net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c | 8 +++- drivers/net/ethernet/realtek/r8169_main.c | 10 ++++- drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c | 8 +++- drivers/net/ethernet/sfc/ethtool.c | 8 +++- drivers/net/ethernet/sfc/falcon/ethtool.c | 8 +++- drivers/net/ethernet/socionext/netsec.c | 10 +++-- .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 8 +++- drivers/net/ethernet/synopsys/dwc-xlgmac-ethtool.c | 14 +++++-- drivers/net/ethernet/tehuti/tehuti.c | 12 ++++-- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_ethtool.c | 8 +++- drivers/net/ethernet/ti/cpsw_new.c | 2 +- drivers/net/ethernet/ti/cpsw_priv.h | 8 +++- drivers/net/ethernet/ti/davinci_emac.c | 8 +++- drivers/net/ethernet/via/via-velocity.c | 8 +++- drivers/net/ethernet/xilinx/ll_temac_main.c | 14 +++++-- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 14 +++++-- drivers/net/netdevsim/ethtool.c | 8 +++- drivers/net/tun.c | 8 +++- drivers/net/usb/r8152.c | 8 +++- drivers/net/virtio_net.c | 8 +++- drivers/net/vmxnet3/vmxnet3_ethtool.c | 12 ++++-- drivers/net/wireless/ath/wil6210/ethtool.c | 14 +++++-- drivers/s390/net/qeth_ethtool.c | 4 +- drivers/staging/qlge/qlge_ethtool.c | 10 ++++- include/linux/ethtool.h | 22 ++++++++-- include/uapi/linux/ethtool_netlink.h | 2 + net/ethtool/coalesce.c | 29 ++++++++++--- net/ethtool/ioctl.c | 15 +++++-- net/ethtool/netlink.h | 2 +- 93 files changed, 671 insertions(+), 208 deletions(-) -- 2.8.1

3 6

I need your response
by Godwin Pete 13 Aug '21

13 Aug '21

My good friend, I just want to know if you, can help me to transfer the amount of ($6Million). After the transfer we have to share it, 50% for me, and 50% for you. Please let me know if you can help me for more information in regards with the transfer. I hope you can work with me honestly? Thanks. Godwin Peter,

1 0

[RFC V3 net-next 0/4] ethtool: extend coalesce uAPI
by Yufeng Mo 11 Aug '21

11 Aug '21

In order to support some configuration in coalesce uAPI, this RFC extends coalesce uAPI and add support for CQE mode. Below is some test result with HNS3 driver: 1. old ethtool(ioctl) + new kernel: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: 0 sample-interval: 0 pkt-rate-low: 0 pkt-rate-high: 0 rx-usecs: 20 rx-frames: 0 rx-usecs-irq: 0 rx-frames-irq: 0 tx-usecs: 20 tx-frames: 0 tx-usecs-irq: 0 tx-frames-irq: 0 rx-usecs-low: 0 rx-frame-low: 0 tx-usecs-low: 0 tx-frame-low: 0 rx-usecs-high: 0 rx-frame-high: 0 tx-usecs-high: 0 tx-frame-high: 0 2. ethtool(netlink with cqe mode) + kernel without cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: n/a TX: n/a 3. ethool(netlink with cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a CQE mode RX: off TX: off 4. ethool(netlink without cqe mode) + kernel with cqe mode: estuary:/$ ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: on TX: on stats-block-usecs: n/a sample-interval: n/a pkt-rate-low: n/a pkt-rate-high: n/a rx-usecs: 20 rx-frames: 0 rx-usecs-irq: n/a rx-frames-irq: n/a tx-usecs: 20 tx-frames: 0 tx-usecs-irq: n/a tx-frames-irq: n/a rx-usecs-low: n/a rx-frame-low: n/a tx-usecs-low: n/a tx-frame-low: n/a rx-usecs-high: 0 rx-frame-high: n/a tx-usecs-high: 0 tx-frame-high: n/a Change log: V2 -> V3: 1. split #1 into adding new parameter and adding new attributes. 2. use NLA_POLICY_MAX(NLA_U8, 1) instead of NLA_U8. 3. modify the description of CQE in Document. V1 -> V2: refactor #1&#2 in V1 suggestted by Jakub Kicinski. Yufeng Mo (4): ethtool: add two coalesce attributes for CQE mode ethtool: extend coalesce setting uAPI with CQE mode net: hns3: add support for EQE/CQE mode configuration net: hns3: add ethtool support for CQE/EQE mode configuration Documentation/networking/ethtool-netlink.rst | 8 ++++ drivers/infiniband/ulp/ipoib/ipoib_ethtool.c | 8 +++- drivers/net/ethernet/amazon/ena/ena_ethtool.c | 8 +++- drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c | 8 +++- .../net/ethernet/aquantia/atlantic/aq_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bcmsysport.c | 8 +++- drivers/net/ethernet/broadcom/bnx2.c | 12 ++++-- .../net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c | 8 +++- drivers/net/ethernet/broadcom/genet/bcmgenet.c | 8 +++- drivers/net/ethernet/broadcom/tg3.c | 10 ++++- drivers/net/ethernet/brocade/bna/bnad_ethtool.c | 12 ++++-- drivers/net/ethernet/cavium/liquidio/lio_ethtool.c | 8 +++- .../net/ethernet/cavium/thunder/nicvf_ethtool.c | 4 +- drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 8 +++- drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c | 8 +++- drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c | 8 +++- .../net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c | 8 +++- drivers/net/ethernet/cisco/enic/enic_ethtool.c | 8 +++- drivers/net/ethernet/cortina/gemini.c | 8 +++- drivers/net/ethernet/emulex/benet/be_ethtool.c | 8 +++- drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c | 8 +++- .../net/ethernet/freescale/enetc/enetc_ethtool.c | 8 +++- drivers/net/ethernet/freescale/fec_main.c | 14 ++++--- drivers/net/ethernet/freescale/gianfar_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hip04_eth.c | 8 +++- drivers/net/ethernet/hisilicon/hns/hns_ethtool.c | 8 +++- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 49 +++++++++++++++++++++- drivers/net/ethernet/hisilicon/hns3/hns3_enet.h | 11 +++++ drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c | 26 ++++++++++-- .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 1 + .../ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 1 + drivers/net/ethernet/huawei/hinic/hinic_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000/e1000_ethtool.c | 8 +++- drivers/net/ethernet/intel/e1000e/ethtool.c | 8 +++- drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c | 8 +++- drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 8 +++- drivers/net/ethernet/intel/iavf/iavf_ethtool.c | 8 +++- drivers/net/ethernet/intel/ice/ice_ethtool.c | 12 ++++-- drivers/net/ethernet/intel/igb/igb_ethtool.c | 8 +++- drivers/net/ethernet/intel/igbvf/ethtool.c | 8 +++- drivers/net/ethernet/intel/igc/igc_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c | 8 +++- drivers/net/ethernet/intel/ixgbevf/ethtool.c | 8 +++- drivers/net/ethernet/jme.c | 12 ++++-- drivers/net/ethernet/marvell/mv643xx_eth.c | 12 ++++-- drivers/net/ethernet/marvell/mvneta.c | 14 +++++-- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 14 +++++-- .../ethernet/marvell/octeontx2/nic/otx2_ethtool.c | 8 +++- drivers/net/ethernet/marvell/skge.c | 8 +++- drivers/net/ethernet/marvell/sky2.c | 8 +++- drivers/net/ethernet/mellanox/mlx4/en_ethtool.c | 8 +++- .../net/ethernet/mellanox/mlx5/core/en_ethtool.c | 8 +++- drivers/net/ethernet/mellanox/mlx5/core/en_rep.c | 8 +++- .../ethernet/mellanox/mlx5/core/ipoib/ethtool.c | 8 +++- drivers/net/ethernet/myricom/myri10ge/myri10ge.c | 12 ++++-- .../net/ethernet/netronome/nfp/nfp_net_ethtool.c | 8 +++- drivers/net/ethernet/ni/nixge.c | 14 +++++-- .../net/ethernet/pensando/ionic/ionic_ethtool.c | 8 +++- .../ethernet/qlogic/netxen/netxen_nic_ethtool.c | 8 +++- drivers/net/ethernet/qlogic/qede/qede.h | 4 +- drivers/net/ethernet/qlogic/qede/qede_ethtool.c | 8 +++- .../net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c | 8 +++- drivers/net/ethernet/realtek/r8169_main.c | 10 ++++- drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c | 8 +++- drivers/net/ethernet/sfc/ethtool.c | 8 +++- drivers/net/ethernet/sfc/falcon/ethtool.c | 8 +++- drivers/net/ethernet/socionext/netsec.c | 10 +++-- .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 8 +++- drivers/net/ethernet/synopsys/dwc-xlgmac-ethtool.c | 14 +++++-- drivers/net/ethernet/tehuti/tehuti.c | 12 ++++-- drivers/net/ethernet/ti/cpsw.c | 2 +- drivers/net/ethernet/ti/cpsw_ethtool.c | 8 +++- drivers/net/ethernet/ti/cpsw_new.c | 2 +- drivers/net/ethernet/ti/cpsw_priv.h | 8 +++- drivers/net/ethernet/ti/davinci_emac.c | 8 +++- drivers/net/ethernet/via/via-velocity.c | 8 +++- drivers/net/ethernet/xilinx/ll_temac_main.c | 14 +++++-- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 14 +++++-- drivers/net/netdevsim/ethtool.c | 8 +++- drivers/net/tun.c | 8 +++- drivers/net/usb/r8152.c | 8 +++- drivers/net/virtio_net.c | 8 +++- drivers/net/vmxnet3/vmxnet3_ethtool.c | 12 ++++-- drivers/net/wireless/ath/wil6210/ethtool.c | 14 +++++-- drivers/s390/net/qeth_ethtool.c | 4 +- drivers/staging/qlge/qlge_ethtool.c | 10 ++++- include/linux/ethtool.h | 22 ++++++++-- include/uapi/linux/ethtool_netlink.h | 2 + net/ethtool/coalesce.c | 29 ++++++++++--- net/ethtool/ioctl.c | 15 +++++-- net/ethtool/netlink.h | 2 +- 93 files changed, 671 insertions(+), 208 deletions(-) -- 2.8.1

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