Very basic initial enablement of CXL on arm virt with relevant ACPI table construction. Includes changes in gpex-acpi to ensure correct DSDT for any pci_expand_bridge/pxb-cxl bridges. Note not looking to do the primary root bridge yet.
Based on Ben's tree cxl-2.0v3 at https://gitlab.com/bwidawsk/qemu
To actually get the memory appropriately exposed to the OS a few additional changes are needed as discussed in thread https://lore.kernel.org/qemu-devel/20210128174009.00007536@Huawei.com/
I will rebase this on future versions of Ben's series as needed.
Jonathan Cameron (3): hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl hw/cxl/cxl-device-utils: Allow incorrect read lengths
hw/arm/Kconfig | 1 + hw/arm/virt-acpi-build.c | 27 +++++++++++++++++++++++++++ hw/arm/virt.c | 3 ++- hw/cxl/cxl-device-utils.c | 4 ++-- hw/pci-host/gpex-acpi.c | 22 +++++++++++++++++++--- 5 files changed, 51 insertions(+), 6 deletions(-)