- Virt - mailweb.openeuler.org

Virt SIG例会
by openEuler conference 26 Jan '26

26 Jan '26

您好！ Virt 邀请您参加 2026-01-30 14:15 召开的Tencent会议(自动录制) 会议主题：Virt SIG例会会议链接：https://meeting.tencent.com/dm/y8KHyJGkDjYv 会议纪要：https://etherpad.openeuler.org/p/Virt-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! Virt invites you to attend the Tencent conference(auto recording) will be held at 2026-01-30 14:15, The subject of the conference is Virt SIG例会 You can join the meeting at https://meeting.tencent.com/dm/y8KHyJGkDjYv Add topics at https://etherpad.openeuler.org/p/Virt-meetings More information: https://www.openeuler.org/en/

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Virt SIG 12月例会
by openEuler conference 16 Dec '25

16 Dec '25

您好！ Virt 邀请您参加 2025-12-19 14:15 召开的Tencent会议(自动录制) 会议主题：Virt SIG 12月例会会议链接：https://meeting.tencent.com/dm/qwLCg5mLFQyG 会议纪要：https://etherpad.openeuler.org/p/Virt-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! Virt invites you to attend the Tencent conference(auto recording) will be held at 2025-12-19 14:15, The subject of the conference is Virt SIG 12月例会 You can join the meeting at https://meeting.tencent.com/dm/qwLCg5mLFQyG Add topics at https://etherpad.openeuler.org/p/Virt-meetings More information: https://www.openeuler.org/en/

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[PATCH] hw/intc: fix the issue of vNMI not supporting live migration
by Jinqian Yang 21 Nov '25

21 Nov '25

GICD_INMIRn marks SPI as NMI. GICR_INMIR0 marks SGI and PPI as NMI. If GICR_INMIR0 or GICD_INMIRn is not migrated, the vNMI state will be lost on the destination side. Additionally, use a subsection to avoid migration failure when the remote QEMU does not have GICR_INMIR0 support. When migrating from a QEMU that saves GICR_INMIR0 or GICD_INMIRn state to one that does not, the migration will fail with a graceful error message. When migrating from a QEMU that does not save GICR_INMIR0 or GICD_INMIRn state to one that does, the migration will succeed, but the vNMI state will be lost on the destination side since the source did not save it. Sign-off-by: Jinqian Yang <yangjinqian1(a)huawei.com> --- hw/intc/arm_gicv3_common.c | 33 ++++++++++++++++++++++++++++++ hw/intc/arm_gicv3_kvm.c | 27 ++++++++++++++++++++++++ hw/intc/gicv3_internal.h | 4 ++++ include/hw/intc/arm_gicv3_common.h | 4 ++++ 4 files changed, 68 insertions(+) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 5667d9f40b..9a1fa2ff62 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -164,6 +164,24 @@ const VMStateDescription vmstate_gicv3_gicv4 = { } }; +static bool gicv3_nmi_needed(void *opaque) +{ + GICv3CPUState *cs = opaque; + + return cs->gic->nmi_support; +} + +const VMStateDescription vmstate_gicv3_gicr_nmi = { + .name = "arm_gicv3_cpu/gicr_nmi", + .version_id = 1, + .minimum_version_id = 1, + .needed = gicv3_nmi_needed, + .fields = (VMStateField[]) { + VMSTATE_UINT32(gicr_inmir0, GICv3CPUState), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_gicv3_cpu = { .name = "arm_gicv3_cpu", .version_id = 1, @@ -196,6 +214,7 @@ static const VMStateDescription vmstate_gicv3_cpu = { &vmstate_gicv3_cpu_virt, &vmstate_gicv3_cpu_sre_el1, &vmstate_gicv3_gicv4, + &vmstate_gicv3_gicr_nmi, NULL } }; @@ -238,6 +257,17 @@ const VMStateDescription vmstate_gicv3_gicd_no_migration_shift_bug = { } }; +const VMStateDescription vmstate_gicv3_gicd_nmi = { + .name = "arm_gicv3/gicd_nmi", + .version_id = 1, + .minimum_version_id = 1, + .needed = gicv3_nmi_needed, + .fields = (const VMStateField[]) { + VMSTATE_UINT32_ARRAY(gicd_inmir, GICv3State, GICV3_BMP_SIZE), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_gicv3 = { .name = "arm_gicv3", .version_id = 1, @@ -266,6 +296,7 @@ static const VMStateDescription vmstate_gicv3 = { }, .subsections = (const VMStateDescription * []) { &vmstate_gicv3_gicd_no_migration_shift_bug, + &vmstate_gicv3_gicd_nmi, NULL } }; @@ -554,6 +585,7 @@ static void arm_gicv3_common_reset_hold(Object *obj) cs->edge_trigger = 0xffff; cs->gicr_igrpmodr0 = 0; cs->gicr_nsacr = 0; + cs->gicr_inmir0 = 0; memset(cs->gicr_ipriorityr, 0, sizeof(cs->gicr_ipriorityr)); cs->hppi.prio = 0xff; @@ -585,6 +617,7 @@ static void arm_gicv3_common_reset_hold(Object *obj) memset(s->gicd_ipriority, 0, sizeof(s->gicd_ipriority)); memset(s->gicd_irouter, 0, sizeof(s->gicd_irouter)); memset(s->gicd_nsacr, 0, sizeof(s->gicd_nsacr)); + memset(s->gicd_inmir, 0, sizeof(s->gicd_inmir)); /* GICD_IROUTER are UNKNOWN at reset so in theory the guest must * write these to get sane behaviour and we need not populate the * pointer cache here; however having the cache be different for diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index dd2a60fa20..ba6d09a5b9 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -397,6 +397,9 @@ static void kvm_arm_gicv3_put(GICv3State *s) reg = c->gicr_iactiver0; kvm_gicr_access(s, GICR_ISACTIVER0, ncpu, &reg, true); + reg = c->gicr_inmir0; + kvm_gicr_access(s, GICR_INMIR0, ncpu, &reg, true); + for (i = 0; i < GIC_INTERNAL; i += 4) { reg = c->gicr_ipriorityr[i] | (c->gicr_ipriorityr[i + 1] << 8) | @@ -561,6 +564,8 @@ static void kvm_arm_gicv3_get(GICv3State *s) c->gicr_ipendr0 = reg; kvm_gicr_access(s, GICR_ISACTIVER0, ncpu, &reg, false); c->gicr_iactiver0 = reg; + kvm_gicr_access(s, GICR_INMIR0, ncpu, &reg, false); + c->gicr_inmir0 = reg; for (i = 0; i < GIC_INTERNAL; i += 4) { kvm_gicr_access(s, GICR_IPRIORITYR + i, ncpu, &reg, false); @@ -809,6 +814,22 @@ static void kvm_gicv3_init_cpu_reginfo(CPUState *cs) define_arm_cp_regs(ARM_CPU(cs), gicv3_cpuif_reginfo); } +static bool kvm_gicv3_check_nmi(GICv3State *s) +{ + uint32_t typer = 0; + + if (kvm_device_access(s->dev_fd, + KVM_DEV_ARM_VGIC_GRP_DIST_REGS, + KVM_VGIC_ATTR(GICD_TYPER, 0), + &typer, + false, + NULL)) { + return false; + } + + return (typer & GICD_TYPER_NMI) != 0; +} + static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp) { GICv3State *s = KVM_ARM_GICV3(dev); @@ -918,6 +939,12 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp) KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES)) { qemu_add_vm_change_state_handler(vm_change_state_handler, s); } + + if (kvm_gicv3_check_nmi(s)) { + s->nmi_support = true; + } else { + s->nmi_support = false; + } } static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 0bed0f6e2a..938c7c5472 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -52,6 +52,7 @@ #define GICD_SGIR 0x0F00 #define GICD_CPENDSGIR 0x0F10 #define GICD_SPENDSGIR 0x0F20 +#define GICD_INMIR 0x0F80 #define GICD_IROUTER 0x6000 #define GICD_IDREGS 0xFFD0 @@ -68,6 +69,8 @@ #define GICD_CTLR_E1NWF (1U << 7) #define GICD_CTLR_RWP (1U << 31) +#define GICD_TYPER_NMI (1U << 9) + #define GICD_TYPER_LPIS_SHIFT 17 /* 16 bits EventId */ @@ -109,6 +112,7 @@ #define GICR_ICFGR1 (GICR_SGI_OFFSET + 0x0C04) #define GICR_IGRPMODR0 (GICR_SGI_OFFSET + 0x0D00) #define GICR_NSACR (GICR_SGI_OFFSET + 0x0E00) +#define GICR_INMIR0 (GICR_SGI_OFFSET + 0x0F80) /* VLPI redistributor registers, offsets from VLPI_base */ #define GICR_VPROPBASER (GICR_VLPI_OFFSET + 0x70) diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index b5f8ba17ff..48694fd757 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -173,6 +173,7 @@ struct GICv3CPUState { uint32_t edge_trigger; /* ICFGR0 and ICFGR1 even bits */ uint32_t gicr_igrpmodr0; uint32_t gicr_nsacr; + uint32_t gicr_inmir0; uint8_t gicr_ipriorityr[GIC_INTERNAL]; /* VLPI_base page registers */ uint64_t gicr_vpropbaser; @@ -279,11 +280,14 @@ struct GICv3State { */ GICv3CPUState *gicd_irouter_target[GICV3_MAXIRQ]; uint32_t gicd_nsacr[DIV_ROUND_UP(GICV3_MAXIRQ, 16)]; + uint32_t gicd_inmir[GICV3_BMP_SIZE]; Notifier cpu_update_notifier; GICv3CPUState *cpu; /* List of all ITSes connected to this GIC */ GPtrArray *itslist; + + bool nmi_support; }; #define GICV3_BITMAP_ACCESSORS(BMP) \ -- 2.33.0

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Virt SIG 11月例会
by openEuler conference 18 Nov '25

18 Nov '25

您好！ Virt 邀请您参加 2025-11-28 14:15 召开的WeLink会议(自动录制) 会议主题：Virt SIG 11月例会会议链接：https://meeting.huaweicloud.com:36443/#/j/989673357 会议纪要：https://etherpad.openeuler.org/p/Virt-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! Virt invites you to attend the WeLink conference(auto recording) will be held at 2025-11-28 14:15, The subject of the conference is Virt SIG 11月例会 You can join the meeting at https://meeting.huaweicloud.com:36443/#/j/989673357 Add topics at https://etherpad.openeuler.org/p/Virt-meetings More information: https://www.openeuler.org/en/

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[PATCH qemu-8.2.0] hw/intc: fix the issue of vNMI not supporting live migration
by Jinqian Yang 05 Nov '25

05 Nov '25

Add the migration of GICR_INMIR0. vNMI migration for SPI is not supported, only supports SGI and PPI in guest. Sign-off-by: Jinqian Yang <yangjinqian1(a)huawei.com> --- hw/intc/arm_gicv3_common.c | 20 ++++++++++++++++++++ hw/intc/arm_gicv3_kvm.c | 22 ++++++++++++++++++++++ hw/intc/gicv3_internal.h | 1 + include/hw/intc/arm_gicv3_common.h | 3 +++ 4 files changed, 46 insertions(+) diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index 5667d9f40b..8bf4d15fd3 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -164,6 +164,24 @@ const VMStateDescription vmstate_gicv3_gicv4 = { } }; +static bool gicv3_inmir_needed(void *opaque) +{ + GICv3CPUState *cs = opaque; + + return cs->gic->inmir_support; +} + +const VMStateDescription vmstate_gicv3_cpu_inmir = { + .name = "arm_gicv3_cpu/inmir", + .version_id = 1, + .minimum_version_id = 1, + .needed = gicv3_inmir_needed, + .fields = (VMStateField[]) { + VMSTATE_UINT32(gicr_inmir0, GICv3CPUState), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_gicv3_cpu = { .name = "arm_gicv3_cpu", .version_id = 1, @@ -196,6 +214,7 @@ static const VMStateDescription vmstate_gicv3_cpu = { &vmstate_gicv3_cpu_virt, &vmstate_gicv3_cpu_sre_el1, &vmstate_gicv3_gicv4, + &vmstate_gicv3_cpu_inmir, NULL } }; @@ -554,6 +573,7 @@ static void arm_gicv3_common_reset_hold(Object *obj) cs->edge_trigger = 0xffff; cs->gicr_igrpmodr0 = 0; cs->gicr_nsacr = 0; + cs->gicr_inmir0 = 0; memset(cs->gicr_ipriorityr, 0, sizeof(cs->gicr_ipriorityr)); cs->hppi.prio = 0xff; diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index dd2a60fa20..77e82e6e2a 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -397,6 +397,9 @@ static void kvm_arm_gicv3_put(GICv3State *s) reg = c->gicr_iactiver0; kvm_gicr_access(s, GICR_ISACTIVER0, ncpu, &reg, true); + reg = c->gicr_inmir0; + kvm_gicr_access(s, GICR_INMIR0, ncpu, &reg, true); + for (i = 0; i < GIC_INTERNAL; i += 4) { reg = c->gicr_ipriorityr[i] | (c->gicr_ipriorityr[i + 1] << 8) | @@ -561,6 +564,8 @@ static void kvm_arm_gicv3_get(GICv3State *s) c->gicr_ipendr0 = reg; kvm_gicr_access(s, GICR_ISACTIVER0, ncpu, &reg, false); c->gicr_iactiver0 = reg; + kvm_gicr_access(s, GICR_INMIR0, ncpu, &reg, false); + c->gicr_inmir0 = reg; for (i = 0; i < GIC_INTERNAL; i += 4) { kvm_gicr_access(s, GICR_IPRIORITYR + i, ncpu, &reg, false); @@ -809,6 +814,17 @@ static void kvm_gicv3_init_cpu_reginfo(CPUState *cs) define_arm_cp_regs(ARM_CPU(cs), gicv3_cpuif_reginfo); } +static bool kvm_gicv3_check_inmir(GICv3State *s, int cpu) +{ + uint32_t value = 0; + return !kvm_device_access(s->dev_fd, + KVM_DEV_ARM_VGIC_GRP_REDIST_REGS, + KVM_VGIC_ATTR(GICR_INMIR0, cpu), + &value, + false, + NULL) && value != 0; +} + static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp) { GICv3State *s = KVM_ARM_GICV3(dev); @@ -918,6 +934,12 @@ static void kvm_arm_gicv3_realize(DeviceState *dev, Error **errp) KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES)) { qemu_add_vm_change_state_handler(vm_change_state_handler, s); } + + if (kvm_gicv3_check_inmir(s, 0)) { + s->inmir_support = true; + } else { + s->inmir_support = false; + } } static void kvm_arm_gicv3_class_init(ObjectClass *klass, void *data) diff --git a/hw/intc/gicv3_internal.h b/hw/intc/gicv3_internal.h index 0bed0f6e2a..2b982716d6 100644 --- a/hw/intc/gicv3_internal.h +++ b/hw/intc/gicv3_internal.h @@ -109,6 +109,7 @@ #define GICR_ICFGR1 (GICR_SGI_OFFSET + 0x0C04) #define GICR_IGRPMODR0 (GICR_SGI_OFFSET + 0x0D00) #define GICR_NSACR (GICR_SGI_OFFSET + 0x0E00) +#define GICR_INMIR0 (GICR_SGI_OFFSET + 0x0F80) /* VLPI redistributor registers, offsets from VLPI_base */ #define GICR_VPROPBASER (GICR_VLPI_OFFSET + 0x70) diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index b5f8ba17ff..4b8012bd89 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -173,6 +173,7 @@ struct GICv3CPUState { uint32_t edge_trigger; /* ICFGR0 and ICFGR1 even bits */ uint32_t gicr_igrpmodr0; uint32_t gicr_nsacr; + uint32_t gicr_inmir0; uint8_t gicr_ipriorityr[GIC_INTERNAL]; /* VLPI_base page registers */ uint64_t gicr_vpropbaser; @@ -284,6 +285,8 @@ struct GICv3State { GICv3CPUState *cpu; /* List of all ITSes connected to this GIC */ GPtrArray *itslist; + + bool inmir_support; }; #define GICV3_BITMAP_ACCESSORS(BMP) \ -- 2.33.0

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Virt SIG例会
by openEuler conference 13 Oct '25

13 Oct '25

您好！ Virt 邀请您参加 2025-10-17 14:30 召开的WeLink会议(自动录制) 会议主题：Virt SIG例会会议链接：https://meeting.huaweicloud.com:36443/#/j/985088574 会议纪要：https://etherpad.openeuler.org/p/Virt-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! Virt invites you to attend the WeLink conference(auto recording) will be held at 2025-10-17 14:30, The subject of the conference is Virt SIG例会 You can join the meeting at https://meeting.huaweicloud.com:36443/#/j/985088574 Add topics at https://etherpad.openeuler.org/p/Virt-meetings More information: https://www.openeuler.org/en/

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[PATCH] hw/vfio/migration: Fix vfio migration isn't aborted in a corner case
by Jinqian Yang 28 Sep '25

28 Sep '25

From: Kunkun Jiang <jiangkunkun(a)huawei.com> In the final stage of vfio migration, the destination VM will execute vm_start vfio_vmstate_change vfio_migration_set_state At this time, vfio_migration_set_state may return failure. For example, the device is in the reset process due to some hardware problems. In this case, the vfio migration should be aborted, but the current logic does not abort. Instead, it continues to execute, which will cause Unpredictable impact. This patch fixes this case. Signed-off-by: Kunkun Jiang <jiangkunkun(a)huawei.com> --- hw/vfio/migration.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/vfio/migration.c b/hw/vfio/migration.c index b81cb7e23b..8c27298477 100644 --- a/hw/vfio/migration.c +++ b/hw/vfio/migration.c @@ -720,7 +720,7 @@ static void vfio_vmstate_change_prepare(void *opaque, bool running, static void vfio_vmstate_change(void *opaque, bool running, RunState state) { VFIODevice *vbasedev = opaque; - enum vfio_device_mig_state new_state; + enum vfio_device_mig_state new_state, pre_state; int ret; if (running) { @@ -733,6 +733,8 @@ static void vfio_vmstate_change(void *opaque, bool running, RunState state) VFIO_DEVICE_STATE_STOP; } + pre_state = vbasedev->migration->device_state; + /* * If setting the device in new_state fails, the device should be reset. * To do so, use ERROR state as a recover state. @@ -747,6 +749,10 @@ static void vfio_vmstate_change(void *opaque, bool running, RunState state) if (migrate_get_current()->to_dst_file) { qemu_file_set_error(migrate_get_current()->to_dst_file, ret); } + + if (pre_state == VFIO_DEVICE_STATE_RESUMING) { + exit(EXIT_FAILURE); + } } trace_vfio_vmstate_change(vbasedev->name, running, RunState_str(state), -- 2.33.0

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Virt SIG 例会
by openEuler conference 22 Sep '25

22 Sep '25

您好！ Virt 邀请您参加 2025-09-26 14:30 召开的WeLink会议(自动录制) 会议主题：Virt SIG 例会会议链接：https://meeting.huaweicloud.com:36443/#/j/969737091 会议纪要：https://etherpad.openeuler.org/p/Virt-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! Virt invites you to attend the WeLink conference(auto recording) will be held at 2025-09-26 14:30, The subject of the conference is Virt SIG 例会 You can join the meeting at https://meeting.huaweicloud.com:36443/#/j/969737091 Add topics at https://etherpad.openeuler.org/p/Virt-meetings More information: https://www.openeuler.org/en/

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[PATCH] hw/arm/virt: Introduce a IPIV machine option
by Jinqian Yang 18 Sep '25

18 Sep '25

Add the ipiv switch in the "-machine" to allow the guest to more flexibly choose whether to enable ipiv. Signed-off-by: Jinqian Yang <yangjinqian1(a)huawei.com> --- hw/arm/virt.c | 20 ++++++++++++++++++++ include/hw/arm/virt.h | 1 + target/arm/kvm.c | 9 +++++++-- 3 files changed, 28 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index d8890e319f..576ee0afd0 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -3054,6 +3054,20 @@ static void virt_set_its(Object *obj, bool value, Error **errp) vms->its = value; } +static bool virt_get_ipiv(Object *obj, Error **errp) +{ + VirtMachineState *vms = VIRT_MACHINE(obj); + + return vms->ipiv; +} + +static void virt_set_ipiv(Object *obj, bool value, Error **errp) +{ + VirtMachineState *vms = VIRT_MACHINE(obj); + + vms->ipiv = value; +} + static void virt_get_dtb_randomness(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -4158,6 +4172,12 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) object_class_property_set_description(oc, "x-target-impl-cpus", "Describe target cpu impl in the format midr1:revidr1-midr2:revidr2" "Maximum 4 midr:revidr pair is supported"); + + object_class_property_add_bool(oc, "ipiv", + virt_get_ipiv, + virt_set_ipiv); + object_class_property_set_description(oc, "ipiv", + "Set on/off to enable/disable IPIV"); } static char *virt_get_kvm_type(Object *obj, Error **errp G_GNUC_UNUSED) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index fee7c27e0c..a54b0057fb 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -225,6 +225,7 @@ struct VirtMachineState { bool cpu_hotplug_enabled; bool ras; bool mte; + bool ipiv; OnOffAuto dtb_randomness; bool pmu; int smmu_accel_count; diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 96b0784b90..d79b667e8c 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -338,10 +338,15 @@ int kvm_arch_get_default_type(MachineState *ms) return fixed_ipa ? 0 : size; } -static void kvm_update_ipiv_cap(KVMState *s) +static void kvm_update_ipiv_cap(MachineState *ms, KVMState *s) { + VirtMachineState *vms = VIRT_MACHINE(ms); int ret; + if (!vms->ipiv) { + return; + } + if (!kvm_check_extension(s, KVM_CAP_ARM_HISI_IPIV)) { return; } @@ -428,7 +433,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) } kvm_arm_init_debug(s); - kvm_update_ipiv_cap(s); + kvm_update_ipiv_cap(ms, s); ret = kvm_arm_rme_init(ms); if (ret) { -- 2.33.0

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[PATCH qemu-8.2.0 00/30] Cross-Generation Live Migration
by Jinqian Yang 04 Sep '25

04 Sep '25

Part1: rework id register storage Cornelia Huck ----------------------------------------------------------------- Patch#1 arm/cpu: Add sysreg definitions in cpu-sysregs.h Patch#2 arm/cpu: Store aa64isar0/aa64zfr0 into the idregs arrays Patch#3 arm/cpu: Store aa64isar1/2 into the idregs array Patch#4 arm/cpu: Store aa64pfr0/1 into the idregs array Patch#5 arm/cpu: Store aa64mmfr0-2 into the idregs array Patch#6 arm/cpu: Store aa64dfr0/1 into the idregs array Patch#7 arm/cpu: Store aa64dfr0/1 into the idregs array Patch#8 arm/cpu: Store aa64smfr0 into the idregs array Patch#9 arm/cpu: Store id_isar0-7 into the idregs array Patch#10 arm/cpu: Store id_pfr0/1/2 into the idregs array Patch#11 arm/cpu: Store id_mmfr0-5 into the idregs array Patch#12 arm/cpu: Add sysreg generation scripts Patch#13 arm/cpu: switch to a generated cpu-sysregs.h.inc Part2: Introduce a customizable aarch64 KVM host model ----------------------------------------------------------------- Patch#14 arm/kvm: use fd instead of fdarray[2] Patch#15 arm/cpu: Add infra to handle generated ID register definitions Patch#16 arm/cpu: Add sysreg properties generation Patch#17 arm/cpu: Add generated sysreg properties Patch#18 kvm: kvm_get_writable_id_regs Patch#19 arm/cpu: accessors for writable id registers Patch#20 arm/kvm: Allow reading all the writable ID registers Patch#21 arm/kvm: write back modified ID regs to KVM Patch#22 arm/cpu: more customization for the kvm host cpu model Patch#23 arm-qmp-cmds: introspection for ID register props Patch#24 arm/cpu-features: document ID reg properties Patch#25 arm/cpu: manually make IDR/REVIDR/AIDR writable Patch#26 arm/cpu: enable MIDR writable Part3: Errata management for VM Live migration ----------------------------------------------------------------- Patch#27 target/arm/kvm: Add SMMC hypercall definitions Patch#28 hw/arm/virt: Initial support to set target_impl CPUs Patch#29 target/arm/kvm: Use PSCI_VERSIOn for version info Patch#30 target/arm/kvm: Set DISCOVER_IMPL_* hypercalls Cornelia Huck (7): arm/cpu: switch to a generated cpu-sysregs.h.inc arm/kvm: use fd instead of fdarray[2] arm/cpu: Add generated sysreg properties kvm: kvm_get_writable_id_regs arm/cpu: accessors for writable id registers arm-qmp-cmds: introspection for ID register props arm/cpu-features: document ID reg properties Eric Auger (17): arm/cpu: Add sysreg definitions in cpu-sysregs.h arm/cpu: Store aa64isar0/aa64zfr0 into the idregs arrays arm/cpu: Store aa64isar1/2 into the idregs array arm/cpu: Store aa64pfr0/1 into the idregs array arm/cpu: Store aa64mmfr0-2 into the idregs array arm/cpu: Store aa64dfr0/1 into the idregs array arm/cpu: Store aa64smfr0 into the idregs array arm/cpu: Store id_isar0-7 into the idregs array arm/cpu: Store id_pfr0/1/2 into the idregs array arm/cpu: Store id_dfr0/1 into the idregs array arm/cpu: Store id_mmfr0-5 into the idregs array arm/cpu: Add sysreg generation scripts arm/cpu: Add infra to handle generated ID register definitions arm/cpu: Add sysreg properties generation arm/kvm: Allow reading all the writable ID registers arm/kvm: write back modified ID regs to KVM arm/cpu: more customization for the kvm host cpu model Qingtong Jia (2): arm/cpu: manually make IDR/REVIDR/AIDR writable arm/cpu: enable MIDR writable Shameer Kolothum (4): target/arm/kvm: Add SMMC hypercall definitions hw/arm/virt: Initial support to set target_impl CPUs target/arm/kvm: Use PSCI_VERSIOn for version info target/arm/kvm: Set DISCOVER_IMPL_* hypercalls MAINTAINERS | 1 + accel/kvm/kvm-all.c | 7 + docs/system/arm/cpu-features.rst | 104 +++- hw/arm/virt.c | 65 ++- hw/intc/armv7m_nvic.c | 27 +- include/hw/boards.h | 3 + scripts/arm-gen-cpu-sysregs-header.awk | 40 ++ scripts/gen-cpu-sysreg-properties.awk | 346 +++++++++++ scripts/update-aarch64-sysreg-code.sh | 35 ++ target/arm/arm-qmp-cmds.c | 19 + target/arm/cpu-custom.h | 60 ++ target/arm/cpu-features.h | 295 +++++----- target/arm/cpu-sysreg-properties.c | 764 +++++++++++++++++++++++++ target/arm/cpu-sysregs.h | 48 ++ target/arm/cpu-sysregs.h.inc | 55 ++ target/arm/cpu.c | 124 ++-- target/arm/cpu.h | 126 +++- target/arm/cpu64.c | 202 ++++--- target/arm/helper.c | 66 +-- target/arm/hvf/hvf.c | 23 +- target/arm/internals.h | 6 +- target/arm/kvm-rme.c | 5 +- target/arm/kvm.c | 188 +++++- target/arm/kvm64.c | 365 +++++++++--- target/arm/kvm_arm.h | 46 +- target/arm/meson.build | 1 + target/arm/ptw.c | 6 +- target/arm/tcg/cpu32.c | 498 ++++++++-------- target/arm/tcg/cpu64.c | 455 +++++++-------- target/arm/trace-events | 8 + 30 files changed, 3035 insertions(+), 953 deletions(-) create mode 100755 scripts/arm-gen-cpu-sysregs-header.awk create mode 100755 scripts/gen-cpu-sysreg-properties.awk create mode 100755 scripts/update-aarch64-sysreg-code.sh create mode 100644 target/arm/cpu-custom.h create mode 100644 target/arm/cpu-sysreg-properties.c create mode 100644 target/arm/cpu-sysregs.h create mode 100644 target/arm/cpu-sysregs.h.inc -- 2.33.0

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[PATCH qemu-8.2 0/1] hw/intc: fix the issue of vNMI not supporting live migration
by Jinqian Yang 28 Aug '25

28 Aug '25

Jinqian Yang (1): hw/intc: fix the issue of vNMI not supporting live migration hw/intc/arm_gicv3_common.c | 2 ++ hw/intc/arm_gicv3_kvm.c | 5 +++++ hw/intc/gicv3_internal.h | 1 + include/hw/intc/arm_gicv3_common.h | 1 + 4 files changed, 9 insertions(+) -- 2.33.0

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openEuler Virt SIG 例会
by openEuler conference 22 Aug '25

22 Aug '25

您好！ Virt 邀请您参加 2025-08-28 14:30 召开的WeLink会议(自动录制) 会议主题：openEuler Virt SIG 例会会议链接：https://meeting.huaweicloud.com:36443/#/j/981534504 会议纪要：https://etherpad.openeuler.org/p/Virt-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! Virt invites you to attend the WeLink conference(auto recording) will be held at 2025-08-28 14:30, The subject of the conference is openEuler Virt SIG 例会 You can join the meeting at https://meeting.huaweicloud.com:36443/#/j/981534504 Add topics at https://etherpad.openeuler.org/p/Virt-meetings More information: https://www.openeuler.org/en/

1 0

openEuler Virt SIG例会
by openEuler conference 12 Aug '25

12 Aug '25

您好！ Virt 邀请您参加 2025-08-22 14:30 召开的Tencent会议(自动录制) 会议主题：openEuler Virt SIG例会会议链接：https://meeting.tencent.com/dm/1g3eBGFmgPvK 会议纪要：https://etherpad.openeuler.org/p/Virt-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! Virt invites you to attend the Tencent conference(auto recording) will be held at 2025-08-22 14:30, The subject of the conference is openEuler Virt SIG例会 You can join the meeting at https://meeting.tencent.com/dm/1g3eBGFmgPvK Add topics at https://etherpad.openeuler.org/p/Virt-meetings More information: https://www.openeuler.org/en/

1 0

openEuler Vrit SIG 例会
by openEuler conference 03 Jul '25

03 Jul '25

您好！ Virt 邀请您参加 2025-07-11 14:30 召开的WeLink会议(自动录制) 会议主题：openEuler Vrit SIG 例会会议链接：https://meeting.huaweicloud.com:36443/#/j/967395646 会议纪要：https://etherpad.openeuler.org/p/Virt-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! Virt invites you to attend the WeLink conference(auto recording) will be held at 2025-07-11 14:30, The subject of the conference is openEuler Vrit SIG 例会 You can join the meeting at https://meeting.huaweicloud.com:36443/#/j/967395646 Add topics at https://etherpad.openeuler.org/p/Virt-meetings More information: https://www.openeuler.org/en/

1 0

[PATCH] Revert "backends/iommufd: Make iommufd_backend_*() return bool"
by Zhou Wang 13 Jun '25

13 Jun '25

Revert "backends/iommufd: Make iommufd_backend_*() return bool" and fix the way of vdpa codes use related iommufd APIs. Signed-off-by: Zhou Wang <wangzhou1(a)hisilicon.com> Signed-off-by: Jian Cai <caijian11(a)h-partners.com> --- backends/iommufd.c | 29 ++++++++++++++++------------- backends/trace-events | 4 ++-- hw/virtio/vdpa-dev-iommufd.c | 6 +++--- include/sysemu/iommufd.h | 6 +++--- 4 files changed, 24 insertions(+), 21 deletions(-) diff --git a/backends/iommufd.c b/backends/iommufd.c index 62df6e41f0..4446efaa32 100644 --- a/backends/iommufd.c +++ b/backends/iommufd.c @@ -74,21 +74,23 @@ static void iommufd_backend_class_init(ObjectClass *oc, void *data) object_class_property_add_str(oc, "fd", NULL, iommufd_backend_set_fd); } -bool iommufd_backend_connect(IOMMUFDBackend *be, Error **errp) +int iommufd_backend_connect(IOMMUFDBackend *be, Error **errp) { - int fd; + int fd, ret = 0; if (be->owned && !be->users) { fd = qemu_open("/dev/iommu", O_RDWR, errp); if (fd < 0) { - return false; + ret = fd; + goto out; } be->fd = fd; } be->users++; - - trace_iommufd_backend_connect(be->fd, be->owned, be->users); - return true; +out: + trace_iommufd_backend_connect(be->fd, be->owned, + be->users, ret); + return ret; } void iommufd_backend_disconnect(IOMMUFDBackend *be) @@ -105,24 +107,25 @@ out: trace_iommufd_backend_disconnect(be->fd, be->users); } -bool iommufd_backend_alloc_ioas(IOMMUFDBackend *be, uint32_t *ioas_id, - Error **errp) +int iommufd_backend_alloc_ioas(IOMMUFDBackend *be, uint32_t *ioas_id, + Error **errp) { - int fd = be->fd; + int ret, fd = be->fd; struct iommu_ioas_alloc alloc_data = { .size = sizeof(alloc_data), .flags = 0, }; - if (ioctl(fd, IOMMU_IOAS_ALLOC, &alloc_data)) { + ret = ioctl(fd, IOMMU_IOAS_ALLOC, &alloc_data); + if (ret) { error_setg_errno(errp, errno, "Failed to allocate ioas"); - return false; + return ret; } *ioas_id = alloc_data.out_ioas_id; - trace_iommufd_backend_alloc_ioas(fd, *ioas_id); + trace_iommufd_backend_alloc_ioas(fd, *ioas_id, ret); - return true; + return ret; } void iommufd_backend_free_id(IOMMUFDBackend *be, uint32_t id) diff --git a/backends/trace-events b/backends/trace-events index 8fe77149b2..f8592a2711 100644 --- a/backends/trace-events +++ b/backends/trace-events @@ -7,13 +7,13 @@ dbus_vmstate_loading(const char *id) "id: %s" dbus_vmstate_saving(const char *id) "id: %s" # iommufd.c -iommufd_backend_connect(int fd, bool owned, uint32_t users) "fd=%d owned=%d users=%d" +iommufd_backend_connect(int fd, bool owned, uint32_t users, int ret) "fd=%d owned=%d users=%d (%d)" iommufd_backend_disconnect(int fd, uint32_t users) "fd=%d users=%d" iommu_backend_set_fd(int fd) "pre-opened /dev/iommu fd=%d" iommufd_backend_map_dma(int iommufd, uint32_t ioas, uint64_t iova, uint64_t size, void *vaddr, bool readonly, int ret) " iommufd=%d ioas=%d iova=0x%"PRIx64" size=0x%"PRIx64" addr=%p readonly=%d (%d)" iommufd_backend_unmap_dma_non_exist(int iommufd, uint32_t ioas, uint64_t iova, uint64_t size, int ret) " Unmap nonexistent mapping: iommufd=%d ioas=%d iova=0x%"PRIx64" size=0x%"PRIx64" (%d)" iommufd_backend_unmap_dma(int iommufd, uint32_t ioas, uint64_t iova, uint64_t size, int ret) " iommufd=%d ioas=%d iova=0x%"PRIx64" size=0x%"PRIx64" (%d)" -iommufd_backend_alloc_ioas(int iommufd, uint32_t ioas) " iommufd=%d ioas=%d" +iommufd_backend_alloc_ioas(int iommufd, uint32_t ioas, int ret) " iommufd=%d ioas=%d (%d)" iommufd_backend_alloc_hwpt(int iommufd, uint32_t dev_id, uint32_t pt_id, uint32_t flags, uint32_t hwpt_type, uint32_t len, uint64_t data_ptr, uint32_t out_hwpt_id, int ret) " iommufd=%d dev_id=%u pt_id=%u flags=0x%x hwpt_type=%u len=%u data_ptr=0x%"PRIx64" out_hwpt=%u (%d)" iommufd_backend_free_id(int iommufd, uint32_t id, int ret) " iommufd=%d id=%d (%d)" iommufd_backend_set_dirty(int iommufd, uint32_t hwpt_id, bool start, int ret) " iommufd=%d hwpt=%u enable=%d (%d)" diff --git a/hw/virtio/vdpa-dev-iommufd.c b/hw/virtio/vdpa-dev-iommufd.c index 2b0498f9dc..f5718bae99 100644 --- a/hw/virtio/vdpa-dev-iommufd.c +++ b/hw/virtio/vdpa-dev-iommufd.c @@ -186,12 +186,12 @@ static int vhost_vdpa_container_connect_iommufd(VDPAIOMMUFDContainer *container) return -1; } - if (!iommufd_backend_connect(iommufd, &err)) { + if (iommufd_backend_connect(iommufd, &err)) { error_report_err(err); return -1; } - if (!iommufd_backend_alloc_ioas(iommufd, &ioas_id, &err)) { + if (iommufd_backend_alloc_ioas(iommufd, &ioas_id, &err)) { error_report_err(err); iommufd_backend_disconnect(iommufd); return -1; @@ -480,4 +480,4 @@ void vhost_vdpa_detach_container(VhostVdpaDevice *vdev) vhost_vdpa_container_disconnect_iommufd(container); vhost_vdpa_destroy_container(container); -} \ No newline at end of file +} diff --git a/include/sysemu/iommufd.h b/include/sysemu/iommufd.h index 0531a4ad98..908c94d811 100644 --- a/include/sysemu/iommufd.h +++ b/include/sysemu/iommufd.h @@ -43,11 +43,11 @@ typedef struct IOMMUFDViommu { uint32_t viommu_id; } IOMMUFDViommu; -bool iommufd_backend_connect(IOMMUFDBackend *be, Error **errp); +int iommufd_backend_connect(IOMMUFDBackend *be, Error **errp); void iommufd_backend_disconnect(IOMMUFDBackend *be); -bool iommufd_backend_alloc_ioas(IOMMUFDBackend *be, uint32_t *ioas_id, - Error **errp); +int iommufd_backend_alloc_ioas(IOMMUFDBackend *be, uint32_t *ioas_id, + Error **errp); void iommufd_backend_free_id(IOMMUFDBackend *be, uint32_t id); int iommufd_backend_map_dma(IOMMUFDBackend *be, uint32_t ioas_id, hwaddr iova, ram_addr_t size, void *vaddr, bool readonly); -- 2.43.0

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openEuler Virt SIG 6月例会
by openEuler conference 30 May '25

30 May '25

您好！ Virt 邀请您参加 2025-06-13 14:30 召开的WeLink会议(自动录制) 会议主题：openEuler Virt SIG 6月例会会议链接：https://meeting.huaweicloud.com:36443/#/j/965679214 会议纪要：https://etherpad.openeuler.org/p/Virt-meetings 更多资讯尽在：https://www.openeuler.org/zh/ Hello! Virt invites you to attend the WeLink conference(auto recording) will be held at 2025-06-13 14:30, The subject of the conference is openEuler Virt SIG 6月例会 You can join the meeting at https://meeting.huaweicloud.com:36443/#/j/965679214 Add topics at https://etherpad.openeuler.org/p/Virt-meetings More information: https://www.openeuler.org/en/

1 0

[PATCH qemu-8.2.0 v2 0/2] IPIV-BUGFIX for HIP12
by Jinqian Yang 16 May '25

16 May '25

Jinqian Yang (2): Revert "target/arm: Change arm_cpu_mp_affinity when enabled IPIV feature" target/arm: support the IPIV feature linux-headers/linux/kvm.h | 3 +-- target/arm/cpu.c | 22 +++------------------- target/arm/kvm.c | 17 +++++++++++++++++ 3 files changed, 21 insertions(+), 21 deletions(-) -- 2.33.0

1 2

[PATCH qemu-8.2.0 0/2] IPIV-BUGFIX for HIP12
by Jinqian Yang 14 May '25

14 May '25

Patch#1 Revert "target/arm: Change arm_cpu_mp_affinity when enabled IPIV feature" Patch#2 target/arm: support the IPIV feature Jinqian Yang (2): Revert "target/arm: Change arm_cpu_mp_affinity when enabled IPIV feature" target/arm: support the IPIV feature linux-headers/linux/kvm.h | 2 -- target/arm/cpu.c | 22 +++------------------- target/arm/kvm.c | 17 +++++++++++++++++ 3 files changed, 20 insertions(+), 21 deletions(-) -- 2.33.0

1 2

[PATCH qemu-8.2.0 0/1] Add support for IPIv
by Jinqian Yang 15 Apr '25

15 Apr '25

Patch#1 Change arm_cpu_mp_affinity when enabled IPIV feature Xiang Chen (1): target/arm: Change arm_cpu_mp_affinity when enabled IPIV feature linux-headers/linux/kvm.h | 1 + target/arm/cpu.c | 22 +++++++++++++++++++--- 2 files changed, 20 insertions(+), 3 deletions(-) -- 2.33.0

1 1

[PATCH v1] hw/arm/virt: support the HDBSS feature
by Zhenyu Ye 10 Apr '25

10 Apr '25

From: eillon <yezhenyu2(a)huawei.com> We use QEMU to enable or disable the HDBSS feature during live migration. We can use the migration-parameter to control the size of the HDBSS buffer, such as: migrate_set_parameter hdbss-buffer-size 3 info migrate_parameters Signed-off-by: eillon <yezhenyu2(a)huawei.com> --- linux-headers/linux/kvm.h | 2 ++ migration/migration-hmp-cmds.c | 9 +++++++++ migration/migration.h | 7 +++++++ migration/options.c | 21 +++++++++++++++++++++ migration/options.h | 1 + migration/ram.c | 28 ++++++++++++++++++++++++++++ qapi/migration.json | 17 ++++++++++++++--- 7 files changed, 82 insertions(+), 3 deletions(-) diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index b94c5fd90f..57d6e12744 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -1212,6 +1212,8 @@ struct kvm_ppc_resize_hpt { /* support request to inject secret to CSV3 guest */ #define KVM_CAP_HYGON_COCO_EXT_CSV3_INJ_SECRET (1 << 2) +#define KVM_CAP_ARM_HW_DIRTY_STATE_TRACK 502 + #define KVM_CAP_ARM_VIRT_MSI_BYPASS 799 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE) diff --git a/migration/migration-hmp-cmds.c b/migration/migration-hmp-cmds.c index aac5e7a73a..9857e2c97f 100644 --- a/migration/migration-hmp-cmds.c +++ b/migration/migration-hmp-cmds.c @@ -409,6 +409,11 @@ void hmp_info_migrate_parameters(Monitor *mon, const QDict *qdict) monitor_printf(mon, "%s: %s\n", MigrationParameter_str(MIGRATION_PARAMETER_SEV_AMD_CERT), params->sev_amd_cert); + + assert(params->has_hdbss_buffer_size); + monitor_printf(mon, "%s: %u\n", + MigrationParameter_str(MIGRATION_PARAMETER_HDBSS_BUFFER_SIZE), + params->hdbss_buffer_size); } qapi_free_MigrationParameters(params); @@ -725,6 +730,10 @@ void hmp_migrate_set_parameter(Monitor *mon, const QDict *qdict) p->sev_amd_cert->type = QTYPE_QSTRING; visit_type_str(v, param, &p->sev_amd_cert->u.s, &err); break; + case MIGRATION_PARAMETER_HDBSS_BUFFER_SIZE: + p->has_hdbss_buffer_size = true; + visit_type_uint8(v, param, &p->hdbss_buffer_size, &err); + break; default: assert(0); } diff --git a/migration/migration.h b/migration/migration.h index eeddb7c0bd..4a95f00157 100644 --- a/migration/migration.h +++ b/migration/migration.h @@ -48,6 +48,13 @@ struct PostcopyBlocktimeContext; */ #define CLEAR_BITMAP_SHIFT_MAX 31 +/* + * The default HDBSS size. The value ranges [0, 9]. + * Set to 0 to disable the HDBSS feature. + */ +#define DEFAULT_HDBSS_BUFFER_SIZE 0 +#define MAX_HDBSS_BUFFER_SIZE 9 + /* This is an abstraction of a "temp huge page" for postcopy's purpose */ typedef struct { /* diff --git a/migration/options.c b/migration/options.c index 71e71ea801..71645c8721 100644 --- a/migration/options.c +++ b/migration/options.c @@ -186,6 +186,9 @@ Property migration_properties[] = { DEFINE_PROP_STRING("sev-pdh", MigrationState, parameters.sev_pdh), DEFINE_PROP_STRING("sev-plat-cert", MigrationState, parameters.sev_plat_cert), DEFINE_PROP_STRING("sev-amd-cert", MigrationState, parameters.sev_amd_cert), + DEFINE_PROP_UINT8("hdbss-buffer-size", MigrationState, + parameters.hdbss_buffer_size, + DEFAULT_HDBSS_BUFFER_SIZE), /* Migration capabilities */ DEFINE_PROP_MIG_CAP("x-xbzrle", MIGRATION_CAPABILITY_XBZRLE), @@ -853,6 +856,13 @@ MigMode migrate_mode(void) return s->parameters.mode; } +int migrate_hdbss_buffer_size(void) +{ + MigrationState *s = migrate_get_current(); + + return s->parameters.hdbss_buffer_size; +} + int migrate_multifd_channels(void) { MigrationState *s = migrate_get_current(); @@ -1032,6 +1042,8 @@ MigrationParameters *qmp_query_migrate_parameters(Error **errp) params->vcpu_dirty_limit = s->parameters.vcpu_dirty_limit; params->has_mode = true; params->mode = s->parameters.mode; + params->has_hdbss_buffer_size = true; + params->hdbss_buffer_size = s->parameters.hdbss_buffer_size; return params; } @@ -1069,6 +1081,7 @@ void migrate_params_init(MigrationParameters *params) params->has_x_vcpu_dirty_limit_period = true; params->has_vcpu_dirty_limit = true; params->has_mode = true; + params->has_hdbss_buffer_size = true; params->sev_pdh = g_strdup(""); params->sev_plat_cert = g_strdup(""); @@ -1415,6 +1428,10 @@ static void migrate_params_test_apply(MigrateSetParameters *params, assert(params->sev_amd_cert->type == QTYPE_QSTRING); dest->sev_amd_cert = params->sev_amd_cert->u.s; } + + if (params->has_hdbss_buffer_size) { + dest->hdbss_buffer_size = params->hdbss_buffer_size; + } } static void migrate_params_apply(MigrateSetParameters *params, Error **errp) @@ -1579,6 +1596,10 @@ static void migrate_params_apply(MigrateSetParameters *params, Error **errp) assert(params->sev_amd_cert->type == QTYPE_QSTRING); s->parameters.sev_amd_cert = g_strdup(params->sev_amd_cert->u.s); } + + if (params->has_hdbss_buffer_size) { + s->parameters.hdbss_buffer_size = params->hdbss_buffer_size; + } } void qmp_migrate_set_parameters(MigrateSetParameters *params, Error **errp) diff --git a/migration/options.h b/migration/options.h index 9aca5e41ad..987fc81a18 100644 --- a/migration/options.h +++ b/migration/options.h @@ -85,6 +85,7 @@ uint64_t migrate_max_bandwidth(void); uint64_t migrate_avail_switchover_bandwidth(void); uint64_t migrate_max_postcopy_bandwidth(void); MigMode migrate_mode(void); +int migrate_hdbss_buffer_size(void); int migrate_multifd_channels(void); MultiFDCompression migrate_multifd_compression(void); int migrate_multifd_zlib_level(void); diff --git a/migration/ram.c b/migration/ram.c index 1f9348fd06..fcef466595 100644 --- a/migration/ram.c +++ b/migration/ram.c @@ -39,6 +39,7 @@ #include "migration-stats.h" #include "migration/register.h" #include "migration/misc.h" +#include "migration/options.h" #include "qemu-file.h" #include "postcopy-ram.h" #include "page_cache.h" @@ -2790,6 +2791,31 @@ static void xbzrle_cleanup(void) XBZRLE_cache_unlock(); } +static void kvm_update_hdbss_cap(bool enable) +{ + KVMState *s = kvm_state; + int size, ret; + + if (!kvm_check_extension(s, KVM_CAP_ARM_HW_DIRTY_STATE_TRACK)) { + return; + } + + size = migrate_hdbss_buffer_size(); + if (size < 0 || size > MAX_HDBSS_BUFFER_SIZE) { + fprintf(stderr, "Invalid hdbss buffer size: %d\n", size); + return; + } + + ret = kvm_vm_enable_cap(s, KVM_CAP_ARM_HW_DIRTY_STATE_TRACK, 0, + enable ? size : 0); + if (ret) { + fprintf(stderr, "Could not %s KVM_CAP_ARM_HW_DIRTY_STATE_TRACK: %d\n", + enable ? "enable" : "disable", ret); + } + + return; +} + static void ram_save_cleanup(void *opaque) { RAMState **rsp = opaque; @@ -2806,6 +2832,7 @@ static void ram_save_cleanup(void *opaque) * memory_global_dirty_log_stop will assert that * memory_global_dirty_log_start/stop used in pairs */ + kvm_update_hdbss_cap(false); memory_global_dirty_log_stop(GLOBAL_DIRTY_MIGRATION); } } @@ -3209,6 +3236,7 @@ static void ram_init_bitmaps(RAMState *rs) ram_list_init_bitmaps(); /* We don't use dirty log with background snapshots */ if (!migrate_background_snapshot()) { + kvm_update_hdbss_cap(true); memory_global_dirty_log_start(GLOBAL_DIRTY_MIGRATION); migration_bitmap_sync_precopy(rs, false); } diff --git a/qapi/migration.json b/qapi/migration.json index 3aed216c3b..f672da5c0d 100644 --- a/qapi/migration.json +++ b/qapi/migration.json @@ -902,6 +902,9 @@ # @sev-amd-cert: AMD certificate chain which include ASK and OCA encoded in # base64, or vendor cert filename for hygon (Since 4.2) # +# @hdbss-buffer-size: Size of the HDBSS(Hardware Dirty state tracking Structure). +# Defaults to 0. (Since 8.6) +# # Features: # # @deprecated: Member @block-incremental is deprecated. Use @@ -937,7 +940,7 @@ { 'name': 'x-vcpu-dirty-limit-period', 'features': ['unstable'] }, 'vcpu-dirty-limit', 'mode', - 'sev-pdh', 'sev-plat-cert', 'sev-amd-cert'] } + 'sev-pdh', 'sev-plat-cert', 'sev-amd-cert', 'hdbss-buffer-size'] } ## # @MigrateSetParameters: @@ -1106,6 +1109,9 @@ # @sev-amd-cert: AMD certificate chain which include ASK and OCA encoded in # base64, or vendor cert filename for hygon (Since 4.2) # +# @hdbss-buffer-size: Size of the HDBSS(Hardware Dirty state tracking Structure). +# Defaults to 0. (Since 8.6) +# # Features: # # @deprecated: Member @block-incremental is deprecated. Use @@ -1165,7 +1171,8 @@ '*mode': 'MigMode', '*sev-pdh': 'StrOrNull', '*sev-plat-cert': 'StrOrNull', - '*sev-amd-cert' : 'StrOrNull' } } + '*sev-amd-cert' : 'StrOrNull', + '*hdbss-buffer-size': 'uint8'} } ## @@ -1355,6 +1362,9 @@ # @sev-amd-cert: AMD certificate chain which include ASK and OCA encoded in # base64, or vendor cert filename for hygon (Since 4.2) # +# @hdbss-buffer-size: Size of the HDBSS(Hardware Dirty state tracking Structure). +# Defaults to 0. (Since 8.6) +# # Features: # # @deprecated: Member @block-incremental is deprecated. Use @@ -1410,7 +1420,8 @@ '*mode': 'MigMode', '*sev-pdh': 'str', '*sev-plat-cert': 'str', - '*sev-amd-cert' : 'str'} } + '*sev-amd-cert' : 'str', + '*hdbss-buffer-size': 'uint8'} } ## # @query-migrate-parameters: -- 2.39.3

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撤回: [PATCH] [BigDipperV5R9][Virtualization] Move submodules from gitlab into codehub
by yangjinqian 13 Mar '25

13 Mar '25

yangjinqian 将撤回邮件“[PATCH] [BigDipperV5R9][Virtualization] Move submodules from gitlab into codehub”。

1 0

撤回: [PATCH] [BigDipperV5R9][Virtualization] Move submodules from gitlab into codehub
by yangjinqian 13 Mar '25

13 Mar '25

yangjinqian 将撤回邮件“[PATCH] [BigDipperV5R9][Virtualization] Move submodules from gitlab into codehub”。

1 0

[PATCH qemu-8.2.0 0/9] Add support for heterogeneous live migration in QEMU
by yangjinqian 13 Mar '25

13 Mar '25

Patch#1 target/arm: Introduce a kunpeng CPU model Patch#2 target/arm: Add support for KVM_ARM_GET_REG_WRITABLE_MASKS Patch#3 target/arm: Retrieve additional register information from host Patch#4 target/arm: Update kunpeng 920 register to a common minimum feature list Patch#5 target/arm: Write ID register CPU state values to list Patch#6 target/arm: Ignore invariant register write errors Patch#7 target/arm: Disable SVE extensions when SVE is disabled Patch#8 target/arm: Add ID_AA64MMFR3_EL1 Patch#9 target/arm: update cpu->prop_pauth after change isar2 value Marcin Juszkiewicz (1): target/arm: Disable SVE extensions when SVE is disabled Shameer Kolothum (6): target/arm: Introduce a kunpeng CPU model target/arm: Add support for KVM_ARM_GET_REG_WRITABLE_MASKS target/arm: Retrieve additional register information from host target/arm: Update kunpeng 920 register to a common minimum feature list target/arm: Write ID register CPU state values to list target/arm: Ignore invariant register write errors yangjinqian (2): target/arm: Add ID_AA64MMFR3_EL1 target/arm: update cpu->prop_pauth after change isar2 value hw/arm/virt.c | 3 ++ target/arm/cpregs.h | 9 ++++++ target/arm/cpu.h | 20 +++++++++++++ target/arm/cpu64.c | 22 ++++++++++++++ target/arm/helper.c | 58 +++++++++++++++++++++++++----------- target/arm/hvf/hvf.c | 2 ++ target/arm/kunpeng920-regs.c | 55 ++++++++++++++++++++++++++++++++++ target/arm/kvm.c | 19 ++++++++++++ target/arm/kvm64.c | 21 +++++++++++++ target/arm/kvm_arm.h | 4 +++ target/arm/meson.build | 2 +- 11 files changed, 196 insertions(+), 19 deletions(-) create mode 100644 target/arm/kunpeng920-regs.c -- 2.33.0

1 9

[PATCH] [BigDipperV5R9][Virtualization] Move submodules from gitlab into codehub
by yangjinqian 13 Mar '25

13 Mar '25

From: caijian <caijian11(a)h-partners.com> Upstream:No Bugfix or Feature: Bugfix Move submodules from gitlab into codehub, and then clone them conveniently. Signed-off-by: caijian <caijian11(a)h-partners.com> --- .gitmodules | 30 +++++++++++++-------------- subprojects/berkeley-softfloat-3.wrap | 2 +- subprojects/berkeley-testfloat-3.wrap | 2 +- subprojects/dtc.wrap | 2 +- subprojects/keycodemapdb.wrap | 2 +- subprojects/libvfio-user.wrap | 2 +- subprojects/slirp.wrap | 2 +- 7 files changed, 21 insertions(+), 21 deletions(-) diff --git a/.gitmodules b/.gitmodules index 73cae4cd4d..4b9045635d 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,45 +1,45 @@ [submodule "roms/seabios"] path = roms/seabios - url = https://gitlab.com/qemu-project/seabios.git/ + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.1-seabios.git [submodule "roms/SLOF"] path = roms/SLOF - url = https://gitlab.com/qemu-project/SLOF.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-SLOF.git [submodule "roms/ipxe"] path = roms/ipxe - url = https://gitlab.com/qemu-project/ipxe.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-ipxe-2.git [submodule "roms/openbios"] path = roms/openbios - url = https://gitlab.com/qemu-project/openbios.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.1-openbios.git [submodule "roms/qemu-palcode"] path = roms/qemu-palcode - url = https://gitlab.com/qemu-project/qemu-palcode.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-palcode.git [submodule "roms/u-boot"] path = roms/u-boot - url = https://gitlab.com/qemu-project/u-boot.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.1-uboot.git [submodule "roms/skiboot"] path = roms/skiboot - url = https://gitlab.com/qemu-project/skiboot.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-skiboot.git [submodule "roms/QemuMacDrivers"] path = roms/QemuMacDrivers - url = https://gitlab.com/qemu-project/QemuMacDrivers.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-QemuMacDrivers.git [submodule "roms/seabios-hppa"] path = roms/seabios-hppa - url = https://gitlab.com/qemu-project/seabios-hppa.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.1-seabios-hpps.git [submodule "roms/u-boot-sam460ex"] path = roms/u-boot-sam460ex - url = https://gitlab.com/qemu-project/u-boot-sam460ex.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-u-boot-sam460ex.git [submodule "roms/edk2"] path = roms/edk2 - url = https://gitlab.com/qemu-project/edk2.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.1-edk2.git [submodule "roms/opensbi"] path = roms/opensbi - url = https://gitlab.com/qemu-project/opensbi.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.1-opensbi-1.git [submodule "roms/qboot"] path = roms/qboot - url = https://gitlab.com/qemu-project/qboot.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-qboot.git [submodule "roms/vbootrom"] path = roms/vbootrom - url = https://gitlab.com/qemu-project/vbootrom.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-vbootrom.git [submodule "tests/lcitool/libvirt-ci"] path = tests/lcitool/libvirt-ci - url = https://gitlab.com/libvirt/libvirt-ci.git + url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.1-libvirt-ci.git diff --git a/subprojects/berkeley-softfloat-3.wrap b/subprojects/berkeley-softfloat-3.wrap index c3e356d42f..3022b967cb 100644 --- a/subprojects/berkeley-softfloat-3.wrap +++ b/subprojects/berkeley-softfloat-3.wrap @@ -1,5 +1,5 @@ [wrap-git] -url = https://gitlab.com/qemu-project/berkeley-softfloat-3.git +url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-berkeley-softfloat-3.git revision = b64af41c3276f97f0e181920400ee056b9c88037 patch_directory = berkeley-softfloat-3 depth = 1 diff --git a/subprojects/berkeley-testfloat-3.wrap b/subprojects/berkeley-testfloat-3.wrap index b8b12e7629..1f0aa49853 100644 --- a/subprojects/berkeley-testfloat-3.wrap +++ b/subprojects/berkeley-testfloat-3.wrap @@ -1,5 +1,5 @@ [wrap-git] -url = https://gitlab.com/qemu-project/berkeley-testfloat-3.git +url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-berkeley-testfloat-3.git revision = e7af9751d9f9fd3b47911f51a5cfd08af256a9ab patch_directory = berkeley-testfloat-3 depth = 1 diff --git a/subprojects/dtc.wrap b/subprojects/dtc.wrap index d1bc9174e9..6d81994e76 100644 --- a/subprojects/dtc.wrap +++ b/subprojects/dtc.wrap @@ -1,4 +1,4 @@ [wrap-git] -url = https://gitlab.com/qemu-project/dtc.git +url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-dtc.git revision = b6910bec11614980a21e46fbccc35934b671bd81 depth = 1 diff --git a/subprojects/keycodemapdb.wrap b/subprojects/keycodemapdb.wrap index dda7b0e571..67da4b9c43 100644 --- a/subprojects/keycodemapdb.wrap +++ b/subprojects/keycodemapdb.wrap @@ -1,4 +1,4 @@ [wrap-git] -url = https://gitlab.com/qemu-project/keycodemapdb.git +url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-keycodemapdb.git revision = f5772a62ec52591ff6870b7e8ef32482371f22c6 depth = 1 diff --git a/subprojects/libvfio-user.wrap b/subprojects/libvfio-user.wrap index 416955ca45..c58635997e 100644 --- a/subprojects/libvfio-user.wrap +++ b/subprojects/libvfio-user.wrap @@ -1,4 +1,4 @@ [wrap-git] -url = https://gitlab.com/qemu-project/libvfio-user.git +url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-libvfio-user.git revision = 0b28d205572c80b568a1003db2c8f37ca333e4d7 depth = 1 diff --git a/subprojects/slirp.wrap b/subprojects/slirp.wrap index a93b048962..1a1aea7e54 100644 --- a/subprojects/slirp.wrap +++ b/subprojects/slirp.wrap @@ -1,5 +1,5 @@ [wrap-git] -url = https://gitlab.freedesktop.org/slirp/libslirp.git +url = ssh://git@codehub-dg-y.huawei.com:2222/cWX1206132/qemu-8.2-libslirp.git revision = 26be815b86e8d49add8c9a8b320239b9594ff03d [provide] -- 2.33.0

1 0

Libvirt openeuler 24.09 配套patch
by lihuhua 02 Aug '24

02 Aug '24

1 0