Get kernel and fdt start address in virt.c, and pass them to KVM when cpu reset. In addition, add kvm_riscv.h to place riscv specific interface.
Signed-off-by: Yifei Jiang jiangyifei@huawei.com Signed-off-by: Yipeng Yin yinyipeng1@huawei.com --- hw/riscv/virt.c | 15 +++++++++++++-- target/riscv/cpu.c | 4 ++++ target/riscv/cpu.h | 3 +++ target/riscv/kvm.c | 14 ++++++++++++++ target/riscv/kvm_riscv.h | 24 ++++++++++++++++++++++++ 5 files changed, 58 insertions(+), 2 deletions(-) create mode 100644 target/riscv/kvm_riscv.h
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index e01925ff3..270c4a887 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -43,6 +43,7 @@ #include "exec/address-spaces.h" #include "hw/pci/pci.h" #include "hw/pci-host/gpex.h" +#include "sysemu/kvm.h"
#include <libfdt.h>
@@ -498,6 +499,9 @@ static void riscv_virt_board_init(MachineState *machine) target_ulong start_addr = memmap[VIRT_DRAM].base; DeviceState *mmio_plic, *virtio_plic, *pcie_plic; int i, j, base_hartid, hart_count; + uint64_t kernel_entry = 0; + hwaddr start_fdt; + CPUState *cs;
/* Check socket count limit */ if (VIRT_SOCKETS_MAX < riscv_socket_count(machine)) { @@ -607,7 +611,7 @@ static void riscv_virt_board_init(MachineState *machine) memmap[VIRT_DRAM].base, NULL);
if (machine->kernel_filename) { - uint64_t kernel_entry = riscv_load_kernel(machine->kernel_filename, + kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL);
if (machine->initrd_filename) { @@ -661,10 +665,17 @@ static void riscv_virt_board_init(MachineState *machine) exit(1); } qemu_fdt_dumpdtb(s->fdt, fdt_totalsize(s->fdt)); + start_fdt = memmap[VIRT_MROM].base + sizeof(reset_vec); rom_add_blob_fixed_as("mrom.fdt", s->fdt, fdt_totalsize(s->fdt), - memmap[VIRT_MROM].base + sizeof(reset_vec), + start_fdt, &address_space_memory);
+ for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) { + RISCVCPU *riscv_cpu = RISCV_CPU(cs); + riscv_cpu->env.loader_start = kernel_entry; + riscv_cpu->env.fdt_start = start_fdt; + } + /* SiFive Test MMIO device */ sifive_test_create(memmap[VIRT_TEST].base);
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index eeb91f851..73af94efb 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -28,6 +28,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "fpu/softfloat-helpers.h" +#include "kvm_riscv.h"
/* RISC-V CPU definitions */
@@ -336,6 +337,9 @@ static void riscv_cpu_reset(DeviceState *dev) cs->exception_index = EXCP_NONE; env->load_res = -1; set_default_nan_mode(1, &env->fp_status); +#ifdef CONFIG_KVM + kvm_riscv_reset_vcpu(cpu); +#endif }
static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 1bb527151..df6d95b16 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -206,6 +206,9 @@ struct CPURISCVState {
/* Fields from here on are preserved across CPU reset. */ QEMUTimer *timer; /* Internal timer */ + + hwaddr loader_start; + hwaddr fdt_start; };
#define RISCV_CPU_CLASS(klass) \ diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index f153523dc..23b463ab5 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -37,6 +37,7 @@ #include "hw/irq.h" #include "qemu/log.h" #include "hw/loader.h" +#include "kvm_riscv.h"
static __u64 kvm_riscv_reg_id(__u64 type, __u64 idx) { @@ -426,3 +427,16 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) { return 0; } + +void kvm_riscv_reset_vcpu(RISCVCPU *cpu) +{ + CPURISCVState *env = &cpu->env; + + if (!kvm_enabled()) { + return; + } + env->pc = cpu->env.loader_start; + env->gpr[10] = kvm_arch_vcpu_id(CPU(cpu)); /* a0 */ + env->gpr[11] = cpu->env.fdt_start; /* a1 */ +} + diff --git a/target/riscv/kvm_riscv.h b/target/riscv/kvm_riscv.h new file mode 100644 index 000000000..f38c82bf5 --- /dev/null +++ b/target/riscv/kvm_riscv.h @@ -0,0 +1,24 @@ +/* + * QEMU KVM support -- RISC-V specific functions. + * + * Copyright (c) 2020 Huawei Technologies Co., Ltd + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see http://www.gnu.org/licenses/. + */ + +#ifndef QEMU_KVM_RISCV_H +#define QEMU_KVM_RISCV_H + +void kvm_riscv_reset_vcpu(RISCVCPU *cpu); + +#endif