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[PATCH v5 0/2] uadk: adjust header file
by liulongfang 25 Nov '22

25 Nov '22

3 4

dpdk compress code
by Zhangfei Gao 24 Nov '22

24 Nov '22

dpdk compress code is almost ready. https://github.com/Linaro/dpdk/tree/next-11.24-compress. The dpdk only support deflate,  We added some hack to use zlib, which will be removed when testing deflate -                       setup.alg_type = WD_ZLIB; +                       setup.alg_type = WD_DEFLATE; -       udev = wd_get_accel_dev("zlib"); +       udev = wd_get_accel_dev("deflate"); Test: https://github.com/Linaro/dpdk/blob/next-11.24-compress/doc/guides/compress… Prepare hugepage, only one time echo 1024 > /sys/devices/system/node/node0/hugepages/hugepages-2048kB/nr_hugepages echo 1024 > /sys/devices/system/node/node1/hugepages/hugepages-2048kB/nr_hugepages echo 1024 > /sys/devices/system/node/node2/hugepages/hugepages-2048kB/nr_hugepages echo 1024 > /sys/devices/system/node/node3/hugepages/hugepages-2048kB/nr_hugepages mkdir -p /mnt/huge_2mb mount -t hugetlbfs none /mnt/huge_2mb -o pagesize=2MB Test app     sudo dpdk-test --vdev=compress_uadk     RTE>>compressdev_autotest     RTE>>quit  

1 0

ci builder.sh can be used on both ARM and X86
by Zhangfei Gao 23 Nov '22

23 Nov '22

ci builder.sh can be used on both ARM and X86 ARM: build and sanity_test  X86: only build $ git clone https://git.linaro.org/ci/job/configs $ cd configs/uadk Fetch pull request accordingly, for example, testing https://github.com/Linaro/uadk/pull/529 Need manually change uadk/builders.sh. diff --git a/uadk/builders.sh b/uadk/builders.sh index 28f55178b..2ca49cfd8 100755 --- a/uadk/builders.sh +++ b/uadk/builders.sh @@ -105,6 +105,7 @@ check_existed_repo() {                         git clone --depth 1 https://github.com/Linaro/uadk.git                 fi                 cd ${WORKSPACE}/uadk +               git pull origin pull/529/head                 ;;         "ssluadk")                 if [ ! -d ${WORKSPACE}/uadk_engine ]; then $ ./builder.sh  

1 0

sig-AccLib双周会
by openEuler conference 22 Nov '22

22 Nov '22

您好！ sig-AccLib SIG 邀请您参加 2022-11-23 11:00 召开的Zoom会议会议主题：sig-AccLib双周会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论。2.头文件划分讨论。3.自由讨论。会议链接：https://us06web.zoom.us/j/86010911853?pwd=Vzlpdk9rM1NETVVZcDhGZktrSWdkUT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-11-23 11:00, The subject of the conference is sig-AccLib双周会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论。2.头文件划分讨论。3.自由讨论。 You can join the meeting at https://us06web.zoom.us/j/86010911853?pwd=Vzlpdk9rM1NETVVZcDhGZktrSWdkUT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

[PATCH v4 0/3] uadk: adjust header file
by liulongfang 12 Nov '22

12 Nov '22

1 3

[PATCH v3 0/3] uadk: adjust header file
by liulongfang 10 Nov '22

10 Nov '22

1 3

[PATCH v3 0/3] uadk: adjust header file
by liulongfang 10 Nov '22

10 Nov '22

1 3

[PATCH] uadk/v1: check dh and rsa key bits
by Weili Qian 09 Nov '22

09 Nov '22

Before creating ctx, the key bits must be checked. If the key bits is incorrect, return failed. Signed-off-by: Weili Qian <qianweili(a)huawei.com> --- v1/wd_dh.c | 20 +++++++++++++++++++- v1/wd_rsa.c | 17 +++++++++++++++-- 2 files changed, 34 insertions(+), 3 deletions(-) diff --git a/v1/wd_dh.c b/v1/wd_dh.c index 25483c1..dff8a02 100644 --- a/v1/wd_dh.c +++ b/v1/wd_dh.c @@ -30,6 +30,12 @@ #define DH_BALANCE_THRHD 1280 #define DH_RESEND_CNT 8 #define DH_RECV_MAX_CNT 60000000 // 1 min +#define DH_KEYSIZE_768 768 +#define DH_KEYSIZE_1024 1024 +#define DH_KEYSIZE_1536 1536 +#define DH_KEYSIZE_2048 2048 +#define DH_KEYSIZE_3072 3072 +#define DH_KEYSIZE_4096 4096 static __thread int balance; @@ -65,7 +71,19 @@ static int create_ctx_param_check(struct wd_queue *q, return -WD_EINVAL; } - return 0; + /* Key width check */ + switch (setup->key_bits) { + case DH_KEYSIZE_768: + case DH_KEYSIZE_1024: + case DH_KEYSIZE_1536: + case DH_KEYSIZE_2048: + case DH_KEYSIZE_3072: + case DH_KEYSIZE_4096: + return WD_SUCCESS; + default: + WD_ERR("invalid: dh key_bits %u is error!\n", setup->key_bits); + return -WD_EINVAL; + } } static int wcrypto_init_dh_cookie(struct wcrypto_dh_ctx *ctx) diff --git a/v1/wd_rsa.c b/v1/wd_rsa.c index f0cdda7..250f479 100644 --- a/v1/wd_rsa.c +++ b/v1/wd_rsa.c @@ -30,7 +30,10 @@ #define RSA_RESEND_CNT 8 #define RSA_MAX_KEY_SIZE 512 #define RSA_RECV_MAX_CNT 60000000 // 1 min - +#define RSA_KEYSIZE_1024 1024 +#define RSA_KEYSIZE_2048 2048 +#define RSA_KEYSIZE_3072 3072 +#define RSA_KEYSIZE_4096 4096 static __thread int balance; @@ -558,7 +561,17 @@ static int check_q_setup(struct wd_queue *q, struct wcrypto_rsa_ctx_setup *setup return -WD_EINVAL; } - return 0; + /* Key width check */ + switch (setup->key_bits) { + case RSA_KEYSIZE_1024: + case RSA_KEYSIZE_2048: + case RSA_KEYSIZE_3072: + case RSA_KEYSIZE_4096: + return WD_SUCCESS; + default: + WD_ERR("invalid: rsa key_bits %u is error!\n", setup->key_bits); + return -WD_EINVAL; + } } /* Before initiate this context, we should get a queue from WD */ -- 2.30.0

1 0

AccLib sig 双周例会
by openEuler conference 09 Nov '22

09 Nov '22

您好！ sig-AccLib SIG 邀请您参加 2022-11-09 11:00 召开的Zoom会议会议主题：AccLib sig 双周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论会议链接：https://us06web.zoom.us/j/88249285062?pwd=Y2JnVW9GUkNzMWp2cW1QNHFGbE1RZz09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-11-09 11:00, The subject of the conference is AccLib sig 双周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论 You can join the meeting at https://us06web.zoom.us/j/88249285062?pwd=Y2JnVW9GUkNzMWp2cW1QNHFGbE1RZz09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

2 1

[PATCH v2 1/3] uadk: Remove duplicate header files
by liulongfang 08 Nov '22

08 Nov '22

In the current UADK software framework, because each module owner processes the code separately when editing the code, the header file inclusion processing during editing is not perfect, and there are repeatedly included header files, which need to be deleted. Signed-off-by: liulongfang <liulongfang(a)huawei.com> --- drv/hisi_comp.c | 1 - drv/hisi_sec.c | 4 ---- include/drv/wd_aead_drv.h | 3 +-- include/drv/wd_cipher_drv.h | 4 ++-- include/drv/wd_comp_drv.h | 4 ++-- include/drv/wd_dh_drv.h | 3 ++- include/drv/wd_digest_drv.h | 3 +-- include/drv/wd_ecc_drv.h | 2 +- include/drv/wd_rsa_drv.h | 1 + include/wd_aead.h | 1 - include/wd_cipher.h | 1 - include/wd_comp.h | 1 - include/wd_dh.h | 1 - include/wd_digest.h | 1 - include/wd_ecc.h | 1 - include/wd_rsa.h | 1 - include/wd_util.h | 1 - wd_aead.c | 1 - wd_cipher.c | 1 - wd_comp.c | 2 -- wd_dh.c | 2 -- wd_digest.c | 1 - wd_ecc.c | 1 - wd_rsa.c | 3 +-- wd_util.c | 1 - 25 files changed, 11 insertions(+), 34 deletions(-) diff --git a/drv/hisi_comp.c b/drv/hisi_comp.c index c940c3f..2eede39 100644 --- a/drv/hisi_comp.c +++ b/drv/hisi_comp.c @@ -4,7 +4,6 @@ #include <asm/types.h> #include "drv/wd_comp_drv.h" #include "hisi_qm_udrv.h" -#include "wd.h" #define ZLIB 0 #define GZIP 1 diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c index 5b676e9..c30b653 100644 --- a/drv/hisi_sec.c +++ b/drv/hisi_sec.c @@ -8,10 +8,6 @@ #include "../include/drv/wd_digest_drv.h" #include "../include/drv/wd_aead_drv.h" #include "hisi_qm_udrv.h" -#include "wd_cipher.h" -#include "wd_digest.h" -#include "wd_aead.h" -#include "wd.h" #define SEC_DIGEST_ALG_OFFSET 11 #define WORD_ALIGNMENT_MASK 0x3 diff --git a/include/drv/wd_aead_drv.h b/include/drv/wd_aead_drv.h index de4a7d7..7c657f6 100644 --- a/include/drv/wd_aead_drv.h +++ b/include/drv/wd_aead_drv.h @@ -4,9 +4,8 @@ #ifndef __WD_AEAD_DRV_H #define __WD_AEAD_DRV_H -#include "../wd_common.h" -#include "../wd_alg_common.h" #include "../wd_aead.h" +#include "../wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_cipher_drv.h b/include/drv/wd_cipher_drv.h index f2417a8..82fb89a 100644 --- a/include/drv/wd_cipher_drv.h +++ b/include/drv/wd_cipher_drv.h @@ -5,9 +5,9 @@ #define __WD_CIPHER_DRV_H #include <asm/types.h> -#include "../wd_common.h" -#include "../wd_alg_common.h" + #include "../wd_cipher.h" +#include "../wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_comp_drv.h b/include/drv/wd_comp_drv.h index 4c37116..4aeaee4 100644 --- a/include/drv/wd_comp_drv.h +++ b/include/drv/wd_comp_drv.h @@ -6,9 +6,9 @@ #include <pthread.h> #include <asm/types.h> -#include "../wd_common.h" -#include "../wd_alg_common.h" + #include "../wd_comp.h" +#include "../wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_dh_drv.h b/include/drv/wd_dh_drv.h index 57f774d..64144e1 100644 --- a/include/drv/wd_dh_drv.h +++ b/include/drv/wd_dh_drv.h @@ -5,8 +5,9 @@ #define __WD_DH_DRV_H #include <asm/types.h> -#include "../wd_alg_common.h" + #include "../wd_dh.h" +#include "../wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_digest_drv.h b/include/drv/wd_digest_drv.h index 7ba1c30..586588b 100644 --- a/include/drv/wd_digest_drv.h +++ b/include/drv/wd_digest_drv.h @@ -3,9 +3,8 @@ #ifndef __WD_DIGEST_DRV_H #define __WD_DIGEST_DRV_H -#include "../wd_common.h" -#include "../wd_alg_common.h" #include "../wd_digest.h" +#include "../wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_ecc_drv.h b/include/drv/wd_ecc_drv.h index ddf5e5b..4d27ccb 100644 --- a/include/drv/wd_ecc_drv.h +++ b/include/drv/wd_ecc_drv.h @@ -7,8 +7,8 @@ #include <stdint.h> #include <asm/types.h> -#include "../wd.h" #include "../wd_ecc.h" +#include "../wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_rsa_drv.h b/include/drv/wd_rsa_drv.h index 108c2a3..baf112f 100644 --- a/include/drv/wd_rsa_drv.h +++ b/include/drv/wd_rsa_drv.h @@ -6,6 +6,7 @@ #include <asm/types.h> #include "../wd_rsa.h" +#include "../wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/wd_aead.h b/include/wd_aead.h index 3be8e8a..47c496f 100644 --- a/include/wd_aead.h +++ b/include/wd_aead.h @@ -9,7 +9,6 @@ #include <dlfcn.h> #include "config.h" -#include "wd.h" #include "wd_alg_common.h" #include "wd_cipher.h" #include "wd_digest.h" diff --git a/include/wd_cipher.h b/include/wd_cipher.h index dfd6e60..8e69852 100644 --- a/include/wd_cipher.h +++ b/include/wd_cipher.h @@ -8,7 +8,6 @@ #define __WD_CIPHER_H #include <dlfcn.h> -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_comp.h b/include/wd_comp.h index e043a83..0677e51 100644 --- a/include/wd_comp.h +++ b/include/wd_comp.h @@ -7,7 +7,6 @@ #ifndef __WD_COMP_H #define __WD_COMP_H -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_dh.h b/include/wd_dh.h index f342722..1c72228 100644 --- a/include/wd_dh.h +++ b/include/wd_dh.h @@ -9,7 +9,6 @@ #include <stdbool.h> -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_digest.h b/include/wd_digest.h index eb764ce..a44328e 100644 --- a/include/wd_digest.h +++ b/include/wd_digest.h @@ -8,7 +8,6 @@ #define __WD_DIGEST_H #include <dlfcn.h> -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_ecc.h b/include/wd_ecc.h index 05a776d..a92bb4b 100644 --- a/include/wd_ecc.h +++ b/include/wd_ecc.h @@ -10,7 +10,6 @@ #include <stdlib.h> #include <errno.h> -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_rsa.h b/include/wd_rsa.h index ef7a12c..70e3b05 100644 --- a/include/wd_rsa.h +++ b/include/wd_rsa.h @@ -9,7 +9,6 @@ #include <stdbool.h> -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_util.h b/include/wd_util.h index 83ac5f8..aea7a23 100644 --- a/include/wd_util.h +++ b/include/wd_util.h @@ -11,7 +11,6 @@ #include <sys/ipc.h> #include <sys/shm.h> #include <asm/types.h> -#include "wd_alg_common.h" #ifdef __cplusplus extern "C" { diff --git a/wd_aead.c b/wd_aead.c index b34149e..bac667b 100644 --- a/wd_aead.c +++ b/wd_aead.c @@ -6,7 +6,6 @@ #include <stdlib.h> #include <pthread.h> -#include "wd_util.h" #include "include/drv/wd_aead_drv.h" #include "wd_aead.h" diff --git a/wd_cipher.c b/wd_cipher.c index 143f628..ecb7efb 100644 --- a/wd_cipher.c +++ b/wd_cipher.c @@ -7,7 +7,6 @@ #include <stdlib.h> #include <pthread.h> #include <sched.h> -#include "wd_util.h" #include "include/drv/wd_cipher_drv.h" #include "wd_cipher.h" diff --git a/wd_comp.c b/wd_comp.c index 0fd87c2..9952c24 100644 --- a/wd_comp.c +++ b/wd_comp.c @@ -12,9 +12,7 @@ #include <string.h> #include <time.h> -#include "config.h" #include "drv/wd_comp_drv.h" -#include "wd_util.h" #include "wd_comp.h" #define WD_POOL_MAX_ENTRIES 1024 diff --git a/wd_dh.c b/wd_dh.c index 6a839cb..f2f4baa 100644 --- a/wd_dh.c +++ b/wd_dh.c @@ -12,10 +12,8 @@ #include <time.h> #include <dlfcn.h> -#include "config.h" #include "include/drv/wd_dh_drv.h" #include "wd_util.h" -#include "wd_dh.h" #define WD_POOL_MAX_ENTRIES 1024 #define DH_MAX_KEY_SIZE 512 diff --git a/wd_digest.c b/wd_digest.c index a30359f..cde586d 100644 --- a/wd_digest.c +++ b/wd_digest.c @@ -6,7 +6,6 @@ #include <stdlib.h> #include <pthread.h> -#include "wd_util.h" #include "include/drv/wd_digest_drv.h" #include "wd_digest.h" diff --git a/wd_ecc.c b/wd_ecc.c index f2bf8a5..02b5036 100644 --- a/wd_ecc.c +++ b/wd_ecc.c @@ -13,7 +13,6 @@ #include <time.h> #include <dlfcn.h> -#include "wd_util.h" #include "include/drv/wd_ecc_drv.h" #include "include/wd_ecc_curve.h" #include "wd_ecc.h" diff --git a/wd_rsa.c b/wd_rsa.c index 9ddca64..98946bc 100644 --- a/wd_rsa.c +++ b/wd_rsa.c @@ -12,9 +12,8 @@ #include <time.h> #include <dlfcn.h> -#include "config.h" #include "include/drv/wd_rsa_drv.h" -#include "wd_util.h" +#include "wd_rsa.h" #define WD_POOL_MAX_ENTRIES 1024 #define WD_HW_EACCESS 62 diff --git a/wd_util.c b/wd_util.c index bd82075..57c3a33 100644 --- a/wd_util.c +++ b/wd_util.c @@ -10,7 +10,6 @@ #include <semaphore.h> #include <string.h> #include <ctype.h> -#include "wd_alg_common.h" #include "wd_sched.h" #include "wd_util.h" -- 2.33.0

1 2

[PATCH 1/3] uadk: Remove duplicate header files
by liulongfang 08 Nov '22

08 Nov '22

In the current UADK software framework, because each module owner processes the code separately when editing the code, the header file inclusion processing during editing is not perfect, and there are repeatedly included header files, which need to be deleted. Signed-off-by: liulongfang <liulongfang(a)huawei.com> --- drv/hisi_comp.c | 1 - drv/hisi_sec.c | 4 ---- include/drv/wd_aead_drv.h | 3 +-- include/drv/wd_cipher_drv.h | 4 ++-- include/drv/wd_comp_drv.h | 4 ++-- include/drv/wd_dh_drv.h | 3 ++- include/drv/wd_digest_drv.h | 3 +-- include/drv/wd_ecc_drv.h | 2 +- include/drv/wd_rsa_drv.h | 1 + include/wd_aead.h | 1 - include/wd_cipher.h | 1 - include/wd_comp.h | 1 - include/wd_dh.h | 1 - include/wd_digest.h | 1 - include/wd_ecc.h | 1 - include/wd_rsa.h | 1 - include/wd_util.h | 1 - test/sanity_test.sh | 16 ++++++++++++++-- wd_aead.c | 1 - wd_cipher.c | 1 - wd_comp.c | 2 -- wd_dh.c | 2 -- wd_digest.c | 1 - wd_ecc.c | 1 - wd_rsa.c | 3 +-- wd_util.c | 1 - 26 files changed, 25 insertions(+), 36 deletions(-) diff --git a/drv/hisi_comp.c b/drv/hisi_comp.c index c940c3f..2eede39 100644 --- a/drv/hisi_comp.c +++ b/drv/hisi_comp.c @@ -4,7 +4,6 @@ #include <asm/types.h> #include "drv/wd_comp_drv.h" #include "hisi_qm_udrv.h" -#include "wd.h" #define ZLIB 0 #define GZIP 1 diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c index 5b676e9..c30b653 100644 --- a/drv/hisi_sec.c +++ b/drv/hisi_sec.c @@ -8,10 +8,6 @@ #include "../include/drv/wd_digest_drv.h" #include "../include/drv/wd_aead_drv.h" #include "hisi_qm_udrv.h" -#include "wd_cipher.h" -#include "wd_digest.h" -#include "wd_aead.h" -#include "wd.h" #define SEC_DIGEST_ALG_OFFSET 11 #define WORD_ALIGNMENT_MASK 0x3 diff --git a/include/drv/wd_aead_drv.h b/include/drv/wd_aead_drv.h index de4a7d7..2aace3f 100644 --- a/include/drv/wd_aead_drv.h +++ b/include/drv/wd_aead_drv.h @@ -4,9 +4,8 @@ #ifndef __WD_AEAD_DRV_H #define __WD_AEAD_DRV_H -#include "../wd_common.h" -#include "../wd_alg_common.h" #include "../wd_aead.h" +#include "wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_cipher_drv.h b/include/drv/wd_cipher_drv.h index f2417a8..a85dd44 100644 --- a/include/drv/wd_cipher_drv.h +++ b/include/drv/wd_cipher_drv.h @@ -5,9 +5,9 @@ #define __WD_CIPHER_DRV_H #include <asm/types.h> -#include "../wd_common.h" -#include "../wd_alg_common.h" + #include "../wd_cipher.h" +#include "wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_comp_drv.h b/include/drv/wd_comp_drv.h index 4c37116..bef35ab 100644 --- a/include/drv/wd_comp_drv.h +++ b/include/drv/wd_comp_drv.h @@ -6,9 +6,9 @@ #include <pthread.h> #include <asm/types.h> -#include "../wd_common.h" -#include "../wd_alg_common.h" + #include "../wd_comp.h" +#include "wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_dh_drv.h b/include/drv/wd_dh_drv.h index 57f774d..30181d9 100644 --- a/include/drv/wd_dh_drv.h +++ b/include/drv/wd_dh_drv.h @@ -5,8 +5,9 @@ #define __WD_DH_DRV_H #include <asm/types.h> -#include "../wd_alg_common.h" + #include "../wd_dh.h" +#include "wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_digest_drv.h b/include/drv/wd_digest_drv.h index 7ba1c30..3ccd9ff 100644 --- a/include/drv/wd_digest_drv.h +++ b/include/drv/wd_digest_drv.h @@ -3,9 +3,8 @@ #ifndef __WD_DIGEST_DRV_H #define __WD_DIGEST_DRV_H -#include "../wd_common.h" -#include "../wd_alg_common.h" #include "../wd_digest.h" +#include "wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_ecc_drv.h b/include/drv/wd_ecc_drv.h index ddf5e5b..bfb665b 100644 --- a/include/drv/wd_ecc_drv.h +++ b/include/drv/wd_ecc_drv.h @@ -7,8 +7,8 @@ #include <stdint.h> #include <asm/types.h> -#include "../wd.h" #include "../wd_ecc.h" +#include "wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/drv/wd_rsa_drv.h b/include/drv/wd_rsa_drv.h index 108c2a3..c75570d 100644 --- a/include/drv/wd_rsa_drv.h +++ b/include/drv/wd_rsa_drv.h @@ -6,6 +6,7 @@ #include <asm/types.h> #include "../wd_rsa.h" +#include "wd_util.h" #ifdef __cplusplus extern "C" { diff --git a/include/wd_aead.h b/include/wd_aead.h index 3be8e8a..47c496f 100644 --- a/include/wd_aead.h +++ b/include/wd_aead.h @@ -9,7 +9,6 @@ #include <dlfcn.h> #include "config.h" -#include "wd.h" #include "wd_alg_common.h" #include "wd_cipher.h" #include "wd_digest.h" diff --git a/include/wd_cipher.h b/include/wd_cipher.h index dfd6e60..8e69852 100644 --- a/include/wd_cipher.h +++ b/include/wd_cipher.h @@ -8,7 +8,6 @@ #define __WD_CIPHER_H #include <dlfcn.h> -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_comp.h b/include/wd_comp.h index e043a83..0677e51 100644 --- a/include/wd_comp.h +++ b/include/wd_comp.h @@ -7,7 +7,6 @@ #ifndef __WD_COMP_H #define __WD_COMP_H -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_dh.h b/include/wd_dh.h index f342722..1c72228 100644 --- a/include/wd_dh.h +++ b/include/wd_dh.h @@ -9,7 +9,6 @@ #include <stdbool.h> -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_digest.h b/include/wd_digest.h index eb764ce..a44328e 100644 --- a/include/wd_digest.h +++ b/include/wd_digest.h @@ -8,7 +8,6 @@ #define __WD_DIGEST_H #include <dlfcn.h> -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_ecc.h b/include/wd_ecc.h index 05a776d..a92bb4b 100644 --- a/include/wd_ecc.h +++ b/include/wd_ecc.h @@ -10,7 +10,6 @@ #include <stdlib.h> #include <errno.h> -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_rsa.h b/include/wd_rsa.h index ef7a12c..70e3b05 100644 --- a/include/wd_rsa.h +++ b/include/wd_rsa.h @@ -9,7 +9,6 @@ #include <stdbool.h> -#include "wd.h" #include "wd_alg_common.h" #ifdef __cplusplus diff --git a/include/wd_util.h b/include/wd_util.h index 83ac5f8..aea7a23 100644 --- a/include/wd_util.h +++ b/include/wd_util.h @@ -11,7 +11,6 @@ #include <sys/ipc.h> #include <sys/shm.h> #include <asm/types.h> -#include "wd_alg_common.h" #ifdef __cplusplus extern "C" { diff --git a/test/sanity_test.sh b/test/sanity_test.sh index 207eee5..b876113 100755 --- a/test/sanity_test.sh +++ b/test/sanity_test.sh @@ -385,14 +385,26 @@ run_sec_test_v2() run_cmd test_hisi_sec --digest 0 --optype 0 --pktlen 16 --keylen 16 \ --times 1 --async --multi 1 $@ + + if [ "$exit_code" != 0 ]; then + echo "Fail to run SEC test ($exit_code)" + else + echo "Successful to run SEC test" + fi } # failed: return 1; success: return 0 run_hpre_test_v2() { - run_cmd test_hisi_hpre --trd_mode=sync + run_cmd test_hisi_hpre -gen1 1024 -g2 public private crt_private -check - run_cmd test_hisi_hpre --trd_mode=async + run_cmd test_hisi_hpre -system-vrf -t 2 -c 0x6 -log -check + + if [ "$exit_code" != 0 ]; then + echo "Fail to run HPRE test ($exit_code)" + else + echo "Successful to run HPRE test" + fi } # failed: return 1; success: return 0 diff --git a/wd_aead.c b/wd_aead.c index d6c2380..a6b6222 100644 --- a/wd_aead.c +++ b/wd_aead.c @@ -6,7 +6,6 @@ #include <stdlib.h> #include <pthread.h> -#include "wd_util.h" #include "include/drv/wd_aead_drv.h" #include "wd_aead.h" diff --git a/wd_cipher.c b/wd_cipher.c index 8ce975a..5472d2f 100644 --- a/wd_cipher.c +++ b/wd_cipher.c @@ -7,7 +7,6 @@ #include <stdlib.h> #include <pthread.h> #include <sched.h> -#include "wd_util.h" #include "include/drv/wd_cipher_drv.h" #include "wd_cipher.h" diff --git a/wd_comp.c b/wd_comp.c index eacebd3..6c6efec 100644 --- a/wd_comp.c +++ b/wd_comp.c @@ -12,9 +12,7 @@ #include <string.h> #include <time.h> -#include "config.h" #include "drv/wd_comp_drv.h" -#include "wd_util.h" #include "wd_comp.h" #define WD_POOL_MAX_ENTRIES 1024 diff --git a/wd_dh.c b/wd_dh.c index 0bf770d..70528f1 100644 --- a/wd_dh.c +++ b/wd_dh.c @@ -12,10 +12,8 @@ #include <time.h> #include <dlfcn.h> -#include "config.h" #include "include/drv/wd_dh_drv.h" #include "wd_util.h" -#include "wd_dh.h" #define WD_POOL_MAX_ENTRIES 1024 #define DH_MAX_KEY_SIZE 512 diff --git a/wd_digest.c b/wd_digest.c index f56be0c..70dd3ea 100644 --- a/wd_digest.c +++ b/wd_digest.c @@ -6,7 +6,6 @@ #include <stdlib.h> #include <pthread.h> -#include "wd_util.h" #include "include/drv/wd_digest_drv.h" #include "wd_digest.h" diff --git a/wd_ecc.c b/wd_ecc.c index 2266b1d..7a746f3 100644 --- a/wd_ecc.c +++ b/wd_ecc.c @@ -13,7 +13,6 @@ #include <time.h> #include <dlfcn.h> -#include "wd_util.h" #include "include/drv/wd_ecc_drv.h" #include "include/wd_ecc_curve.h" #include "wd_ecc.h" diff --git a/wd_rsa.c b/wd_rsa.c index 489833e..0d3ebff 100644 --- a/wd_rsa.c +++ b/wd_rsa.c @@ -12,9 +12,8 @@ #include <time.h> #include <dlfcn.h> -#include "config.h" #include "include/drv/wd_rsa_drv.h" -#include "wd_util.h" +#include "wd_rsa.h" #define WD_POOL_MAX_ENTRIES 1024 #define WD_HW_EACCESS 62 diff --git a/wd_util.c b/wd_util.c index bd82075..57c3a33 100644 --- a/wd_util.c +++ b/wd_util.c @@ -10,7 +10,6 @@ #include <semaphore.h> #include <string.h> #include <ctype.h> -#include "wd_alg_common.h" #include "wd_sched.h" #include "wd_util.h" -- 2.33.0

2 6

TO->acc@openeuler.org
by Mrs Karen Ngui 03 Nov '22

03 Nov '22

Hello acc(a)openeuler.org kindly confirm your email is still active, if Yes do check to see if you recieved my previous message. Looking forward to reading from you soon. Mrs Karen Ngui DBS Group (M.D)

1 0

[PATCH v6 0/6] uadk - add wd_comp_init2
by Yang Shen 02 Nov '22

02 Nov '22

The current uadk initialization process is: 1.Call wd_request_ctx() to request ctxs from devices. 2.Call wd_sched_rr_alloc() to create a sched(or some other scheduler alloc function if exits). 3.Initialize the sched. 4.Call wd_<alg>_init() with ctx_config and sched. Logic is reasonable. But in practice, the step of `wd_ request_ Ctx() ` and `wd_ sched_ rr_alloc() ` are very tedious. This makes it difficult for users to use the interface. One of the main reasons for this is that uadk has made a lot of configurations in the scheduler in order to provide users with better performance. Based on this consideration, the current uadk requires the user to arrange the division of hardware resources according to the device topology during initialization. Therefore, as a high-level interface, this scheme can provide customized scheme configuration for users with deep needs. All algorithm initialization interfaces have the same input parameters and behavioral logic. The pre-processing of the wd_<alg>_init is actually the configuration of `struct wd_ctx_config` and `struct wd_sched`. Therefore, the next thing to be done is to use limited and easy-to-use input parameters to describe users' requirements on the two input parameters, ensuring that the functions of the new interface init2 are the same as those of init. For ease of description, v1 is used to refer to the existing interface, and v2 is used to refer to the layer of encapsulation. At present, at least 4 parameters are required to meet the user configuration requirements with the V1 interface function remains unchanged. @alg: The algorithm users wanted. @sched_type: Scheduling type the user wants to use. @task_tp: Reserved. @wd_ctx_params: op_type_num and ctx_set_num means the requested ctx number for each numa node. Due to users may have different requirements for different types of ctx numbers, needs a two-dimensional array as input. The bitmask provided by libnuma. Users can use this parameter to control requesting ctxs devices in the bind NUMA scenario. This parameter is mainly convenient for users to use in the binding cpu scenario. It can avoid resource waste or initialization failure caused by insufficient resources. Libnuma provides a complete operation interface which can be found in numa.h. Changelog: v5->v6: - Update a limit between wd_comp_init() and wd_comp_init2_(). If the wd_comp_init2_() is called after wd_comp_init(), some ctx resources may be leak until called wd_comp_uninit2(). v4->v5: - Update wd_comp_init2() and wd_comp_init2_() parameters. v3->v4: - Resume the wd_comp_init2() parameters and rename it to wd_comp_init2_(). Then add a macro named wd_comp_init2() which has a simpler parameters. v2->v3: - Update the wd_comp_init2() parameters. v1->v2: - Update the desdescription about wd_<alg>_init in wd_design.md. Yang Shen (6): uadk - support algorithms initialization reentry protect uadk/doc - update wd_alg_init support reentrancy uadk - support return error number as pointer uadk - mv some function to header file uadk/comp - add wd_comp_init2 uadk/docs - support a simple interface for initialization Makefile.am | 4 +- docs/wd_alg_init2.md | 159 ++++++++++++++++++++++++ docs/wd_design.md | 5 +- include/wd.h | 54 ++++++++- include/wd_alg_common.h | 27 +++++ include/wd_comp.h | 30 +++++ include/wd_util.h | 66 ++++++++++ wd.c | 97 ++++++++++++--- wd_aead.c | 33 +++-- wd_cipher.c | 35 ++++-- wd_comp.c | 129 ++++++++++++++++++-- wd_dh.c | 34 ++++-- wd_digest.c | 33 +++-- wd_ecc.c | 33 +++-- wd_rsa.c | 33 +++-- wd_util.c | 260 +++++++++++++++++++++++++++++++++++++++- 16 files changed, 926 insertions(+), 106 deletions(-) create mode 100644 docs/wd_alg_init2.md -- 2.24.0

3 12

FSC
by Ms K. Ngui 01 Nov '22

01 Nov '22

Kindly confirm if your email (][-Email-]]) is still active ? the reason for my question is because i am yet to recieved a reply in regards to my message sent to your email earlier this week. Thanks Mrs Karen Ngui GMD - DBS

1 0

[PATCH v5 0/6] uadk - add wd_comp_init2
by Yang Shen 29 Oct '22

29 Oct '22

The current uadk initialization process is: 1.Call wd_request_ctx() to request ctxs from devices. 2.Call wd_sched_rr_alloc() to create a sched(or some other scheduler alloc function if exits). 3.Initialize the sched. 4.Call wd_<alg>_init() with ctx_config and sched. Logic is reasonable. But in practice, the step of `wd_ request_ Ctx() ` and `wd_ sched_ rr_alloc() ` are very tedious. This makes it difficult for users to use the interface. One of the main reasons for this is that uadk has made a lot of configurations in the scheduler in order to provide users with better performance. Based on this consideration, the current uadk requires the user to arrange the division of hardware resources according to the device topology during initialization. Therefore, as a high-level interface, this scheme can provide customized scheme configuration for users with deep needs. All algorithm initialization interfaces have the same input parameters and behavioral logic. The pre-processing of the wd_<alg>_init is actually the configuration of `struct wd_ctx_config` and `struct wd_sched`. Therefore, the next thing to be done is to use limited and easy-to-use input parameters to describe users' requirements on the two input parameters, ensuring that the functions of the new interface init2 are the same as those of init. For ease of description, v1 is used to refer to the existing interface, and v2 is used to refer to the layer of encapsulation. At present, at least 4 parameters are required to meet the user configuration requirements with the V1 interface function remains unchanged. @alg: The algorithm users wanted. @sched_type: Scheduling type the user wants to use. @task_tp: Reserved. @wd_ctx_params: op_type_num and ctx_set_num means the requested ctx number for each numa node. Due to users may have different requirements for different types of ctx numbers, needs a two-dimensional array as input. The bitmask provided by libnuma. Users can use this parameter to control requesting ctxs devices in the bind NUMA scenario. This parameter is mainly convenient for users to use in the binding cpu scenario. It can avoid resource waste or initialization failure caused by insufficient resources. Libnuma provides a complete operation interface which can be found in numa.h. Changelog: v4->v5: - Update wd_comp_init2() and wd_comp_init2_() parameters. v3->v4: - Resume the wd_comp_init2() parameters and rename it to wd_comp_init2_(). Then add a macro named wd_comp_init2() which has a simpler parameters. v2->v3: - Update the wd_comp_init2() parameters. v1->v2: - Update the desdescription about wd_<alg>_init in wd_design.md. Yang Shen (6): uadk - support algorithms initialization reentry protect uadk/doc - update wd_alg_init support reentrancy uadk - support return error number as pointer uadk - mv some function to header file uadk/comp - add wd_comp_init2 uadk/docs - support a simple interface for initialization Makefile.am | 4 +- docs/wd_alg_init2.md | 156 ++++++++++++++++++++++++ docs/wd_design.md | 5 +- include/wd.h | 54 ++++++++- include/wd_alg_common.h | 27 +++++ include/wd_comp.h | 28 +++++ include/wd_util.h | 56 +++++++++ wd.c | 97 ++++++++++++--- wd_aead.c | 33 +++-- wd_cipher.c | 35 ++++-- wd_comp.c | 122 +++++++++++++++++-- wd_dh.c | 34 ++++-- wd_digest.c | 33 +++-- wd_ecc.c | 33 +++-- wd_rsa.c | 33 +++-- wd_util.c | 260 +++++++++++++++++++++++++++++++++++++++- 16 files changed, 904 insertions(+), 106 deletions(-) create mode 100644 docs/wd_alg_init2.md -- 2.24.0

1 6

[PATCH v4 0/6] uadk - add wd_comp_init2
by Yang Shen 28 Oct '22

28 Oct '22

The current uadk initialization process is: 1.Call wd_request_ctx() to request ctxs from devices. 2.Call wd_sched_rr_alloc() to create a sched(or some other scheduler alloc function if exits). 3.Initialize the sched. 4.Call wd_<alg>_init() with ctx_config and sched. Logic is reasonable. But in practice, the step of `wd_ request_ Ctx() ` and `wd_ sched_ rr_alloc() ` are very tedious. This makes it difficult for users to use the interface. One of the main reasons for this is that uadk has made a lot of configurations in the scheduler in order to provide users with better performance. Based on this consideration, the current uadk requires the user to arrange the division of hardware resources according to the device topology during initialization. Therefore, as a high-level interface, this scheme can provide customized scheme configuration for users with deep needs. All algorithm initialization interfaces have the same input parameters and behavioral logic. The pre-processing of the wd_<alg>_init is actually the configuration of `struct wd_ctx_config` and `struct wd_sched`. Therefore, the next thing to be done is to use limited and easy-to-use input parameters to describe users' requirements on the two input parameters, ensuring that the functions of the new interface init2 are the same as those of init. For ease of description, v1 is used to refer to the existing interface, and v2 is used to refer to the layer of encapsulation. At present, at least 4 parameters are required to meet the user configuration requirements with the V1 interface function remains unchanged. @device_list: The available uacce device list. Users can get it by wd_get_accel_list(). @numa_bitmask: The bitmask provided by libnuma. Users can use this parameter to control requesting ctxs devices in the bind NUMA scenario. @ctx_nums: The requested ctx number for each numa node. Due to users may have different requirements for different types of ctx numbers, needs a two-dimensional array as input. @sched_type: Scheduling type the user wants to use. What's more, some users want uadk to provide the default value about input parameters for some performance insensitive scenes. C code has no way to. Changelog: v3->v4: - Resume the wd_comp_init2() parameters and rename it to wd_comp_init2_(). Then add a macro named wd_comp_init2() which has a simpler parameters. v2->v3: - Update the wd_comp_init2() parameters. v1->v2: - Update the desdescription about wd_<alg>_init in wd_design.md. Yang Shen (6): uadk - support algorithms initialization reentry protect uadk/doc - update wd_alg_init support reentrancy uadk - support return error number as pointer uadk - mv some function to header file uadk/comp - add wd_comp_init2 uadk/docs - support a simple interface for initialization Makefile.am | 4 +- docs/wd_alg_init2.md | 154 ++++++++++++++++++++++++ docs/wd_design.md | 5 +- include/wd.h | 54 ++++++++- include/wd_alg_common.h | 24 ++++ include/wd_comp.h | 27 +++++ include/wd_util.h | 57 +++++++++ wd.c | 97 ++++++++++++--- wd_aead.c | 33 +++-- wd_cipher.c | 35 ++++-- wd_comp.c | 121 +++++++++++++++++-- wd_dh.c | 34 ++++-- wd_digest.c | 33 +++-- wd_ecc.c | 33 +++-- wd_rsa.c | 33 +++-- wd_util.c | 260 +++++++++++++++++++++++++++++++++++++++- 16 files changed, 898 insertions(+), 106 deletions(-) create mode 100644 docs/wd_alg_init2.md -- 2.24.0

2 8

[PATCH v7 0/6] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 28 Oct '22

28 Oct '22

Introduce a new crypto PMD for hardware accelerators based on UADK [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit Update in v7: 05: fix key_size of SHA384 HMAC Update in v6: Akhil helped review the v5, and address all the comments from Akhil 01: add rel_notes info, update uadk.rst, put struct in header, etc. 02: move struct to header 04: move struct to header, remove RTE_CRYPTODEV_FF_SYM_SESSIONLESS 05: fixed key_size in HMAC mode 06: updated app/test/meson.build and uadk.rst in the mean time. Update in v5 Patch 1 fix the build issue when uadk is installed to specific folder And update doc accordingly Update in v4: Akril suggest dpdk use pkg-config, So Enable uadk support x86 local build, and support pkg-config. Use pkg-config feature for the uadk crypto pmd. Add build uadk library steps in doc Test on both x86 and arm. x86 can build and install, but can not test since no device. Resend v3: Rebase on next/for-main, which just merged the series "cryptodev: rework session framework". Update in v3: Split patches according to Akhil's suggestions Please split the patches as below. 1. introduce driver - create files with meson.build and with probe/remove and device ops defined but not implemented. You do not need to write empty functions. Add basic documentation also which defines what the driver is. You can explain the build dependency here. 2. define queue structs and setup/remove APIs 3. Add data path 4. implement cipher op. Add capabilities and documentation of what is supported in each of the patches. Add feature flags etc. 5. implement auth, add capabilities and documentation 6. test app changes. Update in v2: Change uadk_supported_platform to uadk_crypto_version, which matches better than platform. enum uadk_crypto_version { UADK_CRYPTO_V2, UADK_CRYPTO_V3, }; Update in v1, compared with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (6): crypto/uadk: introduce uadk crypto driver crypto/uadk: support basic operations crypto/uadk: support enqueue/dequeue operations crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms test/crypto: support uadk PMD MAINTAINERS | 6 + app/test/meson.build | 1 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 55 + doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 96 ++ doc/guides/rel_notes/release_22_11.rst | 6 + drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 30 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1081 +++++++++++++++++ drivers/crypto/uadk/uadk_crypto_pmd_private.h | 79 ++ drivers/crypto/uadk/version.map | 3 + 13 files changed, 1367 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd_private.h create mode 100644 drivers/crypto/uadk/version.map -- 2.25.1

2 8

[PATCH v6 0/6] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 27 Oct '22

27 Oct '22

Introduce a new crypto PMD for hardware accelerators based on UADK [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit Update in v6: Akhil helped review the v5, and address all the comments from Akhil 01: add rel_notes info, update uadk.rst, put struct in header, etc. 02: move struct to header 04: move struct to header, remove RTE_CRYPTODEV_FF_SYM_SESSIONLESS 05: fixed key_size in HMAC mode 06: updated app/test/meson.build and uadk.rst in the mean time. Update in v5 Patch 1 fix the build issue when uadk is installed to specific folder And update doc accordingly Update in v4: Akril suggest dpdk use pkg-config, So Enable uadk support x86 local build, and support pkg-config. Use pkg-config feature for the uadk crypto pmd. Add build uadk library steps in doc Test on both x86 and arm. x86 can build and install, but can not test since no device. Resend v3: Rebase on next/for-main, which just merged the series "cryptodev: rework session framework". Update in v3: Split patches according to Akhil's suggestions Please split the patches as below. 1. introduce driver - create files with meson.build and with probe/remove and device ops defined but not implemented. You do not need to write empty functions. Add basic documentation also which defines what the driver is. You can explain the build dependency here. 2. define queue structs and setup/remove APIs 3. Add data path 4. implement cipher op. Add capabilities and documentation of what is supported in each of the patches. Add feature flags etc. 5. implement auth, add capabilities and documentation 6. test app changes. Update in v2: Change uadk_supported_platform to uadk_crypto_version, which matches better than platform. enum uadk_crypto_version { UADK_CRYPTO_V2, UADK_CRYPTO_V3, }; Update in v1, compared with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (6): crypto/uadk: introduce uadk crypto driver crypto/uadk: support basic operations crypto/uadk: support enqueue/dequeue operations crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms test/crypto: support uadk PMD MAINTAINERS | 6 + app/test/meson.build | 1 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 55 + doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 96 ++ doc/guides/rel_notes/release_22_11.rst | 6 + drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 30 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1075 +++++++++++++++++ drivers/crypto/uadk/uadk_crypto_pmd_private.h | 79 ++ drivers/crypto/uadk/version.map | 3 + 13 files changed, 1361 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd_private.h create mode 100644 drivers/crypto/uadk/version.map -- 2.38.1

2 8

[PATCH resend v5 0/6] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 26 Oct '22

26 Oct '22

Introduce a new crypto PMD for hardware accelerators based on UADK [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit resend: fix uadk lib, still use <uadk/wd_cipher.h> Update in v5 Patch 1 fix the build issue when uadk is installed to specific folder And update doc accordingly Update in v4: Akril suggest dpdk use pkg-config, So Enable uadk support x86 local build, and support pkg-config. Use pkg-config feature for the uadk crypto pmd. Add build uadk library steps in doc Test on both x86 and arm. x86 can build and install, but can not test since no device. Resend v3: Rebase on next/for-main, which just merged the series "cryptodev: rework session framework". Update in v3: Split patches according to Akhil's suggestions Please split the patches as below. 1. introduce driver - create files with meson.build and with probe/remove and device ops defined but not implemented. You do not need to write empty functions. Add basic documentation also which defines what the driver is. You can explain the build dependency here. 2. define queue structs and setup/remove APIs 3. Add data path 4. implement cipher op. Add capabilities and documentation of what is supported in each of the patches. Add feature flags etc. 5. implement auth, add capabilities and documentation 6. test app changes. Update in v2: Change uadk_supported_platform to uadk_crypto_version, which matches better than platform. enum uadk_crypto_version { UADK_CRYPTO_V2, UADK_CRYPTO_V3, }; Update in v1, compared with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (6): crypto/uadk: introduce uadk crypto driver crypto/uadk: support basic operations crypto/uadk: support enqueue/dequeue operations crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms test/crypto: add cryptodev_uadk_autotest MAINTAINERS | 6 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 55 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 94 ++ drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 30 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1141 +++++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 10 files changed, 1339 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.38.1

2 16

UADK双周例会
by openEuler conference 26 Oct '22

26 Oct '22

您好！ sig-AccLib SIG 邀请您参加 2022-10-26 11:00 召开的Zoom会议会议主题：UADK双周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.pkg-config技术分享会议链接：https://us06web.zoom.us/j/81869388219?pwd=K0ltZk9kSTRUS2RSNFFnS3NKSDNodz09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-10-26 11:00, The subject of the conference is UADK双周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.pkg-config技术分享 You can join the meeting at https://us06web.zoom.us/j/81869388219?pwd=K0ltZk9kSTRUS2RSNFFnS3NKSDNodz09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

[PATCH v4 0/6] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 24 Oct '22

24 Oct '22

Introduce a new crypto PMD for hardware accelerators based on UADK [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit Update in v4: Akril suggest dpdk use pkg-config, So Enable uadk support x86 local build, and support pkg-config. Use pkg-config feature for the uadk crypto pmd. Add build uadk library steps in doc Test on both x86 and arm. x86 can build and install, but can not test since no device. Resend v3: Rebase on next/for-main, which just merged the series "cryptodev: rework session framework". Update in v3: Split patches according to Akhil's suggestions Please split the patches as below. 1. introduce driver - create files with meson.build and with probe/remove and device ops defined but not implemented. You do not need to write empty functions. Add basic documentation also which defines what the driver is. You can explain the build dependency here. 2. define queue structs and setup/remove APIs 3. Add data path 4. implement cipher op. Add capabilities and documentation of what is supported in each of the patches. Add feature flags etc. 5. implement auth, add capabilities and documentation 6. test app changes. Update in v2: Change uadk_supported_platform to uadk_crypto_version, which matches better than platform. enum uadk_crypto_version { UADK_CRYPTO_V2, UADK_CRYPTO_V3, }; Update in v1, compared with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (6): crypto/uadk: introduce uadk crypto driver crypto/uadk: support basic operations crypto/uadk: support enqueue/dequeue operations crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms test/crypto: add cryptodev_uadk_autotest MAINTAINERS | 6 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 55 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 88 ++ drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 30 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1145 +++++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 10 files changed, 1337 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.36.1

2 12

[PATCH 00/10] uadk_engine: some bugfix and cleanup
by Zhiqi Song 21 Oct '22

21 Oct '22

This is a patch set about some bugfix and cleanup of uadk_engine. Hao Fang (1): uadk_engine: use HW_V2/HW_V3 to distinguish different hardware platforms. Longfang Liu (1): uadk/engine: Update the numa parameter of the scheduler Zhiqi Song (8): sm2: bugfix about segfault in sm2 ctrl function uadk_engine: bugfix side effects of right operand uadk_engine: cleanup avoid modify param of functions rsa: cleanup uninitialized value uadk_engine: cleanup storage class position uadk_engine: bugfix enable environment variable uadk_engine: cleanup magic number and comments uadk_engine: cleanup header file -- 2.30.0

1 10

[PATCH v5 0/6] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 21 Oct '22

21 Oct '22

Introduce a new crypto PMD for hardware accelerators based on UADK [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit Update in v5 Patch 1 fixes the build issue when uadk is installed to a specific folder And update doc accordingly Update in v4: Akril suggest dpdk use pkg-config, So Enable uadk support x86 local build, and support pkg-config. Use pkg-config feature for the uadk crypto pmd. Add build uadk library steps in doc Test on both x86 and arm. x86 can build and install, but can not test since no device. Resend v3: Rebase on next/for-main, which just merged the series "cryptodev: rework session framework". Update in v3: Split patches according to Akhil's suggestions Please split the patches as below. 1. introduce driver - create files with meson.build and with probe/remove and device ops defined but not implemented. You do not need to write empty functions. Add basic documentation also which defines what the driver is. You can explain the build dependency here. 2. define queue structs and setup/remove APIs 3. Add data path 4. implement cipher op. Add capabilities and documentation of what is supported in each of the patches. Add feature flags etc. 5. implement auth, add capabilities and documentation 6. test app changes. Update in v2: Change uadk_supported_platform to uadk_crypto_version, which matches better than platform. enum uadk_crypto_version { UADK_CRYPTO_V2, UADK_CRYPTO_V3, }; Update in v1, compared with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (6): crypto/uadk: introduce uadk crypto driver crypto/uadk: support basic operations crypto/uadk: support enqueue/dequeue operations crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms test/crypto: add cryptodev_uadk_autotest MAINTAINERS | 6 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 55 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 94 ++ drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 30 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1141 +++++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 10 files changed, 1339 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.38.1

1 6

[PATCH] bus/vdev: vdev_cleanup checks dev->device.driver
by Zhangfei Gao 20 Oct '22

20 Oct '22

The vdev_probe calls driver->probe, which may fail and dev->device.driver will still be NULL. In vdev_cleanup, drv = container_of(dev->device.driver) returns !NULL, then drv->remove will trigger Segmentation fault. Fix it by checking dev->device.driver first. Log: Thread 1 "dpdk-test" received signal SIGSEGV, Segmentation fault. 0x00000000012c484d in vdev_cleanup () Signed-off-by: Zhangfei Gao <zhangfei.gao(a)linaro.org> --- drivers/bus/vdev/vdev.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/bus/vdev/vdev.c b/drivers/bus/vdev/vdev.c index f5b43f1930..fbdaf68380 100644 --- a/drivers/bus/vdev/vdev.c +++ b/drivers/bus/vdev/vdev.c @@ -577,6 +577,9 @@ vdev_cleanup(void) const struct rte_vdev_driver *drv; int ret = 0; + if (dev->device.driver == NULL) + continue; + drv = container_of(dev->device.driver, const struct rte_vdev_driver, driver); if (drv == NULL || drv->remove == NULL) -- 2.36.1

2 6

crypto/uadk: introduce uadk crypto driver
by Akhil Goyal 20 Oct '22

20 Oct '22

Hi everyone, We have a new crypto PMD submitted on ML (http://patches.dpdk.org/project/dpdk/cover/20221008083747.6559-1-zhangfei.g…) This PMD is dependent on an external library which needs to be cross compiled for ARM on x86. It mandatorily need "numactl" also cross-compiled and instead of using pkg-config of libnuma, it need the library and headers to be copied manually to aarch toolchain. And if that is also done, it is not generating pkg-config which DPDK can use to compile the PMD. So the question is whether we can accept the PMD without pkg-config and along with above dependency? Regards, Akhil

3 9

[PATCH resend v3 0/6] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 14 Oct '22

14 Oct '22

Introduce a new crypto PMD for hardware accelerators based on UADK [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit resend: Rebase on next/for-main, which just merged series "cryptodev: rework session framework". update in v3: Split patches according to Akhil's suggestions Please split the patches as below. 1. introduce driver - create files with meson.build and with probe/remove and device ops defined but not implemented. You do not need to write empty functions. Add basic documentation also which defines what the driver is. You can explain the build dependency here. 2. define queue structs and setup/remove APIs 3. Add data path 4. implement cipher op. Add capabilities and documentation of what is supported in each of the patch. Add feature flags etc. 5. implement auth, add capabilities and documentation 6. test app changes. Update in v2: Change uadk_supported_platform to uadk_crypto_version, which matches better than platform. enum uadk_crypto_version { UADK_CRYPTO_V2, UADK_CRYPTO_V3, }; Update in v1, compared with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (6): crypto/uadk: introduce uadk crypto driver crypto/uadk: support basic operations crypto/uadk: support enqueue/dequeue operations crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms test/crypto: add cryptodev_uadk_autotest MAINTAINERS | 6 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 55 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 74 ++ drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 36 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1145 +++++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 10 files changed, 1329 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.36.1

2 14

Fw:Re: query about glibc 2.35 hugetlb
by Zhangfei Gao 12 Oct '22

12 Oct '22

  ------------------ Original ------------------ From: "Adhemerval Zanella Netto" <adhemerval.zanella(a)linaro.org>; Date: Mon, Oct 10, 2022 08:11 PM To: "Zhangfei Gao"<zhangfei.gao(a)linaro.org>; Subject: Re: query about glibc 2.35 hugetlb On 10/10/22 04:54, Zhangfei Gao wrote: > Hi, Adhemerval > Hi Zhangfei Gao, > We are using libhugetlbfs feature to concur the tlb miss issue. > LD_PRELOAD=/usr/lib/aarch64-linux-gnu/libhugetlbfs.so HUGETLB_MORECORE=yes app > > Happened to find morecore will be deprecated in glibc, 2.32+ The bug reports is incorrect, it was deprecated in glibc 2.34 and I have implemented glibc.malloc.hugetlb for 2.35.  So only glibc 2.34 does not have a way to explicit back up malloc allocation with hugetbl without using a full allocation (such as jemalloc or tcmalloc). > https://github.com/libhugetlbfs/libhugetlbfs/issues/52 > > Thanks for your patch adding  glibc.malloc.hugetlb. > But  still don't know how to use this feature. > >> If using glibc 2.35, do we still need libhugetlbfs.so? It will depends whether your application need to use HUGETLB_ELFMAP and/or HUGETLB_SHM since it is not implemented on glibc.  The HUGETLB_ELFMAP requires a lot of hacks and kernel/toolchain have worked to make THP to work better with text and data segments, and I think it is unlikely that we will support on glibc anytime soon (it will most likely require changes in the ELF gnu extension to explicit use huge pages). For HUGETLB_SHM it should be easy to adapt the code to align to page size and add SHM_HUGETLB. I think it might be doable to add support on glibc with an extra tunable as well to avoid code changes in the application.  I still prefer to adapt the the application itself because libhugetlbfs subtly change shmget semantic under the hood (by changing memory alignment and segment). >> Or just run "GLIBC_TUNABLES=glibc.malloc.hugetlb=2 app"? Based on the command line you pasted, it should be only that.  It will cover all memory allocation done by malloc. > > I am still in checking how to upgrading to glibc 2.35 in system. Carlos O'Donnel from RH was thinking about backporting to old releases if

1 0

UADK周例会
by openEuler conference 11 Oct '22

11 Oct '22

您好！ sig-AccLib SIG 邀请您参加 2022-10-12 11:00 召开的Zoom会议会议主题：UADK周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.uadk版本节奏 2.交叉编译改进 3.自由讨论会议链接：https://us06web.zoom.us/j/85494335620?pwd=Mm81N2xRWC9DbytUdFhpTW9mR2N1UT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-10-12 11:00, The subject of the conference is UADK周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.uadk版本节奏 2.交叉编译改进 3.自由讨论 You can join the meeting at https://us06web.zoom.us/j/85494335620?pwd=Mm81N2xRWC9DbytUdFhpTW9mR2N1UT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

82694713254
by a5d22 11 Oct '22

11 Oct '22

1 0

[PATCH] drv/qm: fix spelling mistake
by Weili Qian 09 Oct '22

09 Oct '22

There is a spelling mistakes in branch name, fix it. Signed-off-by: Weili Qian <qianweili(a)huawei.com> --- drv/hisi_qm_udrv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drv/hisi_qm_udrv.c b/drv/hisi_qm_udrv.c index 2497f49..a15bcc6 100644 --- a/drv/hisi_qm_udrv.c +++ b/drv/hisi_qm_udrv.c @@ -352,12 +352,12 @@ static int hisi_qm_setup_info(struct hisi_qp *qp, struct hisi_qm_priv *config) ret = pthread_spin_init(&q_info->sd_lock, PTHREAD_PROCESS_SHARED); if (ret) { WD_DEV_ERR(qp->h_ctx, "failed to init qinfo sd_lock!\n"); - goto err_destory_lock; + goto err_destroy_lock; } return 0; -err_destory_lock: +err_destroy_lock: pthread_spin_destroy(&q_info->rv_lock); err_out: hisi_qm_unset_region(qp->h_ctx, q_info); -- 2.33.0

1 0

[PATCH] uadk: v1: gets queue configuration from acc driver
by Weili Qian 09 Oct '22

09 Oct '22

Get the queue depth and submission queue element size from kernel acc driver. Signed-off-by: Weili Qian <qianweili(a)huawei.com> --- v1/drv/hisi_qm_udrv.c | 73 ++++++++++++++++++++++++++++++++----------- v1/drv/hisi_qm_udrv.h | 12 ++++++- 2 files changed, 65 insertions(+), 20 deletions(-) diff --git a/v1/drv/hisi_qm_udrv.c b/v1/drv/hisi_qm_udrv.c index 54aa016..bf950da 100644 --- a/v1/drv/hisi_qm_udrv.c +++ b/v1/drv/hisi_qm_udrv.c @@ -453,15 +453,56 @@ static int qm_set_db_info(struct q_info *qinfo) return 0; } -static int qm_set_queue_info(struct wd_queue *q) +static int qm_init_queue_info(struct wd_queue *q) { struct wcrypto_paras *priv = &q->capa.priv; struct q_info *qinfo = q->qinfo; struct qm_queue_info *info = qinfo->priv; + struct hisi_qp_info qp_info; struct hisi_qp_ctx qp_ctx; + int ret; + + info->sq_tail_index = 0; + info->cq_head_index = 0; + info->cqc_phase = 1; + info->used = 0; + info->is_poll = priv->is_poll; + qp_ctx.qc_type = priv->direction; + qp_ctx.id = 0; + ret = ioctl(qinfo->fd, WD_UACCE_CMD_QM_SET_QP_CTX, &qp_ctx); + if (ret < 0) { + WD_ERR("failed to set qp type!\n"); + return ret; + } + info->sqn = qp_ctx.id; + + ret = ioctl(qinfo->fd, WD_UACCE_CMD_QM_SET_QP_INFO, &qp_info); + if (ret < 0) { + WD_ERR("failed to get qp info, use default value!\n"); + + /* The default value of sqe_size has been set in qm_set_queue_alg_info. */ + info->sq_depth = QM_Q_DEPTH; + info->cq_depth = QM_Q_DEPTH; + } else { + info->sq_depth = qp_info.sq_depth; + info->cq_depth = qp_info.cq_depth; + info->sqe_size = qp_info.sqe_size; + } + + return 0; +} + +static int qm_set_queue_info(struct wd_queue *q) +{ + struct q_info *qinfo = q->qinfo; + struct qm_queue_info *info = qinfo->priv; size_t psize; int ret; + ret = qm_init_queue_info(q); + if (ret) + return ret; + ret = qm_set_queue_regions(q); if (ret) return -EINVAL; @@ -471,11 +512,11 @@ static int qm_set_queue_info(struct wd_queue *q) goto err_with_regions; } info->cq_base = (void *)((uintptr_t)info->sq_base + - info->sqe_size * QM_Q_DEPTH); + info->sqe_size * info->sq_depth); /* Protect the virtual address of CQ to avoid being over written */ psize = qinfo->qfrs_offset[WD_UACCE_QFRT_DUS] - - info->sqe_size * QM_Q_DEPTH; + info->sqe_size * info->sq_depth; ret = mprotect(info->cq_base, psize, PROT_READ); if (ret) { WD_ERR("cqe mprotect set err!\n"); @@ -491,19 +532,11 @@ static int qm_set_queue_info(struct wd_queue *q) if (ret) goto err_with_regions; - info->sq_tail_index = 0; - info->cq_head_index = 0; - info->cqc_phase = 1; - info->used = 0; - info->is_poll = priv->is_poll; - qp_ctx.qc_type = priv->direction; - qp_ctx.id = 0; - ret = ioctl(qinfo->fd, WD_UACCE_CMD_QM_SET_QP_CTX, &qp_ctx); - if (ret < 0) { - WD_ERR("hisi qm set qc_type fail, use default!\n"); + info->req_cache = calloc(info->sq_depth, sizeof(void *)); + if (!info->req_cache) { + ret = -WD_ENOMEM; goto err_with_regions; } - info->sqn = qp_ctx.id; return 0; @@ -545,8 +578,10 @@ err_with_priv: void qm_uninit_queue(struct wd_queue *q) { struct q_info *qinfo = q->qinfo; + struct qm_queue_info *info = qinfo->priv; qm_unset_queue_regions(q); + free(info->req_cache); free(qinfo->priv); qinfo->priv = NULL; } @@ -570,7 +605,7 @@ int qm_send(struct wd_queue *q, void **req, __u32 num) wd_spinlock(&info->sd_lock); if (unlikely(__atomic_load_n(&info->used, __ATOMIC_RELAXED) > - QM_Q_DEPTH - num - 1)) { + info->sq_depth - num - 1)) { wd_unspinlock(&info->sd_lock); WD_ERR("queue is full!\n"); return -WD_EBUSY; @@ -585,7 +620,7 @@ int qm_send(struct wd_queue *q, void **req, __u32 num) return -WD_EINVAL; } - if (info->sq_tail_index == QM_Q_DEPTH - 1) + if (info->sq_tail_index == info->sq_depth - 1) info->sq_tail_index = 0; else info->sq_tail_index++; @@ -615,7 +650,7 @@ void qm_rx_from_cache(struct qm_queue_info *info, void **resp, __u32 num) resp[i] = info->req_cache[idx]; info->req_cache[idx] = NULL; - if (idx == QM_Q_DEPTH - 1) { + if (idx == info->cq_depth - 1) { info->cqc_phase = !(info->cqc_phase); idx = 0; } else { @@ -666,7 +701,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num) mb(); /* make sure the data is all in memory before read */ sq_head = CQE_SQ_HEAD_INDEX(cqe); - if (unlikely(sq_head >= QM_Q_DEPTH)) { + if (unlikely(sq_head >= info->sq_depth)) { wd_unspinlock(&info->rc_lock); WD_ERR("CQE_SQ_HEAD_INDEX(%u) error\n", sq_head); return -WD_EIO; @@ -686,7 +721,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num) resp[i] = info->req_cache[info->cq_head_index]; info->req_cache[info->cq_head_index] = NULL; - if (info->cq_head_index == QM_Q_DEPTH - 1) { + if (info->cq_head_index == info->cq_depth - 1) { info->cqc_phase = !(info->cqc_phase); info->cq_head_index = 0; } else { diff --git a/v1/drv/hisi_qm_udrv.h b/v1/drv/hisi_qm_udrv.h index 0d40d86..cc1aa33 100644 --- a/v1/drv/hisi_qm_udrv.h +++ b/v1/drv/hisi_qm_udrv.h @@ -125,6 +125,13 @@ struct hisi_qp_ctx { __u16 qc_type; }; +struct hisi_qp_info { + __u32 sqe_size; + __u16 sq_depth; + __u16 cq_depth; + __u64 reserved; +}; + struct qm_queue_info; typedef int (*qm_sqe_fill)(void *msg, @@ -147,13 +154,15 @@ struct qm_queue_info { void *ds_rx_base; __u16 sq_tail_index; __u16 cq_head_index; + __u16 sq_depth; + __u16 cq_depth; __u16 sqn; __u16 resv; bool is_poll; int cqc_phase; int used; int sqe_size; - void *req_cache[QM_Q_DEPTH]; + void **req_cache; qm_sqe_fill sqe_fill[WCRYPTO_MAX_ALG]; qm_sqe_parse sqe_parse[WCRYPTO_MAX_ALG]; hisi_qm_sqe_fill_priv sqe_fill_priv; @@ -192,5 +201,6 @@ void qm_rx_from_cache(struct qm_queue_info *info, void **resp, __u32 num); #define HISI_QM_API_VER3_BASE "hisi_qm_v3" #define WD_UACCE_CMD_QM_SET_QP_CTX _IOWR('H', 10, struct hisi_qp_ctx) +#define WD_UACCE_CMD_QM_SET_QP_INFO _IOWR('H', 11, struct hisi_qp_info) #endif -- 2.33.0

1 0

[PATCH] drv/qm: gets queue info from acc driver
by Weili Qian 09 Oct '22

09 Oct '22

Get the queue depth and submission queue element size from kernel acc driver. Signed-off-by: Weili Qian <qianweili(a)huawei.com> --- drv/hisi_qm_udrv.c | 40 ++++++++++++++++++++++++++++++---------- include/hisi_qm_udrv.h | 2 ++ 2 files changed, 32 insertions(+), 10 deletions(-) diff --git a/drv/hisi_qm_udrv.c b/drv/hisi_qm_udrv.c index 93f2eb7..2497f49 100644 --- a/drv/hisi_qm_udrv.c +++ b/drv/hisi_qm_udrv.c @@ -25,6 +25,7 @@ #define VERSION_ID_SHIFT 9 #define UACCE_CMD_QM_SET_QP_CTX _IOWR('H', 10, struct hisi_qp_ctx) +#define UACCE_CMD_QM_SET_QP_INFO _IOWR('H', 11, struct hisi_qp_info) #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) /* the max sge num in one sgl */ @@ -62,6 +63,13 @@ struct hisi_qp_ctx { __u16 qc_type; }; +struct hisi_qp_info { + __u32 sqe_size; + __u16 sq_depth; + __u16 cq_depth; + __u64 reserved; +}; + struct hisi_sge { uintptr_t buff; void *page_ctrl; @@ -151,11 +159,11 @@ static void hisi_qm_fill_sqe(const void *sqe, struct hisi_qm_queue_info *info, void *sq_base = info->sq_base; int idx; - if (tail + num < QM_Q_DEPTH) { + if (tail + num < info->sq_depth) { memcpy((void *)((uintptr_t)sq_base + tail * sqe_size), sqe, sqe_size * num); } else { - idx = QM_Q_DEPTH - tail; + idx = info->sq_depth - tail; memcpy((void *)((uintptr_t)sq_base + tail * sqe_size), sqe, sqe_size * idx); memcpy(sq_base, (void *)((uintptr_t)sqe + sqe_size * idx), @@ -243,6 +251,7 @@ static int hisi_qm_setup_db(handle_t h_ctx, struct hisi_qm_queue_info *q_info) static int his_qm_set_qp_ctx(handle_t h_ctx, struct hisi_qm_priv *config, struct hisi_qm_queue_info *q_info) { + struct hisi_qp_info qp_cfg; struct hisi_qp_ctx qp_ctx; int ret; @@ -251,12 +260,24 @@ static int his_qm_set_qp_ctx(handle_t h_ctx, struct hisi_qm_priv *config, q_info->qc_type = qp_ctx.qc_type; ret = wd_ctx_set_io_cmd(h_ctx, UACCE_CMD_QM_SET_QP_CTX, &qp_ctx); if (ret < 0) { - WD_DEV_ERR(h_ctx, "failed to set qc_type, use default value!\n"); + WD_DEV_ERR(h_ctx, "failed to set qc_type!\n"); return ret; } - q_info->sqn = qp_ctx.id; + ret = wd_ctx_set_io_cmd(h_ctx, UACCE_CMD_QM_SET_QP_INFO, &qp_cfg); + if (ret < 0) { + WD_DEV_ERR(h_ctx, "set qp info failed, use default value!\n"); + + q_info->sq_depth = QM_Q_DEPTH; + q_info->cq_depth = QM_Q_DEPTH; + q_info->sqe_size = config->sqe_size; + } else { + q_info->sq_depth = qp_cfg.sq_depth; + q_info->cq_depth = qp_cfg.cq_depth; + q_info->sqe_size = qp_cfg.sqe_size; + } + return 0; } @@ -315,9 +336,8 @@ static int hisi_qm_setup_info(struct hisi_qp *qp, struct hisi_qm_priv *config) q_info->qp_mode = config->qp_mode; q_info->epoll_en = config->epoll_en; q_info->idx = config->idx; - q_info->sqe_size = config->sqe_size; q_info->cqc_phase = 1; - q_info->cq_base = q_info->sq_base + config->sqe_size * QM_Q_DEPTH; + q_info->cq_base = q_info->sq_base + (__u64)config->sqe_size * q_info->sq_depth; /* The last 32 bits of DUS show device or qp statuses */ q_info->ds_tx_base = q_info->sq_base + q_info->region_size[UACCE_QFRT_DUS] - sizeof(uint32_t); @@ -356,7 +376,7 @@ static void hisi_qm_clear_info(struct hisi_qp *qp) static int get_free_num(struct hisi_qm_queue_info *q_info) { /* The device should reserve one buffer. */ - return (QM_Q_DEPTH - 1) - + return (q_info->sq_depth - 1) - __atomic_load_n(&q_info->used_num, __ATOMIC_RELAXED); } @@ -463,7 +483,7 @@ int hisi_qm_send(handle_t h_qp, const void *req, __u16 expect, __u16 *count) tail = q_info->sq_tail_index; hisi_qm_fill_sqe(req, q_info, tail, send_num); - tail = (tail + send_num) % QM_Q_DEPTH; + tail = (tail + send_num) % q_info->sq_depth; q_info->db(q_info, QM_DBELL_CMD_SQ, tail, 0); q_info->sq_tail_index = tail; @@ -488,7 +508,7 @@ static int hisi_qm_recv_single(struct hisi_qm_queue_info *q_info, void *resp) if (q_info->cqc_phase == CQE_PHASE(cqe)) { j = CQE_SQ_HEAD_INDEX(cqe); - if (unlikely(j >= QM_Q_DEPTH)) { + if (unlikely(j >= q_info->sq_depth)) { pthread_spin_unlock(&q_info->rv_lock); WD_DEV_ERR(qp->h_ctx, "CQE_SQ_HEAD_INDEX(%u) error!\n", j); return -WD_EIO; @@ -500,7 +520,7 @@ static int hisi_qm_recv_single(struct hisi_qm_queue_info *q_info, void *resp) return -WD_EAGAIN; } - if (i == QM_Q_DEPTH - 1) { + if (i == q_info->cq_depth - 1) { q_info->cqc_phase = !(q_info->cqc_phase); i = 0; } else { diff --git a/include/hisi_qm_udrv.h b/include/hisi_qm_udrv.h index 22dedf3..dda320d 100644 --- a/include/hisi_qm_udrv.h +++ b/include/hisi_qm_udrv.h @@ -68,6 +68,8 @@ struct hisi_qm_queue_info { __u8 qp_mode; __u16 sq_tail_index; __u16 cq_head_index; + __u16 sq_depth; + __u16 cq_depth; __u16 sqn; __u16 qc_type; __u16 used_num; -- 2.33.0

1 0

[PATCH v3 0/6] uadk - add wd_comp_init2
by Yang Shen 29 Sep '22

29 Sep '22

The current uadk initialization process is: 1.Call wd_request_ctx() to request ctxs from devices. 2.Call wd_sched_rr_alloc() to create a sched(or some other scheduler alloc function if exits). 3.Initialize the sched. 4.Call wd_<alg>_init() with ctx_config and sched. Logic is reasonable. But in practice, the step of `wd_ request_ Ctx() ` and `wd_ sched_ rr_alloc() ` are very tedious. This makes it difficult for users to use the interface. One of the main reasons for this is that uadk has made a lot of configurations in the scheduler in order to provide users with better performance. Based on this consideration, the current uadk requires the user to arrange the division of hardware resources according to the device topology during initialization. Therefore, as a high-level interface, this scheme can provide customized scheme configuration for users with deep needs. All algorithm initialization interfaces have the same input parameters and behavioral logic. The pre-processing of the wd_<alg>_init is actually the configuration of `struct wd_ctx_config` and `struct wd_sched`. Therefore, the next thing to be done is to use limited and easy-to-use input parameters to describe users' requirements on the two input parameters, ensuring that the functions of the new interface init2 are the same as those of init. For ease of description, v1 is used to refer to the existing interface, and v2 is used to refer to the layer of encapsulation. At present, at least 4 parameters are required to meet the user configuration requirements with the V1 interface function remains unchanged. @device_list: The available uacce device list. Users can get it by wd_get_accel_list(). @numa_bitmask: The bitmask provided by libnuma. Users can use this parameter to control requesting ctxs devices in the bind NUMA scenario. @ctx_nums: The requested ctx number for each numa node. Due to users may have different requirements for different types of ctx numbers, needs a two-dimensional array as input. @sched_type: Scheduling type the user wants to use. What's more, some users want uadk to provide the default value about input parameters for some performance insensitive scenes. C code has no way to. Changelog: v2->v3: - update the wd_comp_init2 parameters. v1->v2: - Update the desdescription about wd_<alg>_init in wd_design.md. Yang Shen (6): uadk - support algorithms initialization reentry protect uadk/doc - update wd_alg_init support reentrancy uadk - support return error number as pointer uadk - mv some function to header file uadk/comp - add wd_comp_init2 uadk/docs - support a simple interface for initialization Makefile.am | 4 +- docs/wd_alg_init2.md | 176 ++++++++++++++++++++++++++++ docs/wd_design.md | 5 +- include/wd.h | 54 ++++++++- include/wd_alg_common.h | 24 ++++ include/wd_comp.h | 27 +++++ include/wd_util.h | 57 +++++++++ wd.c | 97 +++++++++++++--- wd_aead.c | 33 ++++-- wd_cipher.c | 35 ++++-- wd_comp.c | 248 ++++++++++++++++++++++++++++++++++++++-- wd_dh.c | 34 ++++-- wd_digest.c | 33 ++++-- wd_ecc.c | 33 ++++-- wd_rsa.c | 33 ++++-- wd_util.c | 83 +++++++++++++- 16 files changed, 870 insertions(+), 106 deletions(-) create mode 100644 docs/wd_alg_init2.md -- 2.24.0

3 9

[PATCH v2 0/5] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 29 Sep '22

29 Sep '22

Introduce a new crypto PMD for hardware accelerators based on UADK [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit Update with v1: Change uadk_supported_platform to uadk_crypto_version, which matches better than platform. enum uadk_crypto_version { UADK_CRYPTO_V2, UADK_CRYPTO_V3, }; Update with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (5): test/crypto: add cryptodev_uadk_autotest crypto/uadk: introduce uadk crypto driver crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms doc: Update doc for UADK crypto PMD MAINTAINERS | 6 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 54 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 77 ++ drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 36 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1161 +++++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 10 files changed, 1347 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.36.1

2 10

[PATCH v3 0/5] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 29 Sep '22

29 Sep '22

Introduce a new crypto PMD for hardware accelerators based on UADK [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit update in v3: Split patches according to Akhil's suggestions Please split the patches as below. 1. introduce driver - create files with meson.build and with probe/remove and device ops defined but not implemented. You do not need to write empty functions. Add basic documentation also which defines what the driver is. You can explain the build dependency here. 2. define queue structs and setup/remove APIs 3. Add data path 4. implement cipher op. Add capabilities and documentation of what is supported in each of the patch. Add feature flags etc. 5. implement auth, add capabilities and documentation 6. test app changes. Update in v2: Change uadk_supported_platform to uadk_crypto_version, which matches better than platform. enum uadk_crypto_version { UADK_CRYPTO_V2, UADK_CRYPTO_V3, }; Update in v1, compared with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (6): crypto/uadk: introduce uadk crypto driver crypto/uadk: support basic operations crypto/uadk: support enqueue/dequeue operations crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms test/crypto: add cryptodev_uadk_autotest MAINTAINERS | 6 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 55 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 74 ++ drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 36 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1158 +++++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 10 files changed, 1342 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.36.1

1 6

UADK双周例会
by openEuler conference 27 Sep '22

27 Sep '22

您好！ sig-AccLib SIG 邀请您参加 2022-09-28 11:00 召开的Zoom会议会议主题：UADK双周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论。2.自由讨论。会议链接：https://us06web.zoom.us/j/87676024901?pwd=RzR2ajlKK3Y5M2lIb2hDVTQySmhyQT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-09-28 11:00, The subject of the conference is UADK双周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论。2.自由讨论。 You can join the meeting at https://us06web.zoom.us/j/87676024901?pwd=RzR2ajlKK3Y5M2lIb2hDVTQySmhyQT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

acc账户通知
by system 20 Sep '22

20 Sep '22

1 0

looking for agent/distributor/whole seller in every country. ๒๎๘จฅ
by 7e3odI 17 Sep '22

17 Sep '22

1 0

looking for agent/distributor/whole seller in every country. ﹫┲█%╖
by V1xZc32q 16 Sep '22

16 Sep '22

1 0

[PATCH 0/5] crypto/uadk: introduce uadk crypto driver
by Zhangfei Gao 15 Sep '22

15 Sep '22

Introduce a new crypto PMD for UADK, which relies on UADK library [1]. UADK is a framework for user applications to access hardware accelerators. UADK relies on IOMMU SVA (Shared Virtual Address) feature, which share the same page table between IOMMU and MMU. Thereby user application can directly use virtual address for device dma, which enhances the performance as well as easy usability. Currently supported platforms: HiSilicon kunpeng920 & kunpeng930. This patch adds a basic framework. [1] https://github.com/Linaro/uadk Test: sudo dpdk-test --vdev=crypto_uadk (--log-level=6) RTE>>cryptodev_uadk_autotest RTE>>quit Update with rfc Suggested from Akhil Goyal <gakhil(a)marvell.com> Only consider crypto PMD first Split patch into small (individually compiled) patches. Update MAINTAINERS and doc/guides/cryptodevs/features/uadk.ini Zhangfei Gao (5): test/crypto: add cryptodev_uadk_autotest crypto/uadk: introduce uadk crypto driver crypto/uadk: support cipher algorithms crypto/uadk: support auth algorithms doc: Update doc for UADK crypto PMD MAINTAINERS | 6 + app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/cryptodevs/features/uadk.ini | 54 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 80 ++ drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 36 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1161 +++++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 10 files changed, 1350 insertions(+) create mode 100644 doc/guides/cryptodevs/features/uadk.ini create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.36.1

2 7

Financial Service Provider
by AZERI FINANCE 15 Sep '22

15 Sep '22

1 0

Fw:Re: [PATCH v13 09/13] iommu/sva: Refactoring iommu_sva_bind/unbind_device()
by Zhangfei Gao 14 Sep '22

14 Sep '22

  ------------------ Original ------------------ From: "Jason Gunthorpe" <jgg(a)nvidia.com>; Date: Fri, Sep 9, 2022 00:41 AM To: "Jean-Philippe Brucker"<jean-philippe(a)linaro.org>; Cc: "Baolu Lu"<baolu.lu(a)linux.intel.com>;"Joerg Roedel"<joro(a)8bytes.org>;"Christoph Hellwig"<hch(a)infradead.org>;"Bjorn Helgaas"<bhelgaas(a)google.com>;"Kevin Tian"<kevin.tian(a)intel.com>;"Ashok Raj"<ashok.raj(a)intel.com>;"Will Deacon"<will(a)kernel.org>;"Robin Murphy"<robin.murphy(a)arm.com>;"Jean-Philippe Brucker"<jean-philippe(a)linaro.com>;"Dave Jiang"<dave.jiang(a)intel.com>;"Fenghua Yu"<fenghua.yu(a)intel.com>;"Vinod Koul"<vkoul(a)kernel.org>;"Eric Auger"<eric.auger(a)redhat.com>;"Liu Yi L"<yi.l.liu(a)intel.com>;"Jacob jun Pan"<jacob.jun.pan(a)intel.com>;"Zhangfei Gao"<zhangfei.gao(a)linaro.org>;"Zhu Tony"<tony.zhu(a)intel.com>;"iommu"<iommu(a)lists.linux.dev>;"linux-pci"<linux-pci(a)vger.kernel.org>;"linux-kernel"<linux-kernel(a)vger.kernel.org>; Subject: Re: [PATCH v13 09/13] iommu/sva: Refactoring iommu_sva_bind/unbind_device() On Thu, Sep 08, 2022 at 05:25:32PM +0100, Jean-Philippe Brucker wrote: > On Wed, Sep 07, 2022 at 02:33:11PM -0300, Jason Gunthorpe wrote: > > On Wed, Sep 07, 2022 at 10:54:54AM +0100, Jean-Philippe Brucker wrote: > > > > > Is iommu_domain still going to represent both a device context (whole > > > PASID table) and individual address spaces, or are you planning to move > > > away from that?  What happens when a driver does: > > > > > >   d1 = iommu_domain_alloc() > > >   iommu_attach_device(d1) > > >   d2 = iommu_sva_bind_device() > > >   iommu_detach_device(d1) > > > > > > Does detach > > > (a) only disable the non-PASID address space? > > > (b) disable everything? > > > (c) fail because the driver didn't unbind first? > > > > I think it must be (a), considering how everything is defined and the > > needs for vIOMMU emulation. > > Yes (a) is probably better. The SMMU driver currently implements (c) to > ensure that you can't switch device driver without unbinding everything > first, and we should keep that check somewhere Yes, the owner stuff is a logical place to put that, when ownership is all released the PASID table of the group must be empty. Lu? > > Otherwise everything blows up if you attach an iommu_domain to two > > RIDs - the API demands that every RID gets its own PASID mapping, even > > if the RID shares iommu_domains. We do not have an API to share PASID > > tables. > > Well, we still do since SMMU implements it. Changing the API is fine, but > someone will need to rework the SMMU driver to align with the new meaning > of iommu_domain. I can take a stab if no one volunteers but probably not > before next year. I think given the current progression it is OK for this series to leave the SMMU driver with a bit of a different view of how the API should work. The main target here is the in-kernel drivers and they won't trigger these cases. As we extend things into userspace PASID support we may want to block SMMU PASID support through iommfd/vfio until it is updated. I've been thinking on and off about this - we likely need to have a conformance test suite as part of iommufd that is specifically for checking that the iommu driver meets the API. So it would do things like exercise scenario (a), attaching domains to all sorts of combinations, and so on. We know this from other driver subsystems that drivers can implement the uAPI incorrectly and it causes a lot of pain for userspace. Jason

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UADK双周例会
by openEuler conference 14 Sep '22

14 Sep '22

您好！ sig-AccLib SIG 邀请您参加 2022-09-14 11:00 召开的Zoom会议会议主题：UADK双周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131。会议链接：https://us06web.zoom.us/j/81629915294?pwd=UkNmL21KVTkyZ2llNGpwWGpQQ0pUUT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-09-14 11:00, The subject of the conference is UADK双周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131。 You can join the meeting at https://us06web.zoom.us/j/81629915294?pwd=UkNmL21KVTkyZ2llNGpwWGpQQ0pUUT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

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openeuler
by Adrian Liu 12 Sep '22

12 Sep '22

(If you are NOT CEO, please kindly forward this to your CEO, because this is urgent. If you believe this has been sent to you in error, please ignore it. Thanks)Dear CEO,We are the domain name registration service company in China. On September 12, 2022, we received an application from Hongfeng Ltd requested "openeuler" as their internet keyword and China (CN) domain names (openeuler.cn, openeuler.com.cn, openeuler.net.cn, openeuler.org.cn). But after checking it, we find this name conflict with your company name or trademark. In order to deal with this matter better, it's necessary to send email to you and confirm whether this company is your business partner in China? Best Regards Adrian Liu Service & Operations Manager China Registry (Head Office) Tel: +86-2161918696 Fax: +86-2161918697 Mob: +86-13816428671 6012, Xingdi Building, No. 1698 Yishan Road, Shanghai 201103, China ***************************************** This email contains privileged and confidential information intended for the addressee only. If you are not the intended recipient, please destroy this email and inform the sender immediately. We appreciate you respecting the confidentiality of this information by not disclosing or using the information in this email.

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[PATCH 0/2] uadk/comp - support zlibwrapper for compression
by Yang Shen 05 Sep '22

05 Sep '22

Add a set of zlibwrapper interfaces for users to fit uadk interfaces quickly. Yang Shen (2): uadk/comp - support reset session zlibwrapper: add zlibwrapper to adapt for zlib interface Makefile.am | 2 +- include/wd_comp.h | 9 +- wd_comp.c | 15 +++ wd_zlibwrapper.c | 329 ++++++++++++++++++++++++++++++++++++++++++++++ wd_zlibwrapper.h | 112 ++++++++++++++++ 5 files changed, 465 insertions(+), 2 deletions(-) create mode 100644 wd_zlibwrapper.c create mode 100644 wd_zlibwrapper.h -- 2.24.0

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UADK周例会
by openEuler conference 30 Aug '22

30 Aug '22

您好！ sig-AccLib SIG 邀请您参加 2022-08-31 11:00 召开的Zoom会议会议主题：UADK周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论会议链接：https://us06web.zoom.us/j/86127515975?pwd=eWVqdWpBN3diUTB4TGFZc3gwV0xjdz09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-08-31 11:00, The subject of the conference is UADK周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论 You can join the meeting at https://us06web.zoom.us/j/86127515975?pwd=eWVqdWpBN3diUTB4TGFZc3gwV0xjdz09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

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Re: [EXT] [PATCH 0/3] Add uadk compression and crypto PMD
by Zhangfei Gao 29 Aug '22

29 Aug '22

Hi, Akhil On 2022/8/28 下午9:02, Akhil Goyal wrote: >> UADK compression PMD provides poll mode compression & decompression >> driver >> UADK crypto PMD provides poll mode driver >> All cryptography operations are using UADK crypto API. >> All compression operations are using UADK compress API. >> >> Hardware accelerators using UADK are supposed to be supported. >> Currently supported hardware platforms: >> HiSilicon Kunpeng920 and Kunpeng930 >> >> Test: >> sudo dpdk-test --vdev=compress_uadk >> sudo dpdk-test --vdev=crypto_uadk >> >> v1: >> Target to DPDK 22.11 >> Rebased on http://git.dpdk.org/next/dpdk-next-crypto/ >> >> Suggested from Akhil Goyal <gakhil(a)marvell.com> >>> Current release cycle is DPDK-22.07 for which this patchset is late. >>> As we had the V1 deadline last month. >>> This patchset can go for next release cycle which is 22.11. >> Zhangfei Gao (3): >> compress/uadk: add uadk compression PMD >> test/crypto: add cryptodev_uadk_autotest >> crypto/uadk: add uadk crypto PMD >> >> app/test/test_cryptodev.c | 7 + >> app/test/test_cryptodev.h | 1 + >> doc/guides/compressdevs/index.rst | 1 + >> doc/guides/compressdevs/uadk.rst | 60 ++ >> doc/guides/cryptodevs/index.rst | 1 + >> doc/guides/cryptodevs/uadk.rst | 70 ++ >> drivers/compress/meson.build | 1 + >> drivers/compress/uadk/meson.build | 28 + >> drivers/compress/uadk/uadk_compress_pmd.c | 489 +++++++++ >> drivers/compress/uadk/version.map | 3 + >> drivers/crypto/meson.build | 1 + >> drivers/crypto/uadk/meson.build | 28 + >> drivers/crypto/uadk/uadk_crypto_pmd.c | 1137 +++++++++++++++++++++ >> drivers/crypto/uadk/version.map | 3 + >> 14 files changed, 1830 insertions(+) >> create mode 100644 doc/guides/compressdevs/uadk.rst >> create mode 100644 doc/guides/cryptodevs/uadk.rst >> create mode 100644 drivers/compress/uadk/meson.build >> create mode 100644 drivers/compress/uadk/uadk_compress_pmd.c >> create mode 100644 drivers/compress/uadk/version.map >> create mode 100644 drivers/crypto/uadk/meson.build >> create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c >> create mode 100644 drivers/crypto/uadk/version.map >> > Please split the series into two - crypto pmd and compression pmd. > And split each of the PMD into logical small (individually compiled) patches. > > Update MAINTAINERS file > Update documentation in doc/guides/cryptodevs/features/uadk.ini > and doc/guides/compressdevs/features/uadk.ini Thanks for the suggestion. > > Also UADK does not look to be a PMD name. It is some development kit > Outside of DPDK. Can you rename it to something else? > > Is there some dependency to build it using external libraries etc? > Can you explain what exactly is UADK? UADK is a framework for user application to access hardware accelerator . https://github.com/Linaro/uadk/blob/master/docs/wd_design.md UADK relies on SVA (Shared Virtual Address) that needs to be supported by IOMMU. As a result, user application can directly use virtual address for dma, since iommu and mmu share the same virtual address by coping the same page table, which enhance the performance as well as easy usability. UADK provide algorithm libraries and api for application to use. The library will find the real hardware in the platform. We also provide openssl engine for uadk, https://github.com/Linaro/uadk_engine For alignment, we planned to provide uadk dpdk pmd as well, with the name as UADK. What do you think. Thanks.

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Fw:RE: [EXT] [PATCH 0/3] Add uadk compression and crypto PMD
by Zhangfei Gao 29 Aug '22

29 Aug '22

  ------------------ Original ------------------ From: "Akhil Goyal" <gakhil(a)marvell.com>; Date: Sun, Aug 28, 2022 09:02 PM To: "Zhangfei Gao"<zhangfei.gao(a)linaro.org>;"Declan Doherty"<declan.doherty(a)intel.com>;"Fan Zhang"<roy.fan.zhang(a)intel.com>;"Ashish Gupta"<ashishg(a)marvell.com>;"Ray Kinsella"<mdr(a)ashroe.eu>; Cc: "dev(a)dpdk.org"<dev(a)dpdk.org>; Subject: RE: [EXT] [PATCH 0/3] Add uadk compression and crypto PMD > UADK compression PMD provides poll mode compression & decompression > driver > UADK crypto PMD provides poll mode driver > All cryptography operations are using UADK crypto API. > All compression operations are using UADK compress API. > > Hardware accelerators using UADK are supposed to be supported. > Currently supported hardware platforms: > HiSilicon Kunpeng920 and Kunpeng930 > > Test: > sudo dpdk-test --vdev=compress_uadk > sudo dpdk-test --vdev=crypto_uadk > > v1: > Target to DPDK 22.11 > Rebased on http://git.dpdk.org/next/dpdk-next-crypto/ > > Suggested from Akhil Goyal <gakhil(a)marvell.com> > > Current release cycle is DPDK-22.07 for which this patchset is late. > > As we had the V1 deadline last month. > > This patchset can go for next release cycle which is 22.11. > > Zhangfei Gao (3): >   compress/uadk: add uadk compression PMD >   test/crypto: add cryptodev_uadk_autotest >   crypto/uadk: add uadk crypto PMD > >  app/test/test_cryptodev.c                 |    7 + >  app/test/test_cryptodev.h                 |    1 + >  doc/guides/compressdevs/index.rst         |    1 + >  doc/guides/compressdevs/uadk.rst          |   60 ++ >  doc/guides/cryptodevs/index.rst           |    1 + >  doc/guides/cryptodevs/uadk.rst            |   70 ++ >  drivers/compress/meson.build              |    1 + >  drivers/compress/uadk/meson.build         |   28 + >  drivers/compress/uadk/uadk_compress_pmd.c |  489 +++++++++ >  drivers/compress/uadk/version.map         |    3 + >  drivers/crypto/meson.build                |    1 + >  drivers/crypto/uadk/meson.build           |   28 + >  drivers/crypto/uadk/uadk_crypto_pmd.c     | 1137 +++++++++++++++++++++ >  drivers/crypto/uadk/version.map           |    3 + >  14 files changed, 1830 insertions(+) >  create mode 100644 doc/guides/compressdevs/uadk.rst >  create mode 100644 doc/guides/cryptodevs/uadk.rst >  create mode 100644 drivers/compress/uadk/meson.build >  create mode 100644 drivers/compress/uadk/uadk_compress_pmd.c >  create mode 100644 drivers/compress/uadk/version.map >  create mode 100644 drivers/crypto/uadk/meson.build >  create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c >  create mode 100644 drivers/crypto/uadk/version.map > Please split the series into two - crypto pmd and compression pmd. And split each of the PMD into logical small (individually compiled) patches. Update MAINTAINERS file Update documentation in doc/guides/cryptodevs/features/uadk.ini and doc/guides/compressdevs/features/uadk.ini Also UADK does not look to be a PMD name. It is some development kit Outside of DPDK. Can you rename it to something else? Is there some dependency to build it using external libraries etc? Can you explain what exactly is UADK? Regards, Akhil

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[PATCH] uadk: Update the symbol list for uadk libraries
by Longfang Liu 27 Aug '22

27 Aug '22

From: liulongfang <liulongfang(a)huawei.com> Explicitly declare the function symbol list of its external interface for the so dynamic library file of uadk, only make the external interface functions visible to the outside APP, and all other functions are only used internally. Signed-off-by: liulongfang <liulongfang(a)huawei.com> --- Makefile.am | 18 +++-- libwd.map | 29 ++++++++ libwd_comp.map | 27 ++++++++ libwd_crypto.map | 173 +++++++++++++++++++++++++++++++++++++++++++++++ v1/libwd.map | 165 ++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 405 insertions(+), 7 deletions(-) create mode 100644 libwd.map create mode 100644 libwd_comp.map create mode 100644 libwd_crypto.map create mode 100644 v1/libwd.map diff --git a/Makefile.am b/Makefile.am index b3f07df..066b954 100644 --- a/Makefile.am +++ b/Makefile.am @@ -100,20 +100,25 @@ libhisi_sec_la_DEPENDENCIES = libwd.la libwd_crypto.la libhisi_hpre_la_LIBADD = $(libwd_la_OBJECTS) $(libwd_crypto_la_OBJECTS) libhisi_hpre_la_DEPENDENCIES = libwd.la libwd_crypto.la else -libwd_la_LDFLAGS=$(UADK_VERSION) +UADK_WD_SYMBOL= -Wl,--version-script,$(top_srcdir)/libwd.map +UADK_CRYPTO_SYMBOL= -Wl,--version-script,$(top_srcdir)/libwd_crypto.map +UADK_COMP_SYMBOL= -Wl,--version-script,$(top_srcdir)/libwd_comp.map +UADK_V1_SYMBOL= -Wl,--version-script,$(top_srcdir)/v1/libwd.map + +libwd_la_LDFLAGS=$(UADK_VERSION) $(UADK_WD_SYMBOL) $(UADK_V1_SYMBOL) libwd_la_LIBADD= -lnuma libwd_comp_la_LIBADD= -lwd -ldl -libwd_comp_la_LDFLAGS=$(UADK_VERSION) +libwd_comp_la_LDFLAGS=$(UADK_VERSION) $(UADK_COMP_SYMBOL) libwd_comp_la_DEPENDENCIES= libwd.la -libhisi_zip_la_LIBADD= -ldl -libhisi_zip_la_LDFLAGS=$(UADK_VERSION) - libwd_crypto_la_LIBADD= -lwd -ldl -lnuma -lm -libwd_crypto_la_LDFLAGS=$(UADK_VERSION) +libwd_crypto_la_LDFLAGS=$(UADK_VERSION) $(UADK_CRYPTO_SYMBOL) libwd_crypto_la_DEPENDENCIES= libwd.la +libhisi_zip_la_LIBADD= -ldl +libhisi_zip_la_LDFLAGS=$(UADK_VERSION) + libhisi_sec_la_LIBADD= -lwd -lwd_crypto libhisi_sec_la_LDFLAGS=$(UADK_VERSION) libhisi_sec_la_DEPENDENCIES= libwd.la libwd_crypto.la @@ -123,5 +128,4 @@ libhisi_hpre_la_LDFLAGS=$(UADK_VERSION) libhisi_hpre_la_DEPENDENCIES= libwd.la libwd_crypto.la endif # WD_STATIC_DRV - SUBDIRS=. test v1/test uadk_tool sample diff --git a/libwd.map b/libwd.map new file mode 100644 index 0000000..e667226 --- /dev/null +++ b/libwd.map @@ -0,0 +1,29 @@ +UADK_2.0 { +global: + wd_request_ctx; + wd_release_ctx; + wd_ctx_get_api; + wd_ctx_wait; + wd_is_sva; + wd_is_isolate; + wd_get_accel_name; + wd_get_numa_id; + wd_get_avail_ctx; + wd_get_accel_list; + wd_get_accel_dev; + wd_free_list_accels; + + wd_block_alloc; + wd_block_free; + wd_blockpool_create; + wd_blockpool_destroy; + wd_mempool_create; + wd_mempool_destroy; + wd_mempool_stats; + wd_blockpool_stats; + wd_get_version; + wd_need_debug; + wd_need_info; + +local: *; +}; diff --git a/libwd_comp.map b/libwd_comp.map new file mode 100644 index 0000000..0e481c4 --- /dev/null +++ b/libwd_comp.map @@ -0,0 +1,27 @@ +UADK_COMP_2.0 { +global: + wd_comp_init; + wd_comp_uninit; + wd_comp_alloc_sess; + wd_comp_free_sess; + wd_do_comp_sync; + wd_do_comp_strm; + wd_do_comp_async; + wd_comp_poll_ctx; + wd_comp_poll; + wd_do_comp_sync2; + wd_comp_env_init; + wd_comp_env_uninit; + wd_comp_ctx_num_init; + wd_comp_ctx_num_uninit; + wd_comp_get_env_param; + wd_comp_set_driver; + wd_comp_get_driver; + wd_comp_get_msg; + + wd_sched_rr_instance; + wd_sched_rr_alloc; + wd_sched_rr_release; + +local: *; +}; diff --git a/libwd_crypto.map b/libwd_crypto.map new file mode 100644 index 0000000..5fadc53 --- /dev/null +++ b/libwd_crypto.map @@ -0,0 +1,173 @@ +UADK_CRYPTO_2.0 { +global: + wd_cipher_init; + wd_cipher_uninit; + wd_cipher_alloc_sess; + wd_cipher_free_sess; + wd_cipher_set_key; + wd_do_cipher_sync; + wd_do_cipher_async; + wd_cipher_poll_ctx; + wd_cipher_poll; + wd_cipher_env_init; + wd_cipher_env_uninit; + wd_cipher_ctx_num_init; + wd_cipher_ctx_num_uninit; + wd_cipher_get_env_param; + wd_cipher_set_driver; + wd_cipher_get_driver; + wd_cipher_get_msg; + + wd_aead_init; + wd_aead_uninit; + wd_aead_alloc_sess; + wd_aead_free_sess; + wd_aead_set_ckey; + wd_aead_set_akey; + wd_do_aead_sync; + wd_do_aead_async; + wd_aead_set_authsize; + wd_aead_get_authsize; + wd_aead_get_maxauthsize; + wd_aead_poll_ctx; + wd_aead_poll; + wd_aead_env_init; + wd_aead_env_uninit; + wd_aead_ctx_num_init; + wd_aead_ctx_num_uninit; + wd_aead_get_env_param; + wd_aead_set_driver; + wd_aead_get_driver; + wd_aead_get_msg; + + wd_digest_init; + wd_digest_uninit; + wd_digest_alloc_sess; + wd_digest_free_sess; + wd_do_digest_sync; + wd_do_digest_async; + wd_digest_set_key; + wd_digest_poll_ctx; + wd_digest_poll; + wd_digest_env_init; + wd_digest_env_uninit; + wd_digest_ctx_num_init; + wd_digest_ctx_num_uninit; + wd_digest_get_env_param; + wd_digest_set_driver; + wd_digest_get_driver; + wd_digest_get_msg; + + wd_rsa_is_crt; + wd_rsa_get_key_bits; + wd_rsa_get_pubkey; + wd_rsa_get_prikey; + wd_rsa_set_pubkey_params; + wd_rsa_get_pubkey_params; + wd_rsa_set_prikey_params; + wd_rsa_get_prikey_params; + wd_rsa_set_crt_prikey_params; + wd_rsa_get_crt_prikey_params; + wd_rsa_new_kg_in; + wd_rsa_del_kg_in; + wd_rsa_get_kg_in_params; + wd_rsa_new_kg_out; + wd_rsa_del_kg_out; + wd_rsa_get_kg_out_params; + wd_rsa_get_kg_out_crt_params; + wd_rsa_kg_in_data; + wd_rsa_kg_out_data; + wd_rsa_set_kg_out_crt_psz; + wd_rsa_set_kg_out_psz; + wd_rsa_init; + wd_rsa_uninit; + wd_rsa_alloc_sess; + wd_rsa_free_sess; + wd_do_rsa_async; + wd_rsa_poll; + wd_do_rsa_sync; + wd_do_rsa_async; + wd_rsa_poll_ctx; + wd_rsa_env_init; + wd_rsa_env_uninit; + wd_rsa_ctx_num_init; + wd_rsa_ctx_num_uninit; + wd_rsa_get_env_param; + wd_rsa_set_driver; + wd_rsa_get_driver; + wd_rsa_get_msg; + + wd_dh_get_mode; + wd_dh_key_bits; + wd_dh_set_g; + wd_dh_get_g; + wd_dh_alloc_sess; + wd_dh_free_sess; + wd_do_dh_async; + wd_do_dh_sync; + wd_dh_poll_ctx; + wd_dh_poll; + wd_dh_init; + wd_dh_uninit; + wd_dh_env_init; + wd_dh_env_uninit; + wd_dh_ctx_num_init; + wd_dh_ctx_num_uninit; + wd_dh_get_env_param; + wd_dh_set_driver; + wd_dh_get_driver; + wd_dh_get_msg; + + wd_ecc_get_key_bits; + wd_ecc_get_key; + wd_ecc_set_prikey; + wd_ecc_get_prikey; + wd_ecc_set_pubkey; + wd_ecc_get_pubkey; + wd_ecc_del_in; + wd_ecc_del_out; + wd_ecc_get_prikey_params; + wd_ecc_get_pubkey_params; + wd_ecxdh_new_in; + wd_ecxdh_new_out; + wd_ecxdh_get_out_params; + wd_ecc_set_driver; + wd_ecc_get_driver; + wd_ecc_get_msg; + + wd_sm2_new_sign_in; + wd_sm2_new_verf_in; + wd_sm2_new_enc_in; + wd_sm2_new_dec_in; + wd_sm2_new_sign_out; + wd_sm2_new_enc_out; + wd_sm2_new_dec_out; + wd_sm2_new_kg_out; + wd_sm2_get_sign_out_params; + wd_sm2_get_kg_out_params; + wd_sm2_get_enc_out_params; + wd_sm2_get_dec_out_params; + + wd_ecdsa_new_sign_in; + wd_ecdsa_new_verf_in; + wd_ecdsa_new_sign_out; + wd_ecdsa_get_sign_out_params; + wd_ecc_init; + wd_ecc_uninit; + wd_ecc_alloc_sess; + wd_ecc_free_sess; + wd_ecc_poll; + wd_do_ecc_sync; + wd_do_ecc_async; + wd_ecc_poll_ctx; + wd_ecc_env_init; + wd_ecc_env_uninit; + wd_ecc_ctx_num_init; + wd_ecc_ctx_num_uninit; + wd_ecc_get_env_param; + + wd_sched_rr_instance; + wd_sched_rr_alloc; + wd_sched_rr_release; +local: *; +}; diff --git a/v1/libwd.map b/v1/libwd.map new file mode 100644 index 0000000..4e6b639 --- /dev/null +++ b/v1/libwd.map @@ -0,0 +1,165 @@ +UADK_1.0 { +global: + wd_request_queue; + wd_release_queue; + wd_send; + wd_recv; + wd_wait; + wd_recv_sync; + wd_reserve_memory; + wd_share_reserved_memory; + wd_get_available_dev_num; + wd_get_node_id; + wd_iova_map; + wd_iova_unmap; + wd_dma_to_va; + wd_register_log; + log_out; + + wd_blkpool_create; + wd_blkpool_destroy; + wd_alloc_blk; + wd_free_blk; + wd_get_free_blk_num; + wd_blk_alloc_failures; + wd_blk_iova_map; + wd_blk_iova_unmap; + wd_blksize; + + wcrypto_create_aead_ctx; + wcrypto_set_aead_ckey; + wcrypto_set_aead_akey; + wcrypto_aead_setauthsize; + wcrypto_aead_getauthsize; + wcrypto_aead_get_maxauthsize; + wcrypto_do_aead; + wcrypto_burst_aead; + wcrypto_aead_poll; + wcrypto_del_aead_ctx; + + wcrypto_create_cipher_ctx; + wcrypto_set_cipher_key; + wcrypto_do_cipher; + wcrypto_cipher_poll; + wcrypto_del_cipher_ctx; + wcrypto_burst_cipher; + + wcrypto_create_digest_ctx; + wcrypto_set_digest_key; + wcrypto_do_digest; + wcrypto_digest_poll; + wcrypto_del_digest_ctx; + wcrypto_burst_digest; + + wcrypto_create_comp_ctx; + wcrypto_do_comp; + wcrypto_comp_poll; + wcrypto_del_comp_ctx; + + wcrypto_create_dh_ctx; + wcrypto_dh_is_g2; + wcrypto_dh_key_bits; + wcrypto_do_dh; + wcrypto_dh_poll; + wcrypto_del_dh_ctx; + wcrypto_set_dh_g; + wcrypto_get_dh_g; + + wcrypto_get_ecc_key_bits; + wcrypto_create_ecc_ctx; + wcrypto_del_ecc_ctx; + wcrypto_get_ecc_key; + wcrypto_set_ecc_prikey; + wcrypto_get_ecc_prikey; + wcrypto_set_ecc_pubkey; + wcrypto_get_ecc_pubkey; + wcrypto_del_ecc_in; + wcrypto_del_ecc_out; + wcrypto_get_ecc_prikey_params; + wcrypto_get_ecc_pubkey_params; + wcrypto_get_ecxdh_in_params; + wcrypto_get_ecxdh_out_params; + wcrypto_new_ecxdh_in; + wcrypto_new_ecxdh_out; + wcrypto_do_ecxdh; + wcrypto_ecxdh_poll; + wcrypto_new_ecdsa_sign_in; + wcrypto_new_ecdsa_verf_in; + wcrypto_new_ecdsa_sign_out; + wcrypto_get_ecdsa_sign_in_params; + wcrypto_get_ecdsa_verf_in_params; + wcrypto_get_ecdsa_sign_out_params; + wcrypto_do_ecdsa; + wcrypto_ecdsa_poll; + + wcrypto_new_sm2_sign_in; + wcrypto_new_sm2_verf_in; + wcrypto_new_sm2_sign_out; + wcrypto_get_sm2_sign_out_params; + wcrypto_new_sm2_enc_in; + wcrypto_new_sm2_dec_in; + wcrypto_new_sm2_enc_out; + wcrypto_new_sm2_dec_out; + wcrypto_new_sm2_kg_out; + wcrypto_get_sm2_kg_out_params; + wcrypto_get_sm2_enc_out_params; + wcrypto_get_sm2_dec_out_params; + wcrypto_do_sm2; + wcrypto_sm2_poll; + + wcrypto_rsa_is_crt; + wcrypto_rsa_key_bits; + wcrypto_create_rsa_ctx; + wcrypto_get_rsa_pubkey; + wcrypto_get_rsa_prikey; + wcrypto_set_rsa_pubkey_params; + wcrypto_get_rsa_pubkey_params; + wcrypto_set_rsa_prikey_params; + wcrypto_get_rsa_prikey_params; + wcrypto_set_rsa_crt_prikey_params; + wcrypto_get_rsa_crt_prikey_params; + wcrypto_new_kg_in; + wcrypto_del_kg_in; + wcrypto_get_rsa_kg_in_params; + wcrypto_new_kg_out; + wcrypto_del_kg_out; + wcrypto_get_rsa_kg_out_params; + wcrypto_get_rsa_kg_out_crt_params; + wcrypto_rsa_kg_in_data; + wcrypto_rsa_kg_out_data; + wcrypto_set_rsa_kg_out_crt_psz; + wcrypto_set_rsa_kg_out_psz; + wcrypto_do_rsa; + wcrypto_rsa_poll; + wcrypto_del_rsa_ctx; + + wcrypto_create_rng_ctx; + wcrypto_del_rng_ctx; + wcrypto_do_rng; + wcrypto_rng_poll; + + wd_sglpool_create; + wd_sglpool_destroy; + wd_alloc_sgl; + wd_free_sgl; + wd_sgl_merge; + wd_sgl_cp_to_pbuf; + wd_sgl_cp_from_pbuf; + wd_sgl_iova_map; + wd_sgl_iova_unmap; + wd_get_last_sge_buf; + wd_get_first_sge_buf; + wd_get_sgl_sge_num; + wd_get_sgl_buf_num; + wd_get_sge_buf; + wd_get_sgl_buf_sum; + wd_get_sgl_mem_size; + wd_get_free_sgl_num; + wd_get_free_sgl_sge_num; + wd_get_free_buf_num; + wd_get_sgl_datalen; + wd_get_sge_datalen; + wd_get_sgl_bufsize; + +local: *; +}; -- 2.33.0

1 0

[PATCH v2 0/6] uadk - add wd_comp_init2
by Yang Shen 27 Aug '22

27 Aug '22

The current uadk initialization process is: 1.Call wd_request_ctx() to request ctxs from devices. 2.Call wd_sched_rr_alloc() to create a sched(or some other scheduler alloc function if exits). 3.Initialize the sched. 4.Call wd_<alg>_init() with ctx_config and sched. Logic is reasonable. But in practice, the step of `wd_ request_ Ctx() ` and `wd_ sched_ rr_alloc() ` are very tedious. This makes it difficult for users to use the interface. One of the main reasons for this is that uadk has made a lot of configurations in the scheduler in order to provide users with better performance. Based on this consideration, the current uadk requires the user to arrange the division of hardware resources according to the device topology during initialization. Therefore, as a high-level interface, this scheme can provide customized scheme configuration for users with deep needs. All algorithm initialization interfaces have the same input parameters and behavioral logic. The pre-processing of the wd_<alg>_init is actually the configuration of `struct wd_ctx_config` and `struct wd_sched`. Therefore, the next thing to be done is to use limited and easy-to-use input parameters to describe users' requirements on the two input parameters, ensuring that the functions of the new interface init2 are the same as those of init. For ease of description, v1 is used to refer to the existing interface, and v2 is used to refer to the layer of encapsulation. At present, at least 4 parameters are required to meet the user configuration requirements with the V1 interface function remains unchanged. @device_list: The available uacce device list. Users can get it by wd_get_accel_list(). @numa_bitmask: The bitmask provided by libnuma. Users can use this parameter to control requesting ctxs devices in the bind NUMA scenario. @ctx_nums: The requested ctx number for each numa node. Due to users may have different requirements for different types of ctx numbers, needs a two-dimensional array as input. @sched_type: Scheduling type the user wants to use. What's more, some users want uadk to provide the default value about input parameters for some performance insensitive scenes. C code has no way to. Changelog: v1->v2: - Update the desdescription about wd_<alg>_init in wd_design.md. Yang Shen (6): uadk - support algorithms initialization reentry protect uadk/doc - update wd_alg_init support reentrancy uadk - support return error number as pointer uadk - mv some function to header file uadk/comp - add wd_comp_init2 uadk/docs - support a simple interface for initialization Makefile.am | 4 +- docs/wd_alg_init2.md | 176 +++++++++++++++++++++++++++ docs/wd_design.md | 5 +- include/wd.h | 54 ++++++++- include/wd_alg_common.h | 24 ++++ include/wd_comp.h | 28 +++++ include/wd_util.h | 57 +++++++++ wd.c | 97 ++++++++++++--- wd_aead.c | 33 ++++-- wd_cipher.c | 35 ++++-- wd_comp.c | 257 ++++++++++++++++++++++++++++++++++++++-- wd_dh.c | 34 ++++-- wd_digest.c | 33 ++++-- wd_ecc.c | 33 ++++-- wd_rsa.c | 33 ++++-- wd_util.c | 75 +++++++++++- 16 files changed, 872 insertions(+), 106 deletions(-) create mode 100644 docs/wd_alg_init2.md -- 2.24.0

3 17

acc到期通知
by admin 25 Aug '22

25 Aug '22

1 0

UADK双周例会
by openEuler conference 16 Aug '22

16 Aug '22

您好！ sig-AccLib SIG 邀请您参加 2022-08-17 11:00 召开的Zoom会议会议主题：UADK双周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论会议链接：https://us06web.zoom.us/j/89377406109?pwd=SDVCTndMR3dZOFhtUHhqWUV5S0p2UT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-08-17 11:00, The subject of the conference is UADK双周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论 You can join the meeting at https://us06web.zoom.us/j/89377406109?pwd=SDVCTndMR3dZOFhtUHhqWUV5S0p2UT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

[PATCH] uadk_digest: fix the full mac buffer length as doing long hash
by Kai Ye 16 Aug '22

16 Aug '22

Sha224 and Sha384 need full length mac buffer as doing long hash. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- src/uadk_digest.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/src/uadk_digest.c b/src/uadk_digest.c index 0fb2cfb..693283e 100644 --- a/src/uadk_digest.c +++ b/src/uadk_digest.c @@ -476,7 +476,7 @@ static void digest_priv_ctx_setup(struct digest_priv_ctx *priv, { priv->setup.alg = alg; priv->setup.mode = mode; - priv->req.out_buf_bytes = out_len; + priv->req.out_buf_bytes = MAX_DIGEST_LENGTH; priv->req.out_bytes = out_len; } @@ -535,15 +535,30 @@ soft_init: return digest_soft_init(priv->soft_ctx, priv->e_nid); } +static void digest_update_out_length(EVP_MD_CTX *ctx) +{ + struct digest_priv_ctx *priv = + (struct digest_priv_ctx *)EVP_MD_CTX_md_data(ctx); + + /* Sha224 and Sha384 need full length mac buffer as doing long hash */ + if (priv->e_nid == NID_sha224) + priv->req.out_bytes = WD_DIGEST_SHA224_FULL_LEN; + + if (priv->e_nid == NID_sha384) + priv->req.out_bytes = WD_DIGEST_SHA384_FULL_LEN; +} + static int digest_update_inner(EVP_MD_CTX *ctx, const void *data, size_t data_len) { struct digest_priv_ctx *priv = - (struct digest_priv_ctx *) EVP_MD_CTX_md_data(ctx); + (struct digest_priv_ctx *)EVP_MD_CTX_md_data(ctx); const unsigned char *tmpdata = (const unsigned char *)data; size_t left_len = data_len; int copy_to_bufflen; int ret; + digest_update_out_length(ctx); + priv->req.has_next = DIGEST_DOING; while (priv->last_update_bufflen + left_len > DIGEST_BLOCK_SIZE) { @@ -701,6 +716,12 @@ static int uadk_e_digest_final(EVP_MD_CTX *ctx, unsigned char *digest) priv->req.in_bytes = priv->last_update_bufflen; priv->e_nid = EVP_MD_nid(EVP_MD_CTX_md(ctx)); + if (priv->e_nid == NID_sha224) + priv->req.out_bytes = WD_DIGEST_SHA224_LEN; + + if (priv->e_nid == NID_sha384) + priv->req.out_bytes = WD_DIGEST_SHA384_LEN; + ret = async_setup_async_event_notification(&op); if (unlikely(!ret)) { fprintf(stderr, "failed to setup async event notification.\n"); -- 2.30.0

1 0

acc密码到期通知
by admin-openeuler.org 16 Aug '22

16 Aug '22

1 0

[PATCH 1/6] test: add new testing case
by Kai Ye 15 Aug '22

15 Aug '22

supports new auth algs and cipher algs. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- test/hisi_sec_test/test_hisi_sec.c | 185 +++++++++++++++++++++++++++-- test/hisi_sec_test/test_hisi_sec.h | 140 ++++++++++++++++++++++ 2 files changed, 317 insertions(+), 8 deletions(-) mode change 100644 => 100755 test/hisi_sec_test/test_hisi_sec.c diff --git a/test/hisi_sec_test/test_hisi_sec.c b/test/hisi_sec_test/test_hisi_sec.c old mode 100644 new mode 100755 index 6f27cd1..9aa4e56 --- a/test/hisi_sec_test/test_hisi_sec.c +++ b/test/hisi_sec_test/test_hisi_sec.c @@ -30,7 +30,7 @@ #define SCHED_SINGLE "sched_single" #define SCHED_NULL_CTX_SIZE 4 #define TEST_WORD_LEN 4096 -#define MAX_ALGO_PER_TYPE 13 +#define MAX_ALGO_PER_TYPE 16 #define MIN_SVA_BD_NUM 1 #define SGL_ALIGNED_BYTES 64 @@ -59,7 +59,26 @@ static struct hash_testvec g_long_hash_tv; char *skcipher_names[MAX_ALGO_PER_TYPE] = {"ecb(aes)", "cbc(aes)", "xts(aes)", "ofb(aes)", "cfb(aes)", "ecb(des3_ede)", - "cbc(des3_ede)", "cbc(sm4)", "xts(sm4)", "ofb(sm4)", "cfb(sm4)", "ecb(sm4)", NULL,}; + "cbc(des3_ede)", "cbc(sm4)", "xts(sm4)", "ofb(sm4)", "cfb(sm4)", "ecb(sm4)", + "cbc_cs1(aes)", "cbc_cs2(aes)", "cbc_cs3(aes)", NULL,}; + +enum digest_type { + LOCAL_SM3, + LOCAL_MD5, + LOCAL_SHA1, + LOCAL_SHA256, + LOCAL_SHA224, + LOCAL_SHA384, + LOCAL_SHA512, + LOCAL_SHA512_224, + LOCAL_SHA512_256, + LOCAL_AES_CMAC, + LOCAL_AES_GMAC_128, + LOCAL_AES_GMAC_192, + LOCAL_AES_GMAC_256, + LOCAL_AES_XCBC_MAC_96, +}; + struct sva_bd { char *src; char *dst; @@ -452,6 +471,66 @@ int get_cipher_resource(struct cipher_testvec **alg_tv, int* alg, int* mode) } tv = &sm4_ecb_tv_template_128[0]; break; + case 12: + alg_type = WD_CIPHER_AES; + switch (g_keylen) { + case AES_KEYSIZE_128: + mode_type = WD_CIPHER_CBC_CS1; + tv = &aes_cbc_cs1_tv_template_128[0]; + break; + case AES_KEYSIZE_192: + mode_type = WD_CIPHER_CBC_CS1; + tv = &aes_cbc_cs1_tv_template_192[0]; + break; + case AES_KEYSIZE_256: + mode_type = WD_CIPHER_CBC_CS1; + tv = &aes_cbc_cs1_tv_template_256[0]; + break; + default: + SEC_TST_PRT("%s: input key err!\n", __func__); + return -EINVAL; + } + break; + case 13: + alg_type = WD_CIPHER_AES; + switch (g_keylen) { + case AES_KEYSIZE_128: + mode_type = WD_CIPHER_CBC_CS2; + tv = &aes_cbc_cs1_tv_template_128[0]; + break; + case AES_KEYSIZE_192: + mode_type = WD_CIPHER_CBC_CS2; + tv = &aes_cbc_cs1_tv_template_192[0]; + break; + case AES_KEYSIZE_256: + mode_type = WD_CIPHER_CBC_CS2; + tv = &aes_cbc_cs1_tv_template_256[0]; + break; + default: + SEC_TST_PRT("%s: input key err!\n", __func__); + return -EINVAL; + } + break; + case 14: + alg_type = WD_CIPHER_AES; + switch (g_keylen) { + case AES_KEYSIZE_128: + mode_type = WD_CIPHER_CBC_CS3; + tv = &aes_cbc_cs1_tv_template_128[0]; + break; + case AES_KEYSIZE_192: + mode_type = WD_CIPHER_CBC_CS3; + tv = &aes_cbc_cs1_tv_template_192[0]; + break; + case AES_KEYSIZE_256: + mode_type = WD_CIPHER_CBC_CS3; + tv = &aes_cbc_cs1_tv_template_256[0]; + break; + default: + SEC_TST_PRT("%s: input key err!\n", __func__); + return -EINVAL; + } + break; case 16: alg_type = WD_CIPHER_AES; mode_type = WD_CIPHER_CBC; @@ -622,8 +701,12 @@ static int test_sec_cipher_sync_once(void) } SEC_TST_PRT("req src--------->:\n"); - copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, - (void *)tv->ptext, (size_t)tv->len); + if (g_direction == 0) + copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, + (void *)tv->ptext, (size_t)tv->len); + else + copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, + (void *)tv->ctext, (size_t)tv->len); dump_mem(g_data_fmt, req.src, req.in_bytes); req.out_bytes = tv->len; @@ -755,8 +838,12 @@ static int test_sec_cipher_async_once(void) } SEC_TST_PRT("req src--------->:\n"); - copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, - (void *)tv->ptext, (size_t)tv->len); + if (g_direction == 0) + copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, + (void *)tv->ptext, (size_t)tv->len); + else + copy_mem(g_data_fmt, req.src, WD_FLAT_BUF, + (void *)tv->ctext, (size_t)tv->len); dump_mem(g_data_fmt, req.src, req.in_bytes); req.out_bytes = tv->len; @@ -767,7 +854,6 @@ static int test_sec_cipher_async_once(void) goto out_dst; } - req.iv = malloc(IV_SIZE); if (!req.iv) { ret = -ENOMEM; @@ -1510,6 +1596,73 @@ int get_digest_resource(struct hash_testvec **alg_tv, int* alg, int* mode) tv->dsize = 32; alg_type = WD_DIGEST_SHA512_256; break; + case 9: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-cmac"); + tv = &aes_cmac_tv_template[0]; + break; + } + tv->dsize = 16; + alg_type = WD_DIGEST_AES_CMAC; + break; + case 10: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-gmac-128"); + tv = &aes_gmac_128_tv_template[0]; + break; + } + tv->dsize = 16; + alg_type = WD_DIGEST_AES_GMAC; + break; + case 11: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-gmac-192"); + tv = &aes_gmac_192_tv_template[0]; + break; + } + tv->dsize = 16; + alg_type = WD_DIGEST_AES_GMAC; + break; + case 12: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-gmac-256"); + tv = &aes_gmac_256_tv_template[0]; + break; + } + tv->dsize = 16; + alg_type = WD_DIGEST_AES_GMAC; + break; + case 13: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-xcbc-mac-96"); + tv = &aes_xcbc_mac_96_tv_template[0]; + break; + } + tv->dsize = 12; + alg_type = WD_DIGEST_AES_XCBC_MAC_96; + break; + case 14: + switch (g_alg_op_type) { + case 1: + mode_type = WD_DIGEST_HMAC; + SEC_TST_PRT("test alg: %s\n", "aes-xcbc-prf-128"); + tv = &aes_xcbc_mac_96_tv_template[0]; + break; + } + tv->dsize = 16; + alg_type = WD_DIGEST_AES_XCBC_PRF_128; + break; + default: SEC_TST_PRT("keylenth error, default test alg: %s\n", "normal(sm3)"); return -EINVAL; @@ -1599,6 +1752,18 @@ static int sec_digest_sync_once(void) SEC_TST_PRT("sess set key failed!\n"); goto out_key; } + + if (g_testalg == LOCAL_AES_GMAC_128 || + g_testalg == LOCAL_AES_GMAC_192 || + g_testalg == LOCAL_AES_GMAC_256) { + req.iv = malloc(sizeof(char) * 16); + if (!req.iv) { + SEC_TST_PRT("failed to alloc iv memory!\n"); + goto out_key; + } + memcpy(req.iv, tv->iv, 16); + req.iv_bytes = 16; + } } gettimeofday(&start_tval, NULL); @@ -1625,6 +1790,7 @@ out_dst: free_buf(g_data_fmt, req.in); out_src: digest_uninit_config(); + free(req.iv); return ret; } @@ -3858,11 +4024,14 @@ static void print_help(void) SEC_TST_PRT(" 0 : AES-ECB; 1 : AES-CBC; 2 : AES-XTS; 3 : AES-OFB\n"); SEC_TST_PRT(" 4 : AES-CFB; 5 : 3DES-ECB; 6 : 3DES-CBC; 7 : SM4-CBC\n"); SEC_TST_PRT(" 8 : SM4-XTS; 9 : SM4-OFB; 10 : SM4-CFB; 11 : SM4-ECB\n"); + SEC_TST_PRT(" 12 : AES-CBC_CS1; 13 : AES-CBC_CS2; 14 : AES-CBC_CS3\n"); SEC_TST_PRT(" [--digest ]:\n"); SEC_TST_PRT(" specify symmetric hash algorithm\n"); SEC_TST_PRT(" 0 : SM3; 1 : MD5; 2 : SHA1; 3 : SHA256\n"); SEC_TST_PRT(" 4 : SHA224; 5 : SHA384; 6 : SHA512; 7 : SHA512_224\n"); - SEC_TST_PRT(" 8 : SHA512_256\n"); + SEC_TST_PRT(" 8 : SHA512_256; 9 : AES_CMAC; 10 : AES_GMAC_128\n"); + SEC_TST_PRT(" 11 : AES_GMAC_192; 12 : AES_GMAC_256; 13 : AES_XCBC_MAC_96\n"); + SEC_TST_PRT(" 14 : AES_XCBC_PRF_128\n"); SEC_TST_PRT(" [--aead ]:\n"); SEC_TST_PRT(" specify symmetric aead algorithm\n"); SEC_TST_PRT(" 0 : AES-CCM; 1 : AES-GCM; 2 : Hmac(sha256),cbc(aes)\n"); diff --git a/test/hisi_sec_test/test_hisi_sec.h b/test/hisi_sec_test/test_hisi_sec.h index defd3c4..8e21681 100644 --- a/test/hisi_sec_test/test_hisi_sec.h +++ b/test/hisi_sec_test/test_hisi_sec.h @@ -43,6 +43,7 @@ struct cipher_testvec { struct hash_testvec { char *key; char *plaintext; + char *iv; const char *digest; unsigned int psize; unsigned short ksize; @@ -298,6 +299,93 @@ struct hash_testvec hmac_sha512_256_tv_template[] = { }, }; +struct hash_testvec aes_cmac_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ksize = 16, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + } +}; + +struct hash_testvec aes_gmac_128_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ksize = 16, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + .iv = "\x33\x33\x33\x33\x33\x00\x00\x00" + "\x00\x00\x00\x00\x00\x00\x00\x00", + } +}; + +struct hash_testvec aes_gmac_192_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x22\x22\x22\x22\x22\x22\x22\x22", + .ksize = 24, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + .iv = "\x33\x33\x33\x33\x33\x00\x00\x00" + "\x00\x00\x00\x00\x00\x00\x00\x00", + } +}; + +struct hash_testvec aes_gmac_256_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x22\x22\x22\x22\x22\x22\x22\x22" + "\x22\x22\x22\x22\x22\x22\x22\x22", + .ksize = 32, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + .iv = "\x33\x33\x33\x33\x33\x00\x00\x00" + "\x00\x00\x00\x00\x00\x00\x00\x00", + } +}; + +struct hash_testvec aes_xcbc_mac_96_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ksize = 16, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + } +}; + +struct hash_testvec aes_xcbc_prf_128_tv_template[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ksize = 16, + .plaintext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .psize = 32, + } +}; + struct hash_testvec long_hash_tv_template[] = { { /* @@ -878,6 +966,58 @@ struct cipher_testvec aes_cbc_tv_template_128[] = { } }; +struct cipher_testvec aes_cbc_cs1_tv_template_128[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .klen = 16, + .iv = "\x33\x33\x33\x33\x33\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ptext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .ctext = "\x4d\xe5\xc3\xd2\x9e\xe1\x29\x73" + "\x8b\x10\x7b\xde\x5e\x6c\xdb\x36" + "\x95\x35\x5e\x0c\x42\xc8\x33\x7a" + "\x17\x36\xa4\x34\xfd\xb1\x12\xbf", + .len = 32, + } +}; + +struct cipher_testvec aes_cbc_cs1_tv_template_192[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x22\x22\x22\x22\x22\x22\x22\x22", + .klen = 24, + .iv = "\x33\x33\x33\x33\x33\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ptext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .len = 32, + } +}; + +struct cipher_testvec aes_cbc_cs1_tv_template_256[] = { + { + .key = "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11" + "\x22\x22\x22\x22\x22\x22\x22\x22" + "\x22\x22\x22\x22\x22\x22\x22\x22", + .klen = 32, + .iv = "\x33\x33\x33\x33\x33\x11\x11\x11" + "\x11\x11\x11\x11\x11\x11\x11\x11", + .ptext = "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44" + "\x44\x44\x44\x44\x44\x44\x44\x44", + .len = 32, + } +}; + struct cipher_testvec aes_cbc_perf_128[] = { { .key = "\x06\xa9\x21\x40\x36\xb8\xa1\x5b" -- 2.22.0

1 5

[PATCH v3 0/6] uadk - add wd_comp_init2
by Yang Shen 11 Aug '22

11 Aug '22

The current uadk initialization process is: 1.Call wd_request_ctx() to request ctxs from devices. 2.Call wd_sched_rr_alloc() to create a sched(or some other scheduler alloc function if exits). 3.Initialize the sched. 4.Call wd_<alg>_init() with ctx_config and sched. Logic is reasonable. But in practice, the step of `wd_ request_ Ctx() ` and `wd_ sched_ rr_alloc() ` are very tedious. This makes it difficult for users to use the interface. One of the main reasons for this is that uadk has made a lot of configurations in the scheduler in order to provide users with better performance. Based on this consideration, the current uadk requires the user to arrange the division of hardware resources according to the device topology during initialization. Therefore, as a high-level interface, this scheme can provide customized scheme configuration for users with deep needs. All algorithm initialization interfaces have the same input parameters and behavioral logic. The pre-processing of the wd_<alg>_init is actually the configuration of `struct wd_ctx_config` and `struct wd_sched`. Therefore, the next thing to be done is to use limited and easy-to-use input parameters to describe users' requirements on the two input parameters, ensuring that the functions of the new interface init2 are the same as those of init. For ease of description, v1 is used to refer to the existing interface, and v2 is used to refer to the layer of encapsulation. At present, at least 4 parameters are required to meet the user configuration requirements with the V1 interface function remains unchanged. @device_list: The available uacce device list. Users can get it by wd_get_accel_list(). @numa_bitmask: The bitmask provided by libnuma. Users can use this parameter to control requesting ctxs devices in the bind NUMA scenario. @ctx_nums: The requested ctx number for each numa node. Due to users may have different requirements for different types of ctx numbers, needs a two-dimensional array as input. @sched_type: Scheduling type the user wants to use. What's more, some users want uadk to provide the default value about input parameters for some performance insensitive scenes. C code has no way to. Changelog: v2->v3: - Add a time counter for wd_alg_try_init() to help for some unexpected error happening in driver's init. - Rename a function. v1->v2: - Update the desdescription about wd_<alg>_init in wd_design.md. Yang Shen (6): uadk - support algorithms initialization reentry protect uadk/doc - update wd_alg_init support reentrancy uadk - support return error number as pointer uadk - mv some function to header file uadk/comp - add wd_comp_init2 uadk/docs - support a simple interface for initialization Makefile.am | 4 +- docs/wd_alg_init2.md | 176 +++++++++++++++++++++++++++ docs/wd_design.md | 5 +- include/wd.h | 54 ++++++++- include/wd_alg_common.h | 24 ++++ include/wd_comp.h | 28 +++++ include/wd_util.h | 57 +++++++++ wd.c | 97 ++++++++++++--- wd_aead.c | 33 ++++-- wd_cipher.c | 35 ++++-- wd_comp.c | 257 ++++++++++++++++++++++++++++++++++++++-- wd_dh.c | 34 ++++-- wd_digest.c | 33 ++++-- wd_ecc.c | 33 ++++-- wd_rsa.c | 33 ++++-- wd_util.c | 83 ++++++++++++- 16 files changed, 880 insertions(+), 106 deletions(-) create mode 100644 docs/wd_alg_init2.md -- 2.24.0

1 6

I will do china sourcing agent,negotiation,dropshipping,inspection etc. 13:07:03
by 仓忧卵积 06 Aug '22

06 Aug '22

hi,acc I will do china sourcing agent,negotiation,dropshipping,inspection etc. ✂Please kindly talk with me before ordering! We need have a free communication that know your requirement. Tired of a middle-men charging your higher prices? Lower effectively communication with factory or salesman? Delay the factory delivery time one time and one time? Manufacture can't accept your Mini order? Why I am a professional China sourcing agent? ➤ Over 10 years experience in international trade. ✔ Source ✔ Negotiation ✔ Dropshipping ✔ Print label ✔ Shipment ✔ Inspection ✔ Warehouse ✔ Help with Shopify/Amazon/Aliexpress etc. ✔ Searching by Google/Alibaba/Made-in-China/1688/Amazon FBA,local factory. ➤About visit factory, we usually go to Yiwu city ,Ningbo city ,Hangzhou city ect. If other city, kindly talk with me. We are dedicated to help small & medium overseas companies or individual sourcing from China. Instead of your company adjusting to the needs of a buying agent, I will comply with your demands so everything you want comes to fruition. ➤Just tell us what exactly you want, we can give you a satisfied result or plan ! *If you’re interest* Lee Skype：+86 15919103357 WhatsApp：+86 15919103357 Email: zhxcycq@ gmail .com WeChat：15919103357 2022-08-06 13:07:03

1 0

UADK周例会
by openEuler conference 27 Jul '22

27 Jul '22

您好！ sig-AccLib SIG 邀请您参加 2022-07-27 11:00 召开的Zoom会议会议主题：UADK周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论。2.自由讨论。会议链接：https://us06web.zoom.us/j/82090595348?pwd=QlhNeFdOVjNXSTZ0WXAreWRCSEFCdz09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-07-27 11:00, The subject of the conference is UADK周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论。2.自由讨论。 You can join the meeting at https://us06web.zoom.us/j/82090595348?pwd=QlhNeFdOVjNXSTZ0WXAreWRCSEFCdz09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

[PATCH] rsa: modify the default algorithm of keygen soft algorithm
by Zhiqi Song 26 Jul '22

26 Jul '22

From: Weili Qian <qianweili(a)huawei.com> When the hardware algorithm execution fails, the engine needs to switch to the soft algorithm execution, and the callback needs to be modified to the soft algorithm to prevent it from being re-transferred to the hardware interface. Signed-off-by: Weili Qian <qianweili(a)huawei.com> --- src/uadk_rsa.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/uadk_rsa.c b/src/uadk_rsa.c index 821cb78..2f78a37 100644 --- a/src/uadk_rsa.c +++ b/src/uadk_rsa.c @@ -141,6 +141,8 @@ enum { MAX_CODE, }; +static int uadk_e_rsa_keygen(RSA *rsa, int bits, BIGNUM *e, BN_GENCB *cb); + static int rsa_check_bit_useful(const int bits, int flen) { if (flen > bits) @@ -1111,10 +1113,19 @@ err: static int uadk_e_soft_rsa_keygen(RSA *rsa, int bits, BIGNUM *e, BN_GENCB *cb) { + const RSA_METHOD *default_meth = RSA_PKCS1_OpenSSL(); int ret; + if (!default_meth) { + fprintf(stderr, "failed to get soft method.\n"); + return UADK_E_FAIL; + } + UNUSED(cb); + (void)RSA_meth_set_keygen(rsa_hw_meth, + RSA_meth_get_keygen(default_meth)); ret = RSA_generate_key_ex(rsa, bits, e, NULL); + (void)RSA_meth_set_keygen(rsa_hw_meth, uadk_e_rsa_keygen); return ret; } -- 2.30.0

1 0

[PATCH] engine: fix function type
by Zhiqi Song 26 Jul '22

26 Jul '22

From: Weili Qian <qianweili(a)huawei.com> If return type of the function 'async_module_init' is void, when function executes failed, the app continues to execute tasks. The process will be abnormal. Change 'async_module_init' type to int. If function executes failed, 0 is returned. Signed-off-by: Weili Qian <qianweili(a)huawei.com> --- src/e_uadk.c | 16 +++++++++++++--- src/uadk_async.c | 9 +++++---- src/uadk_async.h | 2 +- 3 files changed, 19 insertions(+), 8 deletions(-) diff --git a/src/e_uadk.c b/src/e_uadk.c index 74dab39..ac4d738 100644 --- a/src/e_uadk.c +++ b/src/e_uadk.c @@ -238,8 +238,14 @@ static int uadk_init(ENGINE *e) return 1; } - if (uadk_cipher || uadk_digest || uadk_rsa || uadk_dh || uadk_ecc) - async_module_init(); + if (uadk_cipher || uadk_digest || uadk_rsa || uadk_dh || uadk_ecc) { + ret = async_module_init(); + if (!ret) { + pthread_mutex_unlock(&uadk_engine_mutex); + fprintf(stderr, "failed to init async module!\n"); + return 0; + } + } if (uadk_digest) uadk_e_digest_lock_init(); @@ -265,7 +271,11 @@ static int uadk_finish(ENGINE *e) static void engine_init_child_at_fork_handler(void) { - async_module_init(); + int ret; + + ret = async_module_init(); + if (!ret) + fprintf(stderr, "failed to init child async module!\n"); } #ifdef KAE diff --git a/src/uadk_async.c b/src/uadk_async.c index c98153b..e4eff43 100644 --- a/src/uadk_async.c +++ b/src/uadk_async.c @@ -335,7 +335,7 @@ static void *async_poll_process_func(void *args) return NULL; } -void async_module_init(void) +int async_module_init(void) { pthread_t thread_id; pthread_attr_t thread_attr; @@ -343,11 +343,11 @@ void async_module_init(void) memset(&poll_queue, 0, sizeof(struct async_poll_queue)); if (pthread_mutex_init(&(poll_queue.async_task_mutex), NULL) < 0) - return; + return 0; poll_queue.head = malloc(sizeof(struct async_poll_task) * ASYNC_QUEUE_TASK_NUM); if (poll_queue.head == NULL) - return; + return 0; memset(poll_queue.head, 0, sizeof(struct async_poll_task) * ASYNC_QUEUE_TASK_NUM); @@ -367,8 +367,9 @@ void async_module_init(void) poll_queue.thread_id = thread_id; OPENSSL_atexit(async_poll_task_free); - return; + return 1; err: async_poll_task_free(); + return 0; } diff --git a/src/uadk_async.h b/src/uadk_async.h index 9836dbb..97b7d15 100644 --- a/src/uadk_async.h +++ b/src/uadk_async.h @@ -68,7 +68,7 @@ extern int async_setup_async_event_notification(struct async_op *op); extern int async_clear_async_event_notification(void); extern int async_pause_job(void *ctx, struct async_op *op, enum task_type type, int id); extern void async_register_poll_fn(int type, async_recv_t func); -extern void async_module_init(void); +extern int async_module_init(void); extern int async_wake_job(ASYNC_JOB *job); extern void async_free_poll_task(int id, bool is_cb); extern int async_get_free_task(int *id); -- 2.30.0

1 0

[PATCH] engine: initialize resources only once
by Zhiqi Song 26 Jul '22

26 Jul '22

From: Weili Qian <qianweili(a)huawei.com> If multiple threads load the engine repeatedly, the poll_queue and global locks in the algorithm API are repeatedly initialized. As a result, tasks of other threads are abnormal. Therefore, this patch moves resource initialization to the function 'uadk_init' and only initialize once. Signed-off-by: Weili Qian <qianweili(a)huawei.com> --- src/e_uadk.c | 37 +++++++++++++++++++++++++++++++++---- src/uadk.h | 5 +++++ src/uadk_cipher.c | 7 +++++-- src/uadk_dh.c | 7 +++++-- src/uadk_digest.c | 7 +++++-- src/uadk_pkey.c | 7 +++++-- src/uadk_rsa.c | 6 ++++-- 7 files changed, 62 insertions(+), 14 deletions(-) diff --git a/src/e_uadk.c b/src/e_uadk.c index e02b563..74dab39 100644 --- a/src/e_uadk.c +++ b/src/e_uadk.c @@ -42,6 +42,8 @@ static int uadk_digest; static int uadk_rsa; static int uadk_dh; static int uadk_ecc; +static int uadk_inited; +static pthread_mutex_t uadk_engine_mutex = PTHREAD_MUTEX_INITIALIZER; #ifdef KAE static int uadk_cipher_nosva; @@ -218,12 +220,41 @@ static int uadk_destroy(ENGINE *e) uadk_e_destroy_ecc(); if (uadk_dh) uadk_e_destroy_dh(); + + pthread_mutex_lock(&uadk_engine_mutex); + uadk_inited = 0; + pthread_mutex_unlock(&uadk_engine_mutex); + return 1; } - static int uadk_init(ENGINE *e) { + int ret; + + pthread_mutex_lock(&uadk_engine_mutex); + if (uadk_inited) { + pthread_mutex_unlock(&uadk_engine_mutex); + return 1; + } + + if (uadk_cipher || uadk_digest || uadk_rsa || uadk_dh || uadk_ecc) + async_module_init(); + + if (uadk_digest) + uadk_e_digest_lock_init(); + if (uadk_cipher) + uadk_e_cipher_lock_init(); + if (uadk_rsa) + uadk_e_rsa_lock_init(); + if (uadk_dh) + uadk_e_dh_lock_init(); + if (uadk_ecc) + uadk_e_ecc_lock_init(); + + uadk_inited = 1; + pthread_mutex_unlock(&uadk_engine_mutex); + return 1; } @@ -360,10 +391,8 @@ static int bind_fn(ENGINE *e, const char *id) #endif bind_fn_uadk_alg(e); - if (uadk_cipher || uadk_digest || uadk_rsa || uadk_dh || uadk_ecc) { - async_module_init(); + if (uadk_cipher || uadk_digest || uadk_rsa || uadk_dh || uadk_ecc) pthread_atfork(NULL, NULL, engine_init_child_at_fork_handler); - } ret = ENGINE_set_ctrl_function(e, uadk_engine_ctrl); if (ret != 1) { diff --git a/src/uadk.h b/src/uadk.h index 384e035..d210c3d 100644 --- a/src/uadk.h +++ b/src/uadk.h @@ -42,4 +42,9 @@ extern int uadk_e_bind_ecc(ENGINE *e); extern void uadk_e_destroy_ecc(void); extern int uadk_e_is_env_enabled(const char *alg_name); extern int uadk_e_set_env(const char *var_name, int numa_id); +extern void uadk_e_ecc_lock_init(void); +extern void uadk_e_rsa_lock_init(void); +extern void uadk_e_dh_lock_init(void); +extern void uadk_e_cipher_lock_init(void); +extern void uadk_e_digest_lock_init(void); #endif diff --git a/src/uadk_cipher.c b/src/uadk_cipher.c index 569ee6e..0b99753 100644 --- a/src/uadk_cipher.c +++ b/src/uadk_cipher.c @@ -1066,8 +1066,6 @@ int uadk_e_bind_cipher(ENGINE *e) if (platform > KUNPENG920) bind_v3_cipher(); - pthread_spin_init(&engine.lock, PTHREAD_PROCESS_PRIVATE); - return ENGINE_set_ciphers(e, uadk_e_engine_ciphers); } @@ -1150,3 +1148,8 @@ void uadk_e_destroy_cipher(void) if (platform > KUNPENG920) destroy_v3_cipher(); } + +void uadk_e_cipher_lock_init(void) +{ + pthread_spin_init(&engine.lock, PTHREAD_PROCESS_PRIVATE); +} diff --git a/src/uadk_dh.c b/src/uadk_dh.c index 40fb583..75c9e5a 100644 --- a/src/uadk_dh.c +++ b/src/uadk_dh.c @@ -896,8 +896,6 @@ static void uadk_e_delete_dh_meth(void) int uadk_e_bind_dh(ENGINE *e) { - pthread_spin_init(&g_dh_res.lock, PTHREAD_PROCESS_PRIVATE); - return ENGINE_set_DH(e, uadk_e_get_dh_methods()); } @@ -907,3 +905,8 @@ void uadk_e_destroy_dh(void) uadk_e_delete_dh_meth(); uadk_e_wd_dh_uninit(); } + +void uadk_e_dh_lock_init(void) +{ + pthread_spin_init(&g_dh_res.lock, PTHREAD_PROCESS_PRIVATE); +} diff --git a/src/uadk_digest.c b/src/uadk_digest.c index 330a1c2..70f51d3 100644 --- a/src/uadk_digest.c +++ b/src/uadk_digest.c @@ -793,6 +793,11 @@ do { \ return 0; \ } while (0) +void uadk_e_digest_lock_init(void) +{ + pthread_spin_init(&engine.lock, PTHREAD_PROCESS_PRIVATE); +} + int uadk_e_bind_digest(ENGINE *e) { UADK_DIGEST_DESCR(md5, md5WithRSAEncryption, MD5_DIGEST_LENGTH, @@ -838,8 +843,6 @@ int uadk_e_bind_digest(ENGINE *e) uadk_e_digest_final, uadk_e_digest_cleanup, uadk_e_digest_copy); - pthread_spin_init(&engine.lock, PTHREAD_PROCESS_PRIVATE); - return ENGINE_set_digests(e, uadk_engine_digests); } diff --git a/src/uadk_pkey.c b/src/uadk_pkey.c index f27e2f5..5300327 100644 --- a/src/uadk_pkey.c +++ b/src/uadk_pkey.c @@ -618,6 +618,11 @@ static int uadk_ecc_bind_pmeth(ENGINE *e) return ENGINE_set_pkey_meths(e, get_pkey_meths); } +void uadk_e_ecc_lock_init(void) +{ + pthread_spin_init(&ecc_res.lock, PTHREAD_PROCESS_PRIVATE); +} + int uadk_e_bind_ecc(ENGINE *e) { int ret; @@ -634,8 +639,6 @@ int uadk_e_bind_ecc(ENGINE *e) return ret; } - pthread_spin_init(&ecc_res.lock, PTHREAD_PROCESS_PRIVATE); - return ret; } diff --git a/src/uadk_rsa.c b/src/uadk_rsa.c index 2f78a37..1579539 100644 --- a/src/uadk_rsa.c +++ b/src/uadk_rsa.c @@ -1832,8 +1832,6 @@ static void uadk_e_delete_rsa_meth(void) */ int uadk_e_bind_rsa(ENGINE *e) { - pthread_spin_init(&g_rsa_res.lock, PTHREAD_PROCESS_PRIVATE); - return ENGINE_set_RSA(e, uadk_e_get_rsa_methods()); } @@ -1844,3 +1842,7 @@ void uadk_e_destroy_rsa(void) uadk_e_rsa_uninit(); } +void uadk_e_rsa_lock_init(void) +{ + pthread_spin_init(&g_rsa_res.lock, PTHREAD_PROCESS_PRIVATE); +} -- 2.30.0

1 0

openEuler 22.09 Alpha版本release公告
by chenyaqiang 25 Jul '22

25 Jul '22

Dear all， openEuler 22.09创新版本Alpha版本在经过社区各SIG组协作开发，CI/CD SIG规模构建，及QA SIG Alpha版本质量评估，满足alpha版本发布质量标准，现正式发布该alpha版本，社区各SIG组及所有爱好者均可以下载并试用alpha ，Alpha 版本包含 openEuler 22.09 版本的几乎全量组件（少量持续编译/构建失败包清单详见邮件正文编译构建章节），版本测试能力/策略由 openEuler QA SIG团队指导，社区各个SIG组自主开展组件自验证，社区一起协作支撑openEuler 22.09创新版本issue发现和定位修复，您发现和定位修复每一个issue不仅可以解决您使用openEuler创新版本的问题点，更可以支撑社区一起持续优化提升百万级openEuler用户的体验！ Alpha版本作为beta版本的前置自验证版本，经过社区联合协作自验证和issue修复后，下一个版本里程碑点（预计在2022/08/01）将会提供 Beta 版本。 openEuler 22.09版本release plan公示链接： https://gitee.com/openeuler/release-management/blob/master/openEuler-22.09/… openEuler 22.09 Alpha版本下载链接： http://121.36.84.172/dailybuild/openEuler-22.09/openeuler-2022-07-25-10-43-… openEuler 22.09 Alpha版本发布质量评估规范公示链接： https://gitee.com/openeuler/QA/blob/master/Test_Checklist/%E7%A4%BE%E5%8C%B… openEuler 22.09 Alpha版本自验证进展与质量结果同步方式：建议各sig组及社区用户均可以在QA-sig下以ISSUE方式同步自验证进展和自验证结果，您的自验证结果将是Alpha版本质量评估的充分信息依据；社区QA 版本测试提单规范 https://gitee.com/openeuler/QA/blob/839f952696f271f83c018ccf3218cf493b92d65… 社区QA 测试平台 radiates https://radiatest.openeuler.org<https://radiatest.openeuler.org/> openEuler 22.09 Alpha版本已知待修复单包构建失败问题清单：里程碑地址：https://e.gitee.com/open_euler/milestones/170898/issues/table 里程碑任务ID 任务标题任务状态关联仓库 Sig openEuler-22.09-Dailybuild I5HVUZ ima-evm-utils build problem in openEuler:22.09 待办的 ima-evm-utils Base-service openEuler-22.09-Dailybuild I5HVVF mysql5 build problem in openEuler:22.09 待办的 mysql5 DB openEuler-22.09-Dailybuild I5HZVX folks build problem in openEuler:22.09 待办的 folks GNOME openEuler-22.09-Dailybuild I5HZW3 subunit build problem in openEuler:22.09 待办的 subunit Programming-language openEuler-22.09-Dailybuild I5I1ZZ ceph build problem in openEuler:22.09 待办的 ceph sig-SDS openEuler-22.09-Dailybuild I5I6MO libgit2 build problem in openEuler:22.09 待办的 libgit2 Base-service openEuler-22.09-Dailybuild I5IH5G gpgme build problem in openEuler:22.09 待办的 gpgme Base-service openEuler-22.09-Dailybuild I5IH69 iotop build problem in openEuler:22.09 待办的 iotop Storage openEuler-22.09-Dailybuild I5IH6M libpwquality build problem in openEuler:22.09 待办的 libpwquality sig-security-facility openEuler-22.09-Dailybuild I5IH6T nftables build problem in openEuler:22.09 待办的 nftables Networking openEuler-22.09-Dailybuild I5ILK7 bamf build problem in openEuler:22.09:Epol 待办的 bamf sig-UKUI openEuler-22.09-Dailybuild I5ILK8 vdsm-jsonrpc-java build problem in openEuler:22.09:Epol 待办的 vdsm-jsonrpc-java oVirt openEuler-22.09-Dailybuild I5ILKA python-crypto build problem in openEuler:22.09 待办的 python-crypto Base-service openEuler-22.09-Dailybuild I5ILKE sssd build problem in openEuler:22.09 待办的 sssd Base-service openEuler-22.09-Dailybuild I5IQZF highlight build problem in openEuler:22.09:Epol 待办的 highlight oVirt openEuler 22.09 Alpha版本已知待修复单包安装失败软件包清单：安装校验项架构 jenkins任务地址 ISO二进制范围 x86_64 https://openeulerjenkins.osinfra.cn/job/openEuler-OS-build/job/check_rpm_in… Epol二进制范围 x86_64 https://openeulerjenkins.osinfra.cn/job/openEuler-OS-build/job/check_rpm_in… ISO二进制范围 aarch64 https://openeulerjenkins.osinfra.cn/job/openEuler-OS-build/job/check_rpm_in… Epol二进制范围 aarch64 https://openeulerjenkins.osinfra.cn/job/openEuler-OS-build/job/check_rpm_in… 二进制包名源码包名 Sig python3-jupyter python-jupyter #N/A python3-nni python-nni A-Tune setroubleshoot-plugins setroubleshoot-plugins Base-service backupninja backupninja Application blueman blueman sig-UKUI cinnamon cinnamon sig-cinnamon cinnamon-devel-doc cinnamon sig-cinnamon claws-mail-plugins claws-mail sig-UKUI claws-mail-plugins-bsfilter claws-mail sig-UKUI claws-mail-plugins-bogofilter claws-mail sig-UKUI cockpit-ovirt-dashboard cockpit-ovirt oVirt ovirt-hosted-engine-setup ovirt-hosted-engine-setup oVirt ovirt-host ovirt-host oVirt dde dde sig-DDE dde-control-center dde-control-center sig-DDE startdde startdde sig-DDE dde-daemon dde-daemon sig-DDE dde-session-ui dde-session-ui sig-DDE dde-desktop dde-file-manager sig-DDE dde-launcher dde-launcher sig-DDE dde-file-manager dde-file-manager sig-DDE libdde-file-manager dde-file-manager sig-DDE dde-disk-mount-plugin dde-file-manager sig-DDE dde-file-manager-devel dde-file-manager sig-DDE dde-launcher-devel dde-launcher sig-DDE deepin-compressor deepin-compressor sig-DDE deepin-font-manager deepin-font-manager sig-DDE libdeepin-font-manager deepin-font-manager sig-DDE deepin-screen-recorder deepin-screen-recorder sig-DDE kwin kwin sig-KDE kwin-common kwin sig-KDE kwin-devel kwin sig-KDE kwin-doc kwin sig-KDE kwin-wayland kwin sig-KDE kwin-x11 kwin sig-KDE lastpass-cli lastpass-cli Application openstack-dashboard openstack-dashboard #N/A python3-horizon openstack-dashboard #N/A ovirt-engine ovirt-engine oVirt ovirt-engine-setup-plugin-ovirt-engine ovirt-engine oVirt ovirt-provider-ovn ovirt-provider-ovn oVirt ovirt-engine-backend ovirt-engine oVirt ovirt-engine-dbscripts ovirt-engine oVirt ovirt-engine-dwh ovirt-engine-dwh oVirt ovirt-engine-dwh-grafana-integration-setup ovirt-engine-dwh oVirt ovirt-engine-dwh-setup ovirt-engine-dwh oVirt ovirt-engine-restapi ovirt-engine oVirt ovirt-engine-setup ovirt-engine oVirt ovirt-engine-setup-plugin-cinderlib ovirt-engine oVirt ovirt-engine-setup-plugin-imageio ovirt-engine oVirt ovirt-engine-setup-plugin-vmconsole-proxy-helper ovirt-engine oVirt ovirt-engine-tools ovirt-engine oVirt ovirt-engine-webadmin-portal ovirt-engine oVirt ovirt-engine-ui-extensions ovirt-engine-ui-extensions oVirt ovirt-engine-vmconsole-proxy-helper ovirt-engine oVirt ovirt-provider-ovn-driver ovirt-provider-ovn oVirt python3-graphviz python-graphviz sig-python-modules python3-ironic-ui python-ironic-ui sig-openstack python3-mitmproxy python-mitmproxy sig-python-modules python3-muranoclient python-muranoclient sig-openstack python3-neutron-tempest-plugin python-neutron-tempest-plugin sig-openstack python3-os-xenapi-tests python-os-xenapi sig-openstack python3-pep517 python-pep517 sig-python-modules python3-pip-api python-pip-api sig-openstack python3-requirementslib python-requirementslib sig-openstack python3-senlinclient python-senlinclient sig-openstack python3-trove-tempest-plugin python-trove-tempest-plugin sig-openstack ukui ukui-desktop-environment sig-UKUI ukui-desktop-environment ukui-desktop-environment sig-UKUI ukui-desktop-environment-core ukui-desktop-environment sig-UKUI kylin-music kylin-music sig-UKUI ------ BR 陈亚强（openEuler release management sig）

1 0

[PATCH 00/10] uadk - support dump BD when BD checks fail
by Weili Qian 23 Jul '22

23 Jul '22

1. dump BD when BD checks fail. 2. some cleanups. Kai Ye (2): uadk: add wd_<alg>_get_msg() drv/hpre: support dump BD when BD checks fail Weili Qian (8): drv/hpre: remove repeatedly included header file drv/hpre: add hpre_result_check() drv/hpre: move format check to is_hpre_bin_fmt() drv/hpre: change the parameter type drv/hpre: remove redundant blank line drv/qm: add unlikely() for branch prefetch drv/qm: remove redundant add 1 drv/qm: remove useless parameter 'sq_head_index' drv/hisi_hpre.c | 187 +++++++++++++++++++++++++-------------- drv/hisi_qm_udrv.c | 17 ++-- include/drv/wd_dh_drv.h | 1 + include/drv/wd_ecc_drv.h | 1 + include/drv/wd_rsa_drv.h | 3 + include/hisi_qm_udrv.h | 1 - wd_dh.c | 5 ++ wd_ecc.c | 5 ++ wd_rsa.c | 5 ++ 9 files changed, 149 insertions(+), 76 deletions(-) -- 2.33.0

1 10

[PATCH 0/5] *** uadk_engine cleanup ***
by Zhiqi Song 22 Jul '22

22 Jul '22

Cleanup aboout uadk_engine. Zhiqi Song (5): uadk_engine: remove redundant extern uadk_engine: add timeout protection mechanism in poll rsa: cleanup redundant BN operation rsa: bugfix memory leak in genkey process rsa: remove unused software method src/e_uadk.c | 3 +- src/uadk.h | 34 ++++---- src/uadk_async.h | 16 ++-- src/uadk_cipher.c | 13 +-- src/uadk_dh.c | 11 ++- src/uadk_digest.c | 11 ++- src/uadk_pkey.c | 13 +-- src/uadk_rsa.c | 209 ++++++++++++++++++---------------------------- 8 files changed, 138 insertions(+), 172 deletions(-) -- 2.30.0

1 5

[PATCH 0/5] *** uadk_engine bugfix ***
by Zhiqi Song 22 Jul '22

22 Jul '22

Bugfix about ecc alg of uadk_engine. Zhiqi Song (5): ecc: bugfix about magic number ecc: bugfix about variable declaration scope ecc: bugfix about return value check ecc: cleanup unused structure ecc: bugfix multiple definition of ecx structure src/uadk_ec.c | 181 +++++++++++++++++++++++++++++++----------------- src/uadk_ecx.c | 43 ++++++------ src/uadk_pkey.c | 9 --- src/uadk_sm2.c | 21 ++---- 4 files changed, 148 insertions(+), 106 deletions(-) -- 2.30.0

1 5

UADK周例会
by openEuler conference 19 Jul '22

19 Jul '22

您好！ sig-AccLib SIG 邀请您参加 2022-07-20 11:00 召开的Zoom会议会议主题：UADK周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论会议链接：https://us06web.zoom.us/j/89055215704?pwd=NkR6SE1HVGpXMHI5MEZoUGJvbUlsQT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-07-20 11:00, The subject of the conference is UADK周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论 You can join the meeting at https://us06web.zoom.us/j/89055215704?pwd=NkR6SE1HVGpXMHI5MEZoUGJvbUlsQT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

[PATCH 1/6] uadk_tool: Update some new test features
by Longfang Liu 18 Jul '22

18 Jul '22

1. Modify part of the repeated code macro. 2. Add new random number generation method. 3. Add new test parameters, support test algorithm query and address pre-step function. Signed-off-by: Longfang Liu <liulongfang(a)huawei.com> --- uadk_tool/benchmark/sec_soft_benchmark.c | 7 +- uadk_tool/benchmark/sec_soft_benchmark.h | 1 - uadk_tool/benchmark/sec_uadk_benchmark.c | 65 ++++---- uadk_tool/benchmark/sec_wd_benchmark.c | 192 +++++++---------------- uadk_tool/benchmark/uadk_benchmark.c | 115 ++++++++------ uadk_tool/benchmark/uadk_benchmark.h | 20 ++- 6 files changed, 167 insertions(+), 233 deletions(-) diff --git a/uadk_tool/benchmark/sec_soft_benchmark.c b/uadk_tool/benchmark/sec_soft_benchmark.c index 2f6bccb..a622329 100644 --- a/uadk_tool/benchmark/sec_soft_benchmark.c +++ b/uadk_tool/benchmark/sec_soft_benchmark.c @@ -56,11 +56,8 @@ typedef struct soft_jobs_res { u32 use_engine; } jobs_data; -#define MAX_POOL_LENTH 4096 #define MAX_IVK_LENTH 64 #define DEF_IVK_DATA 0xAA -#define MAX_TRY_CNT 5000 -#define SEND_USLEEP 100 static unsigned int g_thread_num; static unsigned int g_ctxnum; @@ -613,7 +610,7 @@ static void *sec_soft_async_run(void *arg) exit_pause: ASYNC_WAIT_CTX_free(waitctx); - add_recv_data(count); + add_recv_data(count, g_pktlen); return NULL; } @@ -802,7 +799,7 @@ static void *sec_soft_sync_run(void *arg) break; } - add_recv_data(count); + add_recv_data(count, g_pktlen); return NULL; } diff --git a/uadk_tool/benchmark/sec_soft_benchmark.h b/uadk_tool/benchmark/sec_soft_benchmark.h index 8331eb5..c1374d6 100644 --- a/uadk_tool/benchmark/sec_soft_benchmark.h +++ b/uadk_tool/benchmark/sec_soft_benchmark.h @@ -4,6 +4,5 @@ #include "uadk_benchmark.h" - extern int sec_soft_benchmark(struct acc_option *options); #endif /* SEC_SOFT_BENCHMARK_H */ diff --git a/uadk_tool/benchmark/sec_uadk_benchmark.c b/uadk_tool/benchmark/sec_uadk_benchmark.c index 6eeee12..09cd8f4 100644 --- a/uadk_tool/benchmark/sec_uadk_benchmark.c +++ b/uadk_tool/benchmark/sec_uadk_benchmark.c @@ -10,6 +10,8 @@ #include "include/wd_sched.h" #define SEC_TST_PRT printf +#define MAX_IVK_LENTH 64 +#define DEF_IVK_DATA 0xAA struct uadk_bd { u8 *src; @@ -37,18 +39,12 @@ typedef struct uadk_thread_res { u32 td_id; } thread_data; -#define MAX_POOL_LENTH 4096 -#define MAX_IVK_LENTH 64 -#define DEF_IVK_DATA 0xAA -#define MAX_TRY_CNT 5000 -#define SEND_USLEEP 100 - static struct wd_ctx_config g_ctx_cfg; static struct wd_sched *g_sched; static unsigned int g_thread_num; static unsigned int g_ctxnum; +static unsigned int g_prefetch; static unsigned int g_pktlen; -static struct sched_params g_param; static void *cipher_async_cb(struct wd_cipher_req *req, void *data) { @@ -349,6 +345,7 @@ static int sec_uadk_param_parse(thread_data *tddata, struct acc_option *options) static int init_ctx_config(char *alg, int subtype, int mode) { struct uacce_dev_list *list; + struct sched_params param; int i, max_node; int ret = 0; @@ -385,7 +382,7 @@ static int init_ctx_config(char *alg, int subtype, int mode) break; default: SEC_TST_PRT("Fail to parse alg subtype!\n"); - return -EINVAL; + goto out; } if (!g_sched) { SEC_TST_PRT("Fail to alloc sched!\n"); @@ -397,12 +394,12 @@ static int init_ctx_config(char *alg, int subtype, int mode) list->dev->numa_id = 0; g_sched->name = SCHED_SINGLE; - g_param.numa_id = list->dev->numa_id; - g_param.type = 0; - g_param.mode = mode; - g_param.begin = 0; - g_param.end = g_ctxnum - 1; - ret = wd_sched_rr_instance(g_sched, &g_param); + param.numa_id = list->dev->numa_id; + param.type = 0; + param.mode = mode; + param.begin = 0; + param.end = g_ctxnum - 1; + ret = wd_sched_rr_instance(g_sched, &param); if (ret) { SEC_TST_PRT("Fail to fill sched data!\n"); goto out; @@ -419,6 +416,8 @@ static int init_ctx_config(char *alg, int subtype, int mode) case DIGEST_TYPE: ret = wd_digest_init(&g_ctx_cfg, g_sched); break; + default: + goto out; } if (ret) { SEC_TST_PRT("Fail to cipher ctx!\n"); @@ -461,18 +460,13 @@ static void uninit_ctx_config(int subtype) wd_sched_rr_release(g_sched); } -int init_uadk_bd_pool(void) +static int init_uadk_bd_pool(void) { unsigned long step; - int fill_size; int i, j; // make the block not align to 4K step = sizeof(char) * g_pktlen * 2; - if (g_pktlen > MAX_IVK_LENTH) - fill_size = MAX_IVK_LENTH; - else - fill_size = g_pktlen; g_uadk_pool.iv = malloc(g_thread_num * MAX_IVK_LENTH * sizeof(char)); g_uadk_pool.key = malloc(g_thread_num * MAX_IVK_LENTH * sizeof(char)); @@ -498,7 +492,9 @@ int init_uadk_bd_pool(void) if (!g_uadk_pool.pool[i].bds[j].dst) goto malloc_error3; - get_rand_data(g_uadk_pool.pool[i].bds[j].src, fill_size); + get_rand_data(g_uadk_pool.pool[i].bds[j].src, g_pktlen); + if (g_prefetch) + get_rand_data(g_uadk_pool.pool[i].bds[j].dst, g_pktlen); } } } @@ -526,12 +522,13 @@ malloc_error1: free(g_uadk_pool.iv); free(g_uadk_pool.key); + free(g_uadk_pool.mac); SEC_TST_PRT("init uadk bd pool alloc failed!\n"); return -ENOMEM; } -void free_uadk_bd_pool(void) +static void free_uadk_bd_pool(void) { int i, j; @@ -550,21 +547,22 @@ void free_uadk_bd_pool(void) free(g_uadk_pool.iv); free(g_uadk_pool.key); + free(g_uadk_pool.mac); } /*-------------------------------uadk benchmark main code-------------------------------------*/ -void *sec_uadk_poll(void *data) +static void *sec_uadk_poll(void *data) { typedef int (*poll_ctx)(__u32 idx, __u32 expt, __u32 *count); poll_ctx uadk_poll_ctx = NULL; thread_data *pdata = (thread_data *)data; u32 expt = ACC_QUEUE_SIZE * g_thread_num; u32 id = pdata->td_id; - u32 last_time = 2; /* poll need one more recv time */ + u32 last_time = 2; // poll need one more recv time u32 count = 0; u32 recv = 0; - int ret; + int ret; if (id > g_ctxnum) return NULL; @@ -586,7 +584,6 @@ void *sec_uadk_poll(void *data) while (last_time) { ret = uadk_poll_ctx(id, expt, &recv); - // SEC_TST_PRT("expt %u, poll %d recv: %u!\n", expt, i, recv); count += recv; recv = 0; if (unlikely(ret != -WD_EAGAIN && ret < 0)) { @@ -599,7 +596,7 @@ void *sec_uadk_poll(void *data) } recv_error: - add_recv_data(count); + add_recv_data(count, g_pktlen); return NULL; } @@ -636,7 +633,6 @@ static void *sec_uadk_async_run(void *arg) case CIPHER_TYPE: cipher_setup.alg = pdata->alg; cipher_setup.mode = pdata->mode; - cipher_setup.sched_param = (void *)&g_param; h_sess = wd_cipher_alloc_sess(&cipher_setup); if (!h_sess) return NULL; @@ -682,7 +678,6 @@ static void *sec_uadk_async_run(void *arg) case AEAD_TYPE: // just ccm and gcm aead_setup.calg = pdata->alg; aead_setup.cmode = pdata->mode; - aead_setup.sched_param = (void *)&g_param; h_sess = wd_aead_alloc_sess(&aead_setup); if (!h_sess) return NULL; @@ -740,7 +735,6 @@ static void *sec_uadk_async_run(void *arg) case DIGEST_TYPE: digest_setup.alg = pdata->alg; digest_setup.mode = pdata->mode; // digest mode is optype - digest_setup.sched_param = (void *)&g_param; h_sess = wd_digest_alloc_sess(&digest_setup); if (!h_sess) return NULL; @@ -820,7 +814,6 @@ static void *sec_uadk_sync_run(void *arg) case CIPHER_TYPE: cipher_setup.alg = pdata->alg; cipher_setup.mode = pdata->mode; - cipher_setup.sched_param = (void *)&g_param; h_sess = wd_cipher_alloc_sess(&cipher_setup); if (!h_sess) return NULL; @@ -845,7 +838,7 @@ static void *sec_uadk_sync_run(void *arg) creq.src = uadk_pool->bds[i].src; creq.dst = uadk_pool->bds[i].dst; ret = wd_do_cipher_sync(h_sess, &creq); - if (ret || creq.state) + if ((ret < 0 && ret != -WD_EBUSY) || creq.state) break; count++; if (get_run_state() == 0) @@ -856,7 +849,6 @@ static void *sec_uadk_sync_run(void *arg) case AEAD_TYPE: // just ccm and gcm aead_setup.calg = pdata->alg; aead_setup.cmode = pdata->mode; - aead_setup.sched_param = (void *)&g_param; h_sess = wd_aead_alloc_sess(&aead_setup); if (!h_sess) return NULL; @@ -905,7 +897,6 @@ static void *sec_uadk_sync_run(void *arg) case DIGEST_TYPE: digest_setup.alg = pdata->alg; digest_setup.mode = pdata->mode; // digest mode is optype - digest_setup.sched_param = (void *)&g_param; h_sess = wd_digest_alloc_sess(&digest_setup); if (!h_sess) return NULL; @@ -939,7 +930,7 @@ static void *sec_uadk_sync_run(void *arg) break; } - add_recv_data(count); + add_recv_data(count, g_pktlen); return NULL; } @@ -982,7 +973,6 @@ int sec_uadk_sync_threads(struct acc_option *options) sync_error: return ret; - } int sec_uadk_async_threads(struct acc_option *options) @@ -998,10 +988,10 @@ int sec_uadk_async_threads(struct acc_option *options) if (ret) return ret; - /* poll thread */ for (i = 0; i < g_ctxnum; i++) { threads_args[i].subtype = threads_option.subtype; threads_args[i].td_id = i; + /* poll thread */ ret = pthread_create(&pollid[i], NULL, sec_uadk_poll, &threads_args[i]); if (ret) { SEC_TST_PRT("Create poll thread fail!\n"); @@ -1053,6 +1043,7 @@ int sec_uadk_benchmark(struct acc_option *options) g_thread_num = options->threads; g_pktlen = options->pktlen; g_ctxnum = options->ctxnums; + g_prefetch = options->prefetch; if (options->optype > WD_CIPHER_DECRYPTION) { SEC_TST_PRT("SEC optype error: %u\n", options->optype); return -EINVAL; diff --git a/uadk_tool/benchmark/sec_wd_benchmark.c b/uadk_tool/benchmark/sec_wd_benchmark.c index 2e9c55d..d7cfe75 100644 --- a/uadk_tool/benchmark/sec_wd_benchmark.c +++ b/uadk_tool/benchmark/sec_wd_benchmark.c @@ -11,6 +11,9 @@ #include "v1/wd_util.h" #define SEC_TST_PRT printf +#define MAX_IVK_LENTH 64 +#define DEF_IVK_DATA 0xAA +#define SQE_SIZE 128 typedef struct wd_thread_res { u32 subtype; @@ -32,57 +35,31 @@ struct thread_bd_res { struct thread_queue_res { struct thread_bd_res *bd_res; -} g_thread_queue; +}; struct wcrypto_async_tag { void *ctx; - char *out_buf; int thread_id; int cnt; }; -#define MAX_IVK_LENTH 64 -#define DEF_IVK_DATA 0xAA -#define MAX_TRY_CNT 5000 -#define SEND_USLEEP 100 -#define TEST_MAX_THRD 128 -#define SQE_SIZE 128 -#define MAX_BLOCK_NM 4096 - +static struct thread_queue_res g_thread_queue; static unsigned int g_thread_num; -static unsigned int g_ctxnum; static unsigned int g_pktlen; static void *cipher_async_cb(void *message, void *cipher_tag) { - struct wcrypto_async_tag *async_tag = (struct wcrypto_async_tag *)cipher_tag; - struct wcrypto_cipher_msg *req = (struct wcrypto_cipher_msg *)message; - - // no-sva data copy from uadk to user - memcpy(async_tag->out_buf, req->out, g_pktlen); - return NULL; } -static void *aead_async_cb(void *message, void *aead_tag) +static void *aead_async_cb(void *message, void *cipher_tag) { - struct wcrypto_async_tag *async_tag = (struct wcrypto_async_tag *)aead_tag; - struct wcrypto_aead_msg *req = (struct wcrypto_aead_msg *)message; - - // no-sva data copy from uadk to user - memcpy(async_tag->out_buf, req->out, g_pktlen); - return NULL; } static void *digest_async_cb(void *message, void *digest_tag) { - struct wcrypto_async_tag *async_tag = (struct wcrypto_async_tag *)digest_tag; - struct wcrypto_digest_msg *req = (struct wcrypto_digest_msg *)message; - - // no-sva data copy from uadk to user - memcpy(async_tag->out_buf, req->out, 16); - + // struct WCRYPTO_req *req = (struct WCRYPTO_req *)data; return NULL; } @@ -396,9 +373,9 @@ static int init_wd_queue(struct acc_option *options) // use no-sva pbuffer memset(&blksetup, 0, sizeof(blksetup)); blksetup.block_size = g_pktlen + SQE_SIZE; //aead need mac and aad out - blksetup.block_num = MAX_BLOCK_NM * 4; //set pool inv + key + in + out + blksetup.block_num = MAX_BLOCK_NM; //set pool inv + key + in + out blksetup.align_size = SQE_SIZE; - SEC_TST_PRT("create pool memory: %d KB\n", (MAX_BLOCK_NM * blksetup.block_size) >> 10); + // SEC_TST_PRT("create pool memory: %d KB\n", (MAX_BLOCK_NM * blksetup.block_size) >> 10); for (j = 0; j < g_thread_num; j++) { g_thread_queue.bd_res[j].pool = wd_blkpool_create(g_thread_queue.bd_res[j].queue, &blksetup); @@ -411,8 +388,8 @@ static int init_wd_queue(struct acc_option *options) // alloc in pbuffer res for (m = 0; m < g_thread_num; m++) { - g_thread_queue.bd_res[m].in = malloc(MAX_BLOCK_NM * sizeof(void *)); - for (idx = 0; idx < MAX_BLOCK_NM; idx++) { + g_thread_queue.bd_res[m].in = malloc(MAX_POOL_LENTH * sizeof(void *)); + for (idx = 0; idx < MAX_POOL_LENTH; idx++) { g_thread_queue.bd_res[m].in[idx] = wd_alloc_blk(g_thread_queue.bd_res[m].pool); if (!g_thread_queue.bd_res[m].in[idx]) { SEC_TST_PRT("create pool %dth in memory fail!\n", m); @@ -427,8 +404,8 @@ static int init_wd_queue(struct acc_option *options) // alloc out pbuffer res for (n = 0; n < g_thread_num; n++) { - g_thread_queue.bd_res[n].out = malloc(MAX_BLOCK_NM * sizeof(void *)); - for (idx = 0; idx < MAX_BLOCK_NM; idx++) { + g_thread_queue.bd_res[n].out = malloc(MAX_POOL_LENTH * sizeof(void *)); + for (idx = 0; idx < MAX_POOL_LENTH; idx++) { g_thread_queue.bd_res[n].out[idx] = wd_alloc_blk(g_thread_queue.bd_res[n].pool); if (!g_thread_queue.bd_res[n].out[idx]) { SEC_TST_PRT("create pool %dth out memory fail!\n", n); @@ -443,8 +420,8 @@ static int init_wd_queue(struct acc_option *options) // alloc iv pbuffer res for (k = 0; k < g_thread_num; k++) { - g_thread_queue.bd_res[k].iv = malloc(MAX_BLOCK_NM * sizeof(void *)); - for (idx = 0; idx < MAX_BLOCK_NM; idx++) { + g_thread_queue.bd_res[k].iv = malloc(MAX_POOL_LENTH * sizeof(void *)); + for (idx = 0; idx < MAX_POOL_LENTH; idx++) { g_thread_queue.bd_res[k].iv[idx] = wd_alloc_blk(g_thread_queue.bd_res[k].pool); if (!g_thread_queue.bd_res[k].iv[idx]) { SEC_TST_PRT("create pool %dth iv memory fail!\n", k); @@ -462,21 +439,21 @@ static int init_wd_queue(struct acc_option *options) iv_err: for (k--; k >= 0; k--) { - for (idx = 0; idx < MAX_BLOCK_NM; idx++) + for (idx = 0; idx < MAX_POOL_LENTH; idx++) wd_free_blk(g_thread_queue.bd_res[k].pool, g_thread_queue.bd_res[k].iv[idx]); free(g_thread_queue.bd_res[k].iv); } out_err: for (n--; n >= 0; n--) { - for (idx = 0; idx < MAX_BLOCK_NM; idx++) + for (idx = 0; idx < MAX_POOL_LENTH; idx++) wd_free_blk(g_thread_queue.bd_res[n].pool, g_thread_queue.bd_res[n].out[idx]); free(g_thread_queue.bd_res[n].out); } in_err: for (m--; m >= 0; m--) { - for (idx = 0; idx < MAX_BLOCK_NM; idx++) + for (idx = 0; idx < MAX_POOL_LENTH; idx++) wd_free_blk(g_thread_queue.bd_res[m].pool, g_thread_queue.bd_res[m].in[idx]); free(g_thread_queue.bd_res[m].in); @@ -498,7 +475,7 @@ static void uninit_wd_queue(void) int i, j, idx; for (i = 0; i < g_thread_num; i++) { - for (idx = 0; idx < MAX_BLOCK_NM; idx++) { + for (idx = 0; idx < MAX_POOL_LENTH; idx++) { wd_free_blk(g_thread_queue.bd_res[i].pool, g_thread_queue.bd_res[i].iv[idx]); wd_free_blk(g_thread_queue.bd_res[i].pool, g_thread_queue.bd_res[i].in[idx]); wd_free_blk(g_thread_queue.bd_res[i].pool, g_thread_queue.bd_res[i].out[idx]); @@ -522,22 +499,22 @@ void *sec_wd_poll(void *data) { typedef int (*poll_ctx)(struct wd_queue *q, unsigned int num); thread_data *pdata = (thread_data *)data; - poll_ctx uadk_poll_ctx = NULL; + poll_ctx wd_poll_ctx = NULL; u32 expt = ACC_QUEUE_SIZE * g_thread_num; - u32 last_time = 2; /* poll need one more recv time */ + u32 last_time = 2; // poll need one more recv time u32 id = pdata->td_id; u32 count = 0; - u32 recv = 0; + int recv = 0; switch(pdata->subtype) { case CIPHER_TYPE: - uadk_poll_ctx = wcrypto_cipher_poll; + wd_poll_ctx = wcrypto_cipher_poll; break; case AEAD_TYPE: - uadk_poll_ctx = wcrypto_aead_poll; + wd_poll_ctx = wcrypto_aead_poll; break; case DIGEST_TYPE: - uadk_poll_ctx = wcrypto_digest_poll; + wd_poll_ctx = wcrypto_digest_poll; break; default: SEC_TST_PRT("<<<<<<async poll interface is NULL!\n"); @@ -548,7 +525,7 @@ void *sec_wd_poll(void *data) return NULL; while (last_time) { - recv = uadk_poll_ctx(g_thread_queue.bd_res[id].queue, expt); + recv = wd_poll_ctx(g_thread_queue.bd_res[id].queue, expt); /* * warpdrive async mode poll easy to 100% with small package. * SEC_TST_PRT("warpdrive poll %d recv: %u!\n", i, recv); @@ -565,7 +542,7 @@ void *sec_wd_poll(void *data) } recv_error: - add_recv_data(count); + add_recv_data(count, g_pktlen); return NULL; } @@ -582,8 +559,6 @@ static void *sec_wd_async_run(void *arg) struct wcrypto_async_tag *tag = NULL; char priv_key[MAX_IVK_LENTH]; struct thread_bd_res *bd_res; - char *src_data_buf = NULL; - char *out_data_buf = NULL; struct wd_queue *queue; void *ctx = NULL; void **res_in; @@ -605,27 +580,13 @@ static void *sec_wd_async_run(void *arg) res_out = bd_res->out; res_iv = bd_res->iv; - /* create user data buffer */ - src_data_buf = malloc(g_pktlen * sizeof(char)); - if (!src_data_buf) - return NULL; - - get_rand_data((u8 *)src_data_buf, g_pktlen); - out_data_buf = malloc(g_pktlen * sizeof(char)); - if (!out_data_buf) { - free(src_data_buf); - return NULL; - } - memset(priv_key, DEF_IVK_DATA, MAX_IVK_LENTH); tag = malloc(sizeof(struct wcrypto_async_tag)); // set the user tag if (!tag) { SEC_TST_PRT("wcrypto async alloc tag fail!\n"); - free(src_data_buf); - free(out_data_buf); return NULL; } - tag->out_buf = out_data_buf; + tag->thread_id = pdata->td_id; switch(pdata->subtype) { case CIPHER_TYPE: @@ -642,7 +603,7 @@ static void *sec_wd_async_run(void *arg) ctx = wcrypto_create_cipher_ctx(queue, &cipher_setup); if (!ctx) { SEC_TST_PRT("wd create cipher ctx fail!\n"); - goto async_err; + return NULL; } tag->ctx = ctx; @@ -650,7 +611,7 @@ static void *sec_wd_async_run(void *arg) if (ret) { SEC_TST_PRT("wd cipher set key fail!\n"); wcrypto_del_cipher_ctx(ctx); - goto async_err; + return NULL; } if (queue->capa.priv.direction == 0) @@ -672,9 +633,6 @@ static void *sec_wd_async_run(void *arg) if (get_run_state() == 0) break; - // no-sva data copy to uadk - memcpy(copdata.in, src_data_buf, g_pktlen); - ret = wcrypto_do_cipher(ctx, &copdata, (void *)tag); if (ret == -WD_EBUSY) { usleep(SEND_USLEEP * try_cnt); @@ -687,7 +645,7 @@ static void *sec_wd_async_run(void *arg) } count++; - i = count % MAX_BLOCK_NM; + i = count % MAX_POOL_LENTH; tag->cnt = i; try_cnt = 0; copdata.in = res_in[i]; @@ -710,7 +668,7 @@ static void *sec_wd_async_run(void *arg) ctx = wcrypto_create_aead_ctx(queue, &aead_setup); if (!ctx) { SEC_TST_PRT("wd create aead ctx fail!\n"); - goto async_err; + return NULL; } tag->ctx = ctx; @@ -718,7 +676,7 @@ static void *sec_wd_async_run(void *arg) if (ret) { SEC_TST_PRT("wd aead set key fail!\n"); wcrypto_del_aead_ctx(ctx); - goto async_err; + return NULL; } authsize = 16; //set defaut size @@ -726,7 +684,7 @@ static void *sec_wd_async_run(void *arg) if (ret) { SEC_TST_PRT("set authsize fail!\n"); wcrypto_del_aead_ctx(ctx); - goto async_err; + return NULL; } if (queue->capa.priv.direction == 0) { @@ -753,9 +711,6 @@ static void *sec_wd_async_run(void *arg) if (get_run_state() == 0) break; - // no-sva data copy to uadk - memcpy(aopdata.in, src_data_buf, g_pktlen); - ret = wcrypto_do_aead(ctx, &aopdata, (void *)tag); if (ret == -WD_EBUSY) { usleep(SEND_USLEEP * try_cnt); @@ -768,7 +723,7 @@ static void *sec_wd_async_run(void *arg) } count++; - i = count % MAX_BLOCK_NM; + i = count % MAX_POOL_LENTH; tag->cnt = i; try_cnt = 0; aopdata.in = res_in[i]; @@ -791,7 +746,7 @@ static void *sec_wd_async_run(void *arg) ctx = wcrypto_create_digest_ctx(queue, &digest_setup); if (!ctx) { SEC_TST_PRT("wd create digest ctx fail!\n"); - goto async_err; + return NULL; } tag->ctx = ctx; @@ -801,7 +756,7 @@ static void *sec_wd_async_run(void *arg) if (ret) { SEC_TST_PRT("wd digest set key fail!\n"); wcrypto_del_digest_ctx(ctx); - goto async_err; + return NULL; } } @@ -818,9 +773,6 @@ static void *sec_wd_async_run(void *arg) if (get_run_state() == 0) break; - // no-sva data copy to uadk - memcpy(dopdata.in, src_data_buf, g_pktlen); - ret = wcrypto_do_digest(ctx, &dopdata, (void *)tag); if (ret == -WD_EBUSY) { usleep(SEND_USLEEP * try_cnt); @@ -833,7 +785,7 @@ static void *sec_wd_async_run(void *arg) } count++; - i = count % MAX_BLOCK_NM; + i = count % MAX_POOL_LENTH; tag->cnt = i; try_cnt = 0; dopdata.in = res_in[i]; @@ -846,7 +798,7 @@ static void *sec_wd_async_run(void *arg) add_send_complete(); while (1) { - if (get_recv_time() == g_thread_num) // wait Async mode finish recv + if (get_recv_time() > 0) // wait Async mode finish recv break; usleep(SEND_USLEEP); } @@ -863,10 +815,6 @@ static void *sec_wd_async_run(void *arg) break; } -async_err: - free(tag); - free(src_data_buf); - free(out_data_buf); return NULL; } @@ -882,8 +830,6 @@ static void *sec_wd_sync_run(void *arg) char priv_key[MAX_IVK_LENTH]; struct thread_bd_res *bd_res; struct wd_queue *queue; - char *src_data_buf = NULL; - char *out_data_buf = NULL; void *ctx = NULL; void *tag = NULL; void **res_in; @@ -905,18 +851,6 @@ static void *sec_wd_sync_run(void *arg) res_out = bd_res->out; res_iv = bd_res->iv; - /* create user data buffer */ - src_data_buf = malloc(g_pktlen * sizeof(char)); - if (!src_data_buf) - return NULL; - - get_rand_data((u8 *)src_data_buf, g_pktlen); - out_data_buf = malloc(g_pktlen * sizeof(char)); - if (!out_data_buf) { - free(src_data_buf); - return NULL; - } - memset(priv_key, DEF_IVK_DATA, MAX_IVK_LENTH); switch(pdata->subtype) { @@ -933,14 +867,14 @@ static void *sec_wd_sync_run(void *arg) ctx = wcrypto_create_cipher_ctx(queue, &cipher_setup); if (!ctx) { SEC_TST_PRT("wd create cipher ctx fail!\n"); - goto sync_err; + return NULL; } ret = wcrypto_set_cipher_key(ctx, (__u8*)priv_key, (__u16)pdata->keysize); if (ret) { SEC_TST_PRT("wd cipher set key fail!\n"); wcrypto_del_cipher_ctx(ctx); - goto sync_err; + return NULL; } if (queue->capa.priv.direction == 0) @@ -961,9 +895,6 @@ static void *sec_wd_sync_run(void *arg) if (get_run_state() == 0) break; - // no-sva data copy to uadk - memcpy(copdata.in, src_data_buf, g_pktlen); - ret = wcrypto_do_cipher(ctx, &copdata, tag); if (ret == -WD_EBUSY) { usleep(SEND_USLEEP * try_cnt); @@ -977,13 +908,10 @@ static void *sec_wd_sync_run(void *arg) count++; try_cnt = 0; - i = count % MAX_BLOCK_NM; + i = count % MAX_POOL_LENTH; copdata.in = res_in[i]; copdata.out = res_out[i]; copdata.iv = res_iv[i]; - - // no-sva data copy from uadk to user - memcpy(out_data_buf, copdata.out, g_pktlen); } wcrypto_del_cipher_ctx(ctx); @@ -1001,14 +929,14 @@ static void *sec_wd_sync_run(void *arg) ctx = wcrypto_create_aead_ctx(queue, &aead_setup); if (!ctx) { SEC_TST_PRT("wd create aead ctx fail!\n"); - goto sync_err; + return NULL; } ret = wcrypto_set_aead_ckey(ctx, (__u8*)priv_key, (__u16)pdata->keysize); if (ret) { SEC_TST_PRT("wd aead set key fail!\n"); wcrypto_del_aead_ctx(ctx); - goto sync_err; + return NULL; } authsize = 16; //set defaut size @@ -1016,7 +944,7 @@ static void *sec_wd_sync_run(void *arg) if (ret) { SEC_TST_PRT("set authsize fail!\n"); wcrypto_del_aead_ctx(ctx); - goto sync_err; + return NULL; } if (queue->capa.priv.direction == 0) { @@ -1042,9 +970,6 @@ static void *sec_wd_sync_run(void *arg) if (get_run_state() == 0) break; - // no-sva data copy to uadk - memcpy(aopdata.in, src_data_buf, g_pktlen); - ret = wcrypto_do_aead(ctx, &aopdata, tag); if (ret == -WD_EBUSY) { usleep(SEND_USLEEP * try_cnt); @@ -1058,13 +983,10 @@ static void *sec_wd_sync_run(void *arg) count++; try_cnt = 0; - i = count % MAX_BLOCK_NM; + i = count % MAX_POOL_LENTH; aopdata.in = res_in[i]; aopdata.out = res_out[i]; aopdata.iv = res_iv[i]; - - // no-sva data copy from uadk to user - memcpy(out_data_buf, aopdata.out, g_pktlen); } wcrypto_del_aead_ctx(ctx); @@ -1082,7 +1004,7 @@ static void *sec_wd_sync_run(void *arg) ctx = wcrypto_create_digest_ctx(queue, &digest_setup); if (!ctx) { SEC_TST_PRT("wd create digest ctx fail!\n"); - goto sync_err; + return NULL; } if (digest_setup.mode == WCRYPTO_DIGEST_HMAC) { @@ -1091,7 +1013,7 @@ static void *sec_wd_sync_run(void *arg) if (ret) { SEC_TST_PRT("wd digest set key fail!\n"); wcrypto_del_digest_ctx(ctx); - goto sync_err; + return NULL; } } @@ -1107,9 +1029,6 @@ static void *sec_wd_sync_run(void *arg) if (get_run_state() == 0) break; - // no-sva data copy to uadk - memcpy(dopdata.in, src_data_buf, g_pktlen); - ret = wcrypto_do_digest(ctx, &dopdata, (void *)tag); if (ret == -WD_EBUSY) { usleep(SEND_USLEEP * try_cnt); @@ -1123,22 +1042,16 @@ static void *sec_wd_sync_run(void *arg) count++; try_cnt = 0; - i = count % MAX_BLOCK_NM; + i = count % MAX_POOL_LENTH; dopdata.in = res_in[i]; - dopdata.out = res_out[i]; - - // no-sva data copy from uadk to user - memcpy(out_data_buf, dopdata.out, 16); + dopdata.out = res_out[i]; } wcrypto_del_digest_ctx(ctx); break; } - add_recv_data(count); + add_recv_data(count, g_pktlen); -sync_err: - free(src_data_buf); - free(out_data_buf); return NULL; } @@ -1180,6 +1093,7 @@ int sec_wd_sync_threads(struct acc_option *options) sync_error: return ret; + } int sec_wd_async_threads(struct acc_option *options) @@ -1249,7 +1163,6 @@ int sec_wd_benchmark(struct acc_option *options) g_thread_num = options->threads; g_pktlen = options->pktlen; - g_ctxnum = options->ctxnums; if (options->optype > WCRYPTO_CIPHER_DECRYPTION) { SEC_TST_PRT("SEC optype error: %u\n", options->optype); return -EINVAL; @@ -1273,3 +1186,4 @@ int sec_wd_benchmark(struct acc_option *options) return 0; } + diff --git a/uadk_tool/benchmark/uadk_benchmark.c b/uadk_tool/benchmark/uadk_benchmark.c index 84941d5..2904cba 100644 --- a/uadk_tool/benchmark/uadk_benchmark.c +++ b/uadk_tool/benchmark/uadk_benchmark.c @@ -10,19 +10,19 @@ #define BYTES_TO_KB 10 #define TABLE_SPACE_SIZE 8 -#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) /*----------------------------------------head struct--------------------------------------------------------*/ static unsigned int g_run_state = 1; static pthread_mutex_t acc_mutex = PTHREAD_MUTEX_INITIALIZER; static struct _recv_data { + double pkg_len; u64 send_cnt; u64 recv_cnt; u32 send_times; u32 recv_times; } g_recv_data; -/* SVA mode and NOSVA mode change need re_insmode driver ko */ +/* SVA mode and NOSVA mode change need re_insmod driver ko */ enum test_type { SVA_MODE = 0x1, NOSVA_MODE = 0x2, @@ -63,7 +63,7 @@ static struct acc_alg_item alg_options[] = { {"rsa-2048-crt", RSA_2048_CRT}, {"rsa-3072-crt", RSA_3072_CRT}, {"rsa-4096-crt", RSA_4096_CRT}, - {"dh-768 ", DH_768}, + {"dh-768", DH_768}, {"dh-1024", DH_1024}, {"dh-1536", DH_1536}, {"dh-2048", DH_2048}, @@ -131,10 +131,14 @@ void add_send_complete(void) __atomic_add_fetch(&g_recv_data.send_times, 1, __ATOMIC_RELAXED); } -void add_recv_data(u32 cnt) +void add_recv_data(u32 cnt, u32 pkglen) { pthread_mutex_lock(&acc_mutex); g_recv_data.recv_cnt += cnt; + if (g_recv_data.pkg_len == 0) + g_recv_data.pkg_len = pkglen; + else + g_recv_data.pkg_len = ((double)pkglen + g_recv_data.pkg_len) / 2; g_recv_data.recv_times++; pthread_mutex_unlock(&acc_mutex); } @@ -148,6 +152,7 @@ void init_recv_data(void) { g_recv_data.send_cnt = 0; g_recv_data.recv_cnt = 0; + g_recv_data.pkg_len = 0.0; g_recv_data.send_times = 0; g_recv_data.recv_times = 0; } @@ -263,28 +268,21 @@ void time_start(u32 seconds) alarm(seconds); } -int get_rand_int(int range) -{ - int randnum; - - if (range <= 0) { - ACC_TST_PRT("rand range error!\n"); - return 1; - } - srand((unsigned)time(NULL) * getpid()); - randnum = rand() % range; - - return randnum; -} - -void get_rand_data(u8 *addr, int size) +void get_rand_data(u8 *addr, u32 size) { + unsigned short rand_state[3] = { + (0xae >> 16) & 0xffff, 0xae & 0xffff, 0x330e}; int i; - srand((unsigned)time(NULL) * getpid()); - for (i = 0; i < size; i++) { - addr[i] = rand() % 0xFF; - } +#if 1 + // only 32bit valid, other 32bit is zero + for (i = 0; i < size >> 3; i++) + *((u64 *)addr + i) = nrand48(rand_state); +#else + // full 64bit valid + for (i = 0; i < size >> 2; i++) + *((u32 *)addr + i) = nrand48(rand_state); +#endif } /*-------------------------------------main code------------------------------------------------------*/ @@ -320,7 +318,7 @@ static void parse_alg_param(struct acc_option *option) case X25519_ALG: snprintf(option->algclass, MAX_ALG_NAME, "%s", "x25519"); option->acctype = HPRE_TYPE; - option->subtype = X22519_TYPE; + option->subtype = X25519_TYPE; break; case X448_ALG: snprintf(option->algclass, MAX_ALG_NAME, "%s", "x448"); @@ -366,8 +364,8 @@ void cal_perfermance_data(struct acc_option *option, u32 sttime) double perfermance; double cpu_rate; u32 ttime = 1000; - u32 perfdata; - u32 perfops; + double perfdata; + double perfops; double ops; u32 ptime; int i, len; @@ -397,13 +395,13 @@ void cal_perfermance_data(struct acc_option *option, u32 sttime) palgname[i] = '\0'; ptime = ptime - sttime; - perfdata = (g_recv_data.recv_cnt * option->pktlen) >> BYTES_TO_KB; - perfops = (g_recv_data.recv_cnt) >> BYTES_TO_KB; - perfermance = (double)perfdata / option->times; - ops = (double)perfops / option->times; + perfdata = g_recv_data.pkg_len * g_recv_data.recv_cnt / 1024.0; + perfops = (double)(g_recv_data.recv_cnt) / 1000.0; + perfermance = perfdata / option->times; + ops = perfops / option->times; cpu_rate = (double)ptime / option->times; ACC_TST_PRT("algname: length: perf: iops: CPU_rate:\n" - "%s %uBytes %.1fKB/s %.1fKops %.2f%%\n", + "%s %-2uBytes %.1fKB/s %.1fKops %.2f%%\n", palgname, option->pktlen, perfermance, ops, cpu_rate); } @@ -419,11 +417,11 @@ static int benchmark_run(struct acc_option *option) ret = sec_wd_benchmark(option); } usleep(20000); - #ifdef WITH_OPENSSL_DIR +#ifdef WITH_OPENSSL_DIR if (option->modetype & SOFT_MODE) { ret = sec_soft_benchmark(option); } - #endif +#endif break; case HPRE_TYPE: break; @@ -447,6 +445,7 @@ static void dump_param(struct acc_option *option) ACC_TST_PRT(" [--ctxnum]: %u\n", option->ctxnums); ACC_TST_PRT(" [--algclass]:%s\n", option->algclass); ACC_TST_PRT(" [--acctype]: %u\n", option->acctype); + ACC_TST_PRT(" [--prefetch]:%u\n", option->prefetch); ACC_TST_PRT(" [--engine]: %s\n", option->engine); } @@ -457,6 +456,7 @@ int acc_benchmark_run(struct acc_option *option) int i, ret = 0; int status; + ACC_TST_PRT("start UADK benchmark test.\n"); parse_alg_param(option); dump_param(option); @@ -558,13 +558,27 @@ static void print_help(void) ACC_TST_PRT(" set the number of threads\n"); ACC_TST_PRT(" [--ctxnum]:\n"); ACC_TST_PRT(" the number of QP queues used by the entire test task\n"); + ACC_TST_PRT(" [--prefetch]:\n"); + ACC_TST_PRT(" in SVA mode, Enable prefetch can reduce page faults and improve performance\n"); ACC_TST_PRT(" [--engine]:\n"); ACC_TST_PRT(" set the test openssl engine\n"); + ACC_TST_PRT(" [--alglist]:\n"); + ACC_TST_PRT(" list the all support alg\n"); ACC_TST_PRT(" [--help] = usage\n"); ACC_TST_PRT("Example\n"); ACC_TST_PRT(" ./uadk_tool benchmark --alg aes-128-cbc --mode sva --opt 0 --sync\n"); ACC_TST_PRT(" --pktlen 1024 --seconds 1 --multi 1 --thread 1 --ctxnum 4\n"); - ACC_TST_PRT("UPDATE:2021-7-28\n"); + ACC_TST_PRT("UPDATE:2022-7-18\n"); +} + +static void print_support_alg(void) +{ + int i; + + ACC_TST_PRT("UADK benchmark supported ALG:\n"); + for (i = 0; i < ALG_MAX; i++) { + ACC_TST_PRT("%s\n", alg_options[i].name); + } } int acc_cmd_parse(int argc, char *argv[], struct acc_option *option) @@ -583,8 +597,10 @@ int acc_cmd_parse(int argc, char *argv[], struct acc_option *option) {"thread", required_argument, 0, 9}, {"multi", required_argument, 0, 10}, {"ctxnum", required_argument, 0, 11}, - {"engine", required_argument, 0, 12}, - {"help", no_argument, 0, 13}, + {"prefetch", no_argument, 0, 12}, + {"engine", required_argument, 0, 13}, + {"alglist", no_argument, 0, 14}, + {"help", no_argument, 0, 15}, {0, 0, 0, 0} }; @@ -593,7 +609,6 @@ int acc_cmd_parse(int argc, char *argv[], struct acc_option *option) if (c == -1) break; - // ACC_TST_PRT("index:%d , optarg name:%s\n", c, optarg); switch (c) { case 2: option->algtype = get_alg_type(optarg); @@ -627,26 +642,36 @@ int acc_cmd_parse(int argc, char *argv[], struct acc_option *option) option->ctxnums = strtol(optarg, NULL, 0); break; case 12: - strcpy(option->engine, optarg); + option->prefetch = 1; break; case 13: - print_help(); + strcpy(option->engine, optarg); break; + case 14: + print_support_alg(); + goto to_exit; + case 15: + print_help(); + goto to_exit; default: ACC_TST_PRT("bad input test parameter!\n"); print_help(); - exit(-1); + goto to_exit; } } + return 0; + +to_exit: + return -EINVAL; } int acc_option_convert(struct acc_option *option) { - if (option->algtype >= ALG_MAX) + if (option->algtype >= ALG_MAX) { + ACC_TST_PRT("invalid: input algname is wrong!\n"); goto param_err; - else if (option->algtype < 0) - option->algtype = AES_128_CBC; + } if (option->modetype >= INVALID_MODE) goto param_err; @@ -657,8 +682,8 @@ int acc_option_convert(struct acc_option *option) /* Min test package size is 64Bytes */ if (option->pktlen > MAX_DATA_SIZE) goto param_err; - else if (option->pktlen < 64) - option->pktlen = 64; + else if (option->pktlen < 16) + option->pktlen = 16; if (option->times > MAX_TIME_SECONDS) { ACC_TST_PRT("uadk benchmark max test times to 128 seconds\n"); diff --git a/uadk_tool/benchmark/uadk_benchmark.h b/uadk_tool/benchmark/uadk_benchmark.h index 2cb3dc0..a344fac 100644 --- a/uadk_tool/benchmark/uadk_benchmark.h +++ b/uadk_tool/benchmark/uadk_benchmark.h @@ -15,7 +15,6 @@ #include <signal.h> #include <linux/random.h> #include <sys/syscall.h> -#include <sys/mman.h> #include <sys/time.h> #define ACC_TST_PRT printf @@ -24,21 +23,30 @@ #define MAX_CTX_NUM 64 #define MAX_TIME_SECONDS 128 #define BYTES_TO_MB 20 -#define MAX_OPT_TYPE 5 +#define MAX_OPT_TYPE 6 #define MAX_DATA_SIZE (15 * 1024 * 1024) #define MAX_ALG_NAME 64 #define ACC_QUEUE_SIZE 1024 +#define MAX_BLOCK_NM 16384 /* BLOCK_NUM must 4 times of POOL_LENTH */ +#define MAX_POOL_LENTH 4096 +#define MAX_TRY_CNT 5000 +#define SEND_USLEEP 100 + typedef unsigned char u8; typedef unsigned int u32; typedef unsigned long long u64; #define SCHED_SINGLE "sched_single" +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) /** * struct acc_option - Define the test acc app option list. * @algclass: 0:cipher 1:digest * @acctype: The sub alg type, reference func get_cipher_resource. * @syncmode: 0:sync mode 1:async mode + * @modetype: sva, no-sva, soft mode + * @optype: enc/dec, comp/decomp + * @prefetch: write allocated memory to prevent page faults */ struct acc_option { char algname[64]; @@ -56,6 +64,7 @@ struct acc_option { u32 subtype; char engine[64]; u32 engine_flag; + u32 prefetch; }; enum acc_type { @@ -74,7 +83,7 @@ enum alg_type { ECDH_TYPE, ECDSA_TYPE, SM2_TYPE, - X22519_TYPE, + X25519_TYPE, X448_TYPE, }; @@ -164,9 +173,8 @@ extern void cal_perfermance_data(struct acc_option *option, u32 sttime); extern void time_start(u32 seconds); extern int get_run_state(void); extern void set_run_state(int state); -extern int get_rand_int(int range); -extern void get_rand_data(u8 *addr, int size); -extern void add_recv_data(u32 cnt); +extern void get_rand_data(u8 *addr, u32 size); +extern void add_recv_data(u32 cnt, u32 pkglen); extern void add_send_complete(void); extern u32 get_recv_time(void); -- 2.33.0

1 5

[PATCH] digest: fix the fault as using the nginx
by Kai Ye 18 Jul '22

18 Jul '22

Prevent double-free after the private ctx copy is used. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- src/uadk_digest.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/uadk_digest.c b/src/uadk_digest.c index 2e61e80..8127373 100644 --- a/src/uadk_digest.c +++ b/src/uadk_digest.c @@ -240,6 +240,10 @@ static void digest_soft_cleanup(struct digest_priv_ctx *md_ctx) { EVP_MD_CTX *ctx = md_ctx->soft_ctx; + /* Prevent double-free after the copy is used */ + if (md_ctx->copy) + return; + if (ctx != NULL) { if (ctx->md_data) { OPENSSL_free(ctx->md_data); @@ -641,7 +645,9 @@ static int do_digest_sync(struct digest_priv_ctx *priv) { int ret; - /* Fix me: not support switch the soft work as input is lower */ + if (priv->req.in_bytes <= priv->switch_threshold && + priv->state == SEC_DIGEST_INIT) + return 0; ret = wd_do_digest_sync(priv->sess, &priv->req); if (ret) { @@ -743,6 +749,7 @@ static int uadk_e_digest_cleanup(EVP_MD_CTX *ctx) struct digest_priv_ctx *priv = (struct digest_priv_ctx *)EVP_MD_CTX_md_data(ctx); + /* Prevent double-free after the copy is used */ if (!priv || priv->copy) return 1; -- 2.33.0

1 0

[PATCH 1/2] uadk: fix spin lock destroy
by Weili Qian 18 Jul '22

18 Jul '22

Fix missing destroyed lock when initialization fails. Signed-off-by: Wenkai Lin <linwenkai6(a)hisilicon.com> Signed-off-by: Weili Qian <qianweili(a)huawei.com> --- drv/hisi_qm_udrv.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drv/hisi_qm_udrv.c b/drv/hisi_qm_udrv.c index 9eaf60c..b4e763d 100644 --- a/drv/hisi_qm_udrv.c +++ b/drv/hisi_qm_udrv.c @@ -335,6 +335,14 @@ err_out: return ret; } +static void hisi_qm_clear_info(struct hisi_qp *qp) +{ + struct hisi_qm_queue_info *q_info = &qp->q_info; + + pthread_spin_destroy(&q_info->lock); + hisi_qm_unset_region(qp->h_ctx, q_info); +} + static int get_free_num(struct hisi_qm_queue_info *q_info) { /* The device should reserve one buffer. */ @@ -374,7 +382,7 @@ handle_t hisi_qm_alloc_qp(struct hisi_qm_priv *config, handle_t ctx) qp->h_sgl_pool = hisi_qm_create_sglpool(HISI_SGL_NUM_IN_BD, HISI_SGE_NUM_IN_SGL); if (!qp->h_sgl_pool) - goto out_qp; + goto free_info; ret = wd_ctx_start(qp->h_ctx); if (ret) @@ -390,6 +398,8 @@ handle_t hisi_qm_alloc_qp(struct hisi_qm_priv *config, handle_t ctx) free_pool: hisi_qm_destroy_sglpool(qp->h_sgl_pool); +free_info: + hisi_qm_clear_info(qp); out_qp: free(qp); out: -- 2.30.0

1 1

[PATCH] engine: add receiving timeout count
by Kai Ye 18 Jul '22

18 Jul '22

Increase the count of packet receiving timeout as doing async jobs. Prevents falling into an infinite loop. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- src/uadk.h | 5 +++-- src/uadk_cipher.c | 7 +++++-- src/uadk_dh.c | 7 +++++-- src/uadk_digest.c | 7 +++++-- src/uadk_pkey.c | 7 +++++-- src/uadk_rsa.c | 7 +++++-- 6 files changed, 28 insertions(+), 12 deletions(-) diff --git a/src/uadk.h b/src/uadk.h index d210c3d..267da89 100644 --- a/src/uadk.h +++ b/src/uadk.h @@ -21,8 +21,9 @@ #include <uadk/wd_sched.h> #include "uadk_utils.h" -#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) -#define ENV_STRING_LEN 256 +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#define ENV_STRING_LEN 256 +#define ENGINE_RECV_MAX_CNT 60000000 enum { KUNPENG920, diff --git a/src/uadk_cipher.c b/src/uadk_cipher.c index 0b99753..5993386 100644 --- a/src/uadk_cipher.c +++ b/src/uadk_cipher.c @@ -503,6 +503,7 @@ static int sched_single_poll_policy(handle_t h_sched_ctx, static int uadk_e_cipher_poll(void *ctx) { struct cipher_priv_ctx *priv = (struct cipher_priv_ctx *) ctx; + __u64 rx_cnt = 0; __u32 recv = 0; /* Poll one packet currently */ int expt = 1; @@ -519,9 +520,11 @@ static int uadk_e_cipher_poll(void *ctx) return 0; else if (ret < 0 && ret != -EAGAIN) return ret; - } while (ret == -EAGAIN); + } while (ret == -EAGAIN && (rx_cnt++ < ENGINE_RECV_MAX_CNT)); - return ret; + fprintf(stderr, "failed to recv msg: timeout!\n"); + + return -ETIMEDOUT; } static int uadk_e_cipher_env_poll(void *ctx) diff --git a/src/uadk_dh.c b/src/uadk_dh.c index 75c9e5a..018a3b6 100644 --- a/src/uadk_dh.c +++ b/src/uadk_dh.c @@ -204,6 +204,7 @@ static __u32 dh_pick_next_ctx(handle_t sched_ctx, static int uadk_e_dh_poll(void *ctx) { + __u64 rx_cnt = 0; __u32 recv = 0; int expect = 1; int idx = 1; @@ -215,9 +216,11 @@ static int uadk_e_dh_poll(void *ctx) return UADK_E_POLL_SUCCESS; else if (ret < 0 && ret != -EAGAIN) return ret; - } while (ret == -EAGAIN); + } while (ret == -EAGAIN && (rx_cnt++ < ENGINE_RECV_MAX_CNT)); - return ret; + fprintf(stderr, "failed to recv msg: timeout!\n"); + + return -ETIMEDOUT; } static void uadk_e_dh_cb(void *req_t) diff --git a/src/uadk_digest.c b/src/uadk_digest.c index 70f51d3..0fb2cfb 100644 --- a/src/uadk_digest.c +++ b/src/uadk_digest.c @@ -331,6 +331,7 @@ static int sched_single_poll_policy(handle_t h_sched_ctx, static int uadk_e_digest_poll(void *ctx) { + __u64 rx_cnt = 0; __u32 recv = 0; int expt = 1; int ret = 0; @@ -341,9 +342,11 @@ static int uadk_e_digest_poll(void *ctx) return 0; else if (ret < 0 && ret != -EAGAIN) return ret; - } while (ret == -EAGAIN); + } while (ret == -EAGAIN && (rx_cnt++ < ENGINE_RECV_MAX_CNT)); - return ret; + fprintf(stderr, "failed to recv msg: timeout!\n"); + + return -ETIMEDOUT; } static int uadk_e_digest_env_poll(void *ctx) diff --git a/src/uadk_pkey.c b/src/uadk_pkey.c index 5300327..019d4fd 100644 --- a/src/uadk_pkey.c +++ b/src/uadk_pkey.c @@ -113,6 +113,7 @@ void uadk_ecc_cb(void *req_t) static int uadk_ecc_poll(void *ctx) { unsigned int recv = 0; + __u64 rx_cnt = 0; int expt = 1; int ret; @@ -122,9 +123,11 @@ static int uadk_ecc_poll(void *ctx) return 0; else if (ret < 0 && ret != -EAGAIN) return ret; - } while (ret == -EAGAIN); + } while (ret == -EAGAIN && (rx_cnt++ < ENGINE_RECV_MAX_CNT)); - return ret; + fprintf(stderr, "failed to recv msg: timeout!\n"); + + return -ETIMEDOUT; } /* make resource configure static */ diff --git a/src/uadk_rsa.c b/src/uadk_rsa.c index 1579539..42c3506 100644 --- a/src/uadk_rsa.c +++ b/src/uadk_rsa.c @@ -658,6 +658,7 @@ static int rsa_poll_policy(handle_t h_sched_ctx, __u32 expect, __u32 *count) static int uadk_e_rsa_poll(void *ctx) { + __u64 rx_cnt = 0; __u32 recv = 0; int expt = 1; int ret; @@ -668,9 +669,11 @@ static int uadk_e_rsa_poll(void *ctx) return UADK_E_POLL_SUCCESS; else if (ret < 0 && ret != -EAGAIN) return ret; - } while (ret == -EAGAIN); + } while (ret == -EAGAIN && (rx_cnt++ < ENGINE_RECV_MAX_CNT)); - return ret; + fprintf(stderr, "failed to recv msg: timeout!\n"); + + return -ETIMEDOUT; } static struct rsa_res_config rsa_res_config = { -- 2.30.0

1 0

[PATCH 0/5] uadk - add wd_comp_init2
by Yang Shen 07 Jul '22

07 Jul '22

The current uadk initialization process is: 1.Call wd_request_ctx() to request ctxs from devices. 2.Call wd_sched_rr_alloc() to create a sched(or some other scheduler alloc function if exits). 3.Initialize the sched. 4.Call wd_<alg>_init() with ctx_config and sched. Logic is reasonable. But in practice, the step of `wd_ request_ Ctx() ` and `wd_ sched_ rr_alloc() ` are very tedious. This makes it difficult for users to use the interface. One of the main reasons for this is that uadk has made a lot of configurations in the scheduler in order to provide users with better performance. Based on this consideration, the current uadk requires the user to arrange the division of hardware resources according to the device topology during initialization. Therefore, as a high-level interface, this scheme can provide customized scheme configuration for users with deep needs. All algorithm initialization interfaces have the same input parameters and behavioral logic. The pre-processing of the wd_<alg>_init is actually the configuration of `struct wd_ctx_config` and `struct wd_sched`. Therefore, the next thing to be done is to use limited and easy-to-use input parameters to describe users' requirements on the two input parameters, ensuring that the functions of the new interface init2 are the same as those of init. For ease of description, v1 is used to refer to the existing interface, and v2 is used to refer to the layer of encapsulation. At present, at least 4 parameters are required to meet the user configuration requirements with the V1 interface function remains unchanged. @device_list: The available uacce device list. Users can get it by wd_get_accel_list(). @numa_bitmask: The bitmask provided by libnuma. Users can use this parameter to control requesting ctxs devices in the bind NUMA scenario. @ctx_nums: The requested ctx number for each numa node. Due to users may have different requirements for different types of ctx numbers, needs a two-dimensional array as input. @sched_type: Scheduling type the user wants to use. What's more, some users want uadk to provide the default value about input parameters for some performance insensitive scenes. C code has no way to. Yang Shen (5): uadk - support algorithms initialization reentry protect uadk - support return error number as pointer uadk - mv some function to header file uadk/comp - add wd_comp_init2 uadk/docs - support a simple interface for initialization Makefile.am | 4 +- docs/wd_alg_init2.md | 176 +++++++++++++++++++++++++++ include/wd.h | 54 ++++++++- include/wd_alg_common.h | 24 ++++ include/wd_comp.h | 28 +++++ include/wd_util.h | 57 +++++++++ wd.c | 97 ++++++++++++--- wd_aead.c | 33 +++-- wd_cipher.c | 35 ++++-- wd_comp.c | 259 ++++++++++++++++++++++++++++++++++++++-- wd_dh.c | 34 ++++-- wd_digest.c | 33 +++-- wd_ecc.c | 33 +++-- wd_rsa.c | 33 +++-- wd_util.c | 75 +++++++++++- 15 files changed, 870 insertions(+), 105 deletions(-) create mode 100644 docs/wd_alg_init2.md -- 2.24.0

2 7

帐户验证!
by openeuler.orgIT 06 Jul '22

06 Jul '22

1 0

通知acc@openeuler.org
by noreply 02 Jul '22

02 Jul '22

1 0

[PATCH 0/2] uadk/sched - make a numa node map
by Yang Shen 01 Jul '22

01 Jul '22

Now the uadk scheduler will search the nearest node when call session_sched_init(). But this is a repetitive work because session_sched_init() is called by wd_xxx_create_sess(). So we can build an cpu-device numa node map. Update the map when a new numa node has been enabled with a device. And then, session_sched_init() can quick get the right device id from a certain cpu. Yang Shen (2): uadk/sched - adjust some functions location and rename for tag uadk/sched - add mapping from cpus to devices wd_sched.c | 312 ++++++++++++++++++++++++++++------------------------- 1 file changed, 163 insertions(+), 149 deletions(-) -- 2.24.0

1 2

[PATCH v3] uacce: Handle parent device removal or parent driver module rmmod
by Zhangfei Gao 01 Jul '22

01 Jul '22

From: Jean-Philippe Brucker <jean-philippe(a)linaro.org> The uacce driver must deal with a possible removal of the parent device or parent driver module rmmod at any time. Although uacce_remove(), called on device removal and on driver unbind, prevents future use of the uacce fops by removing the cdev, fops that were called before that point may still be running. Serialize uacce_fops_open() and uacce_remove() with uacce->mutex. Serialize other fops against uacce_remove() with q->mutex. Since we need to protect uacce_fops_poll() which gets called on the fast path, replace uacce->queues_lock with q->mutex to improve scalability. The other fops are only used during setup. uacce_queue_is_valid(), checked under q->mutex or uacce->mutex, denotes whether uacce_remove() has disabled all queues. If that is the case, don't go any further since the parent device is being removed and uacce->ops should not be called anymore. Reported-by: Yang Shen <shenyang39(a)huawei.com> Signed-off-by: Zhangfei Gao <zhangfei.gao(a)linaro.org> Signed-off-by: Jean-Philippe Brucker <jean-philippe(a)linaro.org> --- v3: Drop patch 1, which set cdev owner with parent driver onwer, to block parent driver rmmod. Suggested from Greg, this behavior introduce layering violation. Only keep patch 2, which can cover both parent moduel rmmod and parent device removal. drivers/misc/uacce/uacce.c | 133 ++++++++++++++++++++++++------------- include/linux/uacce.h | 6 +- 2 files changed, 91 insertions(+), 48 deletions(-) diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c index 281c54003edc..b70a013139c7 100644 --- a/drivers/misc/uacce/uacce.c +++ b/drivers/misc/uacce/uacce.c @@ -9,43 +9,38 @@ static struct class *uacce_class; static dev_t uacce_devt; -static DEFINE_MUTEX(uacce_mutex); static DEFINE_XARRAY_ALLOC(uacce_xa); -static int uacce_start_queue(struct uacce_queue *q) +/* + * If the parent driver or the device disappears, the queue state is invalid and + * ops are not usable anymore. + */ +static bool uacce_queue_is_valid(struct uacce_queue *q) { - int ret = 0; + return q->state == UACCE_Q_INIT || q->state == UACCE_Q_STARTED; +} - mutex_lock(&uacce_mutex); +static int uacce_start_queue(struct uacce_queue *q) +{ + int ret; - if (q->state != UACCE_Q_INIT) { - ret = -EINVAL; - goto out_with_lock; - } + if (q->state != UACCE_Q_INIT) + return -EINVAL; if (q->uacce->ops->start_queue) { ret = q->uacce->ops->start_queue(q); if (ret < 0) - goto out_with_lock; + return ret; } q->state = UACCE_Q_STARTED; - -out_with_lock: - mutex_unlock(&uacce_mutex); - - return ret; + return 0; } static int uacce_put_queue(struct uacce_queue *q) { struct uacce_device *uacce = q->uacce; - mutex_lock(&uacce_mutex); - - if (q->state == UACCE_Q_ZOMBIE) - goto out; - if ((q->state == UACCE_Q_STARTED) && uacce->ops->stop_queue) uacce->ops->stop_queue(q); @@ -54,8 +49,6 @@ static int uacce_put_queue(struct uacce_queue *q) uacce->ops->put_queue(q); q->state = UACCE_Q_ZOMBIE; -out: - mutex_unlock(&uacce_mutex); return 0; } @@ -65,20 +58,36 @@ static long uacce_fops_unl_ioctl(struct file *filep, { struct uacce_queue *q = filep->private_data; struct uacce_device *uacce = q->uacce; + long ret = -ENXIO; + + /* + * uacce->ops->ioctl() may take the mmap_lock when copying arg to/from + * user. Avoid a circular lock dependency with uacce_fops_mmap(), which + * gets called with mmap_lock held, by taking uacce->mutex instead of + * q->mutex. Doing this in uacce_fops_mmap() is not possible because + * uacce_fops_open() calls iommu_sva_bind_device(), which takes + * mmap_lock, while holding uacce->mutex. + */ + mutex_lock(&uacce->mutex); + if (!uacce_queue_is_valid(q)) + goto out_unlock; switch (cmd) { case UACCE_CMD_START_Q: - return uacce_start_queue(q); - + ret = uacce_start_queue(q); + break; case UACCE_CMD_PUT_Q: - return uacce_put_queue(q); - + ret = uacce_put_queue(q); + break; default: - if (!uacce->ops->ioctl) - return -EINVAL; - - return uacce->ops->ioctl(q, cmd, arg); + if (uacce->ops->ioctl) + ret = uacce->ops->ioctl(q, cmd, arg); + else + ret = -EINVAL; } +out_unlock: + mutex_unlock(&uacce->mutex); + return ret; } #ifdef CONFIG_COMPAT @@ -136,6 +145,13 @@ static int uacce_fops_open(struct inode *inode, struct file *filep) if (!q) return -ENOMEM; + mutex_lock(&uacce->mutex); + + if (!uacce->parent) { + ret = -EINVAL; + goto out_with_mem; + } + ret = uacce_bind_queue(uacce, q); if (ret) goto out_with_mem; @@ -152,10 +168,9 @@ static int uacce_fops_open(struct inode *inode, struct file *filep) filep->private_data = q; uacce->inode = inode; q->state = UACCE_Q_INIT; - - mutex_lock(&uacce->queues_lock); + mutex_init(&q->mutex); list_add(&q->list, &uacce->queues); - mutex_unlock(&uacce->queues_lock); + mutex_unlock(&uacce->mutex); return 0; @@ -163,18 +178,20 @@ static int uacce_fops_open(struct inode *inode, struct file *filep) uacce_unbind_queue(q); out_with_mem: kfree(q); + mutex_unlock(&uacce->mutex); return ret; } static int uacce_fops_release(struct inode *inode, struct file *filep) { struct uacce_queue *q = filep->private_data; + struct uacce_device *uacce = q->uacce; - mutex_lock(&q->uacce->queues_lock); - list_del(&q->list); - mutex_unlock(&q->uacce->queues_lock); + mutex_lock(&uacce->mutex); uacce_put_queue(q); uacce_unbind_queue(q); + list_del(&q->list); + mutex_unlock(&uacce->mutex); kfree(q); return 0; @@ -217,10 +234,9 @@ static int uacce_fops_mmap(struct file *filep, struct vm_area_struct *vma) vma->vm_private_data = q; qfr->type = type; - mutex_lock(&uacce_mutex); - - if (q->state != UACCE_Q_INIT && q->state != UACCE_Q_STARTED) { - ret = -EINVAL; + mutex_lock(&q->mutex); + if (!uacce_queue_is_valid(q)) { + ret = -ENXIO; goto out_with_lock; } @@ -248,12 +264,12 @@ static int uacce_fops_mmap(struct file *filep, struct vm_area_struct *vma) } q->qfrs[type] = qfr; - mutex_unlock(&uacce_mutex); + mutex_unlock(&q->mutex); return ret; out_with_lock: - mutex_unlock(&uacce_mutex); + mutex_unlock(&q->mutex); kfree(qfr); return ret; } @@ -262,12 +278,20 @@ static __poll_t uacce_fops_poll(struct file *file, poll_table *wait) { struct uacce_queue *q = file->private_data; struct uacce_device *uacce = q->uacce; + __poll_t ret = 0; + + mutex_lock(&q->mutex); + if (!uacce_queue_is_valid(q)) + goto out_unlock; poll_wait(file, &q->wait, wait); + if (uacce->ops->is_q_updated && uacce->ops->is_q_updated(q)) - return EPOLLIN | EPOLLRDNORM; + ret = EPOLLIN | EPOLLRDNORM; - return 0; +out_unlock: + mutex_unlock(&q->mutex); + return ret; } static const struct file_operations uacce_fops = { @@ -450,7 +474,7 @@ struct uacce_device *uacce_alloc(struct device *parent, goto err_with_uacce; INIT_LIST_HEAD(&uacce->queues); - mutex_init(&uacce->queues_lock); + mutex_init(&uacce->mutex); device_initialize(&uacce->dev); uacce->dev.devt = MKDEV(MAJOR(uacce_devt), uacce->dev_id); uacce->dev.class = uacce_class; @@ -507,13 +531,23 @@ void uacce_remove(struct uacce_device *uacce) if (uacce->inode) unmap_mapping_range(uacce->inode->i_mapping, 0, 0, 1); + /* + * uacce_fops_open() may be running concurrently, even after we remove + * the cdev. Holding uacce->mutex ensures that open() does not obtain a + * removed uacce device. + */ + mutex_lock(&uacce->mutex); /* ensure no open queue remains */ - mutex_lock(&uacce->queues_lock); list_for_each_entry_safe(q, next_q, &uacce->queues, list) { + /* + * Taking q->mutex ensures that fops do not use the defunct + * uacce->ops after the queue is disabled. + */ + mutex_lock(&q->mutex); uacce_put_queue(q); + mutex_unlock(&q->mutex); uacce_unbind_queue(q); } - mutex_unlock(&uacce->queues_lock); /* disable sva now since no opened queues */ uacce_disable_sva(uacce); @@ -521,6 +555,13 @@ void uacce_remove(struct uacce_device *uacce) if (uacce->cdev) cdev_device_del(uacce->cdev, &uacce->dev); xa_erase(&uacce_xa, uacce->dev_id); + /* + * uacce exists as long as there are open fds, but ops will be freed + * now. Ensure that bugs cause NULL deref rather than use-after-free. + */ + uacce->ops = NULL; + uacce->parent = NULL; + mutex_unlock(&uacce->mutex); put_device(&uacce->dev); } EXPORT_SYMBOL_GPL(uacce_remove); diff --git a/include/linux/uacce.h b/include/linux/uacce.h index 48e319f40275..9ce88c28b0a8 100644 --- a/include/linux/uacce.h +++ b/include/linux/uacce.h @@ -70,6 +70,7 @@ enum uacce_q_state { * @wait: wait queue head * @list: index into uacce queues list * @qfrs: pointer of qfr regions + * @mutex: protects queue state * @state: queue state machine * @pasid: pasid associated to the mm * @handle: iommu_sva handle returned by iommu_sva_bind_device() @@ -80,6 +81,7 @@ struct uacce_queue { wait_queue_head_t wait; struct list_head list; struct uacce_qfile_region *qfrs[UACCE_MAX_REGION]; + struct mutex mutex; enum uacce_q_state state; u32 pasid; struct iommu_sva *handle; @@ -97,9 +99,9 @@ struct uacce_queue { * @dev_id: id of the uacce device * @cdev: cdev of the uacce * @dev: dev of the uacce + * @mutex: protects uacce operation * @priv: private pointer of the uacce * @queues: list of queues - * @queues_lock: lock for queues list * @inode: core vfs */ struct uacce_device { @@ -113,9 +115,9 @@ struct uacce_device { u32 dev_id; struct cdev *cdev; struct device dev; + struct mutex mutex; void *priv; struct list_head queues; - struct mutex queues_lock; struct inode *inode; }; -- 2.36.1

1 0

[PATCH 1/2] uadk/ecc - remove a redefined macro
by Yang Shen 01 Jul '22

01 Jul '22

Macro 'offsetof' has been defined in 'stddef.h'. So remove the redefined one in 'wd_ecc_drv.h'. Signed-off-by: Yang Shen <shenyang39(a)huawei.com> --- include/drv/wd_ecc_drv.h | 2 -- wd_ecc.c | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/include/drv/wd_ecc_drv.h b/include/drv/wd_ecc_drv.h index ef98606..857da20 100644 --- a/include/drv/wd_ecc_drv.h +++ b/include/drv/wd_ecc_drv.h @@ -45,8 +45,6 @@ extern "C" { #define WD_X448 0x2 #define WD_SM2P256 0x3 -#define offsetof(t, m) ((size_t)(uintptr_t)&((t *)0)->m) - /* ECC message format */ struct wd_ecc_msg { struct wd_ecc_req req; diff --git a/wd_ecc.c b/wd_ecc.c index 1ff6ed3..4cf287b 100644 --- a/wd_ecc.c +++ b/wd_ecc.c @@ -8,6 +8,7 @@ #include <errno.h> #include <pthread.h> #include <stdlib.h> +#include <stddef.h> #include <string.h> #include <time.h> #include <dlfcn.h> -- 2.24.0

1 1

Fwd: [RFC v2 00/15] vfio: Adopt iommufd
by Zhangfei Gao 29 Jun '22

29 Jun '22

qemu: https://github.com/luxis1999/qemu/tree/qemu-for-5.17-rc6-vm-rfcv2. kernel: >> https://github.com/luxis1999/iommufd/tree/iommufd-v5.18-rc4-nesting -------- Forwarded Message -------- Subject: [RFC v2 00/15] vfio: Adopt iommufd Date: Wed, 8 Jun 2022 05:31:24 -0700 From: Yi Liu <yi.l.liu(a)intel.com> To: alex.williamson(a)redhat.com, cohuck(a)redhat.com, qemu-devel(a)nongnu.org CC: david(a)gibson.dropbear.id.au, thuth(a)redhat.com, farman(a)linux.ibm.com, mjrosato(a)linux.ibm.com, akrowiak(a)linux.ibm.com, pasic(a)linux.ibm.com, jjherne(a)linux.ibm.com, jasowang(a)redhat.com, kvm(a)vger.kernel.org, jgg(a)nvidia.com, nicolinc(a)nvidia.com, eric.auger(a)redhat.com, eric.auger.pro(a)gmail.com, kevin.tian(a)intel.com, yi.l.liu(a)intel.com, chao.p.peng(a)intel.com, yi.y.sun(a)intel.com, peterx(a)redhat.com, shameerali.kolothum.thodi(a)huawei.com, zhangfei.gao(a)linaro.org, berrange(a)redhat.com With the introduction of iommufd[1], the Linux kernel provides a generic interface for userspace drivers to propagate their DMA mappings to kernel for assigned devices. This series does the porting of the VFIO devices onto the /dev/iommu uapi and let it coexist with the legacy implementation. Other devices like vpda, vfio mdev and etc. are not considered yet. At QEMU level, interactions with the /dev/iommu are abstracted by a new iommufd object (compiled in with the CONFIG_IOMMUFD option). Any QEMU device (e.g. vfio device) wishing to use /dev/iommu must be linked with an iommufd object. In this series, the vfio-pci device is granted with such capability: It gets a new optional parameter named iommufd which allows to pass an iommufd object: -object iommufd,id=iommufd0 -device vfio-pci,host=0000:02:00.0,iommufd=iommufd0 Note the /dev/iommu can be externally opened by a management layer. In such a case the fd is passed along with the iommufd object: -object iommufd,id=iommufd0,fd=22 -device vfio-pci,host=0000:02:00.0,iommufd=iommufd0 If the fd parameter is not passed, the fd (/dev/iommu) is opened by QEMU. If no iommufd option is passed to the vfio-pci device, iommufd is not used and the end-user gets the behavior based on the legacy vfio iommu interfaces: -device vfio-pci,host=0000:02:00.0 While the legacy kernel interface is group-centric, the new iommufd interface is device-centric, relying on device fd and iommufd. To support both interfaces in the QEMU VFIO device we reworked the vfio container abstraction so that the generic VFIO code can use either backend. The VFIOContainer object becomes a base object derived into a) the legacy VFIO container and b) the new iommufd based container. The base object implements generic code such as code related to memory_listener and address space management whereas the derived objects implement callbacks specific to either BE, legacy and iommufd. Indeed each backend has its own way to setup secure context and dma management interface. The below diagram shows how it looks like with both BEs. VFIO AddressSpace/Memory +-------+ +----------+ +-----+ +-----+ | pci | | platform | | ap | | ccw | +---+---+ +----+-----+ +--+--+ +--+--+ +----------------------+ | | | | | AddressSpace | | | | | +------------+---------+ +---V-----------V-----------V--------V----+ / | VFIOAddressSpace | <------------+ | | | MemoryListener | VFIOContainer list | +-------+----------------------------+----+ | | | | +-------V------+ +--------V----------+ | iommufd | | vfio legacy | | container | | container | +-------+------+ +--------+----------+ | | | /dev/iommu | /dev/vfio/vfio | /dev/vfio/devices/vfioX | /dev/vfio/$group_id Userspace | | ===========+============================+================================ Kernel | device fd | +---------------+ | group/container fd | (BIND_IOMMUFD | | (SET_CONTAINER/SET_IOMMU) | ATTACH_IOAS) | | device fd | | | | +-------V------------V-----------------+ iommufd | | vfio | (map/unmap | +---------+--------------------+-------+ ioas_copy) | | | map/unmap | | | +------V------+ +-----V------+ +------V--------+ | iommfd core | | device | | vfio iommu | +-------------+ +------------+ +---------------+ [Secure Context setup] - iommufd BE: uses device fd and iommufd to setup secure context (bind_iommufd, attach_ioas) - vfio legacy BE: uses group fd and container fd to setup secure context (set_container, set_iommu) [Device access] - iommufd BE: device fd is opened through /dev/vfio/devices/vfioX - vfio legacy BE: device fd is retrieved from group fd ioctl [DMA Mapping flow] - VFIOAddressSpace receives MemoryRegion add/del via MemoryListener - VFIO populates DMA map/unmap via the container BEs *) iommufd BE: uses iommufd *) vfio legacy BE: uses container fd Test done: - PCI and Platform device were tested - ccw and ap were only compile-tested - limited device hotplug test - vIOMMU test run for both legacy and iommufd backends (limited tests) This series was co-developed by Eric Auger and me based on the iommufd exploration kernel (https://github.com/luxis1999/iommufd/tree/iommufd-v5.17-rc6) which encompasses: - Jason’s IOMMUFD Generic interface series <https://lore.kernel.org/kvm/0-v1-e79cd8d168e8+6-iommufd_jgg@nvidia.com/> - Jason's vfio ccw life circle cleanup (Eric Farman has renewed it recently) <https://lore.kernel.org/all/0-v3-57c1502c62fd+2190-ccw_mdev_jgg@nvidia.com/ https://lore.kernel.org/kvm/20220602171948.2790690-1-farman@linux.ibm.com/> - Yi's move vfio_device allo/free into vfio core (not pushed to upstream yet) - Yi's vfio device cdev (introduces device-centric interface, not pushed to upstream yet) - Nicolin's vfio iommufd compat code (not pushed to upstream yet) This QEMU series can be fount at https://github.com/luxis1999/qemu/tree/qemu-for-5.17-rc6-vm-rfcv2. As iommufd kernel is in the early step (only iommufd generic interface is in mailing list), so this series hasn't made the iommufd backend fully on par with legacy backend w.r.t. features like: - p2p mappings - coherency tracking - live migration - vfio pci device hot reset - and etc. Only vfio-pci device supports iommufd BE, other types of devices still uses legacy BE. TODOs: - Add DMA alias check for iommufd BE (group level) - Make pci.c to be BE agnostic. Needs kernel change as well to fix the VFIO_DEVICE_PCI_HOT_RESET gap - Cleanup the VFIODevice fields as it's used in both backends - Add device fd parameter to vfio-device in case the iommufd option is used - Add locks - Replace list with g_tree - More tests Change log: v2: - remove the first three patches of rfcv1 - add open cdev helper suggested by Jason - remove the QOMification of the VFIOContainer and simply use standard ops (David) - add "-object iommufd" suggested by Alex v1: https://lore.kernel.org/qemu-devel/20220414104710.28534-1-yi.l.liu@intel.co… Thanks, Yi & Eric Eric Auger (10): scripts/update-linux-headers: Add iommufd.h linux-headers: Import latest vfio.h and iommufd.h vfio/container: Introduce vfio_[attach/detach]_device vfio/platform: Use vfio_[attach/detach]_device vfio/ap: Use vfio_[attach/detach]_device vfio/ccw: Use vfio_[attach/detach]_device vfio/container-base: Introduce [attach/detach]_device container callbacks vfio/container-base: Introduce VFIOContainer reset callback backends/iommufd: Introduce the iommufd object vfio/as: Allow the selection of a given iommu backend Yi Liu (5): vfio/common: Split common.c into common.c, container.c and as.c vfio: Add base container util/char_dev: Add open_cdev() vfio/iommufd: Implement the iommufd backend vfio/iommufd: Add IOAS_COPY_DMA support MAINTAINERS | 13 + backends/Kconfig | 5 + backends/iommufd.c | 265 +++ backends/meson.build | 1 + backends/trace-events | 12 + hw/vfio/ap.c | 62 +- hw/vfio/as.c | 1035 +++++++++++ hw/vfio/ccw.c | 118 +- hw/vfio/common.c | 2365 ++----------------------- hw/vfio/container-base.c | 172 ++ hw/vfio/container.c | 1298 ++++++++++++++ hw/vfio/iommufd.c | 546 ++++++ hw/vfio/meson.build | 6 + hw/vfio/migration.c | 5 +- hw/vfio/pci.c | 83 +- hw/vfio/platform.c | 42 +- hw/vfio/spapr.c | 22 +- hw/vfio/trace-events | 11 + include/hw/vfio/vfio-common.h | 101 +- include/hw/vfio/vfio-container-base.h | 148 ++ include/qemu/char_dev.h | 16 + include/sysemu/iommufd.h | 47 + linux-headers/linux/iommufd.h | 223 +++ linux-headers/linux/vfio.h | 84 + qapi/qom.json | 16 +- qemu-options.hx | 12 + scripts/update-linux-headers.sh | 2 +- util/chardev_open.c | 58 + util/meson.build | 1 + 29 files changed, 4291 insertions(+), 2478 deletions(-) create mode 100644 backends/iommufd.c create mode 100644 hw/vfio/as.c create mode 100644 hw/vfio/container-base.c create mode 100644 hw/vfio/container.c create mode 100644 hw/vfio/iommufd.c create mode 100644 include/hw/vfio/vfio-container-base.h create mode 100644 include/qemu/char_dev.h create mode 100644 include/sysemu/iommufd.h create mode 100644 linux-headers/linux/iommufd.h create mode 100644 util/chardev_open.c Base commit: 9b1f58854959c5a9bdb347e3e04c252ab7fc9ef5 -- 2.27.0

1 0

Fwd: [RFC v2 00/15] vfio: Adopt iommufd
by zhangfei.gao＠foxmail.com 29 Jun '22

29 Jun '22

qemu: https://github.com/luxis1999/qemu/tree/qemu-for-5.17-rc6-vm-rfcv2. kernel: >> https://github.com/luxis1999/iommufd/tree/iommufd-v5.18-rc4-nesting -------- Forwarded Message -------- Subject: [RFC v2 00/15] vfio: Adopt iommufd Date: Wed, 8 Jun 2022 05:31:24 -0700 From: Yi Liu <yi.l.liu(a)intel.com> To: alex.williamson(a)redhat.com, cohuck(a)redhat.com, qemu-devel(a)nongnu.org CC: david(a)gibson.dropbear.id.au, thuth(a)redhat.com, farman(a)linux.ibm.com, mjrosato(a)linux.ibm.com, akrowiak(a)linux.ibm.com, pasic(a)linux.ibm.com, jjherne(a)linux.ibm.com, jasowang(a)redhat.com, kvm(a)vger.kernel.org, jgg(a)nvidia.com, nicolinc(a)nvidia.com, eric.auger(a)redhat.com, eric.auger.pro(a)gmail.com, kevin.tian(a)intel.com, yi.l.liu(a)intel.com, chao.p.peng(a)intel.com, yi.y.sun(a)intel.com, peterx(a)redhat.com, shameerali.kolothum.thodi(a)huawei.com, zhangfei.gao(a)linaro.org, berrange(a)redhat.com With the introduction of iommufd[1], the Linux kernel provides a generic interface for userspace drivers to propagate their DMA mappings to kernel for assigned devices. This series does the porting of the VFIO devices onto the /dev/iommu uapi and let it coexist with the legacy implementation. Other devices like vpda, vfio mdev and etc. are not considered yet. At QEMU level, interactions with the /dev/iommu are abstracted by a new iommufd object (compiled in with the CONFIG_IOMMUFD option). Any QEMU device (e.g. vfio device) wishing to use /dev/iommu must be linked with an iommufd object. In this series, the vfio-pci device is granted with such capability: It gets a new optional parameter named iommufd which allows to pass an iommufd object: -object iommufd,id=iommufd0 -device vfio-pci,host=0000:02:00.0,iommufd=iommufd0 Note the /dev/iommu can be externally opened by a management layer. In such a case the fd is passed along with the iommufd object: -object iommufd,id=iommufd0,fd=22 -device vfio-pci,host=0000:02:00.0,iommufd=iommufd0 If the fd parameter is not passed, the fd (/dev/iommu) is opened by QEMU. If no iommufd option is passed to the vfio-pci device, iommufd is not used and the end-user gets the behavior based on the legacy vfio iommu interfaces: -device vfio-pci,host=0000:02:00.0 While the legacy kernel interface is group-centric, the new iommufd interface is device-centric, relying on device fd and iommufd. To support both interfaces in the QEMU VFIO device we reworked the vfio container abstraction so that the generic VFIO code can use either backend. The VFIOContainer object becomes a base object derived into a) the legacy VFIO container and b) the new iommufd based container. The base object implements generic code such as code related to memory_listener and address space management whereas the derived objects implement callbacks specific to either BE, legacy and iommufd. Indeed each backend has its own way to setup secure context and dma management interface. The below diagram shows how it looks like with both BEs. VFIO AddressSpace/Memory +-------+ +----------+ +-----+ +-----+ | pci | | platform | | ap | | ccw | +---+---+ +----+-----+ +--+--+ +--+--+ +----------------------+ | | | | | AddressSpace | | | | | +------------+---------+ +---V-----------V-----------V--------V----+ / | VFIOAddressSpace | <------------+ | | | MemoryListener | VFIOContainer list | +-------+----------------------------+----+ | | | | +-------V------+ +--------V----------+ | iommufd | | vfio legacy | | container | | container | +-------+------+ +--------+----------+ | | | /dev/iommu | /dev/vfio/vfio | /dev/vfio/devices/vfioX | /dev/vfio/$group_id Userspace | | ===========+============================+================================ Kernel | device fd | +---------------+ | group/container fd | (BIND_IOMMUFD | | (SET_CONTAINER/SET_IOMMU) | ATTACH_IOAS) | | device fd | | | | +-------V------------V-----------------+ iommufd | | vfio | (map/unmap | +---------+--------------------+-------+ ioas_copy) | | | map/unmap | | | +------V------+ +-----V------+ +------V--------+ | iommfd core | | device | | vfio iommu | +-------------+ +------------+ +---------------+ [Secure Context setup] - iommufd BE: uses device fd and iommufd to setup secure context (bind_iommufd, attach_ioas) - vfio legacy BE: uses group fd and container fd to setup secure context (set_container, set_iommu) [Device access] - iommufd BE: device fd is opened through /dev/vfio/devices/vfioX - vfio legacy BE: device fd is retrieved from group fd ioctl [DMA Mapping flow] - VFIOAddressSpace receives MemoryRegion add/del via MemoryListener - VFIO populates DMA map/unmap via the container BEs *) iommufd BE: uses iommufd *) vfio legacy BE: uses container fd Test done: - PCI and Platform device were tested - ccw and ap were only compile-tested - limited device hotplug test - vIOMMU test run for both legacy and iommufd backends (limited tests) This series was co-developed by Eric Auger and me based on the iommufd exploration kernel (https://github.com/luxis1999/iommufd/tree/iommufd-v5.17-rc6) which encompasses: - Jason’s IOMMUFD Generic interface series <https://lore.kernel.org/kvm/0-v1-e79cd8d168e8+6-iommufd_jgg@nvidia.com/> - Jason's vfio ccw life circle cleanup (Eric Farman has renewed it recently) <https://lore.kernel.org/all/0-v3-57c1502c62fd+2190-ccw_mdev_jgg@nvidia.com/ https://lore.kernel.org/kvm/20220602171948.2790690-1-farman@linux.ibm.com/> - Yi's move vfio_device allo/free into vfio core (not pushed to upstream yet) - Yi's vfio device cdev (introduces device-centric interface, not pushed to upstream yet) - Nicolin's vfio iommufd compat code (not pushed to upstream yet) This QEMU series can be fount at https://github.com/luxis1999/qemu/tree/qemu-for-5.17-rc6-vm-rfcv2. As iommufd kernel is in the early step (only iommufd generic interface is in mailing list), so this series hasn't made the iommufd backend fully on par with legacy backend w.r.t. features like: - p2p mappings - coherency tracking - live migration - vfio pci device hot reset - and etc. Only vfio-pci device supports iommufd BE, other types of devices still uses legacy BE. TODOs: - Add DMA alias check for iommufd BE (group level) - Make pci.c to be BE agnostic. Needs kernel change as well to fix the VFIO_DEVICE_PCI_HOT_RESET gap - Cleanup the VFIODevice fields as it's used in both backends - Add device fd parameter to vfio-device in case the iommufd option is used - Add locks - Replace list with g_tree - More tests Change log: v2: - remove the first three patches of rfcv1 - add open cdev helper suggested by Jason - remove the QOMification of the VFIOContainer and simply use standard ops (David) - add "-object iommufd" suggested by Alex v1: https://lore.kernel.org/qemu-devel/20220414104710.28534-1-yi.l.liu@intel.co… Thanks, Yi & Eric Eric Auger (10): scripts/update-linux-headers: Add iommufd.h linux-headers: Import latest vfio.h and iommufd.h vfio/container: Introduce vfio_[attach/detach]_device vfio/platform: Use vfio_[attach/detach]_device vfio/ap: Use vfio_[attach/detach]_device vfio/ccw: Use vfio_[attach/detach]_device vfio/container-base: Introduce [attach/detach]_device container callbacks vfio/container-base: Introduce VFIOContainer reset callback backends/iommufd: Introduce the iommufd object vfio/as: Allow the selection of a given iommu backend Yi Liu (5): vfio/common: Split common.c into common.c, container.c and as.c vfio: Add base container util/char_dev: Add open_cdev() vfio/iommufd: Implement the iommufd backend vfio/iommufd: Add IOAS_COPY_DMA support MAINTAINERS | 13 + backends/Kconfig | 5 + backends/iommufd.c | 265 +++ backends/meson.build | 1 + backends/trace-events | 12 + hw/vfio/ap.c | 62 +- hw/vfio/as.c | 1035 +++++++++++ hw/vfio/ccw.c | 118 +- hw/vfio/common.c | 2365 ++----------------------- hw/vfio/container-base.c | 172 ++ hw/vfio/container.c | 1298 ++++++++++++++ hw/vfio/iommufd.c | 546 ++++++ hw/vfio/meson.build | 6 + hw/vfio/migration.c | 5 +- hw/vfio/pci.c | 83 +- hw/vfio/platform.c | 42 +- hw/vfio/spapr.c | 22 +- hw/vfio/trace-events | 11 + include/hw/vfio/vfio-common.h | 101 +- include/hw/vfio/vfio-container-base.h | 148 ++ include/qemu/char_dev.h | 16 + include/sysemu/iommufd.h | 47 + linux-headers/linux/iommufd.h | 223 +++ linux-headers/linux/vfio.h | 84 + qapi/qom.json | 16 +- qemu-options.hx | 12 + scripts/update-linux-headers.sh | 2 +- util/chardev_open.c | 58 + util/meson.build | 1 + 29 files changed, 4291 insertions(+), 2478 deletions(-) create mode 100644 backends/iommufd.c create mode 100644 hw/vfio/as.c create mode 100644 hw/vfio/container-base.c create mode 100644 hw/vfio/container.c create mode 100644 hw/vfio/iommufd.c create mode 100644 include/hw/vfio/vfio-container-base.h create mode 100644 include/qemu/char_dev.h create mode 100644 include/sysemu/iommufd.h create mode 100644 linux-headers/linux/iommufd.h create mode 100644 util/chardev_open.c Base commit: 9b1f58854959c5a9bdb347e3e04c252ab7fc9ef5 -- 2.27.0

1 0

[PATCH v2 0/2] fix uacce concurrency issue of uacce_remove
by Zhangfei Gao 27 Jun '22

27 Jun '22

When uacce is working, uacce parent module can be rmmod, parent device can also be removed anytime, which may cause concurrency issues. Here solve the concurrency issue. Jean-Philippe Brucker (1): uacce: Handle parent device removal Zhangfei Gao (1): uacce: Handle parent driver module removal drivers/misc/uacce/uacce.c | 135 ++++++++++++++++++++++++------------- include/linux/uacce.h | 6 +- 2 files changed, 92 insertions(+), 49 deletions(-) -- 2.36.1

2 5

[PATCH 1/5] uadk: support some uadk dfx stronger features
by Kai Ye 22 Jun '22

22 Jun '22

1. Add the function of setting the uadk log level, include error, info, debug by syslog. 2. The number of packets in a queue can be read through the 'uadk_tool'. 3. The 'uadk_tool' supports displaying the library build date. supports displaying the environment variables. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- 0 | 0 Makefile.am | 7 +- include/drv/wd_aead_drv.h | 1 + include/drv/wd_cipher_drv.h | 1 + include/drv/wd_dh_drv.h | 1 + include/drv/wd_digest_drv.h | 1 + include/drv/wd_ecc_drv.h | 1 + include/drv/wd_rsa_drv.h | 1 + include/wd.h | 69 +++-- include/wd_util.h | 25 +- test/hisi_zip_test/test_lib.c | 2 + uadk_tool/Makefile.am | 11 +- .../{ => benchmark}/sec_soft_benchmark.c | 0 .../{ => benchmark}/sec_soft_benchmark.h | 0 .../{ => benchmark}/sec_uadk_benchmark.c | 0 .../{ => benchmark}/sec_uadk_benchmark.h | 0 uadk_tool/{ => benchmark}/sec_wd_benchmark.c | 0 uadk_tool/{ => benchmark}/sec_wd_benchmark.h | 0 uadk_tool/{ => benchmark}/uadk_benchmark.c | 3 +- uadk_tool/{ => benchmark}/uadk_benchmark.h | 2 +- uadk_tool/dfx/uadk_dfx.c | 253 ++++++++++++++++++ uadk_tool/{ => dfx}/uadk_dfx.h | 3 - uadk_tool/uadk_dfx.c | 79 ------ uadk_tool/uadk_tool.c | 21 +- wd.c | 79 +++++- wd_aead.c | 9 +- wd_cipher.c | 8 + wd_comp.c | 2 + wd_dh.c | 7 + wd_digest.c | 7 + wd_ecc.c | 11 +- wd_rsa.c | 7 + wd_util.c | 91 ++++++- 33 files changed, 564 insertions(+), 138 deletions(-) create mode 100644 0 rename uadk_tool/{ => benchmark}/sec_soft_benchmark.c (100%) rename uadk_tool/{ => benchmark}/sec_soft_benchmark.h (100%) rename uadk_tool/{ => benchmark}/sec_uadk_benchmark.c (100%) rename uadk_tool/{ => benchmark}/sec_uadk_benchmark.h (100%) rename uadk_tool/{ => benchmark}/sec_wd_benchmark.c (100%) rename uadk_tool/{ => benchmark}/sec_wd_benchmark.h (100%) rename uadk_tool/{ => benchmark}/uadk_benchmark.c (99%) rename uadk_tool/{ => benchmark}/uadk_benchmark.h (97%) create mode 100644 uadk_tool/dfx/uadk_dfx.c rename uadk_tool/{ => dfx}/uadk_dfx.h (59%) delete mode 100644 uadk_tool/uadk_dfx.c diff --git a/0 b/0 new file mode 100644 index 0000000..e69de29 diff --git a/Makefile.am b/Makefile.am index 0bda2f7..05d6bc7 100644 --- a/Makefile.am +++ b/Makefile.am @@ -23,7 +23,11 @@ MINOR = 3 REVISION = 34 UADK_VERSION = -version-number ${MAJOR}:${MINOR}:${REVISION} -AM_CFLAGS+= -DUADK_VERSION_NUMBER="\"libwd version: ${MAJOR}.${MINOR}.${REVISION}\"" +DAY = 11 +MONTH = Jun +YEAR = 2022 +AM_CFLAGS+= -DUADK_VERSION_NUMBER="\"UADK version: ${MAJOR}.${MINOR}.${REVISION}\"" +AM_CFLAGS+= -DUADK_RELEASED_TIME="\"Released ${MONTH} ${DAY}, ${YEAR}\"" include_HEADERS = include/wd.h include/wd_cipher.h include/wd_aead.h \ include/wd_comp.h include/wd_dh.h include/wd_digest.h \ @@ -78,6 +82,7 @@ libhisi_hpre_la_SOURCES=drv/hisi_hpre.c drv/hisi_qm_udrv.c \ hisi_qm_udrv.h wd_hpre_drv.h if WD_STATIC_DRV AM_CFLAGS += -DWD_STATIC_DRV +AM_CFLAGS += -DWD_NO_LOG libwd_la_LIBADD = $(libwd_la_OBJECTS) -lnuma diff --git a/include/drv/wd_aead_drv.h b/include/drv/wd_aead_drv.h index cca28ba..de4a7d7 100644 --- a/include/drv/wd_aead_drv.h +++ b/include/drv/wd_aead_drv.h @@ -76,6 +76,7 @@ struct wd_aead_driver { void wd_aead_set_driver(struct wd_aead_driver *drv); struct wd_aead_driver *wd_aead_get_driver(void); +struct wd_aead_msg *wd_aead_get_msg(__u32 idx, __u32 tag); #ifdef WD_STATIC_DRV #define WD_AEAD_SET_DRIVER(drv) \ diff --git a/include/drv/wd_cipher_drv.h b/include/drv/wd_cipher_drv.h index 84c9844..a8da8cc 100644 --- a/include/drv/wd_cipher_drv.h +++ b/include/drv/wd_cipher_drv.h @@ -62,6 +62,7 @@ struct wd_cipher_driver { void wd_cipher_set_driver(struct wd_cipher_driver *drv); struct wd_cipher_driver *wd_cipher_get_driver(void); +struct wd_cipher_msg *wd_cipher_get_msg(__u32 idx, __u32 tag); #ifdef WD_STATIC_DRV #define WD_CIPHER_SET_DRIVER(drv) \ diff --git a/include/drv/wd_dh_drv.h b/include/drv/wd_dh_drv.h index f8e3065..57f774d 100644 --- a/include/drv/wd_dh_drv.h +++ b/include/drv/wd_dh_drv.h @@ -36,6 +36,7 @@ struct wd_dh_driver { void wd_dh_set_driver(struct wd_dh_driver *drv); struct wd_dh_driver *wd_dh_get_driver(void); +struct wd_dh_msg *wd_dh_get_msg(__u32 idx, __u32 tag); #ifdef WD_STATIC_DRV #define WD_DH_SET_DRIVER(drv) \ diff --git a/include/drv/wd_digest_drv.h b/include/drv/wd_digest_drv.h index 10ce6e1..39839f6 100644 --- a/include/drv/wd_digest_drv.h +++ b/include/drv/wd_digest_drv.h @@ -64,6 +64,7 @@ struct wd_digest_driver { void wd_digest_set_driver(struct wd_digest_driver *drv); struct wd_digest_driver *wd_digest_get_driver(void); +struct wd_digest_msg *wd_digest_get_msg(__u32 idx, __u32 tag); #ifdef WD_STATIC_DRV #define WD_DIGEST_SET_DRIVER(drv) \ diff --git a/include/drv/wd_ecc_drv.h b/include/drv/wd_ecc_drv.h index ef98606..c72cd8f 100644 --- a/include/drv/wd_ecc_drv.h +++ b/include/drv/wd_ecc_drv.h @@ -190,6 +190,7 @@ struct wd_ecc_driver { void wd_ecc_set_driver(struct wd_ecc_driver *drv); struct wd_ecc_driver *wd_ecc_get_driver(void); +struct wd_ecc_msg *wd_ecc_get_msg(__u32 idx, __u32 tag); #ifdef WD_STATIC_DRV #define WD_ECC_SET_DRIVER(drv) \ diff --git a/include/drv/wd_rsa_drv.h b/include/drv/wd_rsa_drv.h index 28c3337..22aa159 100644 --- a/include/drv/wd_rsa_drv.h +++ b/include/drv/wd_rsa_drv.h @@ -59,6 +59,7 @@ struct wd_rsa_driver { void wd_rsa_set_driver(struct wd_rsa_driver *drv); struct wd_rsa_driver *wd_rsa_get_driver(void); +struct wd_rsa_msg *wd_rsa_get_msg(__u32 idx, __u32 tag); #ifdef WD_STATIC_DRV #define WD_RSA_SET_DRIVER(drv) \ diff --git a/include/wd.h b/include/wd.h index 56c4109..8c45522 100644 --- a/include/wd.h +++ b/include/wd.h @@ -8,9 +8,11 @@ #define __WD_H #include <errno.h> #include <fcntl.h> +#include <stdbool.h> #include <stdint.h> #include <stdio.h> #include <string.h> +#include <syslog.h> #include <unistd.h> #include <asm/types.h> #include "uacce.h" @@ -25,39 +27,37 @@ extern "C" { #define MAX_DEV_NAME_LEN 256 #define LINUX_CRTDIR_SIZE 1 #define LINUX_PRTDIR_SIZE 2 +#define WD_CTX_CNT_NUM 1024 +#define WD_IPC_KEY 0x500011 typedef void (*wd_log)(const char *format, ...); -#ifndef WD_ERR -#ifndef WITH_LOG_FILE -extern wd_log log_out; - -#define __WD_FILENAME__ (strrchr(__FILE__, '/') ? \ - ((char *)((uintptr_t)strrchr(__FILE__, '/') + 1)) : __FILE__) - -#define WD_ERR(format, args...) \ - (log_out ? log_out("[%s, %d, %s]:"format, \ - __WD_FILENAME__, __LINE__, __func__, ##args) : \ - fprintf(stderr, format, ##args)) +#ifndef WD_NO_LOG +#define WD_DEBUG(fmt, args...) \ + do {\ + openlog("uadk-debug", LOG_CONS | LOG_PID, LOG_LOCAL5);\ + syslog(LOG_DEBUG, fmt, ##args);\ + } while (0) + +#define WD_INFO(fmt, args...) \ + do {\ + openlog("uadk-info", LOG_CONS | LOG_PID, LOG_LOCAL5);\ + syslog(LOG_INFO, fmt, ##args);\ + } while (0) + +#define WD_ERR(fmt, args...) \ + do {\ + openlog("uadk-err", LOG_CONS | LOG_PID, LOG_LOCAL5);\ + syslog(LOG_ERR, fmt, ##args);\ + } while (0) #else -extern FILE *flog_fd; -#define WD_ERR(format, args...) do { \ - if (!flog_fd) \ - flog_fd = fopen(WITH_LOG_FILE, "a+"); \ - if (flog_fd) \ - fprintf(flog_fd, format, ##args); \ - else \ - fprintf(stderr, "log %s not exists!", \ - WITH_LOG_FILE); \ -} while (0) -#endif +#define OPEN_LOG(s) +#define WD_DEBUG(fmt, args...) fprintf(stderr, fmt, ##args) +#define WD_INFO(fmt, args...) fprintf(stderr, fmt, ##args) +#define WD_ERR(fmt, args...) fprintf(stderr, fmt, ##args) #endif -#ifdef DEBUG_LOG -#define dbg(msg, ...) fprintf(stderr, msg, ##__VA_ARGS__) -#else -#define dbg(msg, ...) -#endif +#define WD_CONSOLE printf /* WD error code */ #define WD_SUCCESS 0 @@ -488,6 +488,21 @@ void wd_mempool_stats(handle_t mempool, struct wd_mempool_stats *stats); */ void wd_blockpool_stats(handle_t blkpool, struct wd_blockpool_stats *stats); +/** + * wd_get_version() - Get the libwd version number and released time. + */ +void wd_get_version(void); + +/** + * wd_need_debug() - Get the debug flag from rsyslog.cnf + */ +bool wd_need_debug(void); + +/** + * wd_need_info() - Get the info flag from rsyslog.cnf + */ +bool wd_need_info(void); + #ifdef __cplusplus } #endif diff --git a/include/wd_util.h b/include/wd_util.h index eb250f0..83a9684 100644 --- a/include/wd_util.h +++ b/include/wd_util.h @@ -8,6 +8,8 @@ #define __WD_UTIL_H #include <stdbool.h> +#include <sys/ipc.h> +#include <sys/shm.h> #include <asm/types.h> #include "wd_alg_common.h" @@ -292,7 +294,7 @@ int wd_add_task_to_async_queue(struct wd_env_config *config, __u32 idx); */ void dump_env_info(struct wd_env_config *config); -/* +/** * wd_alg_get_env_param() - get specific ctx number. * @config: Pointer of wd_env_config which is used to store environment * variable information. @@ -304,7 +306,7 @@ int wd_alg_get_env_param(struct wd_env_config *env_config, struct wd_ctx_attr attr, __u32 *num, __u8 *is_enable); -/* +/** * wd_set_ctx_attr() - set node type and mode for ctx * @ctx_attr: ctx attributes pointer. * @node: numa id. @@ -315,7 +317,7 @@ int wd_alg_get_env_param(struct wd_env_config *env_config, int wd_set_ctx_attr(struct wd_ctx_attr *ctx_attr, __u32 node, __u32 type, __u8 mode, __u32 num); -/* +/** * wd_check_ctx() - check ctx mode and index * @config: ctx config pointer. * @mode: synchronous or asynchronous mode. @@ -354,6 +356,23 @@ int wd_handle_msg_sync(struct wd_msg_handle *msg_handle, handle_t ctx, */ int wd_init_param_check(struct wd_ctx_config *config, struct wd_sched *sched); +/** + * wd_dfx_msg_cnt() - Message counter interface for ctx + * @msg: Shared memory addr. + * @numSize: Number of elements. + * @index: Indicates the CTX index. + */ +static inline void wd_dfx_msg_cnt(unsigned long *msg, __u32 numsize, __u32 idx) +{ + bool ret; + + ret = wd_need_info(); + if (idx > numsize || !ret) + return; + + msg[idx]++; +} + #ifdef __cplusplus } #endif diff --git a/test/hisi_zip_test/test_lib.c b/test/hisi_zip_test/test_lib.c index 374244a..5918699 100644 --- a/test/hisi_zip_test/test_lib.c +++ b/test/hisi_zip_test/test_lib.c @@ -22,6 +22,8 @@ struct check_rand_ctx { unsigned short state[3]; }; +#define dbg(msg, ...) fprintf(stderr, msg, ##__VA_ARGS__) + static pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER; static pthread_spinlock_t lock; static int count = 0; diff --git a/uadk_tool/Makefile.am b/uadk_tool/Makefile.am index da5b229..f04b2f0 100644 --- a/uadk_tool/Makefile.am +++ b/uadk_tool/Makefile.am @@ -1,13 +1,16 @@ ACLOCAL_AMFLAGS = -I m4 -I./include -AM_CFLAGS=-Wall -fno-strict-aliasing -I$(top_srcdir) -I$(top_srcdir)/include \ +AUTOMAKE_OPTIONS = foreign subdir-objects +AM_CFLAGS=-Wall -fno-strict-aliasing -I$(top_srcdir) -I$(top_srcdir)/benchmark/include \ -pthread #AUTOMAKE_OPTIONS = subdir-objects bin_PROGRAMS=uadk_tool -uadk_tool_SOURCES=uadk_tool.c uadk_dfx.c uadk_benchmark.c \ - sec_uadk_benchmark.c sec_wd_benchmark.c +uadk_tool_SOURCES=uadk_tool.c dfx/uadk_dfx.c dfx/uadk_dfx.h \ + benchmark/uadk_benchmark.c benchmark/uadk_benchmark.h \ + benchmark/sec_uadk_benchmark.c benchmark/sec_uadk_benchmark.h \ + benchmark/sec_wd_benchmark.c benchmark/sec_wd_benchmark.h if WD_STATIC_DRV AM_CFLAGS+=-Bstatic @@ -27,7 +30,7 @@ uadk_tool_LDFLAGS=-Wl,-rpath,'/usr/local/lib' if WITH_OPENSSL_DIR AM_CFLAGS+= -DWITH_OPENSSL_DIR -I$(with_openssl_dir)/include -uadk_tool_SOURCES+=sec_soft_benchmark.c +uadk_tool_SOURCES+=benchmark/sec_soft_benchmark.c benchmark/sec_soft_benchmark.h if WD_STATIC_DRV uadk_tool_LDADD+= $(with_openssl_dir)/libcrypto.a diff --git a/uadk_tool/sec_soft_benchmark.c b/uadk_tool/benchmark/sec_soft_benchmark.c similarity index 100% rename from uadk_tool/sec_soft_benchmark.c rename to uadk_tool/benchmark/sec_soft_benchmark.c diff --git a/uadk_tool/sec_soft_benchmark.h b/uadk_tool/benchmark/sec_soft_benchmark.h similarity index 100% rename from uadk_tool/sec_soft_benchmark.h rename to uadk_tool/benchmark/sec_soft_benchmark.h diff --git a/uadk_tool/sec_uadk_benchmark.c b/uadk_tool/benchmark/sec_uadk_benchmark.c similarity index 100% rename from uadk_tool/sec_uadk_benchmark.c rename to uadk_tool/benchmark/sec_uadk_benchmark.c diff --git a/uadk_tool/sec_uadk_benchmark.h b/uadk_tool/benchmark/sec_uadk_benchmark.h similarity index 100% rename from uadk_tool/sec_uadk_benchmark.h rename to uadk_tool/benchmark/sec_uadk_benchmark.h diff --git a/uadk_tool/sec_wd_benchmark.c b/uadk_tool/benchmark/sec_wd_benchmark.c similarity index 100% rename from uadk_tool/sec_wd_benchmark.c rename to uadk_tool/benchmark/sec_wd_benchmark.c diff --git a/uadk_tool/sec_wd_benchmark.h b/uadk_tool/benchmark/sec_wd_benchmark.h similarity index 100% rename from uadk_tool/sec_wd_benchmark.h rename to uadk_tool/benchmark/sec_wd_benchmark.h diff --git a/uadk_tool/uadk_benchmark.c b/uadk_tool/benchmark/uadk_benchmark.c similarity index 99% rename from uadk_tool/uadk_benchmark.c rename to uadk_tool/benchmark/uadk_benchmark.c index 8c3c96f..84941d5 100644 --- a/uadk_tool/uadk_benchmark.c +++ b/uadk_tool/benchmark/uadk_benchmark.c @@ -567,7 +567,7 @@ static void print_help(void) ACC_TST_PRT("UPDATE:2021-7-28\n"); } -void benchmark_cmd_parse(int argc, char *argv[], struct acc_option *option) +int acc_cmd_parse(int argc, char *argv[], struct acc_option *option) { int option_index = 0; int c; @@ -638,6 +638,7 @@ void benchmark_cmd_parse(int argc, char *argv[], struct acc_option *option) exit(-1); } } + return 0; } int acc_option_convert(struct acc_option *option) diff --git a/uadk_tool/uadk_benchmark.h b/uadk_tool/benchmark/uadk_benchmark.h similarity index 97% rename from uadk_tool/uadk_benchmark.h rename to uadk_tool/benchmark/uadk_benchmark.h index 7ce0426..2cb3dc0 100644 --- a/uadk_tool/uadk_benchmark.h +++ b/uadk_tool/benchmark/uadk_benchmark.h @@ -170,7 +170,7 @@ extern void add_recv_data(u32 cnt); extern void add_send_complete(void); extern u32 get_recv_time(void); -void benchmark_cmd_parse(int argc, char *argv[], struct acc_option *option); +int acc_cmd_parse(int argc, char *argv[], struct acc_option *option); int acc_default_case(struct acc_option *option); int acc_option_convert(struct acc_option *option); int acc_benchmark_run(struct acc_option *option); diff --git a/uadk_tool/dfx/uadk_dfx.c b/uadk_tool/dfx/uadk_dfx.c new file mode 100644 index 0000000..796135a --- /dev/null +++ b/uadk_tool/dfx/uadk_dfx.c @@ -0,0 +1,253 @@ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include <stdbool.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <time.h> +#include <getopt.h> +#include <unistd.h> +#include <limits.h> +#include <sys/ipc.h> +#include <sys/shm.h> + +#include "include/wd.h" +#include "uadk_dfx.h" + +#define uadk_build_date() printf("built on: %s %s\n", __DATE__, __TIME__) +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#define PRIVILEGE_FLAG 666 + +struct uadk_env_var { + const char *module; + const char *alg; + const char *ctx_num_var; + const char *epoll_en_var; +}; + +struct uadk_env_table { + int sync_ctx_num; + int sync_numa; + int async_ctx_num; + int async_numa; + int poll_en; +}; + +enum dfx_op_type { + DISPLAY_VERSION = 2, + DISPLAY_DATE, + DISPLAY_DIR, + DISPLAY_ENV, + DISPLAY_COUNT, + DISPLAY_HELP, +}; + +const char *uadk_modules[] = {"sec", "hpre", "zip"}; + +const struct uadk_env_var env_vars[] = { + {.module = "sec", .alg = "CIPHER", .ctx_num_var = "WD_CIPHER_CTX_NUM", + .epoll_en_var = "WD_CIPHER_EPOLL_EN"}, + {.module = "sec", .alg = "AEAD", .ctx_num_var = "WD_AEAD_CTX_NUM", + .epoll_en_var = "WD_AEAD_EPOLL_EN"}, + {.module = "sec", .alg = "DIGEST", .ctx_num_var = "WD_DIGEST_CTX_NUM", + .epoll_en_var = "WD_DIGEST_EPOLL_EN"}, + {.module = "hpre", .alg = "DH", .ctx_num_var = "WD_DH_CTX_NUM", + .epoll_en_var = "WD_DH_EPOLL_EN"}, + {.module = "hpre", .alg = "RSA", .ctx_num_var = "WD_RSA_CTX_NUM", + .epoll_en_var = "WD_RSA_EPOLL_EN"}, + {.module = "hpre", .alg = "ECC", .ctx_num_var = "WD_ECC_CTX_NUM", + .epoll_en_var = "WD_ECC_EPOLL_EN"}, + {.module = "zip", .alg = "COMP", .ctx_num_var = "WD_COMP_CTX_NUM", + .epoll_en_var = "WD_COMP_EPOLL_EN"}, +}; + +static void dump_ctx_count(unsigned long *count) +{ + __u32 idx = 0; + int i; + + if (!count) + return; + + printf("displays the ctx counter value...\n"); + for (i = 0; i < WD_CTX_CNT_NUM; i++) { + if (count[i]) { + printf("ctx-[%d]:%lu \t", i, count[i]); + idx++; + } else { + continue; + } + + if ((idx & 0x3) == 0) + printf("\n"); + } + printf("\n"); +} + +static int get_shared_id(void) +{ + int shm; + + shm = shmget(WD_IPC_KEY, sizeof(unsigned long) * WD_CTX_CNT_NUM, + IPC_CREAT | PRIVILEGE_FLAG); + if (shm < 0) { + printf("failed to get the shared memory id.\n"); + return -EINVAL; + } + + return shm; +} + +static int uadk_shared_read(void) +{ + unsigned long *shared; + void *ptr; + int shm; + + shm = get_shared_id(); + if (shm < 0) + return -EINVAL; + + ptr = (int *)shmat(shm, NULL, 0); + if (ptr < 0) { + printf("failed to get the shared memory addr.\n"); + return -EINVAL; + } + + shared = (unsigned long *)ptr; + + printf("get the shared memory addr successful.\n"); + dump_ctx_count(shared); + + shmdt(ptr); + + return 0; +} + +bool uadk_check_module(const char *module) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(uadk_modules); i++) { + if (!strncmp(module, uadk_modules[i], strlen(module))) + return true; + } + + return false; +} + +static void uadk_ctx_env_config(const char *s) +{ + char *env_setion; + + if (!s) { + printf("input ctx env config is NULL.\n"); + return; + } + + env_setion = getenv(s); + if (!env_setion) { + printf("not found the %s env config!\n", s); + return; + } + + printf("%s=%s\n", s, env_setion); +} + +static void uadk_parse_env_config(const char *module) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(env_vars); i++) { + if (!strncmp(module, env_vars[i].module, strlen(module))) { + uadk_ctx_env_config(env_vars[i].ctx_num_var); + uadk_ctx_env_config(env_vars[i].epoll_en_var); + } + } +} + +static void uadk_exe_path(void) +{ + char dir[PATH_MAX] = {0}; + int n; + + n = readlink("/proc/self/exe", dir, PATH_MAX); + if (n < 0 || n >= PATH_MAX) + printf("uadk tool failed to get the exe path.\n"); + + dir[PATH_MAX - 1] = '\0'; + printf("exe path: %s\n", dir); +} + +void print_dfx_help(void) +{ + printf("NAME\n"); + printf(" uadk_tool dfx : uadk library dfx function, etc\n"); + printf("USAGE\n"); + printf(" uadk_tool dfx [--version] = Show library version\n"); + printf(" uadk_tool dfx [--date] = Show build date\n"); + printf(" uadk_tool dfx [--dir] = Show library dir\n"); + printf(" uadk_tool dfx [--env] = Show environment variables\n"); + printf(" uadk_tool dfx [--count] = Show the ctx message count\n"); + printf(" uadk_tool dfx [--help] = usage\n"); + printf("Example\n"); + printf(" uadk_tool dfx --version\n"); + printf(" uadk_tool dfx --env sec\n"); + printf(" uadk_tool dfx --count\n"); +} + +void dfx_cmd_parse(int argc, char *argv[]) +{ + bool check_module = false; + char *input_module = NULL; + int option_index = 0; + int opt; + + static struct option long_options[] = { + {"version", no_argument, 0, 2}, + {"date", no_argument, 0, 3}, + {"dir", no_argument, 0, 4}, + {"env", required_argument, 0, 5}, + {"count", no_argument, 0, 6}, + {"help", no_argument, 0, 7}, + {0, 0, 0, 0} + }; + + while (1) { + opt = getopt_long(argc, argv, "", long_options, &option_index); + if (opt == -1) + break; + + switch (opt) { + case DISPLAY_VERSION: + wd_get_version(); + break; + case DISPLAY_DATE: + uadk_build_date(); + break; + case DISPLAY_DIR: + uadk_exe_path(); + break; + case DISPLAY_ENV: + input_module = optarg; + check_module = uadk_check_module(input_module); + if (check_module) { + uadk_parse_env_config(input_module); + } else { + print_dfx_help(); + printf("failed to parse module parameter!\n"); + } + break; + case DISPLAY_COUNT: + uadk_shared_read(); + break; + case DISPLAY_HELP: + print_dfx_help(); + break; + default: + printf("bad input parameter, exit!\n"); + print_dfx_help(); + break; + } + } +} diff --git a/uadk_tool/uadk_dfx.h b/uadk_tool/dfx/uadk_dfx.h similarity index 59% rename from uadk_tool/uadk_dfx.h rename to uadk_tool/dfx/uadk_dfx.h index 5f5d9e7..8dc1da1 100644 --- a/uadk_tool/uadk_dfx.h +++ b/uadk_tool/dfx/uadk_dfx.h @@ -2,9 +2,6 @@ #ifndef UADK_DFX_H #define UADK_DFX_H -#define UADK_VERSION_TEXT "UADK 2.3.22, Released Dec 20th, 2021" -#define UADK_VERSION_TAG "4b9c69d" - void print_dfx_help(void); void dfx_cmd_parse(int argc, char *argv[]); #endif diff --git a/uadk_tool/uadk_dfx.c b/uadk_tool/uadk_dfx.c deleted file mode 100644 index 96c4919..0000000 --- a/uadk_tool/uadk_dfx.c +++ /dev/null @@ -1,79 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <time.h> -#include <getopt.h> -#include <unistd.h> -#include <limits.h> -#include "uadk_dfx.h" - -#define print_date() printf("built on: %s %s\n", __DATE__, __TIME__) - -static void print_version(void) -{ - printf("%s\n", UADK_VERSION_TEXT); - printf("%s\n", UADK_VERSION_TAG); -} - -static void print_exe_path(void) -{ - char dir[PATH_MAX] = {0}; - int n; - - n = readlink("/proc/self/exe", dir, PATH_MAX); - if (n < 0 || n >= PATH_MAX) - printf("uadk tool failed to get the exe path.\n"); - - printf("exe path: %s\n", dir); -} - -void print_dfx_help(void) -{ - printf("NAME\n"); - printf(" uadk_tool --dfx : uadk library dfx function, etc\n"); - printf("USAGE\n"); - printf(" uadk_tool --dfx [--version] = Show library version\n"); - printf(" uadk_tool --dfx [--date] = Show build date\n"); - printf(" uadk_tool --dfx [--dir] = Show library dir\n"); - printf(" uadk_tool --dfx [--help] = usage\n"); -} - -void dfx_cmd_parse(int argc, char *argv[]) -{ - int option_index = 0; - int c; - - static struct option long_options[] = { - {"version", no_argument, 0, 2}, - {"date", no_argument, 0, 3}, - {"dir", no_argument, 0, 4}, - {"help", no_argument, 0, 5}, - {0, 0, 0, 0} - }; - - while (1) { - c = getopt_long(argc, argv, "", long_options, &option_index); - if (c == -1) - break; - - switch (c) { - case 2: - print_version(); - break; - case 3: - print_date(); - break; - case 4: - print_exe_path(); - break; - case 5: - print_dfx_help(); - break; - default: - printf("bad input parameter, exit\n"); - exit(-1); - } - } -} diff --git a/uadk_tool/uadk_tool.c b/uadk_tool/uadk_tool.c index 88beeba..ce83d7a 100644 --- a/uadk_tool/uadk_tool.c +++ b/uadk_tool/uadk_tool.c @@ -1,12 +1,9 @@ /* SPDX-License-Identifier: Apache-2.0 */ #include <stdio.h> -#include <stdlib.h> #include <string.h> -#include <time.h> -#include <limits.h> -#include "uadk_dfx.h" -#include "uadk_benchmark.h" +#include "dfx/uadk_dfx.h" +#include "benchmark/uadk_benchmark.h" static void print_tool_help(void) { @@ -18,17 +15,21 @@ static void print_tool_help(void) int main(int argc, char **argv) { struct acc_option option = {0}; + int index = 1; int ret; - if (argc > 1) { - if (!strcmp("dfx", argv[1])) { + if (argc > index) { + if (!strcmp("dfx", argv[index])) { dfx_cmd_parse(argc, argv); - } else if (!strcmp("benchmark", argv[1])) { + } else if (!strcmp("benchmark", argv[index])) { printf("start UADK benchmark test.\n"); - if (!argv[2]) + if (!argv[++index]) acc_default_case(&option); - benchmark_cmd_parse(argc, argv, &option); + ret = acc_cmd_parse(argc, argv, &option); + if (ret) + return ret; + ret = acc_option_convert(&option); if (ret) return ret; diff --git a/wd.c b/wd.c index 3ce9c1e..2dbb2ab 100644 --- a/wd.c +++ b/wd.c @@ -14,6 +14,7 @@ #include <string.h> #include <sys/ioctl.h> #include <sys/mman.h> +#include <sys/stat.h> #include <numa.h> #include <sched.h> @@ -22,7 +23,14 @@ #define SYS_CLASS_DIR "/sys/class/uacce" -const char *WD_VERSION = UADK_VERSION_NUMBER; +enum UADK_LOG_LEVEL { + LOG_NONE = 0, + WD_LOG_ERROR, + WD_LOG_INFO, + WD_LOG_DEBUG, +}; + +static int uadk_log_level; struct wd_ctx_h { int fd; @@ -35,6 +43,54 @@ struct wd_ctx_h { void *priv; }; +static void wd_parse_log_level(void) +{ + const char *syslog_file = "/etc/rsyslog.conf"; + const char *log_dir = "/var/log/uadk.log"; + bool log_debug = false; + bool log_info = false; + struct stat file_info; + char *file_contents; + FILE *in_file; + + in_file = fopen(syslog_file, "r"); + if (!in_file) { + WD_ERR("failed to open the rsyslog.conf file.\n"); + return; + } + + if (stat(syslog_file, &file_info) == -1) { + WD_ERR("failed to get file information.\n"); + goto close_file; + } + + file_contents = malloc(file_info.st_size); + if (!file_contents) { + WD_ERR("failed to get file contents memory.\n"); + goto close_file; + } + + while (fscanf(in_file, "%[^\n ] ", file_contents) != EOF) { + if (!strcmp("local5.debug", file_contents)) + log_debug = true; + else if (!strcmp("local5.info", file_contents)) + log_info = true; + + if (log_debug && !strcmp(log_dir, file_contents)) { + uadk_log_level = WD_LOG_DEBUG; + break; + } else if (log_info && !strcmp(log_dir, file_contents)) { + uadk_log_level = WD_LOG_INFO; + break; + } + } + + free(file_contents); + +close_file: + fclose(in_file); +} + static int get_raw_attr(const char *dev_root, const char *attr, char *buf, size_t sz) { @@ -189,6 +245,8 @@ static struct uacce_dev *read_uacce_sysfs(const char *dev_name) if (!dev_name) return NULL; + wd_parse_log_level(); + dev = calloc(1, sizeof(struct uacce_dev)); if (!dev) return NULL; @@ -731,3 +789,22 @@ int wd_ctx_set_io_cmd(handle_t h_ctx, unsigned long cmd, void *arg) return ioctl(ctx->fd, cmd, arg); } + +void wd_get_version(void) +{ + const char *wd_released_time = UADK_RELEASED_TIME; + const char *wd_version = UADK_VERSION_NUMBER; + + WD_CONSOLE("%s\n", wd_version); + WD_CONSOLE("%s\n", wd_released_time); +} + +bool wd_need_debug(void) +{ + return uadk_log_level >= WD_LOG_DEBUG; +} + +bool wd_need_info(void) +{ + return uadk_log_level >= WD_LOG_INFO; +} diff --git a/wd_aead.c b/wd_aead.c index 7c07271..d43ace1 100644 --- a/wd_aead.c +++ b/wd_aead.c @@ -413,7 +413,7 @@ int wd_aead_init(struct wd_ctx_config *config, struct wd_sched *sched) wd_aead_set_static_drv(); #endif - /* init sync request pool */ + /* init async request pool */ ret = wd_init_async_request_pool(&wd_aead_setting.pool, config->ctx_num, WD_POOL_MAX_ENTRIES, sizeof(struct wd_aead_msg)); @@ -531,6 +531,7 @@ int wd_do_aead_sync(handle_t h_sess, struct wd_aead_req *req) if (unlikely(ret)) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; ret = send_recv_sync(ctx, &msg); req->state = msg.result; @@ -563,6 +564,7 @@ int wd_do_aead_async(handle_t h_sess, struct wd_aead_req *req) if (ret) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; msg_id = wd_get_msg_from_pool(&wd_aead_setting.pool, @@ -594,6 +596,11 @@ fail_with_msg: return ret; } +struct wd_aead_msg *wd_aead_get_msg(__u32 idx, __u32 tag) +{ + return wd_find_msg_in_pool(&wd_aead_setting.pool, idx, tag); +} + int wd_aead_poll_ctx(__u32 idx, __u32 expt, __u32 *count) { struct wd_ctx_config_internal *config = &wd_aead_setting.config; diff --git a/wd_cipher.c b/wd_cipher.c index a7e393b..3d00598 100644 --- a/wd_cipher.c +++ b/wd_cipher.c @@ -442,7 +442,9 @@ int wd_do_cipher_sync(handle_t h_sess, struct wd_cipher_req *req) if (unlikely(ret)) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; + ret = send_recv_sync(ctx, &msg); req->state = msg.result; @@ -472,6 +474,7 @@ int wd_do_cipher_async(handle_t h_sess, struct wd_cipher_req *req) return ret; ctx = config->ctxs + idx; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); msg_id = wd_get_msg_from_pool(&wd_cipher_setting.pool, idx, (void **)&msg); @@ -502,6 +505,11 @@ fail_with_msg: return ret; } +struct wd_cipher_msg *wd_cipher_get_msg(__u32 idx, __u32 tag) +{ + return wd_find_msg_in_pool(&wd_cipher_setting.pool, idx, tag); +} + int wd_cipher_poll_ctx(__u32 idx, __u32 expt, __u32 *count) { struct wd_ctx_config_internal *config = &wd_cipher_setting.config; diff --git a/wd_comp.c b/wd_comp.c index 9107d60..eacebd3 100644 --- a/wd_comp.c +++ b/wd_comp.c @@ -406,6 +406,7 @@ static int wd_comp_sync_job(struct wd_comp_sess *sess, if (unlikely(ret)) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; msg_handle.send = wd_comp_setting.driver->comp_send; @@ -656,6 +657,7 @@ int wd_do_comp_async(handle_t h_sess, struct wd_comp_req *req) if (unlikely(ret)) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; tag = wd_get_msg_from_pool(&wd_comp_setting.pool, idx, (void **)&msg); diff --git a/wd_dh.c b/wd_dh.c index 9571ab6..cfe294d 100644 --- a/wd_dh.c +++ b/wd_dh.c @@ -212,6 +212,7 @@ int wd_do_dh_sync(handle_t sess, struct wd_dh_req *req) if (ret) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; memset(&msg, 0, sizeof(struct wd_dh_msg)); @@ -257,6 +258,7 @@ int wd_do_dh_async(handle_t sess, struct wd_dh_req *req) if (ret) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; mid = wd_get_msg_from_pool(&wd_dh_setting.pool, idx, (void **)&msg); @@ -288,6 +290,11 @@ fail_with_msg: return ret; } +struct wd_dh_msg *wd_dh_get_msg(__u32 idx, __u32 tag) +{ + return wd_find_msg_in_pool(&wd_dh_setting.pool, idx, tag); +} + int wd_dh_poll_ctx(__u32 idx, __u32 expt, __u32 *count) { struct wd_ctx_config_internal *config = &wd_dh_setting.config; diff --git a/wd_digest.c b/wd_digest.c index 0fff7c8..43b4bc5 100644 --- a/wd_digest.c +++ b/wd_digest.c @@ -340,6 +340,7 @@ int wd_do_digest_sync(handle_t h_sess, struct wd_digest_req *req) if (unlikely(ret)) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; ret = send_recv_sync(ctx, dsess, &msg); req->state = msg.result; @@ -372,6 +373,7 @@ int wd_do_digest_async(handle_t h_sess, struct wd_digest_req *req) if (ret) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; msg_id = wd_get_msg_from_pool(&wd_digest_setting.pool, idx, @@ -403,6 +405,11 @@ fail_with_msg: return ret; } +struct wd_digest_msg *wd_digest_get_msg(__u32 idx, __u32 tag) +{ + return wd_find_msg_in_pool(&wd_digest_setting.pool, idx, tag); +} + int wd_digest_poll_ctx(__u32 idx, __u32 expt, __u32 *count) { struct wd_ctx_config_internal *config = &wd_digest_setting.config; diff --git a/wd_ecc.c b/wd_ecc.c index 76c9d5f..9d30607 100644 --- a/wd_ecc.c +++ b/wd_ecc.c @@ -853,14 +853,14 @@ static int fill_user_curve_cfg(struct wd_ecc_curve *param, if (setup->cv.type == WD_CV_CFG_ID) { curve_id = setup->cv.cfg.id; ret = fill_param_by_id(param, setup->key_bits, curve_id); - dbg("set curve id %u!\n", curve_id); + WD_DEBUG("set curve id %u!\n", curve_id); } else if (setup->cv.type == WD_CV_CFG_PARAM) { ret = set_key_cv(param, src_param); if (ret) { WD_ERR("failed to set key cv!\n"); return ret; } - dbg("set curve by user param!\n"); + WD_DEBUG("set curve by user param!\n"); } else { WD_ERR("invalid: fill curve cfg type %u is error!\n", setup->cv.type); return -WD_EINVAL; @@ -1407,6 +1407,7 @@ int wd_do_ecc_sync(handle_t h_sess, struct wd_ecc_req *req) if (ret) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; memset(&msg, 0, sizeof(struct wd_ecc_msg)); @@ -2086,6 +2087,7 @@ int wd_do_ecc_async(handle_t sess, struct wd_ecc_req *req) if (ret) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; mid = wd_get_msg_from_pool(&wd_ecc_setting.pool, idx, (void **)&msg); @@ -2116,6 +2118,11 @@ fail_with_msg: return ret; } +struct wd_ecc_msg *wd_ecc_get_msg(__u32 idx, __u32 tag) +{ + return wd_find_msg_in_pool(&wd_ecc_setting.pool, idx, tag); +} + int wd_ecc_poll_ctx(__u32 idx, __u32 expt, __u32 *count) { struct wd_ctx_config_internal *config = &wd_ecc_setting.config; diff --git a/wd_rsa.c b/wd_rsa.c index 868e78b..d65b01d 100644 --- a/wd_rsa.c +++ b/wd_rsa.c @@ -272,6 +272,7 @@ int wd_do_rsa_sync(handle_t h_sess, struct wd_rsa_req *req) if (ret) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; memset(&msg, 0, sizeof(struct wd_rsa_msg)); @@ -317,6 +318,7 @@ int wd_do_rsa_async(handle_t sess, struct wd_rsa_req *req) if (ret) return ret; + wd_dfx_msg_cnt(config->msg_cnt, WD_CTX_CNT_NUM, idx); ctx = config->ctxs + idx; mid = wd_get_msg_from_pool(&wd_rsa_setting.pool, idx, (void **)&msg); @@ -347,6 +349,11 @@ fail_with_msg: return ret; } +struct wd_rsa_msg *wd_rsa_get_msg(__u32 idx, __u32 tag) +{ + return wd_find_msg_in_pool(&wd_rsa_setting.pool, idx, tag); +} + int wd_rsa_poll_ctx(__u32 idx, __u32 expt, __u32 *count) { struct wd_ctx_config_internal *config = &wd_rsa_setting.config; diff --git a/wd_util.c b/wd_util.c index de77d1e..04a2a5b 100644 --- a/wd_util.c +++ b/wd_util.c @@ -20,6 +20,7 @@ #define WD_BALANCE_THRHD 1280 #define WD_RECV_MAX_CNT_SLEEP 60000000 #define WD_RECV_MAX_CNT_NOSLEEP 200000000 +#define PRIVILEGE_FLAG 600 struct msg_pool { /* message array allocated dynamically */ @@ -70,11 +71,76 @@ static void clone_ctx_to_internal(struct wd_ctx *ctx, ctx_in->ctx_mode = ctx->ctx_mode; } +static int get_shared_memory_id(__u32 numsize) +{ + int shm; + + shm = shmget(WD_IPC_KEY, sizeof(unsigned long) * numsize, + IPC_CREAT | PRIVILEGE_FLAG); + if (shm < 0) { + WD_ERR("failed to get shared memory id.\n"); + return -WD_EINVAL; + } + + return shm; +} + +static unsigned long *wd_shared_create(__u32 numsize) +{ + bool need_info = wd_need_info(); + void *ptr; + int shm; + + if (!need_info) + return NULL; + + if (numsize > WD_CTX_CNT_NUM) { + WD_ERR("invalid: input parameter is err!\n"); + return NULL; + } + + shm = get_shared_memory_id(numsize); + if (shm < 0) + return NULL; + + ptr = shmat(shm, NULL, 0); + if (ptr == (void *)-1) { + WD_ERR("failed to get shared memory addr.\n"); + return NULL; + } + + memset(ptr, 0, sizeof(unsigned long) * numsize); + + return ptr; +} + +static void wd_shared_delete(__u32 numsize) +{ + bool need_info = wd_need_info(); + int shm; + + if (!need_info) + return; + + if (numsize > WD_CTX_CNT_NUM) { + WD_ERR("invalid: input parameter is err!\n"); + return; + } + + shm = get_shared_memory_id(numsize); + if (shm < 0) + return; + + /* deleted shared memory */ + shmctl(shm, IPC_RMID, NULL); +} + int wd_init_ctx_config(struct wd_ctx_config_internal *in, struct wd_ctx_config *cfg) { + bool need_info = wd_need_info(); struct wd_ctx_internal *ctxs; - int i, ret; + int i, j, ret; if (!cfg->ctx_num) { WD_ERR("invalid: ctx_num is 0!\n"); @@ -87,25 +153,29 @@ int wd_init_ctx_config(struct wd_ctx_config_internal *in, return -WD_EEXIST; } + in->msg_cnt = wd_shared_create(WD_CTX_CNT_NUM); + if (!in->msg_cnt && need_info) + return -WD_EINVAL; + ctxs = calloc(1, cfg->ctx_num * sizeof(struct wd_ctx_internal)); if (!ctxs) { WD_ERR("failed to alloc memory for internal ctxs!\n"); + wd_shared_delete(WD_CTX_CNT_NUM); return -WD_ENOMEM; } for (i = 0; i < cfg->ctx_num; i++) { if (!cfg->ctxs[i].ctx) { WD_ERR("invalid: ctx is NULL!\n"); - free(ctxs); - return -WD_EINVAL; + ret = -WD_EINVAL; + goto err_out; } clone_ctx_to_internal(cfg->ctxs + i, ctxs + i); ret = pthread_spin_init(&ctxs[i].lock, PTHREAD_PROCESS_SHARED); if (ret) { WD_ERR("failed to init ctxs lock!\n"); - free(ctxs); - return ret; + goto err_out; } } @@ -115,6 +185,14 @@ int wd_init_ctx_config(struct wd_ctx_config_internal *in, in->ctx_num = cfg->ctx_num; return 0; + +err_out: + for (j = 0; j < i; j++) + pthread_spin_destroy(&ctxs[j].lock); + + wd_shared_delete(WD_CTX_CNT_NUM); + free(ctxs); + return ret; } int wd_init_sched(struct wd_sched *in, struct wd_sched *from) @@ -161,6 +239,9 @@ void wd_clear_ctx_config(struct wd_ctx_config_internal *in) free(in->ctxs); in->ctxs = NULL; } + + wd_shared_delete(WD_CTX_CNT_NUM); + in->msg_cnt = NULL; } void wd_memset_zero(void *data, __u32 size) -- 2.33.0

1 4

[PATCH] drv/hpre: bugfix about sm2 async parsing error
by Zhiqi Song 21 Jun '22

21 Jun '22

After a series of modification, the 'hw_msg->low_tag' is used to represent the sequence of sync or async task element now. In async mode, the value of 'hw_msg->low_tag' comes from async task pool, refers to wd_get_msg_from_pool(). In sync mode, the value of 'hw_msg->low_tag' is a random number, refers to hisi_set_msg_id(). Therefore, whether 'hw_msg->low_tag' is zero cannot be used as the judgment condition for different modes, so 'hw_msg->low_tag' cannot be set to zero directly. This is the reason why the async task of sm2 failed. To fix this problem, we remove the operation of setting tag to zero, use 'qp_mode' to distinguish between sync and async modes. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- drv/hisi_hpre.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drv/hisi_hpre.c b/drv/hisi_hpre.c index 5d6e537..116097d 100644 --- a/drv/hisi_hpre.c +++ b/drv/hisi_hpre.c @@ -827,7 +827,6 @@ static int ecc_prepare_alg(struct wd_ecc_msg *msg, return 0; } - static int trans_cv_param_to_hpre_bin(struct wd_dtb *p, struct wd_dtb *a, struct wd_dtb *b, struct wd_dtb *n, struct wd_ecc_point *g) @@ -1942,13 +1941,12 @@ static int sm2_enc_out_transfer(struct wd_ecc_msg *msg, } static int ecc_out_transfer(struct wd_ecc_msg *msg, - struct hisi_hpre_sqe *hw_msg) + struct hisi_hpre_sqe *hw_msg, __u8 qp_mode) { int ret = -WD_EINVAL; void *va; - /* async */ - if (LW_U16(hw_msg->low_tag)) { + if (qp_mode == CTX_MODE_ASYNC) { va = VA_ADDR(hw_msg->hi_out, hw_msg->low_out); msg->req.dst = container_of(va, struct wd_ecc_out, data); } @@ -2240,7 +2238,8 @@ static int sm2_convert_dec_out(struct wd_ecc_msg *src, return ret; } -static int ecc_sqe_parse(struct hisi_qp *qp, struct wd_ecc_msg *msg, struct hisi_hpre_sqe *hw_msg) +static int ecc_sqe_parse(struct hisi_qp *qp, struct wd_ecc_msg *msg, + struct hisi_hpre_sqe *hw_msg) { struct wd_ecc_msg *temp_msg; __u64 tag; @@ -2262,7 +2261,7 @@ static int ecc_sqe_parse(struct hisi_qp *qp, struct wd_ecc_msg *msg, struct hisi hpre_result_check(hw_msg, &msg->result); if (!msg->result) { - ret = ecc_out_transfer(msg, hw_msg); + ret = ecc_out_transfer(msg, hw_msg, qp->q_info.qp_mode); if (ret) { msg->result = WD_OUT_EPARA; WD_ERR("failed to transfer out ecc BD, ret = %d!\n", ret); @@ -2306,7 +2305,7 @@ static int parse_second_sqe(handle_t h_qp, hsz = (hw_msg.task_len1 + 1) * BYTE_BITS; dst = *(struct wd_ecc_msg **)((uintptr_t)data + hsz * ECDH_OUT_PARAM_NUM); - hw_msg.low_tag = 0; /* use sync mode */ + ret = ecc_sqe_parse((struct hisi_qp *)h_qp, dst, &hw_msg); msg->result = dst->result; *second = dst; @@ -2325,6 +2324,7 @@ static int sm2_enc_parse(handle_t h_qp, __u32 hsz; int ret; + msg->tag = tag; data = VA_ADDR(hw_msg->hi_out, hw_msg->low_out); hsz = (hw_msg->task_len1 + 1) * BYTE_BITS; first = *(struct wd_ecc_msg **)((uintptr_t)data + @@ -2332,7 +2332,6 @@ static int sm2_enc_parse(handle_t h_qp, memcpy(&src, first + 1, sizeof(src)); /* parse first sqe */ - hw_msg->low_tag = 0; /* use sync mode */ ret = ecc_sqe_parse((struct hisi_qp *)h_qp, first, hw_msg); if (ret) { WD_ERR("failed to parse first BD, ret = %d!\n", ret); @@ -2351,11 +2350,12 @@ static int sm2_enc_parse(handle_t h_qp, WD_ERR("failed to convert sm2 std format, ret = %d!\n", ret); goto free_second; } + free_second: free_req(second); free_first: free_req(first); - msg->tag = tag; + return ret; } @@ -2376,21 +2376,21 @@ static int sm2_dec_parse(handle_t ctx, struct wd_ecc_msg *msg, memcpy(&src, dst + 1, sizeof(src)); /* parse first sqe */ - hw_msg->low_tag = 0; /* use sync mode */ ret = ecc_sqe_parse((struct hisi_qp *)ctx, dst, hw_msg); if (ret) { WD_ERR("failed to parse decode BD, ret = %d!\n", ret); goto fail; } msg->result = dst->result; + msg->tag = tag; ret = sm2_convert_dec_out(&src, dst); if (unlikely(ret)) { WD_ERR("failed to convert sm2 decode out, ret = %d!\n", ret); goto fail; } + fail: - msg->tag = tag; free(dst->req.dst); free(dst); -- 2.30.0

1 2

sig-AccLib UADK周例会
by openEuler conference 31 May '22

31 May '22

您好！ sig-AccLib SIG 邀请您参加 2022-06-01 11:00 召开的Zoom会议会议主题：sig-AccLib UADK周例会会议内容： zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论会议链接：https://us06web.zoom.us/j/82764528356?pwd=WWZ0eUEzdDQ4OUR6RURqOEJheTJyQT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-06-01 11:00, The subject of the conference is sig-AccLib UADK周例会, Summary: zoom会议，ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 1.进展讨论 2.自由讨论 You can join the meeting at https://us06web.zoom.us/j/82764528356?pwd=WWZ0eUEzdDQ4OUR6RURqOEJheTJyQT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

[PATCH 0/9] uadk: some misc fixes
by Weili Qian 31 May '22

31 May '22

These patches move some redundant codes to wd_utils from wd_<alg>.c, and remove the unnecessary locks in wd_<alg>.c. Weili Qian (9): uadk: move parameter check into wd_util.c comp: remove unused variable priv dh: remove the lock in async send ecc: remove the lock in async send funciton comp: remove the lock in async send dh: remove repeated send BD ecc: remove repeated send BD rsa: remove repeated send BD uadk: move send and recv code into wd_util.c drv/hisi_comp.c | 7 +-- drv/hisi_hpre.c | 18 ++++--- drv/hisi_sec.c | 44 +++++++++------ include/drv/wd_aead_drv.h | 4 +- include/drv/wd_cipher_drv.h | 4 +- include/drv/wd_comp_drv.h | 4 +- include/drv/wd_dh_drv.h | 4 +- include/drv/wd_digest_drv.h | 4 +- include/drv/wd_ecc_drv.h | 4 +- include/drv/wd_rsa_drv.h | 4 +- include/wd_util.h | 26 +++++++++ wd_aead.c | 52 +++--------------- wd_cipher.c | 53 +++--------------- wd_comp.c | 62 ++++----------------- wd_dh.c | 104 ++++++----------------------------- wd_digest.c | 62 +++++---------------- wd_ecc.c | 105 +++++++----------------------------- wd_rsa.c | 104 +++++++---------------------------- wd_util.c | 67 +++++++++++++++++++++++ 19 files changed, 244 insertions(+), 488 deletions(-) -- 2.33.0

1 9

[PATCH v2 0/3] Add uadk compression and crypto PMD
by Zhangfei Gao 26 May '22

26 May '22

UADK compression PMD provides poll mode compression & decompression driver UADK crypto PMD provides poll mode driver All cryptography operations are using UADK crypto API. All compression operations are using UADK compress API. Hardware accelerators using UADK are supposed to be supported. Code put in https://github.com/Linaro/dpdk/tree/21.11-uadk-upstream-v2 v2: change to sudo dpdk-test --vdev=compress_uadk sudo dpdk-test --vdev=crypto_uadk Assume same properties are using in different platforms. Will introduce platform info later when required from sudo dpdk-test --vdev=0000:75:00.0 sudo dpdk-test --vdev=0000:76:00.0 v1: Target to DPDK 22.11 Rebased on http://git.dpdk.org/next/dpdk-next-crypto/ Suggested from Akhil Goyal <gakhil(a)marvell.com> > Current release cycle is DPDK-22.07 for which this patchset is late. > As we had the V1 deadline last month. > This patchset can go for next release cycle which is 22.11. Zhangfei Gao (3): compress/uadk: add uadk compression PMD test/crypto: add cryptodev_uadk_autotest crypto/uadk: add uadk crypto PMD app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/compressdevs/index.rst | 1 + doc/guides/compressdevs/uadk.rst | 64 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 70 ++ drivers/compress/meson.build | 1 + drivers/compress/uadk/meson.build | 28 + drivers/compress/uadk/uadk_compress_pmd.c | 482 +++++++++ drivers/compress/uadk/version.map | 3 + drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 28 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1134 +++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 14 files changed, 1824 insertions(+) create mode 100644 doc/guides/compressdevs/uadk.rst create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/compress/uadk/meson.build create mode 100644 drivers/compress/uadk/uadk_compress_pmd.c create mode 100644 drivers/compress/uadk/version.map create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.36.1

1 3

[PATCH v1 0/3] Add uadk compression and crypto PMD
by Zhangfei Gao 25 May '22

25 May '22

Supported hardware platforms: HiSilicon Kunpeng920 and Kunpeng930 The PMD relies on uadk Interface: https://github.com/Linaro/uadk Code put in https://github.com/Linaro/dpdk/tree/21.11-uadk-upstream-v1 v1: Target to DPDK 22.11 Rebased on http://git.dpdk.org/next/dpdk-next-crypto/ Suggested from Akhil Goyal <gakhil(a)marvell.com> > Current release cycle is DPDK-22.07 for which this patchset is late. > As we had the V1 deadline last month. > This patchset can go for next release cycle which is 22.11. Zhangfei Gao (3): compress/uadk: add uadk compression PMD test/crypto: add cryptodev_uadk_autotest crypto/uadk: add uadk crypto PMD app/test/test_cryptodev.c | 7 + app/test/test_cryptodev.h | 1 + doc/guides/compressdevs/index.rst | 1 + doc/guides/compressdevs/uadk.rst | 69 ++ doc/guides/cryptodevs/index.rst | 1 + doc/guides/cryptodevs/uadk.rst | 80 ++ drivers/compress/meson.build | 1 + drivers/compress/uadk/meson.build | 28 + drivers/compress/uadk/uadk_compress_pmd.c | 500 +++++++++ drivers/compress/uadk/version.map | 3 + drivers/crypto/meson.build | 1 + drivers/crypto/uadk/meson.build | 36 + drivers/crypto/uadk/uadk_crypto_pmd.c | 1169 +++++++++++++++++++++ drivers/crypto/uadk/version.map | 3 + 14 files changed, 1900 insertions(+) create mode 100644 doc/guides/compressdevs/uadk.rst create mode 100644 doc/guides/cryptodevs/uadk.rst create mode 100644 drivers/compress/uadk/meson.build create mode 100644 drivers/compress/uadk/uadk_compress_pmd.c create mode 100644 drivers/compress/uadk/version.map create mode 100644 drivers/crypto/uadk/meson.build create mode 100644 drivers/crypto/uadk/uadk_crypto_pmd.c create mode 100644 drivers/crypto/uadk/version.map -- 2.36.1

2 6

UADK + MD5 软加速集成设计
by Guodong Xu 24 May '22

24 May '22

Hi, All Attached please find the draft design. Let me know what you think. Thanks. BR, Guodong

3 2

UADK周例会
by openEuler conference 17 May '22

17 May '22

您好！ sig-AccLib SIG 邀请您参加 2022-05-18 11:00 召开的Zoom会议会议主题：UADK周例会会议内容： ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 议题： 1.异步收发线程增加sem机制 2.zlib wrap接口会议链接：https://us06web.zoom.us/j/82890916493?pwd=d2dEaDFXcjQ3aE9xV0JicjVPL3IwQT09 会议纪要：https://etherpad.openeuler.org/p/sig-AccLib-meetings 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the Zoom conference will be held at 2022-05-18 11:00, The subject of the conference is UADK周例会, Summary: ID: 91879279131 固定的会议链接：https://linaro-org.zoom.us/j/91879279131 议题： 1.异步收发线程增加sem机制 2.zlib wrap接口 You can join the meeting at https://us06web.zoom.us/j/82890916493?pwd=d2dEaDFXcjQ3aE9xV0JicjVPL3IwQT09. Add topics at https://etherpad.openeuler.org/p/sig-AccLib-meetings. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

[PATCH 1/2] cipher: adding an iv update to a decryption
by Kai Ye 12 May '22

12 May '22

Adding an iv update to de-crypto method as cbc mode. the dst address should not be changed. So fix it. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- src/uadk_cipher.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/src/uadk_cipher.c b/src/uadk_cipher.c index 8a2c39d..5dd2178 100644 --- a/src/uadk_cipher.c +++ b/src/uadk_cipher.c @@ -764,8 +764,9 @@ static void uadk_cipher_update_priv_ctx(struct cipher_priv_ctx *priv) switch (priv->setup.mode) { case WD_CIPHER_CBC: if (priv->req.op_type == WD_CIPHER_ENCRYPTION) { - priv->req.dst += priv->req.in_bytes; - memcpy(priv->iv, priv->req.dst - iv_bytes, iv_bytes); + memcpy(priv->iv, priv->req.dst + priv->req.in_bytes - iv_bytes, iv_bytes); + } else { + memcpy(priv->iv, priv->req.src + priv->req.in_bytes - iv_bytes, iv_bytes); } break; case WD_CIPHER_OFB: @@ -777,11 +778,9 @@ static void uadk_cipher_update_priv_ctx(struct cipher_priv_ctx *priv) break; case WD_CIPHER_CFB: if (priv->req.op_type == WD_CIPHER_ENCRYPTION) { - priv->req.dst += priv->req.in_bytes; - memcpy(priv->iv, priv->req.dst - iv_bytes, iv_bytes); + memcpy(priv->iv, priv->req.dst + priv->req.in_bytes - iv_bytes, iv_bytes); } else { - priv->req.src += priv->req.in_bytes; - memcpy(priv->iv, priv->req.src - iv_bytes, iv_bytes); + memcpy(priv->iv, priv->req.src + priv->req.in_bytes - iv_bytes, iv_bytes); } break; case WD_CIPHER_CTR: -- 2.33.0

1 1

UADK周例会
by openEuler conference 19 Apr '22

19 Apr '22

您好！ sig-AccLib SIG 邀请您参加 2022-04-20 11:00 召开的ZOOM会议会议主题：UADK周例会会议内容：会议链接：https://linaro-org.zoom.us/j/91879279131 邮件列表：acc(a)openeuler.xn--org,-325fl19d9e1dyuu0lv. 1.需求进展。2.自由讨论。会议链接：https://us06web.zoom.us/j/84784486453?pwd=dzJ2N1BldjcyVUswOGk2cmpvZUhtUT09 温馨提醒：建议接入会议后修改参会人的姓名，也可以使用您在gitee.com的ID 更多资讯尽在：https://openeuler.org/zh/ Hello! openEuler sig-AccLib SIG invites you to attend the ZOOM conference will be held at 2022-04-20 11:00, The subject of the conference is UADK周例会, Summary: 会议链接：https://linaro-org.zoom.us/j/91879279131 邮件列表：acc(a)openeuler.xn--org,-325fl19d9e1dyuu0lv. 1.需求进展。2.自由讨论。 You can join the meeting at https://us06web.zoom.us/j/84784486453?pwd=dzJ2N1BldjcyVUswOGk2cmpvZUhtUT09. Note: You are advised to change the participant name after joining the conference or use your ID at gitee.com. More information: https://openeuler.org/en/

1 0

openEuler ODD SIG-AccLib 会议通知详情 [4月14日上午 10:00-12:00]
by fanghao (A) 13 Apr '22

13 Apr '22

Hello everyone, 4月14日SIG组工作会议会前提醒： sig-AccLib：会议时间：4月14日 10:00-12:00 参会链接： https://us06web.zoom.us/j/82166003143?pwd=UjV5cDkra0xqYXJXazdyMGxiRTIwdz09 文档链接： https://etherpad.openeuler.org/p/openEuler2209-sig-AccLib-ODD 注意事项 1、请确保关键与会人员知悉参会链接，并提前5-10min进场。 2、确保准时结束会议，延后会影响后面SIG工作组会议的召开。 3、会前及时把议题内容更新到etherpad。 4、会中请务必安排人员进行会议纪要，会议纪要需要更新到etherpad。 Thanks, Hao

1 0

[RFC 0/2] UADK/comp add uadk wrapper for zlib
by Yang Shen 06 Apr '22

06 Apr '22

Add uadk wrapper for zlib. And to adapt for zlib, add a new api for wd_comp. Yang Shen (2): uadk/comp - support reset session zlibwrapper: add zlibwrapper to adapt for zlib interface Makefile.am | 2 +- include/wd_comp.h | 6 + wd_comp.c | 15 ++ wd_zlibwrapper.c | 472 ++++++++++++++++++++++++++++++++++++++++++++++ wd_zlibwrapper.h | 87 +++++++++ 5 files changed, 581 insertions(+), 1 deletion(-) create mode 100644 wd_zlibwrapper.c create mode 100644 wd_zlibwrapper.h -- 2.24.0

1 2

openEuler Developer Day 2022- AccLib SIG专场工作会议需求收集
by fanghao (A) 03 Apr '22

03 Apr '22

Hello everyone, openEuler Developer Day 2022 （简称 ODD 2022），会议介绍 https://www.openeuler.org/zh/interaction/summit-list/devday2022/ 大会第二天4月14日将会是SIG的专场直播会议，SIG组围绕22.09版本规划开展工作会议。现在是需求问题收集阶段，大家可以提前在etherpad上编辑共享文档的方式提交讨论议题。 1、编辑参会人员信息。 2、编辑议题。链接如下： https://etherpad.openeuler.org/p/openEuler2209-sig-AccLib-ODD Thanks. Hao Fang

1 1

[PATCH] cipher: optimize the process of ctx initialization
by Kai Ye 02 Apr '22

02 Apr '22

Optimize the process of ctx initialization as switching to soft work. If the ctx resources of a thread are insufficient at the beginning, the thread can't apply for resources again. Therefore, an flag checking is required. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- src/uadk_cipher.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/uadk_cipher.c b/src/uadk_cipher.c index 5ebad64..be75233 100644 --- a/src/uadk_cipher.c +++ b/src/uadk_cipher.c @@ -847,8 +847,8 @@ static void uadk_e_ctx_init(EVP_CIPHER_CTX *ctx, struct cipher_priv_ctx *priv) struct sched_params params = {0}; int ret; - priv->req.iv_bytes = EVP_CIPHER_CTX_iv_length(ctx); - priv->req.iv = priv->iv; + if (priv->switch_flag == UADK_DO_SOFT) + return; ret = uadk_e_init_cipher(); if (unlikely(!ret)) { @@ -857,6 +857,9 @@ static void uadk_e_ctx_init(EVP_CIPHER_CTX *ctx, struct cipher_priv_ctx *priv) return; } + priv->req.iv_bytes = EVP_CIPHER_CTX_iv_length(ctx); + priv->req.iv = priv->iv; + /* * The internal RR scheduler used by environment variables, * the cipher algorithm does not distinguish between -- 2.33.0

1 0

[PATCH] drv/sec - modification for clean code
by Kai Ye 01 Apr '22

01 Apr '22

1. Delete some debug code. Debug code is not allowed in the release version. 2. Fix a code style issue in sec drv exit. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- drv/hisi_sec.c | 67 ++++++-------------------------------------------- 1 file changed, 7 insertions(+), 60 deletions(-) diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c index 16fcb5f..96a2e3c 100644 --- a/drv/hisi_sec.c +++ b/drv/hisi_sec.c @@ -486,20 +486,6 @@ static int g_hmac_a_alg[WD_DIGEST_TYPE_MAX] = { int hisi_sec_init(struct wd_ctx_config_internal *config, void *priv); void hisi_sec_exit(void *priv); -#ifdef DEBUG -static void sec_dump_bd(unsigned char *bd, unsigned int len) -{ - unsigned int i; - - for (i = 0; i < len; i++) { - WD_ERR("\\0x%02x", bd[i]); - if ((i + 1) % WORD_BYTES == 0) - WD_ERR("\n"); - } - WD_ERR("\n"); -} -#endif - /* increment counter (128-bit int) by software */ static void ctr_iv_inc(__u8 *counter, __u32 c) { @@ -1290,11 +1276,6 @@ static void parse_digest_bd2(struct hisi_sec_sqe *sqe, recv_msg->data_fmt = hisi_sec_get_data_fmt_v2(sqe->sds_sa_type); recv_msg->in = (__u8 *)(uintptr_t)sqe->type2.data_src_addr; recv_msg->alg_type = WD_DIGEST; - -#ifdef DEBUG - WD_ERR("Dump digest recv sqe-->!\n"); - sec_dump_bd((unsigned char *)sqe, SQE_BYTES_NUMS); -#endif } static int digest_long_bd_check(struct wd_digest_msg *msg) @@ -1389,11 +1370,6 @@ int hisi_sec_digest_send(handle_t ctx, struct wd_digest_msg *msg) qm_fill_digest_long_bd(msg, &sqe); -#ifdef DEBUG - WD_ERR("Dump digest send sqe-->!\n"); - sec_dump_bd((unsigned char *)&sqe, SQE_BYTES_NUMS); -#endif - sqe.type2.tag = msg->tag; ret = hisi_qm_send(h_qp, &sqe, 1, &count); if (ret < 0) { @@ -1545,11 +1521,6 @@ int hisi_sec_digest_send_v3(handle_t ctx, struct wd_digest_msg *msg) qm_fill_digest_long_bd3(msg, &sqe); -#ifdef DEBUG - WD_ERR("Dump digest send sqe-->!\n"); - sec_dump_bd((unsigned char *)&sqe, SQE_BYTES_NUMS); -#endif - sqe.tag = (__u64)(uintptr_t)msg->tag; ret = hisi_qm_send(h_qp, &sqe, 1, &count); @@ -1590,11 +1561,6 @@ static void parse_digest_bd3(struct hisi_sec_sqe3 *sqe, recv_msg->data_fmt = hisi_sec_get_data_fmt_v3(sqe->bd_param); recv_msg->in = (__u8 *)(uintptr_t)sqe->data_src_addr; recv_msg->alg_type = WD_DIGEST; - -#ifdef DEBUG - WD_ERR("Dump digest recv sqe-->!\n"); - sec_dump_bd((unsigned char *)sqe, SQE_BYTES_NUMS); -#endif } int hisi_sec_digest_recv_v3(handle_t ctx, struct wd_digest_msg *recv_msg) @@ -1894,11 +1860,6 @@ int hisi_sec_aead_send(handle_t ctx, struct wd_aead_msg *msg) fill_aead_bd2_addr(msg, &sqe); -#ifdef DEBUG - WD_ERR("Dump aead send sqe-->!\n"); - sec_dump_bd((unsigned char *)&sqe, SQE_BYTES_NUMS); -#endif - sqe.type2.tag = (__u16)msg->tag; ret = hisi_qm_send(h_qp, &sqe, 1, &count); @@ -1948,11 +1909,6 @@ static void parse_aead_bd2(struct hisi_sec_sqe *sqe, SEC_AUTH_LEN_MASK; recv_msg->out_bytes = sqe->type2.clen_ivhlen + sqe->type2.cipher_src_offset; - -#ifdef DEBUG - WD_ERR("Dump aead recv sqe-->!\n"); - sec_dump_bd((unsigned char *)sqe, SQE_BYTES_NUMS); -#endif } int hisi_sec_aead_recv(handle_t ctx, struct wd_aead_msg *recv_msg) @@ -2163,11 +2119,6 @@ int hisi_sec_aead_send_v3(handle_t ctx, struct wd_aead_msg *msg) fill_aead_bd3_addr(msg, &sqe); -#ifdef DEBUG - WD_ERR("Dump aead send sqe-->!\n"); - sec_dump_bd((unsigned char *)&sqe, SQE_BYTES_NUMS); -#endif - sqe.tag = msg->tag; ret = hisi_qm_send(h_qp, &sqe, 1, &count); if (ret < 0) { @@ -2216,11 +2167,6 @@ static void parse_aead_bd3(struct hisi_sec_sqe3 *sqe, SEC_MAC_LEN_MASK; recv_msg->out_bytes = sqe->c_len_ivin + sqe->cipher_src_offset; - -#ifdef DEBUG - WD_ERR("Dump aead recv sqe-->!\n"); - sec_dump_bd((unsigned char *)sqe, SQE_BYTES_NUMS); -#endif } int hisi_sec_aead_recv_v3(handle_t ctx, struct wd_aead_msg *recv_msg) @@ -2305,16 +2251,17 @@ out: void hisi_sec_exit(void *priv) { - if (!priv) { - WD_ERR("hisi sec exit input parameter is err!\n"); - return; - } - struct hisi_sec_ctx *sec_ctx = priv; - struct wd_ctx_config_internal *config = &sec_ctx->config; + struct wd_ctx_config_internal *config; handle_t h_qp; int i; + if (!sec_ctx) { + WD_ERR("hisi sec exit input parameter is err!\n"); + return; + } + + config = &sec_ctx->config; for (i = 0; i < config->ctx_num; i++) { h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx); hisi_qm_free_qp(h_qp); -- 2.33.0

1 0

[PATCH] utils: add glibc version checking for uadk_memcpy
by Kai Ye 01 Apr '22

01 Apr '22

No assembly language is required as glibc version >= 2.32. This is because the later glibc version has updated this optimization. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- src/uadk_utils.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/src/uadk_utils.c b/src/uadk_utils.c index 2b34b3a..6e91ba2 100644 --- a/src/uadk_utils.c +++ b/src/uadk_utils.c @@ -14,9 +14,20 @@ * limitations under the License. * */ +#include <gnu/libc-version.h> #include "uadk_utils.h" -#define UADK_MEM_IMPROVE_THRESHOLD 1024 +#define GLIBC_MAIN 2U +#define GLIBC_MINOR 32U +#define UADK_MEM_IMPROVE_THRESHOLD 1024U + +#if __ARM_NEON && defined(__GLIBC__) && defined(__GLIBC_MINOR__) +#define LIBC_VERSION_PREREQ(major, minor) \ + ((__GLIBC__ * 10000 + __GLIBC_MINOR__ * 100) < \ + (major * 10000 + minor * 100)) +#else +#define LIBC_VERSION_PREREQ(major, minor) 0 +#endif static void *memcpy_large(void *dstpp, const void *srcpp, size_t len) { @@ -56,7 +67,9 @@ static void *memcpy_large(void *dstpp, const void *srcpp, size_t len) void *uadk_memcpy(void *dstpp, const void *srcpp, size_t len) { - if (len >= UADK_MEM_IMPROVE_THRESHOLD) + /* No assembly language is required as glibc version >= 2.32 */ + if (len >= UADK_MEM_IMPROVE_THRESHOLD && + LIBC_VERSION_PREREQ(GLIBC_MAIN, GLIBC_MINOR)) return memcpy_large(dstpp, srcpp, len); else return memcpy(dstpp, srcpp, len); -- 2.33.0

3 2

[PATCH 1/2] uadk: Add quick start document for UADK
by Zhiqi Song 01 Apr '22

01 Apr '22

A quick start document is added to help users of OpenEuler quickly start using UADK and UADK engine. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- UADK_quick_start.md | 567 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 567 insertions(+) create mode 100644 UADK_quick_start.md diff --git a/UADK_quick_start.md b/UADK_quick_start.md new file mode 100644 index 00000000..64d070b6 --- /dev/null +++ b/UADK_quick_start.md @@ -0,0 +1,567 @@ +# UADK �� +- [UADK ��](#uadk-��) + - [1 ��](#1-��) + - [1.1 UADK](#11-uadk) + - [1.2 UADK engine](#12-uadk-engine) + - [1.3 ��](#13-��) + - [2 ��](#2-��) + - [2.1 ��](#21-��) + - [2.2 ��](#22-��) + - [2.2.1 ��](#221-��) + - [2.2.2 ��](#222-��) + - [2.3 ��](#23-��) + - [3 ��](#3-��) + - [3.1 UADK ��](#31-uadk-��) + - [3.1.1 yum��](#311-yum��) + - [3.1.2 RPM��](#312-rpm��) + - [3.1.3 ��](#313-��) + - [3.2 ��UACCE��](#32-��uacce��) + - [3.3 ��](#33-��) + - [3.4 ��](#34-��) + - [3.5 UADK engine ��](#35-uadk-engine-��) + - [3.5.1 yum��](#351-yum��) + - [3.5.2 RPM��](#352-rpm��) + - [3.5.3 ��](#353-��) + - [4 ��](#4-��) + - [4.1 ��UADK](#41-��uadk) + - [4.1.1 ��](#411-��) + - [4.1.2 ��](#412-��) + - [4.2 ��UADK engine](#42-��uadk-engine) + - [4.2.1 ��](#421-��) + - [4.2.2 ��](#422-��) +---- + +## 1 �� +��UADK �� UADK engine�� +��UADK ��UADK engine�� +### 1.1 UADK +UADK��User Space Accelerator Development Kit��SVA��Shared Virtual Address��UADK��UACCE��Unified/User-space-access-intended Accelerator Framework��SVA��UADK�� + +UADK��UACCE��SVA��IOMMU��SVA��UACCE��,��UADK�� +- AES��SM4��DES��SM3��SHAx��MD5��AEAD��HMAC�� +- RSA��DH�� +- gzip��zlib�� + +��Kunpeng��UACCE��UADK��CPU��CPU�� +### 1.2 UADK engine +UADK engine��UADK��OpenSSL��engine��UADK engine��OpenSSL��OpenSSL�� + +UADK engine��RSA engine��DH engine��ECC engine��Cipher engine��Digest engine��5��UADK��UADK engine��OpenSSL��OpenSSL��engine id��uadk_engine��UADK engine�� +- RSA engine�� +- DH engine�� +- Cipher engine�� +- Digest engine�� + +��Kunpeng��UADK��OpenSSL��OpenSSL��UADK engine��Kunpeng�� + +### 1.3 �� +�� Web�� + +----------- + +## 2 �� +��Kunpeng��UADK��UADK engine�� +### 2.1 �� +��UADK��Kunpeng��9xx��CPU �� +### 2.2 �� +#### 2.2.1 �� +OpenEuler 22.03�� +��IOMMU & SVA�� +#### 2.2.2 �� +OpenSSL 1.1.1a�� +### 2.3 �� +��UADK ��UADK engine �� + +gcc version 10.2.0 (GCC) + +-------- + +## 3 �� +��Kunpeng��UADK��UADK engine�� +��Kunpeng��UADK�� +### 3.1 UADK �� +UADK��yum��RPM�� +#### 3.1.1 yum�� +��OpenEuler 22.03��yum�� +``` +yum install libwd +``` +#### 3.1.2 RPM�� +��OpenEuler��UADK rpm��https://gitee.com/src-openeuler/libwd + +�� +``` +cd /usr/src/ + +git clone https://gitee.com/src-openeuler/libwd.git + +mkdir -p /root/rpmbuild + +cd /root/rpmbuild + +mkdir BUILD BUILDROOT RPMS SOURCES SPECS SRPMS + +cp /usr/src/libwd/libwd*.tar.gz /usr/src/libwd/*patch /root/rpmbuild/SOURCES/ + +cp /usr/src/libwd/warpdrive.spec /root/rpmbuild/SPECS/ + +rpmbuild --bb SPECS/warpdrive.spec + +rpm -ivh /root/rpmbuild/RPMS/aarch64/libwd*.rpm +``` +#### 3.1.3 �� +��Linaro��UADK��https://github.com/Linaro/uadk + +�� +https://github.com/Linaro/uadk/blame/master/INSTALL + +### 3.2 ��UACCE�� +��uacce.ko�� + +��```modprobe uacce``` ��```insmod /lib/modules/$(uname -r)/uacce.ko``` + +### 3.3 �� +��Kunpeng�� + +| �� | �� | +|---|---| +HPRE|uacce.ko, hisi_qm.ko, hisi_hpre.ko| +ZIP|uacce.ko, hisi_qm.ko, hisi_zip.ko| +SEC|uacce.ko, hisi_qm.ko, hisi_sec2.ko| + +�� +hisi_hpre.ko/hisi_zip.ko/hisi_sec2.ko��uacce_mode��uacce_mode=1��SVA��uacce_mode=2��no-SVA�� +��Kunpeng��uacce��uacce.ko��Kunpeng��ZIP��HPRE��SEC��QM��uacce.ko��hisi_qm.ko��ZIP��HPRE��SEC�� + +��insmod��modprobe�� + +modprobe�� +- ��HPRE��SVA�� + ``` + modprobe hisi_hpre uacce_mode=1 + ``` +- ��SEC��SVA�� + ``` + modprobe hisi_sec2 uacce_mode=1 + ``` +- ��ZIP��SVA�� + ``` + modprobe hisi_zip uacce_mode=1 + ``` + +insmod�� +- ��HPRE��SVA�� + ``` + insmod /lib/modules/$(uname -r)/uacce.ko + insmod /lib/modules/$(uname -r)/hisi_qm.ko + insmod /lib/modules/$(uname -r)/hisi_zip.ko uacce_mode=1 + ``` + +- ��SEC��SVA�� + ``` + insmod /lib/modules/$(uname -r)/uacce.ko + insmod /lib/modules/$(uname -r)/hisi_qm.ko + insmod /lib/modules/$(uname -r)/hisi_sec2.ko uacce_mode=1 + ``` + +- ��ZIP��SVA�� + ``` + insmod /lib/modules/$(uname -r)/uacce.ko + insmod /lib/modules/$(uname -r)/hisi_qm.ko + insmod /lib/modules/$(uname -r)/hisi_hpre.ko uacce_mode=1 + ``` +�� + +��```cat /sys/bus/pci/drivers/<driver>/module/parameters/``` �� + +- �� + ``` + insmod <driver> [uacce_mode] [pf_q_num] [vfs_num] [sgl_sge_nr] [ctx_q_num] + ``` + + ``` + modprobe <driver_name> [uacce_mode] [pf_q_num] [vfs_num] [sgl_sge_nr] [ctx_q_num] + ``` + - []�� + - ��uacce_mode��0��uacce_mode=1�� + - SEC��pf_q_num��256��HPRE/ZIP��pf_q_num��64�� + - ��vfs_num��0�� + - ��sgl_sge_nr��10�� + - ��ctx_q_num��2�� + + ��ZIP�� + ``` + insmod /lib/modules/$(uname -r)/hisi_zip.ko uacce_mode=1 pf_q_num =16 vfs_num=1 sgl_sge_nr=16 + ``` + - ��SVA��uacce_mode=1�� + +### 3.4 �� +��Kunpeng�� +``` +modprobe -r hisi_hpre +``` +�� +``` +rmmod hisi_hpre +``` + +### 3.5 UADK engine �� +UADK engine��yum��RPM�� +#### 3.5.1 yum�� +��OpenEuler 22.03��yum�� +``` +yum install uadk_engine +``` +#### 3.5.2 RPM�� +��OpenEuler��uadk_engine rpm��https://gitee.com/src-openeuler/uadk_engine + +�� +``` +cd /usr/src/ + +git clone https://gitee.com/src-openeuler/uadk_engine.git + +mkdir -p /root/rpmbuild + +cd /root/rpmbuild + +mkdir BUILD BUILDROOT RPMS SOURCES SPECS SRPMS + +cp /usr/src/uadk_engine/uadk_engine*.tar.gz /usr/src/uadk_engine/*patch /root/rpmbuild/SOURCES/ + +cp /usr/src/uadk_engine/uadk_engine.spec /root/rpmbuild/SPECS/ + +rpmbuild --bb SPECS/uadk_engine.spec + +rpm -ivh /root/rpmbuild/RPMS/aarch64/uadk_engine*.rpm --prefix=/usr/local/openssl/lib/engines-1.1 + +``` +#### 3.5.3 �� +��Linaro��UADK engine��https://github.com/Linaro/uadk_engine + +�� +https://github.com/Linaro/uadk_engine/blob/master/README + +----------- + +## 4 �� +### 4.1 ��UADK +UADK��UADK��uadk_tool��```uadk_tool benchmark --help```�� +#### 4.1.1 �� +��export��: +``` +export WD_RSA_CTX_NUM="sync:2@0,async:4@0" +export WD_DH_CTX_NUM="sync:2@0,async:4@0" +export WD_CIPHER_CTX_NUM="sync:2@2,async:4@2" +export WD_DIGEST_CTX_NUM="sync:2@2,async:4@2" +``` +��```ctx_mode:ctx_num@node```��node��numa��ctx_num��ctx_mode�� +��```"sync:2@0,async:4@0"```��numa 0��2��sync��4��async�� + +#### 4.1.2 �� +- MD5�� + + ��md5��SVA�� + ``` + uadk_tool benchmark --alg md5 --mode sva --opt 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 + ``` + +- SM3�� + + ��sm3��SVA�� + ``` + uadk_tool benchmark --alg sm3 --mode sva --opt 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 + ``` +- SHA�� + + ��sha-512��SVA�� + ``` + uadk_tool benchmark --alg sha-512 --mode sva --opt 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 + ``` +- AES�� + + ��aes-128-cbc��SVA�� + ``` + uadk_tool benchmark --alg aes-128-cbc --mode sva --opt 0 --sync --pktlen 1024 --seconds 5 --multi 1 --thread 2 --ctxnum 6 + ``` + ��aes-128-cbc��SVA�� + ``` + uadk_tool benchmark --alg aes-128-cbc --mode sva --opt 1 --sync --pktlen 1024 --seconds 5 --multi 1 --thread 2 --ctxnum 6 + ``` + +- SM4�� + + ��sm4-128-ecb��SVA�� + ``` + uadk_tool benchmark --alg sm4-128-ecb --mode sva --opt 0 --sync --pktlen 1024 --seconds 5 --multi 1 --thread 2 --ctxnum 6 + ``` + + ��sm4-128-ecb��SVA�� + ``` + uadk_tool benchmark --alg sm4-128-ecb --mode sva --opt 1 --sync --pktlen 1024 --seconds 5 --multi 1 --thread 2 --ctxnum 6 + ``` + +- DES�� + + ��3des-128-ecb��SVA�� + ``` + uadk_tool benchmark --alg 3des-128-ecb --mode sva --opt 0 --sync --pktlen 1024 --seconds 5 --multi 1 --thread 2 --ctxnum 6 + ``` + + ��3des-128-ecb��SVA�� + ``` + uadk_tool benchmark --alg 3des-128-ecb --mode sva --opt 1 --sync --pktlen 1024 --seconds 5 --multi 1 --thread 2 --ctxnum 6 + ``` +��```uadk_tool benchmark --help```�� + +### 4.2 ��UADK engine +��openssl��uadk engine��openssl�� +#### 4.2.1 �� +UADK engine�� +1. ��openssl.cnf��/usr/local/ssl/�� + ``` + openssl_cnf = openssl_def + [openssl_def] + engines = engine_section + [engine_section] + uadk_engine = uadk_section + [uadk_section] + UADK_CMD_ENABLE_RSA_ENV = 1 + UADK_CMD_ENABLE_DH_ENV = 1 + UADK_CMD_ENABLE_CIPHER_ENV = 1 + UADK_CMD_ENABLE_DIGEST_ENV = 1 + ``` + +2. ��export�� + ``` + export WD_RSA_CTX_NUM="sync:2@0,async:4@0" + export WD_DH_CTX_NUM="sync:2@0,async:4@0" + export WD_CIPHER_CTX_NUM="sync:2@2,async:4@2" + export WD_DIGEST_CTX_NUM="sync:2@2,async:4@2" + ``` + ��```ctx_mode:ctx_num@node```��node��numa��ctx_num��ctx_mode�� +��```"sync:2@0,async:4@0"```��numa 0��2��sync��4��async�� + +#### 4.2.2 �� +- RSA�� + + �� + ``` + openssl genrsa -out prikey.pem -engine uadk_engine 1024 + ``` + �� + ``` + openssl rsa -in prikey.pem -pubout -out pubkey.pem -engine uadk_engine + ``` + ��plain.txt: + ``` + echo "Content to be encrypted" > plain.txt + ``` + �� + ``` + openssl rsautl -encrypt -in plain.txt -inkey pubkey.pem -pubin -out enc.txt -engine uadk_engine + ``` + �� + ``` + openssl rsautl -decrypt -in enc.txt -inkey prikey.pem -out dec.txt -engine uadk_engine + ``` + ��msg.txt: + ``` + echo "Content to be signed" > msg.txt + ``` + �� + ``` + openssl rsautl -sign -in msg.txt -inkey prikey.pem -out signed.txt -engine uadk_engine + ``` + �� + ``` + openssl rsautl -verify -in signed.txt -inkey pubkey.pem -pubin -out verified.txt -engine uadk_engine + ``` + ��openssl speed�� + ``` + openssl speed -elapsed -engine uadk_engine rsa1024 + openssl speed -elapsed -engine uadk_engine -async_jobs 10 rsa1024 + openssl speed -elapsed -engine uadk_engine -async_jobs 36 rsa1024 + ``` +- DH�� + + �� + ``` + openssl dhparam -out dhparam.pem 768 + ``` + ��Alice��: + ``` + openssl genpkey -paramfile dhparam.pem -out alice_prikey.pem -engine uadk_engine + ``` + ��Alice�� + ``` + openssl pkey -in alice_prikey.pem -pubout -out alice_pubkey.pem + ``` + ��Bob�� + ``` + openssl genpkey -paramfile dhparam.pem -out bob_prikey.pem -engine uadk_engine + ``` + ��Bob�� + ``` + openssl pkey -in bob_prikey.pem -pubout -out bob_pubkey.pem + ``` + �� + ``` + openssl pkeyutl -derive -inkey alice_prikey.pem -peerkey bob_pubkey.pem -out secret1.bin -engine uadk_engine + openssl pkeyutl -derive -inkey bob_prikey.pem -peerkey alice_pubkey.pem -out secret2.bin -engine uadk_engine + ``` + �� + ``` + cmp secret1.bin secret2.bin + xxd secret1.bin + xxd secret2.bin + ``` +- MD5�� + + ��data.txt�� + ``` + echo "Content to be hashed" > data.txt + ``` + �� + ``` + openssl md5 -engine uadk_engine data.txt + ``` + openssl speed�� + ``` + openssl speed -engine uadk_engine -async_jobs 1 -evp md5 + ``` +- SM3�� + + ��data.txt�� + ``` + echo "Content to be hashed" > data.txt + ``` + �� + ``` + openssl sm3 -engine uadk_engine data.txt + ``` +- SHA�� + + ��data.txt�� + ``` + echo "Content to be hashed" > data.txt + ``` + �� + ``` + openssl sha1 -engine uadk_engine data.txt + openssl sha256 -engine uadk_engine data.txt + openssl sha512 -engine uadk_engine data.txt + ``` +- AES�� + + ��data.txt�� + ``` + echo "Content to be encrypted" > data + ``` + aes-128-cbc�� + ``` + openssl enc -aes-128-cbc -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + aes-128-cbc�� + ``` + openssl enc -aes-128-cbc -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + aes-192-cbc�� + ``` + openssl enc -aes-192-cbc -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + aes-192-cbc�� + ``` + openssl enc -aes-192-cbc -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + aes-256-cbc�� + ``` + openssl enc -aes-256-cbc -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + aes-256-cbc�� + ``` + openssl enc -aes-256-cbc -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + aes-128-ecb�� + ``` + openssl enc -aes-128-ecb -a -in data -out data.en -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-128-ecb�� + ``` + openssl enc -aes-128-ecb -a -d -in data.en -out data.de -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-192-ecb�� + ``` + openssl enc -aes-192-ecb -a -in data -out data.en -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-192-ecb�� + ``` + openssl enc -aes-192-ecb -a -d -in data.en -out data.de -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-256-ecb�� + ``` + openssl enc -aes-256-ecb -a -in data -out data.en -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-256-ecb�� + ``` + openssl enc -aes-256-ecb -a -d -in data.en -out data.de -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-128-ctr�� + ``` + openssl enc -aes-128-ctr -a -in data -out data.en -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-128-ctr�� + ``` + openssl enc -aes-128-ctr -a -d -in data.en -out data.de -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-192-ctr�� + ``` + openssl enc -aes-192-ctr -a -in data -out data.en -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-192-ctr�� + ``` + openssl enc -aes-192-ctr -a -d -in data.en -out data.de -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-256-ctr�� + ``` + openssl enc -aes-256-ctr -a -in data -out data.en -pass pass:123456 -K abc -engine uadk_engine -p + ``` + aes-256-ctr�� + ``` + openssl enc -aes-256-ctr -a -d -in data.en -out data.de -pass pass:123456 -K abc -engine uadk_engine -p + ``` +- SM4�� + + sm4-cbc�� + ``` + openssl enc -sm4-cbc -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + sm4-cbc�� + ``` + openssl enc -sm4-cbc -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + sm4-ecb�� + ``` + openssl enc -sm4-ecb -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + sm4-ecb�� + ``` + openssl enc -sm4-ecb -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` +- DES�� + + des-ede3-cbc�� + ``` + openssl enc -des-ede3-cbc -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + des-ede3-cbc�� + ``` + openssl enc -des-ede3-cbc -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + des-ede3-ecb�� + ``` + openssl enc -des-ede3-ecb -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p + ``` + des-ede3-ecb�� + ``` + openssl enc -des-ede3-ecb -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p -- 2.33.0

1 0

[PATCH] uadk: Add quick start document
by Zhiqi Song 30 Mar '22

30 Mar '22

A quick start document is added to help users quickly start using UADK and UADK engine. Signed-off-by: Zhiqi Song <songzhiqi1(a)huawei.com> --- UADK_quick_start.md | 802 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 802 insertions(+) create mode 100644 UADK_quick_start.md diff --git a/UADK_quick_start.md b/UADK_quick_start.md new file mode 100644 index 00000000..db2c0aca --- /dev/null +++ b/UADK_quick_start.md @@ -0,0 +1,802 @@ +# UADK �� +- [UADK ��](#uadk-��) + - [1 ��](#1-��) + - [2 ��](#2��) + - [2.1 ��](#21��) + - [2.2 ��](#22��) + - [2.2.1 ��](#221��) + - [2.2.2 ��](#222��) + - [2.3 ��](#23��) + - [3 ��](#3��) + - [3.1 ��UACCE��](#31��uacce��) + - [3.2 ��](#32��) + - [3.3 ��](#33��) + - [3.4 ��](#34��) + - [3.5 ��UACCE��](#35��uacce��) + - [3.6 ��](#36��) + - [3.7 UADK ��](#37uadk-��) + - [3.7.1 yum��](#371-yum��) + - [3.7.2 RPM��](#372-rpm��) + - [3.7.3 ��](#373-��) + - [3.8 UADK engine ��](#38uadk-engine-��) + - [3.8.1 yum��](#381-yum��) + - [3.8.2 RPM��](#382-rpm��) + - [3.8.3 ��](#383-��) + - [4 ��](#4��) + - [4.1 UADK](#41uadk) + - [4.1.1 ��](#411��) + - [4.1.2 ��RSA��](#412��rsa��) + - [4.1.3 ��DH��](#413��dh��) + - [4.1.4 ��ECDH��](#414��ecdh��) + - [4.1.5 ��ECXDH��](#415��ecxdh��) + - [4.1.6 ��ECDSA��](#416��ecdsa��) + - [4.1.7 ��SM2��](#417��sm2��) + - [4.1.8 ��MD5��](#418��md5��) + - [4.1.9 ��SM3��](#419��sm3��) + - [4.1.10 ��SHA��](#4110��sha��) + - [4.1.11 ��AES��](#4111��aes��) + - [4.1.12 ��SM4��](#4112��sm4��) + - [4.2 ��UADK engine](#42��uadk-engine) + - [4.2.1 ��](#421��) + - [4.2.2 ��RSA��](#422��rsa��) + - [4.2.3 ��DH��](#423��dh��) + - [4.2.4 ��ECDH��](#424��ecdh��) + - [4.2.5 ��ECXDH��](#425��ecxdh��) + - [4.2.6 ��ECDSA��](#426��ecdsa��) + - [4.2.7 ��SM2��](#427��sm2��) + - [4.2.8 ��MD5��](#428��md5��) + - [4.2.9 ��SM3��](#429��sm3��) + - [4.2.10 ��SHA��](#4210��sha��) + - [4.2.11 ��AES��](#4211��aes��) + - [4.2.12 ��SM4��](#4212��sm4��) + - [4.2.13 ��DES��](#4213��des��) +---- + +## 1 �� +��UADK �� UADK engine�� +��UADK ��UADK engine�� +### 1.1 **UADK** +UADK��User Space Accelerator Development Kit��SVA��Shared Virtual Address��**��**��UADK��UACCE��Unified/User-space-access-intended Accelerator Framework��**��SVA��UADK��**�� +��Kunpeng��UACCE��UADK��CPU��CPU�� +### 1.2 **UADK engine** +UADK engine��UADK��OpenSSL��engine��UADK engine��OpenSSL�� +��Kunpeng��UADK��OpenSSL��UADK engine��Kunpeng�� +### 1.3 UADK��&�� +UADK��UACCE��vendor driver��SVA��IOMMU��SVA�� +��UACCE��UADK�� +UADK�� +��Kunpeng��Kunpeng��UADK��UADK��Kunpeng��: +- AES��SM4��SM3��SHAx��AEAD��HMAC�� +- RSA��DH��ECDH��X25519��X448��SM2�� +- gzip��zlib��deflate��lz77_zstd�� +### 1.4 UADK engine��&�� +UADK engine��OpenSSL��RSA engine��DH engine��ECC engine��Cipher engine��Digest engine��5��UADK��UADK engine��OpenSSL ��engine id��uadk_engine�� +��Kunpeng��Kunpeng��UADK��OpenSSL�� +- RSA engine�� +- DH engine �� +- ECC engine �� +- Cipher engine�� +- Digest engine �� +### 1.5 UADK ��UADK engine�� +- �� +- �� +- �� +- Web�� + +----------- + +## 2 �� +��Kunpeng��UADK��UADK engine�� +### 2.1 �� +��UADK��Kunpeng��9xx��CPU �� +### 2.2 �� +#### 2.2.1 �� +OpenEuler�� +Ubuntu�� +CentOS�� +��IOMMU &SVA�� +#### 2.2.2 �� +OpenSSL 1.1.1a��OpenSSL1.1.1l�� +### 2.3 �� +��UADK ��UADK engine �� +gcc version 10.2.0 (GCC) + +-------- + +## 3 �� +��Kunpeng��UADK��UADK engine�� +��Kunpeng��UADK�� +### 3.1 ��UACCE�� +��UACCE��UACCE�� +�� ++ ��Linux�� +Linux��UACCE��Linux�� https://www.kernel.org/ +��UACCE�� + + UACCE�� + <linux /drivers/misc/uacce/> + ++ ��OpenEuler�� +OpenEuler��https://gitee.com/openeuler/kernel + + UACCE�� + <linux /drivers/misc/uacce/> + +### 3.2 �� +��Kunpeng�� +�� ++ ��Linux�� +��Kunpeng��HPRE��SEC��ZIP��Linux��Linux�� https://www.kernel.org/ +��Kunpeng�� + + ��Kunpeng�� + <linux/drivers/crypto/hisilicon/> + ++ ��OpenEuler�� +OpenEuler��https://gitee.com/openeuler/kernel + + ��Kunpeng�� +�� <linux/drivers/crypto/hisilicon/> +### 3.3 �� +��Kunpeng��Kunpeng��config�� + +�� +``` +CONFIG_CRYPTO_DEV_HISI_QM=m +CONFIG_CRYPTO_DEV_HISI_ZIP=m +CONFIG_CRYPTO_DEV_HISI_HPRE=m +CONFIG_CRYPTO_DEV_HISI_SEC2=m +CONFIG_CRYPTO_DEV_HISI_TRNG=m +CONFIG_CRYPTO_DEV_HISI_MIGRATION=m +``` +�� +``` +CONFIG_UACCE=m +``` +��ZIP��HPRE��SEC��TRNG�� + +��SVA�� +``` +CONFIG_IOMMU_SVA_LIB=y +CONFIG_ARM_SMMU_V3_SVA=y +CONFIG_IOMMU_PAGE_FAULT=y +CONFIG_IOMMU_SUPPORT=y +CONFIG_PCI_PASID=y +CONFIG_IOMMU_SVA=y +``` + +�� +``` +CONFIG_VFIO=m +CONFIG_VFIO_PCI=m +``` +### 3.4 �� + +| �� | �� | +|:---|:---| +X86|make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu-| +ARM|make ARCH=arm64| + +��kernel�� +### 3.5 ��UACCE�� +��uacce.ko�� +### 3.6 �� +��Kunpeng�� + +| �� | �� | +|---|---| +HPRE|uacce.ko, hisi_qm.ko, hisi_hpre.ko| +ZIP|uacce.ko, hisi_qm.ko, hisi_zip.ko| +SEC|uacce.ko, hisi_qm.ko, hisi_sec2.ko| + +�� +hisi_hpre.ko/hisi_zip.ko/hisi_sec2.ko��uacce_mode��uacce_mode=1��SVA��uacce_mode=2��no-SVA�� +ZIP��HPRE��SEC��QM��hisi_qm.ko��Kunpeng��uacce��uacce.ko�� +��insmod��modprobe�� +- ��HPRE��SVA�� +``` +modprobe uacce +modprobe hisi_qm +modprobe hisi_hpre uacce_mode=1 +``` +- ��ZIP��SVA�� +``` +modprobe uacce +modprobe hisi_qm +modprobe hisi_zip uacce_mode=1 +``` +- ��SEC��SVA�� +``` +modprobe uacce +modprobe hisi_qm +modprobe hisi_sec2 uacce_mode=1 +``` + +- �� + +��```cat /sys/bus/pci/drivers/<driver>/module/parameters/``` �� + +�� +``` +insmod <driver> [uacce_mode] [pf_q_num] [vfs_num] [sgl_sge_nr] [ctx_q_num] +``` +[]�� ++ ��uacce_mode��0��uacce_mode=1�� ++ SEC��pf_q_num��256��HPRE/ZIP��pf_q_num��64�� ++ ��vfs_num��0�� ++ ��sgl_sge_nr��10�� ++ ��ctx_q_num��2�� +��ZIP�� +``` +insmod hisi_zip.ko uacce_mode=1 pf_q_num =16 vfs_num=1 sgl_sge_nr=16 +``` +��SVA��uacce_mode=1�� + +�� + + +### 3.7 UADK �� +UADK��yum��RPM�� + +#### 3.7.1 yum�� +��OpenEuler 22.03��yum�� +yum install libwd + +#### 3.7.2 RPM�� +��OpenEuler��UADK rpm��https://gitee.com/src-openeuler/libwd + +�� +``` +cd /usr/src/ + +git clone https://gitee.com/src-openeuler/libwd.git + +mkdir -p /usr/src/rpmbuild + +cd /usr/src/ rpmbuild + +mkdir SOURCES SPECS BUILD RPMS SRPMS + +cp /usr/src/libwd/libwd-xxx.tar.gz /usr/src/libwd/*patch /usr/src/rpmbuild/SOURCES/ + +cp /usr/src/libwd/warpdrive.spec /usr/src/rpmbuild/SPECS/ + +rpmbuild ��bb SPECS/warpdrive.spec +``` + +#### 3.7.3 �� +��Linaro��UADK��https://github.com/Linaro/uadk +�� +https://github.com/Linaro/uadk/blame/master/INSTALL + +### 3.8 UADK engine �� +UADK engine��yum��RPM�� +#### 3.8.1 yum�� +��OpenEuler 22.03��yum�� +``` +yum install uadk_engine +``` +#### 3.8.2 RPM�� +��OpenEuler��uadk_engine rpm��https://gitee.com/src-openeuler/uadk_engine + +�� +``` +cd /usr/src/ + +git clone https://gitee.com/src-openeuler/uadk_engine.git + +mkdir -p /usr/src/rpmbuild + +cd /usr/src/ rpmbuild + +mkdir SOURCES SPECS BUILD RPMS SRPMS + +cp /usr/src/uadk_engine/uadk_engine-xxx.tar.gz /usr/src/uadk_engine/*patch /usr/src/rpmbuild/SOURCES/ + +cp /usr/src/uadk_engine/ uadk_engine.spec /usr/src/rpmbuild/SPECS/ + +rpmbuild ��bb SPECS/uadk_engine.spec +``` +#### 3.8.3 �� +��Linaro��UADK engine��https://gitee.com/src-openeuler/uadk_engine + +�� +https://github.com/Linaro/uadk_engine/blob/master/README + +----------- + +## 4 �� +### 4.1 UADK +uadk/uadk_tool/��UADK��UADK��uadk_benchmark��```uadk_benchmark --help```��```uadk_benchmark --alglist```�� +#### 4.1.1 �� +��export��: +``` +export WD_RSA_CTX_NUM="sync:2@0,async:4@0" +export WD_DH_CTX_NUM="sync:2@0,async:4@0" +export WD_CIPHER_CTX_NUM="sync:2@2,async:4@2" +export WD_DIGEST_CTX_NUM="sync:2@2,async:4@2" +export WD_ECC_CTX_NUM="sync:2@0,async:4@0" +``` +�� + +#### 4.1.2 ��RSA�� +��rsa-1024��SVA�� +``` +uadk_benchmark --alg rsa-1024 --mode sva --optype 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` +��rsa-1024��SVA�� +``` +uadk_benchmark --alg rsa-1024 --mode sva --optype 1 --async --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��uadk_benchmark --help�� +#### 4.1.3 ��DH�� +��dh-1024��SVA�� +``` +uadk_benchmark --alg dh-1024 --mode sva --optype 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��dh-1024��SVA�� +``` +uadk_benchmark --alg dh-1024 --mode sva --optype 1 --async --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��uadk_benchmark --help�� + +#### 4.1.4 ��ECDH�� +��ecdh-1024��SVA�� +``` +uadk_benchmark --alg ecdh-1024 --mode sva --optype 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��ecdh-1024��SVA�� +``` +uadk_benchmark --alg ecdh-1024 --mode sva --optype 1 --async --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��uadk_benchmark --help�� + +#### 4.1.5 ��ECXDH�� +��x25519��SVA�� +``` +uadk_benchmark --alg x25519 --mode sva --optype 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��x25519��SVA�� +``` +uadk_benchmark --alg x25519 --mode sva --optype 1 --async --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��x448��SVA�� +``` +uadk_benchmark --alg x25519 --mode sva --optype 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��x448��SVA�� +``` +uadk_benchmark --alg x25519 --mode sva --optype 1 --async --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��uadk_benchmark --help�� + +#### 4.1.6 ��ECDSA�� +��ecdsa-256��SVA�� +``` +uadk_benchmark --alg ecdsa-256 --mode sva --optype 4 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��ecdsa-256��SVA�� +``` +uadk_benchmark --alg ecdsa-256 --mode sva --optype 5 --async --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��uadk_benchmark --help�� + +#### 4.1.7 ��SM2�� +��sm2��SVA�� +``` +uadk_benchmark --alg sm2 --mode sva --optype 4 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��sm2��SVA�� +``` +uadk_benchmark --alg sm2 --mode sva --optype 5 --async --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��uadk_benchmark --help�� + +#### 4.1.8 ��MD5�� +��md5��SVA�� +``` +uadk_benchmark --alg md5 --mode sva --optype 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��md5��SVA�� +``` +uadk_benchmark --alg md5 --mode sva --optype 0 --async --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��uadk_benchmark --help�� + +#### 4.1.9 ��SM3�� +��sm3��SVA�� +``` +uadk_benchmark --alg sm3 --mode sva --optype 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��sm3��SVA�� +``` +uadk_benchmark --alg sm3 --mode sva --optype 0 --async --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��uadk_benchmark --help�� + +#### 4.1.10 ��SHA�� +��sha-512��SVA�� +``` +uadk_benchmark --alg sha-512 --mode sva --optype 0 --sync --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` +��sha-512��SVA�� +``` +uadk_benchmark --alg sha-512 --mode sva --optype 0 --async --seconds 5 --thread 2 --multi 1 --ctxnum 6 +``` + +��uadk_benchmark --help�� + +#### 4.1.11 ��AES�� +��aes-128-cbc��SVA�� +``` +uadk_benchmark --alg aes-128-cbc --mode sva --optype 0 --sync --pktlen 1024 --seconds 5 --multi 1 --thread 2 --ctxnum 6 +``` + +��aes-128-cbc��SVA�� +``` +uadk_benchmark --alg aes-128-cbc --mode sva --optype 1 --async --pktlen 1024 --seconds 5 --multi 1 --thread 2 --ctxnum 6 +``` +��uadk_benchmark --help�� + +#### 4.1.12 ��SM4�� +��sm4��SVA�� +``` +uadk_benchmark --alg sm4 --mode sva --optype 0 --sync --pktlen 1024 --seconds 5 --multi 1 --thread 2 --ctxnum 6 +``` + +��sm4��SVA�� +``` +uadk_benchmark --alg sm4 --mode sva --optype 1 --async --pktlen 1024 --seconds 5 --multi 1 --thread 2 --ctxnum 6 +``` +��uadk_benchmark --help�� + +### 4.2 ��UADK engine +��openssl��uadk engine��openssl�� +#### 4.2.1 �� +UADK engine�� +1. ��openssl.cnf��/usr/local/ssl/�� +``` +openssl_cnf = openssl_def +[openssl_def] +engines = engine_section +[engine_section] +uadk_engine = uadk_section +[uadk_section] +UADK_CMD_ENABLE_RSA_ENV = 1 +UADK_CMD_ENABLE_DH_ENV = 1 +UADK_CMD_ENABLE_CIPHER_ENV = 1 +UADK_CMD_ENABLE_DIGEST_ENV = 1 +UADK_CMD_ENABLE_ECC_ENV = 1 +``` + +2. ��export�� +``` +export WD_RSA_CTX_NUM="sync:2@0,async:4@0" +export WD_DH_CTX_NUM="sync:2@0,async:4@0" +export WD_CIPHER_CTX_NUM="sync:2@2,async:4@2" +export WD_DIGEST_CTX_NUM="sync:2@2,async:4@2" +export WD_ECC_CTX_NUM="sync:2@0,async:4@0" +``` + +�� + +#### 4.2.2 ��RSA�� +�� +``` +openssl genrsa -out prikey.pem -engine uadk_engine 1024 +``` +�� +``` +openssl rsa -in prikey.pem -pubout -out pubkey.pem -engine uadk_engine +``` +�� +``` +openssl rsautl -encrypt -in plain.txt -inkey pubkey.pem -pubin -out enc.txt -engine uadk_engine +``` +�� +``` +openssl rsautl -decrypt -in enc.txt -inkey prikey.pem -out dec.txt -engine uadk_engine +``` +�� +``` +openssl rsautl -sign -in msg.txt -inkey prikey.pem -out signed.txt -engine uadk_engine +``` +�� +``` +openssl rsautl -verify -in signed.txt -inkey pubkey.pem -pubin -out verified.txt -engine uadk_engine +``` +��openssl speed�� +``` +openssl speed -elapsed -engine uadk_engine rsa1024 +openssl speed -elapsed -engine uadk_engine -async_jobs 10 rsa1024 +openssl speed -elapsed -engine uadk_engine -async_jobs 36 rsa1024 +``` +#### 4.2.3 ��DH�� +�� +``` +openssl dhparam -out dhparam.pem 768 +``` +��Alice��: +``` +openssl genpkey -paramfile dhparam.pem -out alice_prikey.pem -engine uadk_engine +``` +��Alice�� +``` +openssl pkey -in alice_prikey.pem -pubout -out alice_pubkey.pem +``` +��Bob�� +``` +openssl genpkey -paramfile dhparam.pem -out bob_prikey.pem -engine uadk_engine +``` +��Bob�� +``` +openssl pkey -in bob_prikey.pem -pubout -out bob_pubkey.pem +``` +�� +``` +openssl pkeyutl -derive -inkey alice_prikey.pem -peerkey bob_pubkey.pem -out secret1.bin -engine uadk_engine +openssl pkeyutl -derive -inkey bob_prikey.pem -peerkey alice_pubkey.pem -out secret2.bin -engine uadk_engine +``` +�� +``` +cmp secret1.bin secret2.bin +xxd secret1.bin +xxd secret2.bin +``` +#### 4.2.4 ��ECDH�� +��Alice�� +``` +openssl ecparam -name secp128r1 -genkey -noout -out alice_prikey_secp128r1.pem -engine uadk_engine +``` +�� +``` +openssl pkey -in alice_prikey_secp128r1.pem -text +``` +��Alice�� +``` +openssl pkey -pubout -in alice_prikey_secp128r1.pem -out alice_secp128r1.pub +``` +��Bob�� +``` +openssl ecparam -name secp128r1 -genkey -noout -out bob_prikey_secp128r1.pem -engine uadk_engine +``` +��Bob�� +``` +openssl pkey -pubout -in bob_prikey_secp128r1.pem -out bob_secp128r1.pub +``` +Alice�� +``` +openssl pkeyutl -derive -out alicebob_secp128r1.key -inkey alice_prikey_secp128r1.pem -peerkey bob_secp128r1.pub -engine uadk_engine +``` +Bob�� +``` +openssl pkeyutl -derive -out bobalice_secp128r1.key -inkey bob_prikey_secp128r1.pem -peerkey alice_secp128r1.pub -engine uadk_engine +``` +��Alice��Bob�� +``` +cmp alicebob_secp128r1.key bobalice_secp128r1.key +xxd alicebob_secp128r1.key +xxd bobalice_secp128r1.key +``` +#### 4.2.5 ��ECXDH�� +��Alice�� +``` +openssl genpkey -algorithm X25519 -out alice_x25519_prikey.pem -engine uadk_engine +``` +�� +``` +openssl pkey -in alice_x25519prikey.pem -text +``` +��Alice�� +``` +openssl pkey -pubout -in alice_x25519_prikey.pem -out alice_ x25519.pub +``` +��Bob�� +``` +openssl genpkey -algorithm X25519 -out bob_x25519_prikey.pem -engine uadk_engine +``` +��Bob�� +``` +openssl pkey -pubout -in bob_x25519_prikey.pem -out bob_x25519.pub +``` +Alice�� +``` +openssl pkeyutl -derive -out alicebob_x25519.key -inkey alice_x25519_prikey.pem -peerkey bob_x25519.pub -engine uadk_engine +``` +Bob�� +``` +openssl pkeyutl -derive -out bobalice_x25519.key -inkey bob_x25519_prikey.pem -peerkey alice_ x25519.pub -engine uadk_engine +``` +��Alice��Bob�� +``` +cmp alicebob_x25519.key bobalice_x25519.key +xxd alicebob_x25519.key +xxd bobalice_x25519.key +``` +��X448��genpkey��algorithm��X448��-algorithm X448 +#### 4.2.6 ��ECDSA�� +�� +``` +openssl ecparam -genkey -name secp384r1 -noout -out private.pem -engine uadk_engine +``` +�� +``` +openssl ec -in private.pem -pubout -out public.pem +``` +��msg.txt�� +��SHA256�� +``` +openssl dgst -sha256 -sign private.pem -out ecdsa_384r1.sig -engine uadk_engine msg.txt +``` +��SHA256�� +``` +openssl dgst -sha256 -verify public.pem -signature ecdsa_384r1.sig -engine uadk_engine msg.txt +``` +openssl speed�� +``` +openssl speed -elapsed -engine uadk_engine ecdsap256 +openssl speed -elapsed -engine uadk_engine -async_jobs 1 ecdsap256 +``` +#### 4.2.7 ��SM2�� +�� +``` +openssl ecparam -name SM2 -genkey -out sm2_prikey.pem -engine uadk_engine +``` +�� +``` +openssl ec -in sm2_prikey.pem -pubout -out sm2_pubkey.pem +``` +��msg.txt�� +��SHA256�� +``` +openssl dgst -sha256 -sign sm2_prikey.pem -out sm2.sig -engine uadk_engine msg.txt +``` +��SHA256�� +``` +openssl dgst -sha256 -verify sm2_pubkey.pem -signature sm2.sig -engine uadk_engine msg.txt +``` +#### 4.2.8 ��MD5�� +��data.txt�� +``` +openssl md5 -engine uadk_engine data.txt +``` +openssl speed�� +``` +openssl speed -engine uadk_engine -async_jobs 1 -evp md5 +``` +#### 4.2.9 ��SM3�� +��data.txt�� +``` +openssl sm3 -engine uadk_engine data.txt +``` +#### 4.2.10 ��SHA�� +��data.txt�� +``` +openssl sha1 -engine uadk_engine data.txt +openssl sha256 -engine uadk_engine data.txt +openssl sha512 -engine uadk_engine data.txt +``` +#### 4.2.11 ��AES�� +aes-128-cbc�� +``` +openssl enc -aes-128-cbc -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-128-cbc�� +``` +openssl enc -aes-128-cbc -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-192-cbc�� +``` +openssl enc -aes-192-cbc -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-192-cbc�� +``` +openssl enc -aes-192-cbc -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-256-cbc�� +``` +openssl enc -aes-256-cbc -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-256-cbc�� +``` +openssl enc -aes-256-cbc -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-128-ecb�� +``` +openssl enc -aes-128-ecb -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-128-ecb�� +``` +openssl enc -aes-128-ecb -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-192-ecb�� +``` +openssl enc -aes-192-ecb -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-192-ecb�� +``` +openssl enc -aes-192-ecb -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-256-ecb�� +``` +openssl enc -aes-256-ecb -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-256-ecb�� +``` +openssl enc -aes-256-ecb -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-128-ctr�� +``` +openssl enc -aes-128-ctr -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-128-ctr�� +``` +openssl enc -aes-128-ctr -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-192-ctr�� +``` +openssl enc -aes-192-ctr -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-192-ctr�� +``` +openssl enc -aes-192-ctr -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-256-ctr�� +``` +openssl enc -aes-256-ctr -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +aes-256-ctr�� +``` +openssl enc -aes-256-ctr -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +#### 4.2.12 ��SM4�� +sm4-cbc�� +``` +openssl enc -sm4-cbc -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +sm4-cbc�� +``` +openssl enc -sm4-cbc -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +sm4-ecb�� +``` +openssl enc -sm4-ecb -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +sm4-ecb�� +``` +openssl enc -sm4-ecb -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +#### 4.2.13 ��DES�� +des-ede3-cbc�� +``` +openssl enc -des-ede3-cbc -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +des-ede3-cbc�� +``` +openssl enc -des-ede3-cbc -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +des-ede3-ecb�� +``` +openssl enc -des-ede3-ecb -a -in data -out data.en -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` +des-ede3-ecb�� +``` +openssl enc -des-ede3-ecb -a -d -in data.en -out data.de -pass pass:123456 -K abc -iv abc -engine uadk_engine -p +``` -- 2.33.0

2 1

[PATCH] utils: add glibc version checking for uadk_memcpy
by Kai Ye 25 Mar '22

25 Mar '22

No assembly language is required as glibc version >= 2.32. This is because the later glibc version has updated this optimization. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- src/uadk_utils.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/uadk_utils.c b/src/uadk_utils.c index 2b34b3a..ec12e67 100644 --- a/src/uadk_utils.c +++ b/src/uadk_utils.c @@ -14,9 +14,12 @@ * limitations under the License. * */ +#include <gnu/libc-version.h> #include "uadk_utils.h" -#define UADK_MEM_IMPROVE_THRESHOLD 1024 +#define GLIBC_MAIN 2U +#define GLIBC_MINOR 32U +#define UADK_MEM_IMPROVE_THRESHOLD 1024U static void *memcpy_large(void *dstpp, const void *srcpp, size_t len) { @@ -56,7 +59,9 @@ static void *memcpy_large(void *dstpp, const void *srcpp, size_t len) void *uadk_memcpy(void *dstpp, const void *srcpp, size_t len) { - if (len >= UADK_MEM_IMPROVE_THRESHOLD) + /* No assembly language is required as glibc version >= 2.32 */ + if (((__GLIBC__ == GLIBC_MAIN && __GLIBC_MINOR__ < GLIBC_MINOR) || + __GLIBC__ < GLIBC_MAIN) && len >= UADK_MEM_IMPROVE_THRESHOLD) return memcpy_large(dstpp, srcpp, len); else return memcpy(dstpp, srcpp, len); -- 2.33.0

1 0

openEuler Acclib SIG组例会会议通知
by fanghao (A) 23 Mar '22

23 Mar '22

Hello everyone, openEuler Acclib SIG组的交流例会举行时间：北京时间，每周三上午，11点~12点会议链接：https://linaro-org.zoom.us/j/91879279131 欢迎感兴趣接入参与。可通过邮件申报议题。邮件列表：acc(a)openeuler.xn--org,openeuler-sd3u001d022a450ktlybqi2b. Thanks. Hao Fang

1 0

[PATCH] sec: unify the print format
by Kai Ye 22 Mar '22

22 Mar '22

Use the following rules to unify the print format: 1. failed to do sth. 2. invalid: sth is NULL. Signed-off-by: Kai Ye <yekai13(a)huawei.com> --- drv/hisi_sec.c | 20 ++++++++++---------- wd_aead.c | 12 ++++++------ wd_cipher.c | 20 ++++++++++---------- wd_digest.c | 10 +++++----- 4 files changed, 31 insertions(+), 31 deletions(-) diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c index 16fcb5f..aa86a6b 100644 --- a/drv/hisi_sec.c +++ b/drv/hisi_sec.c @@ -703,7 +703,7 @@ static void parse_cipher_bd2(struct hisi_sec_sqe *sqe, done = sqe->type2.done_flag & SEC_DONE_MASK; if (done != SEC_HW_TASK_DONE || sqe->type2.error_type) { - WD_ERR("SEC BD %s fail! done=0x%x, etype=0x%x\n", "cipher", + WD_ERR("failed to parse cipher BD2! done=0x%x, etype=0x%x\n", done, sqe->type2.error_type); recv_msg->result = WD_IN_EPARA; } else { @@ -927,7 +927,7 @@ int hisi_sec_cipher_send(handle_t ctx, struct wd_cipher_msg *msg) int ret; if (!msg) { - WD_ERR("input cipher msg is NULL!\n"); + WD_ERR("invalid: input cipher msg is NULL!\n"); return -WD_EINVAL; } @@ -1130,7 +1130,7 @@ int hisi_sec_cipher_send_v3(handle_t ctx, struct wd_cipher_msg *msg) int ret; if (!msg) { - WD_ERR("input cipher msg is NULL!\n"); + WD_ERR("invalid: input cipher msg is NULL!\n"); return -WD_EINVAL; } @@ -1175,7 +1175,7 @@ static void parse_cipher_bd3(struct hisi_sec_sqe3 *sqe, done = sqe->done_flag & SEC_DONE_MASK; if (done != SEC_HW_TASK_DONE || sqe->error_type) { - WD_ERR("SEC BD3 %s fail! done=0x%x, etype=0x%x\n", "cipher", + WD_ERR("failed to parse cipher BD3! done=0x%x, etype=0x%x\n", done, sqe->error_type); recv_msg->result = WD_IN_EPARA; } else { @@ -1278,7 +1278,7 @@ static void parse_digest_bd2(struct hisi_sec_sqe *sqe, done = sqe->type2.done_flag & SEC_DONE_MASK; if (done != SEC_HW_TASK_DONE || sqe->type2.error_type) { - WD_ERR("SEC BD %s fail! done=0x%x, etype=0x%x\n", "digest", + WD_ERR("failed to parse digest BD2! done=0x%x, etype=0x%x\n", done, sqe->type2.error_type); recv_msg->result = WD_IN_EPARA; } else { @@ -1354,7 +1354,7 @@ int hisi_sec_digest_send(handle_t ctx, struct wd_digest_msg *msg) int ret; if (!msg) { - WD_ERR("input digest msg is NULL!\n"); + WD_ERR("invalid: input digest msg is NULL!\n"); return -WD_EINVAL; } @@ -1510,7 +1510,7 @@ int hisi_sec_digest_send_v3(handle_t ctx, struct wd_digest_msg *msg) int ret; if (!msg) { - WD_ERR("input digest msg is NULL!\n"); + WD_ERR("invalid: input digest msg is NULL!\n"); return -WD_EINVAL; } @@ -1578,7 +1578,7 @@ static void parse_digest_bd3(struct hisi_sec_sqe3 *sqe, done = sqe->done_flag & SEC_DONE_MASK; if (done != SEC_HW_TASK_DONE || sqe->error_type) { - WD_ERR("SEC BD3 %s fail! done=0x%x, etype=0x%x\n", "digest", + WD_ERR("failed to parse digest BD3! done=0x%x, etype=0x%x\n", done, sqe->error_type); recv_msg->result = WD_IN_EPARA; } else { @@ -1927,7 +1927,7 @@ static void parse_aead_bd2(struct hisi_sec_sqe *sqe, icv = (sqe->type2.done_flag & SEC_ICV_MASK) >> 1; if (done != SEC_HW_TASK_DONE || sqe->type2.error_type || icv == SEC_HW_ICV_ERR) { - WD_ERR("SEC BD aead fail! done=0x%x, etype=0x%x, icv=0x%x\n", + WD_ERR("failed to parse aead BD2! done=0x%x, etype=0x%x, icv=0x%x\n", done, sqe->type2.error_type, icv); recv_msg->result = WD_IN_EPARA; } else { @@ -2195,7 +2195,7 @@ static void parse_aead_bd3(struct hisi_sec_sqe3 *sqe, icv = (sqe->done_flag & SEC_ICV_MASK) >> 1; if (done != SEC_HW_TASK_DONE || sqe->error_type || icv == SEC_HW_ICV_ERR) { - WD_ERR("SEC BD3 aead fail! done=0x%x, etype=0x%x, icv=0x%x\n", + WD_ERR("failed to parse aead BD3! done=0x%x, etype=0x%x, icv=0x%x\n", done, sqe->error_type, icv); recv_msg->result = WD_IN_EPARA; } else { diff --git a/wd_aead.c b/wd_aead.c index a78f152..7a33d4e 100644 --- a/wd_aead.c +++ b/wd_aead.c @@ -63,14 +63,14 @@ static void wd_aead_set_static_drv(void) { wd_aead_setting.driver = wd_aead_get_driver(); if (!wd_aead_setting.driver) - WD_ERR("fail to get driver\n"); + WD_ERR("failed to get driver!\n"); } #else static void __attribute__((constructor)) wd_aead_open_driver(void) { wd_aead_setting.dlhandle = dlopen("libhisi_sec.so", RTLD_NOW); if (!wd_aead_setting.dlhandle) - WD_ERR("failed to open libhisi_sec.so\n"); + WD_ERR("failed to open libhisi_sec.so!\n"); } static void __attribute__((destructor)) wd_aead_close_driver(void) @@ -344,7 +344,7 @@ static int aead_param_check(struct wd_aead_sess *sess, int ret; if (unlikely(!sess || !req)) { - WD_ERR("aead input sess or req is NULL.\n"); + WD_ERR("invalid: aead input sess or req is NULL!\n"); return -WD_EINVAL; } @@ -393,7 +393,7 @@ static int aead_param_check(struct wd_aead_sess *sess, static int aead_init_check(struct wd_ctx_config *config, struct wd_sched *sched) { if (!config || !config->ctxs || !config->ctxs[0].ctx || !sched) { - WD_ERR("wd aead config or sched is NULL!\n"); + WD_ERR("invalid: wd aead config or sched is NULL!\n"); return -WD_EINVAL; } @@ -593,7 +593,7 @@ int wd_do_aead_async(handle_t h_sess, struct wd_aead_req *req) return -WD_EINVAL; if (unlikely(!req->cb)) { - WD_ERR("aead input req cb is NULL.\n"); + WD_ERR("invalid: aead input req cb is NULL!\n"); return -WD_EINVAL; } @@ -646,7 +646,7 @@ int wd_aead_poll_ctx(__u32 idx, __u32 expt, __u32 *count) int ret; if (!count) { - WD_ERR("aead poll ctx input param is NULL!\n"); + WD_ERR("invalid: aead poll ctx input param is NULL!\n"); return -WD_EINVAL; } diff --git a/wd_cipher.c b/wd_cipher.c index 8daac0f..374b05e 100644 --- a/wd_cipher.c +++ b/wd_cipher.c @@ -75,14 +75,14 @@ static void wd_cipher_set_static_drv(void) { wd_cipher_setting.driver = wd_cipher_get_driver(); if (!wd_cipher_setting.driver) - WD_ERR("fail to get driver\n"); + WD_ERR("failed to get driver!\n"); } #else static void __attribute__((constructor)) wd_cipher_open_driver(void) { wd_cipher_setting.dlhandle = dlopen("libhisi_sec.so", RTLD_NOW); if (!wd_cipher_setting.dlhandle) - WD_ERR("fail to open libhisi_sec.so\n"); + WD_ERR("failed to open libhisi_sec.so!\n"); } static void __attribute__((destructor)) wd_cipher_close_driver(void) @@ -158,7 +158,7 @@ static int cipher_init_check(struct wd_ctx_config *config, struct wd_sched *sched) { if (!config || !config->ctxs || !config->ctxs[0].ctx || !sched) { - WD_ERR("wd cipher config or sched is NULL!\n"); + WD_ERR("invalid: wd cipher config or sched is NULL!\n"); return -WD_EINVAL; } @@ -177,7 +177,7 @@ int wd_cipher_set_key(handle_t h_sess, const __u8 *key, __u32 key_len) int ret; if (!key || !sess) { - WD_ERR("cipher set key input param err!\n"); + WD_ERR("invalid: cipher set key input param err!\n"); return -WD_EINVAL; } @@ -205,13 +205,13 @@ handle_t wd_cipher_alloc_sess(struct wd_cipher_sess_setup *setup) struct wd_cipher_sess *sess = NULL; if (unlikely(!setup)) { - WD_ERR("cipher input setup is NULL!\n"); + WD_ERR("invalid: cipher input setup is NULL!\n"); return (handle_t)0; } sess = malloc(sizeof(struct wd_cipher_sess)); if (!sess) { - WD_ERR("fail to alloc session memory!\n"); + WD_ERR("failed to alloc session memory!\n"); return (handle_t)0; } memset(sess, 0, sizeof(struct wd_cipher_sess)); @@ -235,7 +235,7 @@ void wd_cipher_free_sess(handle_t h_sess) struct wd_cipher_sess *sess = (struct wd_cipher_sess *)h_sess; if (unlikely(!sess)) { - WD_ERR("cipher input h_sess is NULL!\n"); + WD_ERR("invalid: cipher input h_sess is NULL!\n"); return; } @@ -386,12 +386,12 @@ static int wd_cipher_check_params(handle_t h_sess, int ret = 0; if (unlikely(!h_sess || !req)) { - WD_ERR("cipher input sess or req is NULL!\n"); + WD_ERR("invalid: cipher input sess or req is NULL!\n"); return -WD_EINVAL; } if (unlikely(mode == CTX_MODE_ASYNC && !req->cb)) { - WD_ERR("cipher req cb is NULL!\n"); + WD_ERR("invalid: cipher req cb is NULL!\n"); return -WD_EINVAL; } @@ -560,7 +560,7 @@ int wd_cipher_poll_ctx(__u32 idx, __u32 expt, __u32 *count) int ret; if (unlikely(!count)) { - WD_ERR("wd cipher poll ctx input param is NULL!\n"); + WD_ERR("invalid: cipher poll ctx input param is NULL!\n"); return -WD_EINVAL; } diff --git a/wd_digest.c b/wd_digest.c index f4d0075..c5030d0 100644 --- a/wd_digest.c +++ b/wd_digest.c @@ -62,7 +62,7 @@ static void wd_digest_set_static_drv(void) { wd_digest_setting.driver = wd_digest_get_driver(); if (!wd_digest_setting.driver) - WD_ERR("fail to get driver\n"); + WD_ERR("failed to get driver!\n"); } #else static void __attribute__((constructor)) wd_digest_open_driver(void) @@ -70,7 +70,7 @@ static void __attribute__((constructor)) wd_digest_open_driver(void) /* Fix me: vendor driver should be put in /usr/lib/wd/ */ wd_digest_setting.dlhandle = dlopen("libhisi_sec.so", RTLD_NOW); if (!wd_digest_setting.dlhandle) - WD_ERR("fail to open libhisi_sec.so\n"); + WD_ERR("failed to open libhisi_sec.so!\n"); } static void __attribute__((destructor)) wd_digest_close_driver(void) @@ -251,7 +251,7 @@ static int digest_param_check(struct wd_digest_sess *sess, int ret; if (unlikely(!sess || !req)) { - WD_ERR("digest input sess or req is NULL.\n"); + WD_ERR("invalid: digest input sess or req is NULL!\n"); return -WD_EINVAL; } @@ -397,7 +397,7 @@ int wd_do_digest_async(handle_t h_sess, struct wd_digest_req *req) return -WD_EINVAL; if (unlikely(!req->cb)) { - WD_ERR("digest input req cb is NULL.\n"); + WD_ERR("invalid: digest input req cb is NULL!\n"); return -WD_EINVAL; } @@ -450,7 +450,7 @@ int wd_digest_poll_ctx(__u32 idx, __u32 expt, __u32 *count) int ret; if (unlikely(!count)) { - WD_ERR("digest count is NULL.\n"); + WD_ERR("invalid: digest poll ctx input param is NULL!\n"); return -WD_EINVAL; } -- 2.33.0

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