April 2024 - Kernel - mailweb.openeuler.org

[PATCH openEuler-1.0-LTS 0/4] CVE-2024-26771
by GUO Zihua 09 Apr '24

09 Apr '24

This patchset fixes CVE-2024-26771. Chuhong Yuan (2): dmaengine: ti: edma: fix missed failure handling dmaengine: ti: edma: add missed operations Kunwu Chan (1): dmaengine: ti: edma: Add some null pointer checks to the edma_probe Wei Yongjun (1): dmaengine: ti: edma: Fix error return code in edma_probe() drivers/dma/ti/edma.c | 53 +++++++++++++++++++++++++++++-------------- 1 file changed, 36 insertions(+), 17 deletions(-) -- 2.34.1

2 5

[PATCH OLK-5.10 0/1] CVE-2024-26788
by Hongbo Li 09 Apr '24

09 Apr '24

fix CVE-2024-26788 Curtis Klein (1): [Backport] dmaengine: fsl-qdma: init irq after reg initialization drivers/dma/fsl-qdma.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) -- 2.34.1

2 2

[PATCH OLK-5.10] net/sched: act_mirred: use the backlog for mirred ingress
by Zhengchao Shao 09 Apr '24

09 Apr '24

From: Jakub Kicinski <kuba(a)kernel.org> mainline inclusion from mainline-v6.8-rc6 commit 52f671db18823089a02f07efc04efdb2272ddc17 category: bugfix bugzilla: https://gitee.com/src-openeuler/kernel/issues/I9E2LT CVE: CVE-2024-26740 Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?… -------------------------------- The test Davide added in commit ca22da2fbd69 ("act_mirred: use the backlog for nested calls to mirred ingress") hangs our testing VMs every 10 or so runs, with the familiar tcp_v4_rcv -> tcp_v4_rcv deadlock reported by lockdep. The problem as previously described by Davide (see Link) is that if we reverse flow of traffic with the redirect (egress -> ingress) we may reach the same socket which generated the packet. And we may still be holding its socket lock. The common solution to such deadlocks is to put the packet in the Rx backlog, rather than run the Rx path inline. Do that for all egress -> ingress reversals, not just once we started to nest mirred calls. In the past there was a concern that the backlog indirection will lead to loss of error reporting / less accurate stats. But the current workaround does not seem to address the issue. Fixes: 53592b364001 ("net/sched: act_mirred: Implement ingress actions") Cc: Marcelo Ricardo Leitner <marcelo.leitner(a)gmail.com> Suggested-by: Davide Caratti <dcaratti(a)redhat.com> Link: https://lore.kernel.org/netdev/33dc43f587ec1388ba456b4915c75f02a8aae226.166… Signed-off-by: Jakub Kicinski <kuba(a)kernel.org> Acked-by: Jamal Hadi Salim <jhs(a)mojatatu.com> Signed-off-by: David S. Miller <davem(a)davemloft.net> Conflicts: net/sched/act_mirred.c Signed-off-by: Zhengchao Shao <shaozhengchao(a)huawei.com> --- net/sched/act_mirred.c | 14 +++++--------- .../testing/selftests/net/forwarding/tc_actions.sh | 3 --- 2 files changed, 5 insertions(+), 12 deletions(-) diff --git a/net/sched/act_mirred.c b/net/sched/act_mirred.c index 91a19460cb57..66c9f356a876 100644 --- a/net/sched/act_mirred.c +++ b/net/sched/act_mirred.c @@ -206,18 +206,14 @@ static int tcf_mirred_init(struct net *net, struct nlattr *nla, return err; } -static bool is_mirred_nested(void) -{ - return unlikely(__this_cpu_read(mirred_nest_level) > 1); -} - -static int tcf_mirred_forward(bool want_ingress, struct sk_buff *skb) +static int +tcf_mirred_forward(bool at_ingress, bool want_ingress, struct sk_buff *skb) { int err; if (!want_ingress) err = dev_queue_xmit(skb); - else if (is_mirred_nested()) + else if (!at_ingress) err = netif_rx(skb); else err = netif_receive_skb(skb); @@ -314,7 +310,7 @@ static int tcf_mirred_act(struct sk_buff *skb, const struct tc_action *a, /* let's the caller reinsert the packet, if possible */ if (use_reinsert) { res->ingress = want_ingress; - err = tcf_mirred_forward(res->ingress, skb); + err = tcf_mirred_forward(at_ingress, res->ingress, skb); if (err) tcf_action_inc_overlimit_qstats(&m->common); __this_cpu_dec(mirred_nest_level); @@ -322,7 +318,7 @@ static int tcf_mirred_act(struct sk_buff *skb, const struct tc_action *a, } } - err = tcf_mirred_forward(want_ingress, skb2); + err = tcf_mirred_forward(at_ingress, want_ingress, skb2); if (err) { out: tcf_action_inc_overlimit_qstats(&m->common); diff --git a/tools/testing/selftests/net/forwarding/tc_actions.sh b/tools/testing/selftests/net/forwarding/tc_actions.sh index e396e24d30e0..d6614faf9fe3 100755 --- a/tools/testing/selftests/net/forwarding/tc_actions.sh +++ b/tools/testing/selftests/net/forwarding/tc_actions.sh @@ -188,9 +188,6 @@ mirred_egress_to_ingress_tcp_test() check_err $? "didn't mirred redirect ICMP" tc_check_packets "dev $h1 ingress" 102 10 check_err $? "didn't drop mirred ICMP" - local overlimits=$(tc_rule_stats_get ${h1} 101 egress .overlimits) - test ${overlimits} = 10 - check_err $? "wrong overlimits, expected 10 got ${overlimits}" tc filter del dev $h1 egress protocol ip pref 100 handle 100 flower tc filter del dev $h1 egress protocol ip pref 101 handle 101 flower -- 2.34.1

2 1

[PATCH openEuler-1.0-LTS 0/1] CVE-2021-47144
by Liu Mingrui 09 Apr '24

09 Apr '24

CVE-2021-47144 Jingwen Chen (1): drm/amd/amdgpu: fix refcount leak drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.25.1

2 2

[PATCH OLK-5.10] KVM: arm64: vgic-its: Fix CVE-2024-26598 fix patch issue
by Jinjie Ruan 09 Apr '24

09 Apr '24

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I9F351 -------------------------------------- The commit d1e388dbca87 ("KVM: arm64: vgic-its: Avoid potential UAF in LPI translation cache") fix CVE-2024-26598 erroneously, correct it. Fixes: d1e388dbca87 ("KVM: arm64: vgic-its: Avoid potential UAF in LPI translation cache") Signed-off-by: Jinjie Ruan <ruanjinjie(a)huawei.com> --- arch/arm64/kvm/vgic/vgic-its.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/kvm/vgic/vgic-its.c b/arch/arm64/kvm/vgic/vgic-its.c index 9c7bd5a8aa35..1868cc0f0fee 100644 --- a/arch/arm64/kvm/vgic/vgic-its.c +++ b/arch/arm64/kvm/vgic/vgic-its.c @@ -782,7 +782,6 @@ static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its, raw_spin_lock_irqsave(&irq->irq_lock, flags); irq->pending_latch = true; vgic_queue_irq_unlock(kvm, irq, flags); - vgic_put_irq(kvm, irq); return 0; } @@ -801,6 +800,7 @@ int vgic_its_inject_cached_translation(struct kvm *kvm, struct kvm_msi *msi) raw_spin_lock_irqsave(&irq->irq_lock, flags); irq->pending_latch = true; vgic_queue_irq_unlock(kvm, irq, flags); + vgic_put_irq(kvm, irq); return 0; } -- 2.34.1

2 1

[PATCH OLK-5.10 0/1] CVE-2023-52467
by Chen Ridong 09 Apr '24

09 Apr '24

*** BLURB HERE *** Kunwu Chan (1): mfd: syscon: Fix null pointer dereference in of_syscon_register() drivers/mfd/syscon.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.34.1

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[PATCH OLK-6.6 0/2] Add Huawei Intelligent Network Card RDMA Driver: hiroce3
by Shuai Wu 09 Apr '24

09 Apr '24

From: w00623716 <wushuai51(a)huawei.com> The RDMA driver supports the following features: Supports Huawei SP600 series NICs; Supports RoCEv2; Supports RoCE XRC, UD, UC, and RC modes; Supports RoCE UC, RC, and UD local switching; Supports RoCE MR, PD, CQ, QoS, QP, and SRQ management; Supports RoCE congestion control; Supports RoCE Bond; Supports RoCE FLR; Supports RoCE entry specifications; Supports RoCE error detection and reporting; w00623716 (2): net/ethernet/huawei/hinic3: Add the CQM on which the RDMA depends infiniband/hw/hiroce3: Add Huawei Intelligent Network Card RDMA Driver arch/arm64/configs/openeuler_defconfig | 1 + arch/x86/configs/openeuler_defconfig | 1 + drivers/infiniband/Kconfig | 1 + drivers/infiniband/hw/Makefile | 1 + drivers/infiniband/hw/hiroce3/Kconfig | 14 + drivers/infiniband/hw/hiroce3/Makefile | 157 + .../infiniband/hw/hiroce3/bond/roce_bond.h | 149 + .../hw/hiroce3/bond/roce_bond_common.c | 950 + drivers/infiniband/hw/hiroce3/cq/roce_cq.h | 265 + .../infiniband/hw/hiroce3/cq/roce_cq_common.c | 202 + .../infiniband/hw/hiroce3/cq/roce_cq_cqe.c | 731 + .../infiniband/hw/hiroce3/cq/roce_cq_create.c | 604 + .../infiniband/hw/hiroce3/cq/roce_cq_ctrl.c | 872 + .../hw/hiroce3/cq/roce_cq_destroy.c | 298 + drivers/infiniband/hw/hiroce3/dfx/roce_dfx.c | 126 + drivers/infiniband/hw/hiroce3/dfx/roce_dfx.h | 184 + .../infiniband/hw/hiroce3/dfx/roce_dfx_cap.c | 676 + .../infiniband/hw/hiroce3/dfx/roce_dfx_cap.h | 184 + .../hw/hiroce3/dfx/roce_dfx_query.c | 615 + .../hiroce3/extension/roce_cdev_extension.c | 18 + .../hiroce3/extension/roce_event_extension.c | 30 + .../hiroce3/extension/roce_main_extension.c | 206 + .../hw/hiroce3/extension/roce_mr_extension.c | 38 + .../hiroce3/extension/roce_netdev_extension.c | 174 + .../hw/hiroce3/extension/roce_qp_extension.c | 251 + .../extension/roce_qp_post_send_extension.c | 20 + .../hw/hiroce3/extension/roce_srq_extension.c | 35 + .../hw/hiroce3/host/crypt/hisec_cfg.c | 148 + .../hw/hiroce3/host/crypt/hisec_cfg.h | 26 + .../hw/hiroce3/host/crypt/hisec_hwrand.c | 229 + .../hw/hiroce3/host/crypt/hisec_hwrand.h | 14 + .../host/crypt/linux/kernel/hisec_crypt_dev.h | 29 + .../crypt/linux/kernel/hisec_crypt_main.c | 123 + .../hw/hiroce3/host/crypt/readme.txt | 1 + .../hw/hiroce3/host/hmm/hmm_buddy.c | 170 + .../hw/hiroce3/host/hmm/hmm_buddy.h | 36 + .../infiniband/hw/hiroce3/host/hmm/hmm_comp.c | 165 + .../infiniband/hw/hiroce3/host/hmm/hmm_comp.h | 225 + .../hw/hiroce3/host/hmm/hmm_comp_init.c | 131 + .../hw/hiroce3/host/hmm/hmm_comp_mtt.c | 497 + .../hw/hiroce3/host/hmm/hmm_comp_mw_mr.c | 222 + .../hw/hiroce3/host/hmm/hmm_comp_res.c | 63 + .../infiniband/hw/hiroce3/host/hmm/hmm_em.c | 348 + .../infiniband/hw/hiroce3/host/hmm/hmm_em.h | 48 + .../infiniband/hw/hiroce3/host/hmm/hmm_mr.c | 403 + .../infiniband/hw/hiroce3/host/hmm/hmm_mr.h | 34 + .../infiniband/hw/hiroce3/host/hmm/hmm_umem.c | 322 + .../infiniband/hw/hiroce3/host/hmm/hmm_umem.h | 124 + .../hw/hiroce3/host/mt/hinic3_devlink.c | 428 + .../hw/hiroce3/host/mt/hinic3_devlink.h | 173 + .../hw/hiroce3/host/mt/hinic3_hw_mt.c | 605 + .../hw/hiroce3/host/mt/hinic3_hw_mt.h | 49 + .../hw/hiroce3/host/mt/hinic3_nictool.c | 982 + .../hw/hiroce3/host/mt/hinic3_nictool.h | 35 + .../infiniband/hw/hiroce3/host/mt/readme.txt | 1 + .../hw/hiroce3/host/vram/vram_common.c | 192 + .../hw/hiroce3/include/crypt/hisec_mpu_cmd.h | 38 + .../include/crypt/hisec_mpu_cmd_defs.h | 118 + .../hw/hiroce3/include/crypt/hisec_npu_cmd.h | 30 + .../include/crypt/hisec_npu_cmd_defs.h | 415 + .../hw/hiroce3/include/hinic3_hmm.h | 83 + .../hw/hiroce3/include/hinic3_rdma.h | 203 + .../hw/hiroce3/include/hinic3_srv_nic.h | 218 + .../hw/hiroce3/include/hw/db_srv_type_pub.h | 126 + .../hw/hiroce3/include/hw/node_id.h | 58 + .../hw/register/infra/cnb_c_union_define.h | 318 + .../hw/register/infra/cnb_reg_offset.h | 42 + .../hw/register/infra/cpb_c_union_define.h | 8234 + .../hw/register/infra/cpb_reg_offset.h | 1157 + .../hw/register/infra/cpi_c_union_define.h | 23677 +++ .../register/infra/cpi_dfx_glb_reg_offset.h | 236 + .../hw/register/infra/cpi_reg_offset.h | 4698 + .../hw/register/infra/crypto_c_union_define.h | 6226 + .../hw/register/infra/crypto_reg_offset.h | 1181 + .../hw/register/infra/esch_c_union_define.h | 1340 + .../hw/register/infra/esch_reg_offset.h | 802 + .../infra/hi1823_csr_sm_addr_define.h | 384 + .../hw/register/infra/hi1823_csr_sm_typedef.h | 12259 ++ .../register/infra/hinic3_csr_addr_common.h | 254 + .../hw/register/infra/icdq_c_union_define.h | 1062 + .../hw/register/infra/icdq_reg_offset.h | 114 + .../hw/register/infra/ipsurx_c_union_define.h | 4805 + .../hw/register/infra/ipsurx_reg_offset.h | 1469 + .../hw/register/infra/ipsurx_typedef.h | 30688 ++++ .../hw/register/infra/ipsutx_c_union_define.h | 2872 + .../hw/register/infra/ipsutx_reg_offset.h | 429 + .../hw/register/infra/lcam_c_union_define.h | 741 + .../hw/register/infra/lcam_reg_offset.h | 72 + .../hw/register/infra/mqm_c_union_define.h | 11885 ++ .../hw/register/infra/mqm_reg_offset.h | 3696 + .../hw/register/infra/oq_c_union_define.h | 2285 + .../include/hw/register/infra/oq_reg_offset.h | 261 + .../hw/register/infra/pe_c_union_define.h | 1819 + .../include/hw/register/infra/pe_reg_offset.h | 493 + .../hw/register/infra/pqm_c_union_define.h | 2091 + .../hw/register/infra/pqm_reg_offset.h | 291 + .../hw/register/infra/prmrx_c_union_define.h | 2937 + .../hw/register/infra/prmrx_reg_offset.h | 258 + .../hw/register/infra/prmtx_c_union_define.h | 2758 + .../hw/register/infra/prmtx_reg_offset.h | 264 + .../register/infra/ring_cnb_c_union_define.h | 314 + .../hw/register/infra/ring_cnb_reg_offset.h | 52 + .../hw/register/infra/sm_c_union_define.h | 6441 + .../include/hw/register/infra/sm_reg_offset.h | 860 + .../hw/register/infra/stffq_c_union_define.h | 6438 + .../hw/register/infra/stffq_reg_offset.h | 1059 + .../hw/register/infra/stfiq_c_union_define.h | 1413 + .../hw/register/infra/stfiq_reg_offset.h | 148 + .../register/infra/stfisch_c_union_define.h | 420 + .../hw/register/infra/stfisch_reg_offset.h | 828 + .../hw/register/infra/stlfq_c_union_define.h | 6358 + .../hw/register/infra/stlfq_reg_offset.h | 535 + .../hw/register/infra/stliq_c_union_define.h | 1109 + .../hw/register/infra/stliq_reg_offset.h | 106 + .../register/infra/stlisch_c_union_define.h | 425 + .../hw/register/infra/stlisch_reg_offset.h | 527 + .../hw/register/infra/tile_c_union_define.h | 3399 + .../hw/register/infra/tile_reg_offset.h | 399 + .../hw/register/infra/virtio_c_union_define.h | 4349 + .../hw/register/infra/virtio_reg_offset.h | 275 + .../hw/register/mag/c_union_define_mag_top.h | 1695 + .../hw/register/mag/c_union_define_smag_cfg.h | 1457 + .../mag/hi1822_csr_mag_offset_union_define.h | 22 + .../hw/register/mag/mac_reg_an_lth60_offset.h | 483 + .../hw/register/mag/mac_reg_com_offset.h | 33 + .../hw/register/mag/mac_reg_mib_offset.h | 26 + .../hw/register/mag/mac_reg_rx_brfec_offset.h | 68 + .../hw/register/mag/mac_reg_rx_mac_offset.h | 95 + .../hw/register/mag/mac_reg_rx_pcs_offset.h | 343 + .../hw/register/mag/mac_reg_rx_rsfec_offset.h | 503 + .../register/mag/mac_reg_rxpma_core_offset.h | 213 + .../register/mag/mac_reg_rxpma_lane_offset.h | 44 + .../hw/register/mag/mac_reg_tx_brfec_offset.h | 62 + .../hw/register/mag/mac_reg_tx_mac_offset.h | 109 + .../hw/register/mag/mac_reg_tx_pcs_offset.h | 169 + .../hw/register/mag/mac_reg_tx_rsfec_offset.h | 75 + .../register/mag/mac_reg_txpma_core_offset.h | 19 + .../register/mag/mac_reg_txpma_lane_offset.h | 43 + .../mag/mag_fc_sds_harden_reg_offset.h | 60 + .../hw/register/mag/mag_top_reg_offset.h | 379 + .../hw/register/mag/smag_cfg_reg_offset.h | 277 + .../hw/register/misc/sfc_c_union_define.h | 721 + .../include/hw/register/misc/sfc_reg_offset.h | 217 + .../hw/register/mpu/c_union_define_crg.h | 625 + .../include/hw/register/mpu/crg_reg_offset.h | 68 + .../hw/register/mpu/mpu_c_union_define.h | 15330 ++ .../register/mpu/mpu_harden_c_union_define.h | 795 + .../hw/register/mpu/mpu_harden_reg_offset.h | 461 + .../include/hw/register/mpu/mpu_reg_offset.h | 2115 + .../hw/register/pcie/hva_peh_c_union_define.h | 3236 + .../hw/register/pcie/hva_peh_reg_offset.h | 214 + .../hw/register/pcie/pcie5_ap_addr_define.h | 40529 +++++ .../hw/register/pcie/pcie5_ap_typedef.h | 42419 ++++++ .../hw/register/pcie/pcie5_core_addr_define.h | 3233 + .../hw/register/pcie/pcie5_core_typedef.h | 118101 +++++++++++++++ .../hw/register/pcie/pcie5_pcs_addr_define.h | 286 + .../hw/register/pcie/pcie5_pcs_typedef.h | 11995 ++ .../hw/register/rxtx/apb2ff_reg_offset.h | 68 + .../hw/register/rxtx/c_union_define_apb2ff.h | 82 + .../register/top/mag_harden_c_union_define.h | 484 + .../hw/register/top/mag_harden_reg_offset.h | 55 + .../register/top/pcie_harden_c_union_define.h | 738 + .../hw/register/top/pcie_harden_reg_offset.h | 65 + .../register/top/smf0_harden_c_union_define.h | 1611 + .../hw/register/top/smf0_harden_reg_offset.h | 69 + .../top/stlqu_harden_c_union_define.h | 662 + .../hw/register/top/stlqu_harden_reg_offset.h | 69 + .../register/top/top_cpb_harden_reg_offset.h | 42 + .../top_encryp_decryp_harden_c_union_define.h | 48 + .../top/top_encryp_decryp_harden_reg_offset.h | 73 + .../hw/register/top/top_iocfg_reg_offset.h | 81 + .../register/totem/arm_ras_c_union_define.h | 192 + .../hw/register/totem/avs_reg_offset.h | 875 + .../register/totem/ddrc_arm_ras_reg_offset.h | 31 + .../hw/register/totem/ddrc_dmc_c_union_def.h | 102 + .../hw/register/totem/ddrc_dmc_reg_offset.h | 314 + .../register/totem/ddrc_rasc_c_union_define.h | 1411 + .../hw/register/totem/ddrc_rasc_reg_offset.h | 192 + .../hw/register/totem/efuse_reg_offset.h | 125 + .../hw/register/totem/fabric_c_union_define.h | 1629 + .../hw/register/totem/fabric_reg_offset.h | 102 + .../hw/register/totem/hha_c_union_def.h | 62 + .../hw/register/totem/hva_c_union_define.h | 1287 + .../hw/register/totem/hva_reg_offset.h | 110 + .../register/totem/hva_sm23_c_union_define.h | 43 + .../hw/register/totem/hva_sm23_reg_offset.h | 37 + .../register/totem/hva_smf_c_union_define.h | 1194 + .../hw/register/totem/hva_smf_reg_offset.h | 189 + .../hw/register/totem/mbigen_c_union_define.h | 643 + .../hw/register/totem/mbigen_reg_offset.h | 956 + .../hw/register/totem/pcie4_c_union_define.h | 5992 + .../hw/register/totem/pcie4_reg_offset.h | 2240 + .../register/totem/phosphor_c_union_define.h | 2841 + .../hw/register/totem/phosphor_reg_offset.h | 149 + .../include/hw/register/totem/plat_efuse.h | 368 + .../hw/register/totem/ras_c_union_define.h | 295 + .../hw/register/totem/ras_reg_offset.h | 110 + .../hw/register/totem/sioe_reg_offset.h | 426 + .../hw/register/totem/sllc_reg_offset.h | 150 + .../hw/register/totem/smmu_c_union_define.h | 2448 + .../hw/register/totem/smmu_reg_offset.h | 256 + .../hw/register/totem/sysctrl_reg_offset.h | 316 + .../hw/hiroce3/include/hw/service_type_pub.h | 135 + .../hw/hiroce3/include/hw/smf_cache_type.h | 142 + .../hw/hiroce3/include/hw/smf_instance_id.h | 168 + .../hw/hiroce3/include/hw/sml_table.h | 4079 + .../include/hw/sml_table_define_cloud.h | 273 + .../include/hw/sml_table_define_compute_dpu.h | 12 + .../hw/sml_table_define_compute_roce.h | 137 + .../hw/sml_table_define_compute_standard.h | 234 + .../include/hw/sml_table_define_fpga.h | 340 + .../hiroce3/include/hw/sml_table_define_llt.h | 361 + .../include/hw/sml_table_define_storage_fc.h | 65 + .../hw/sml_table_define_storage_fc_adapt.h | 65 + .../hw/sml_table_define_storage_roce.h | 149 + .../hw/sml_table_define_storage_roceaa.h | 164 + .../include/hw/sml_table_define_storage_toe.h | 113 + .../hw/hiroce3/include/hw/sml_table_pub.h | 330 + .../hw/hiroce3/include/hw/tile_spec.h | 28 + .../hw/hiroce3/include/mag/mag_mpu_cmd.h | 77 + .../hw/hiroce3/include/mag/mag_mpu_cmd_defs.h | 928 + .../include/micro_log/hinic3_micro_log.c | 1156 + .../include/micro_log/hinic3_micro_log.h | 169 + .../hw/hiroce3/include/nic/nic_cfg_comm.h | 62 + .../hw/hiroce3/include/nic/nic_mpu_cmd.h | 147 + .../hw/hiroce3/include/nic/nic_mpu_cmd_defs.h | 1317 + .../hw/hiroce3/include/nic/nic_npu_cmd.h | 31 + .../hw/hiroce3/include/nic/nic_npu_cmd_defs.h | 140 + .../hw/hiroce3/include/nic/nic_npu_wqe_defs.h | 240 + .../include/public/npu_cmdq_base_defs.h | 241 + .../include/rdma/rdma_context_format.h | 4435 + .../include/rdma/rdma_ext_ctx_format.h | 382 + .../hw/hiroce3/include/rdma/roce_ccf_format.h | 725 + .../hiroce3/include/rdma/roce_compile_macro.h | 91 + .../hw/hiroce3/include/rdma/roce_ctx_api.h | 265 + .../hw/hiroce3/include/rdma/roce_dif_format.h | 459 + .../hw/hiroce3/include/rdma/roce_err_type.h | 125 + .../hiroce3/include/rdma/roce_hmm_context.h | 196 + .../hw/hiroce3/include/rdma/roce_mpu_common.h | 241 + .../include/rdma/roce_mpu_ulp_common.h | 56 + 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mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_define.h create mode 100755 drivers/net/ethernet/huawei/hinic3/cqm/cqm_main.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_main.h create mode 100755 drivers/net/ethernet/huawei/hinic3/cqm/cqm_memsec.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_memsec.h create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_object.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_object.h create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_object_intern.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_object_intern.h create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/readme.txt mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_cmdq.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_cmdq.h mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_devlink.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_eqs.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_hw_cfg.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_hw_comm.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_hwdev.c create mode 100644 drivers/net/ethernet/huawei/hinic3/hw/hinic3_multi_host_mgmt.c create mode 100644 drivers/net/ethernet/huawei/hinic3/hw/hinic3_multi_host_mgmt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/hw/readme.txt create mode 100644 drivers/net/ethernet/huawei/hinic3/include/bond/bond_common_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/cfg_mgmt/cfg_mgmt_mpu_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/cfg_mgmt/cfg_mgmt_mpu_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/cqm/cqm_npu_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/cqm/cqm_npu_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_common.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_cqm.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_cqm_define.h rename drivers/net/ethernet/huawei/hinic3/{ => include}/hinic3_crm.h (90%) mode change 100644 => 100755 rename drivers/net/ethernet/huawei/hinic3/{ => include}/hinic3_hw.h (94%) create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_lld.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_mt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_profile.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_wq.h create mode 100755 drivers/net/ethernet/huawei/hinic3/include/hiudk3.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_common.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_cqm.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_crm.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_crm_adapt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_hw.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_lld.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_wq.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk_adpt.h create mode 100755 drivers/net/ethernet/huawei/hinic3/include/hiudk_sdk_cqm_adpt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk_sdk_crm.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk_sdk_crm_adpt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk_sdk_hw_adpt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk_sdk_hw_comm_adpt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_board_defs.h create mode 100755 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_cmd_base_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_inband_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_inband_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_mctp_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_mctp_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_ncsi_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_ncsi_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_smbus_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_smbus_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/ossl_ctype_ex.h rename drivers/net/ethernet/huawei/hinic3/{ => include}/ossl_knl.h (93%) mode change 100644 => 100755 create mode 100644 drivers/net/ethernet/huawei/hinic3/include/ossl_types.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/ossl_user.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/public/npu_cmdq_base_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/readme.txt create mode 100644 drivers/net/ethernet/huawei/hinic3/include/vmsec/vmsec_mpu_common.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/vram_common.h mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/ossl_knl_linux.h -- 2.33.0

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[PATCH OLK-5.10] fbdev: sis: Error out if pixclock equals zero
by Jinjiang Tu 09 Apr '24

09 Apr '24

From: Fullway Wang <fullwaywang(a)outlook.com> stable inclusion from stable-v5.10.211 commit cd36da760bd1f78c63c7078407baf01dd724f313 category: bugfix bugzilla: https://gitee.com/src-openeuler/kernel/issues/I9E2MG CVE: CVE-2024-26777 Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id… -------------------------------- [ Upstream commit e421946be7d9bf545147bea8419ef8239cb7ca52 ] The userspace program could pass any values to the driver through ioctl() interface. If the driver doesn't check the value of pixclock, it may cause divide-by-zero error. In sisfb_check_var(), var->pixclock is used as a divisor to caculate drate before it is checked against zero. Fix this by checking it at the beginning. This is similar to CVE-2022-3061 in i740fb which was fixed by commit 15cf0b8. Signed-off-by: Fullway Wang <fullwaywang(a)outlook.com> Signed-off-by: Helge Deller <deller(a)gmx.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> Signed-off-by: Jinjiang Tu <tujinjiang(a)huawei.com> --- drivers/video/fbdev/sis/sis_main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/fbdev/sis/sis_main.c b/drivers/video/fbdev/sis/sis_main.c index 03c736f6f3d0..e540cb0c5172 100644 --- a/drivers/video/fbdev/sis/sis_main.c +++ b/drivers/video/fbdev/sis/sis_main.c @@ -1474,6 +1474,8 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) vtotal = var->upper_margin + var->lower_margin + var->vsync_len; + if (!var->pixclock) + return -EINVAL; pixclock = var->pixclock; if((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) { -- 2.25.1

2 1

[PATCH openEuler-1.0-LTS] fbdev: sis: Error out if pixclock equals zero
by Jinjiang Tu 09 Apr '24

09 Apr '24

From: Fullway Wang <fullwaywang(a)outlook.com> stable inclusion from stable-v4.19.308 commit 84246c35ca34207114055a87552a1c4289c8fd7e category: bugfix bugzilla: https://gitee.com/src-openeuler/kernel/issues/I9E2MG CVE: CVE-2024-26777 Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id… -------------------------------- [ Upstream commit e421946be7d9bf545147bea8419ef8239cb7ca52 ] The userspace program could pass any values to the driver through ioctl() interface. If the driver doesn't check the value of pixclock, it may cause divide-by-zero error. In sisfb_check_var(), var->pixclock is used as a divisor to caculate drate before it is checked against zero. Fix this by checking it at the beginning. This is similar to CVE-2022-3061 in i740fb which was fixed by commit 15cf0b8. Signed-off-by: Fullway Wang <fullwaywang(a)outlook.com> Signed-off-by: Helge Deller <deller(a)gmx.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> Signed-off-by: Jinjiang Tu <tujinjiang(a)huawei.com> --- drivers/video/fbdev/sis/sis_main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/fbdev/sis/sis_main.c b/drivers/video/fbdev/sis/sis_main.c index 20aff9005978..b7f9da690db2 100644 --- a/drivers/video/fbdev/sis/sis_main.c +++ b/drivers/video/fbdev/sis/sis_main.c @@ -1488,6 +1488,8 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) vtotal = var->upper_margin + var->lower_margin + var->vsync_len; + if (!var->pixclock) + return -EINVAL; pixclock = var->pixclock; if((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) { -- 2.25.1

2 1

[PATCH openEuler-1.0-LTS 0/1] CVE-2021-47144
by Liu Mingrui 09 Apr '24

09 Apr '24

CVE-2021-47144 Jingwen Chen (1): drm/amd/amdgpu: fix refcount leak drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.25.1

2 2