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[PATCH] cred: kabi: KABI reservation for cred
by felix 05 Feb '24

05 Feb '24

From: Felix Fu <fuzhen5(a)huawei.com> hulk inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I8YQPU -------------------------------- KABI reservation for cred. Signed-off-by: Felix Fu <fuzhen5(a)huawei.com> --- include/linux/cred.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/linux/cred.h b/include/linux/cred.h index 2976f534a7a3..e01c6d094a30 100644 --- a/include/linux/cred.h +++ b/include/linux/cred.h @@ -16,6 +16,7 @@ #include <linux/uidgid.h> #include <linux/sched.h> #include <linux/sched/user.h> +#include <linux/kabi.h> struct cred; struct inode; @@ -26,6 +27,8 @@ struct inode; struct group_info { refcount_t usage; int ngroups; + KABI_RESERVE(1) + KABI_RESERVE(2) kgid_t gid[]; } __randomize_layout; @@ -144,6 +147,10 @@ struct cred { int non_rcu; /* Can we skip RCU deletion? */ struct rcu_head rcu; /* RCU deletion hook */ }; + KABI_RESERVE(1) + KABI_RESERVE(2) + KABI_RESERVE(3) + KABI_RESERVE(4) } __randomize_layout; extern void __put_cred(struct cred *); -- 2.34.1

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[PATCH V6 OLK-6.6 0/5] Add support for ecmdq
by Zhang Zekun 05 Feb '24

05 Feb '24

Add support for ecmdq v2: fix some code check errors v3: Add config isolations v4: Enable CONFIG_ARM_SMMU_V3_ECMDQ in openeuler_defconfig in ARCH arm64 v5: Fix apply error Zhen Lei (5): iommu/arm-smmu-v3: Add support for ECMDQ register mode iommu/arm-smmu-v3: Ensure that a set of associated commands are inserted in the same ECMDQ iommu/arm-smmu-v3: Add arm_smmu_ecmdq_issue_cmdlist() for non-shared ECMDQ iommu/arm-smmu-v3: Add support for less than one ECMDQ per core iommu/arm-smmu-v3: Allow disabling ECMDQs at boot time arch/arm64/configs/openeuler_defconfig | 1 + drivers/iommu/Kconfig | 11 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 468 +++++++++++++++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 47 ++ 4 files changed, 522 insertions(+), 5 deletions(-) -- 2.17.1

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[PATCH] block: kabi: KABI reservation for iocontext
by Li Nan 05 Feb '24

05 Feb '24

hulk inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I9118F ---------------------------------------------------------------------- Reserve KABI for struct 'iocontext'. Signed-off-by: Li Nan <linan122(a)huawei.com> --- include/linux/iocontext.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/iocontext.h b/include/linux/iocontext.h index 14f7eaf1b443..e333070a1e71 100644 --- a/include/linux/iocontext.h +++ b/include/linux/iocontext.h @@ -112,6 +112,8 @@ struct io_context { struct work_struct release_work; #endif /* CONFIG_BLK_ICQ */ + + KABI_RESERVE(1) }; struct task_struct; -- 2.39.2

1 0

[PATCH OLK-6.6] mm/memcontrol: fix out-of-bound access in mem_cgroup_sysctls_init
by Jinjiang Tu 05 Feb '24

05 Feb '24

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I90E0C CVE: NA -------------------------------- Patchset[1] supports to remove the sentinel element in the ctl_table when registering it to sysctl. However, the patchset fails to handle when the array is empty, leading to out-of-bound access in insert_header. When CONFIG_MEMCG_OOM_PRIORITY and CONFIG_MEMCG_SWAP_QOS are disabled, mem_cgroup_sysctls is a empty array, mem_cgroup_sysctls_init() calls register_sysctl_init() to register it. This leads to out-of-bound access. The KASAN report is as follows: ================================================================== BUG: KASAN: global-out-of-bounds in insert_header+0x4b/0x2b0 Read of size 4 at addr ffffffff99c03a58 by task swapper/0/1 Call Trace: <TASK> dump_stack_lvl+0x37/0x50 print_address_description.constprop.0+0x6b/0x3d0 ? insert_header+0x4b/0x2b0 print_report+0xb5/0x270 ? kasan_addr_to_slab+0xd/0xa0 kasan_report+0xb0/0xe0 ? insert_header+0x4b/0x2b0 insert_header+0x4b/0x2b0 __register_sysctl_table+0x1d3/0x220 __register_sysctl_init+0x24/0x50 mem_cgroup_init+0x1cd/0x1e0 ? __pfx_mem_cgroup_init+0x10/0x10 do_one_initcall+0x8e/0x320 ? __pfx_do_one_initcall+0x10/0x10 ? __pfx_parse_args+0x10/0x10 ? __kmem_cache_alloc_node+0x1e0/0x480 ? kasan_set_track+0x25/0x30 ? __kasan_kmalloc+0x7f/0x90 do_initcalls+0xe0/0x1b0 kernel_init_freeable+0x242/0x320 ? __pfx_kernel_init+0x10/0x10 kernel_init+0x1f/0x1e0 ? calculate_sigpending+0x63/0x70 ret_from_fork+0x34/0x60 ? __pfx_kernel_init+0x10/0x10 ret_from_fork_asm+0x1b/0x30 </TASK> The buggy address belongs to the variable: mem_cgroup_sysctls+0x18/0x20 The buggy address belongs to the physical page: Memory state around the buggy address: ffffffff99c03900: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ffffffff99c03980: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >ffffffff99c03a00: f9 f9 f9 f9 f9 f9 f9 f9 f9 f9 f9 f9 00 00 f9 f9 ^ ffffffff99c03a80: f9 f9 f9 f9 04 f9 f9 f9 f9 f9 f9 f9 00 f9 f9 f9 ffffffff99c03b00: f9 f9 f9 f9 04 f9 f9 f9 f9 f9 f9 f9 04 f9 f9 f9 ================================================================== To fix it, check if mem_cgroup_sysctls is a empty array before calling register_sysctl_init(). [1] https://lore.kernel.org/lkml/20230809105006.1198165-1-j.granados@samsung.co… Fixes: 74b93d078312 (memcg: make sysctl registration more extensible) Signed-off-by: Jinjiang Tu <tujinjiang(a)huawei.com> --- mm/memcontrol.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/mm/memcontrol.c b/mm/memcontrol.c index c96525697ba4..174b258641d7 100644 --- a/mm/memcontrol.c +++ b/mm/memcontrol.c @@ -8532,7 +8532,8 @@ static __init int mem_cgroup_sysctls_init(void) if (mem_cgroup_disabled()) return 0; - register_sysctl_init("vm", mem_cgroup_sysctls); + if (ARRAY_SIZE(mem_cgroup_sysctls)) + register_sysctl_init("vm", mem_cgroup_sysctls); return 0; } #else -- 2.25.1

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[PATCH V2 OLK-5.10] iommu/arm-smmu-v3: Enable iotlb_sync_map according to SMMU_IIDR
by Zhang Zekun 05 Feb '24

05 Feb '24

hulk inclusion category: bugfix bugzilla: https://gitee.com/src-openeuler/kernel/issues/I913T5 CVE: NA ----------------------------------------------- The commit 8544c8e14fec ("iommu/arm-smmu-v3: Add a SYNC command to avoid broken page table prefetch") use particular cpu cap to identify the problem with smmu, which is not suitable. So, using the smmu registers to identify the problem. Signed-off-by: Zhang Zekun <zhangzekun11(a)huawei.com> --- arch/arm64/Kconfig | 2 +- arch/arm64/include/asm/cpucaps.h | 1 - arch/arm64/kernel/cpu_errata.c | 14 -------------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 10 +++++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 5 +++++ 5 files changed, 15 insertions(+), 17 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 429a6abb2f4d..5c0178e307a4 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -838,7 +838,7 @@ config HISILICON_ERRATUM_162102203 config HISILICON_ERRATUM_162100602 bool "Hisilicon erratum 162100602" - depends on ARM_SMMU_V3 + depends on ARM_SMMU_V3 && ARCH_HISI default y help On Hisilicon LINXICORE9100 cores, SMMU pagetable prefetch features may diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h index 0220f10cddd7..ce9fbf260a3c 100644 --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -81,7 +81,6 @@ #define ARM64_HAS_PBHA_STAGE2 73 #define ARM64_SME 74 #define ARM64_SME_FA64 75 -#define ARM64_WORKAROUND_HISILICON_ERRATUM_162100602 76 #define ARM64_NCAPS 80 diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 6a3e948d5c2c..7f175b3aac15 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -331,13 +331,6 @@ static const struct midr_range hisilicon_erratum_162100125_cpus[] = { }; #endif -#ifdef CONFIG_HISILICON_ERRATUM_162100602 -static const struct midr_range hisilicon_erratum_162100602_cpus[] = { - MIDR_REV(MIDR_HISI_LINXICORE9100, 0, 0), - {}, -}; -#endif - #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003 static const struct arm64_cpu_capabilities qcom_erratum_1003_list[] = { { @@ -540,13 +533,6 @@ const struct arm64_cpu_capabilities arm64_errata[] = { ERRATA_MIDR_RANGE_LIST(hisilicon_erratum_162100125_cpus), }, #endif -#ifdef CONFIG_HISILICON_ERRATUM_162100602 - { - .desc = "Hisilicon erratum 162100602", - .capability = ARM64_WORKAROUND_HISILICON_ERRATUM_162100602, - ERRATA_MIDR_RANGE_LIST(hisilicon_erratum_162100602_cpus), - }, -#endif #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003 { .desc = "Qualcomm Technologies Falkor/Kryo erratum 1003", diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 458151b7fab2..dd099725c72c 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2948,7 +2948,7 @@ static void arm_smmu_iotlb_sync_map(struct iommu_domain *domain, struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); size_t granule_size; - if (!cpus_have_const_cap(ARM64_WORKAROUND_HISILICON_ERRATUM_162100602)) + if (!(smmu_domain->smmu->options | ARM_SMMU_OPT_SYNC_MAP)) return; granule_size = 1 << __ffs(smmu_domain->domain.pgsize_bitmap); @@ -5146,6 +5146,14 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) smmu->oas = 48; } +#ifdef CONFIG_HISILICON_ERRATUM_162100602 + /* IIDR */ + reg = readl_relaxed(smmu->base + ARM_SMMU_IIDR); + if (FIELD_GET(IIDR_VARIANT, reg) == 0x3 && + FIELD_GET(IIDR_REVISON, reg) == 0x2) + smmu->options |= ARM_SMMU_OPT_SYNC_MAP; +#endif + if (arm_smmu_ops.pgsize_bitmap == -1UL) arm_smmu_ops.pgsize_bitmap = smmu->pgsize_bitmap; else diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 919473d2217b..776d326de105 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -80,6 +80,10 @@ #define IDR5_VAX GENMASK(11, 10) #define IDR5_VAX_52_BIT 1 +#define ARM_SMMU_IIDR 0x18 +#define IIDR_VARIANT GENMASK(19, 16) +#define IIDR_REVISON GENMASK(15, 12) + #define ARM_SMMU_CR0 0x20 #define CR0_ATSCHK (1 << 4) #define CR0_CMDQEN (1 << 3) @@ -712,6 +716,7 @@ struct arm_smmu_device { #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) #define ARM_SMMU_OPT_PAGE0_REGS_ONLY (1 << 1) #define ARM_SMMU_OPT_MSIPOLL (1 << 2) +#define ARM_SMMU_OPT_SYNC_MAP (1 << 3) u32 options; union { -- 2.17.1

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[PATCH OLK-5.10] iommu/arm-smmu-v3: Enable iotlb_sync_map according to SMMU_IIDR
by Zhang Zekun 05 Feb '24

05 Feb '24

hulk inclusion category: bugfix bugzilla: https://gitee.com/src-openeuler/kernel/issues/I913T5 CVE: NA ----------------------------------------------- The commit 8544c8e14fec ("iommu/arm-smmu-v3: Add a SYNC command to avoid broken page table prefetch") use particular cpu cap the identify the problem with smmu, which is not suitable. So, using the smmu registers to identify the problem. Signed-off-by: Zhang Zekun <zhangzekun11(a)huawei.com> --- arch/arm64/Kconfig | 2 +- arch/arm64/include/asm/cpucaps.h | 1 - arch/arm64/kernel/cpu_errata.c | 14 -------------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 10 +++++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 5 +++++ 5 files changed, 15 insertions(+), 17 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 429a6abb2f4d..5c0178e307a4 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -838,7 +838,7 @@ config HISILICON_ERRATUM_162102203 config HISILICON_ERRATUM_162100602 bool "Hisilicon erratum 162100602" - depends on ARM_SMMU_V3 + depends on ARM_SMMU_V3 && ARCH_HISI default y help On Hisilicon LINXICORE9100 cores, SMMU pagetable prefetch features may diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h index 0220f10cddd7..ce9fbf260a3c 100644 --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -81,7 +81,6 @@ #define ARM64_HAS_PBHA_STAGE2 73 #define ARM64_SME 74 #define ARM64_SME_FA64 75 -#define ARM64_WORKAROUND_HISILICON_ERRATUM_162100602 76 #define ARM64_NCAPS 80 diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 6a3e948d5c2c..7f175b3aac15 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -331,13 +331,6 @@ static const struct midr_range hisilicon_erratum_162100125_cpus[] = { }; #endif -#ifdef CONFIG_HISILICON_ERRATUM_162100602 -static const struct midr_range hisilicon_erratum_162100602_cpus[] = { - MIDR_REV(MIDR_HISI_LINXICORE9100, 0, 0), - {}, -}; -#endif - #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003 static const struct arm64_cpu_capabilities qcom_erratum_1003_list[] = { { @@ -540,13 +533,6 @@ const struct arm64_cpu_capabilities arm64_errata[] = { ERRATA_MIDR_RANGE_LIST(hisilicon_erratum_162100125_cpus), }, #endif -#ifdef CONFIG_HISILICON_ERRATUM_162100602 - { - .desc = "Hisilicon erratum 162100602", - .capability = ARM64_WORKAROUND_HISILICON_ERRATUM_162100602, - ERRATA_MIDR_RANGE_LIST(hisilicon_erratum_162100602_cpus), - }, -#endif #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003 { .desc = "Qualcomm Technologies Falkor/Kryo erratum 1003", diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 458151b7fab2..dd099725c72c 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2948,7 +2948,7 @@ static void arm_smmu_iotlb_sync_map(struct iommu_domain *domain, struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); size_t granule_size; - if (!cpus_have_const_cap(ARM64_WORKAROUND_HISILICON_ERRATUM_162100602)) + if (!(smmu_domain->smmu->options | ARM_SMMU_OPT_SYNC_MAP)) return; granule_size = 1 << __ffs(smmu_domain->domain.pgsize_bitmap); @@ -5146,6 +5146,14 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) smmu->oas = 48; } +#ifdef CONFIG_HISILICON_ERRATUM_162100602 + /* IIDR */ + reg = readl_relaxed(smmu->base + ARM_SMMU_IIDR); + if (FIELD_GET(IIDR_VARIANT, reg) == 0x3 && + FIELD_GET(IIDR_REVISON, reg) == 0x2) + smmu->options |= ARM_SMMU_OPT_SYNC_MAP; +#endif + if (arm_smmu_ops.pgsize_bitmap == -1UL) arm_smmu_ops.pgsize_bitmap = smmu->pgsize_bitmap; else diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 919473d2217b..776d326de105 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -80,6 +80,10 @@ #define IDR5_VAX GENMASK(11, 10) #define IDR5_VAX_52_BIT 1 +#define ARM_SMMU_IIDR 0x18 +#define IIDR_VARIANT GENMASK(19, 16) +#define IIDR_REVISON GENMASK(15, 12) + #define ARM_SMMU_CR0 0x20 #define CR0_ATSCHK (1 << 4) #define CR0_CMDQEN (1 << 3) @@ -712,6 +716,7 @@ struct arm_smmu_device { #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) #define ARM_SMMU_OPT_PAGE0_REGS_ONLY (1 << 1) #define ARM_SMMU_OPT_MSIPOLL (1 << 2) +#define ARM_SMMU_OPT_SYNC_MAP (1 << 3) u32 options; union { -- 2.17.1

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[PATCH OLK-6.6] net/kabi: Reserve space for net structures
by Dong Chenchen 05 Feb '24

05 Feb '24

hulk inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I914DA -------------------------------- Reserve some fields beforehand for net subsystem related structures prone to change. Signed-off-by: Dong Chenchen <dongchenchen2(a)huawei.com> --- include/linux/netpoll.h | 3 +++ include/net/nexthop.h | 6 ++++++ 2 files changed, 9 insertions(+) diff --git a/include/linux/netpoll.h b/include/linux/netpoll.h index bd19c4b91e31..79a1e362251e 100644 --- a/include/linux/netpoll.h +++ b/include/linux/netpoll.h @@ -32,6 +32,9 @@ struct netpoll { bool ipv6; u16 local_port, remote_port; u8 remote_mac[ETH_ALEN]; + + KABI_RESERVE(1) + KABI_RESERVE(2) }; struct netpoll_info { diff --git a/include/net/nexthop.h b/include/net/nexthop.h index 2b12725de9c0..6975f52db535 100644 --- a/include/net/nexthop.h +++ b/include/net/nexthop.h @@ -114,6 +114,9 @@ struct nh_grp_entry { struct list_head nh_list; struct nexthop *nh_parent; /* nexthop of group with this entry */ + + KABI_RESERVE(1) + KABI_RESERVE(2) }; struct nh_group { @@ -150,6 +153,9 @@ struct nexthop { struct nh_info __rcu *nh_info; struct nh_group __rcu *nh_grp; }; + + KABI_RESERVE(1) + KABI_RESERVE(2) }; enum nexthop_event_type { -- 2.25.1

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[PATCH OLK-6.6] scsi: libsas: kabi: KABI reservation for libsas
by Li Nan 05 Feb '24

05 Feb '24

hulk inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I914BN ---------------------------------------------------------------------- Reserve KABI for file libsas.h. Signed-off-by: Li Nan <linan122(a)huawei.com> --- include/scsi/libsas.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/scsi/libsas.h b/include/scsi/libsas.h index 8a43534eea5c..6d24ed9c2b20 100644 --- a/include/scsi/libsas.h +++ b/include/scsi/libsas.h @@ -597,6 +597,14 @@ struct sas_task { void *uldd_task; struct sas_task_slow *slow_task; struct sas_tmf_task *tmf; + + KABI_RESERVE(1) + KABI_RESERVE(2) + KABI_RESERVE(3) + KABI_RESERVE(4) + KABI_RESERVE(5) + KABI_RESERVE(6) + KABI_RESERVE(7) }; struct sas_task_slow { @@ -672,6 +680,11 @@ struct sas_domain_function_template { /* GPIO support */ int (*lldd_write_gpio)(struct sas_ha_struct *, u8 reg_type, u8 reg_index, u8 reg_count, u8 *write_data); + + KABI_RESERVE(1) + KABI_RESERVE(2) + KABI_RESERVE(3) + KABI_RESERVE(4) }; extern int sas_register_ha(struct sas_ha_struct *); -- 2.39.2

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[PATCH V5 OLK-6.6 0/5] Add support for ecmdq
by Zhang Zekun 05 Feb '24

05 Feb '24

Add support for ecmdq v2: fix some code check errors v3: Add config isolations v4: Enable CONFIG_ARM_SMMU_V3_ECMDQ in openeuler_defconfig in ARCH arm64 v5: Fix apply error Zhen Lei (5): iommu/arm-smmu-v3: Add support for ECMDQ register mode iommu/arm-smmu-v3: Ensure that a set of associated commands are inserted in the same ECMDQ iommu/arm-smmu-v3: Add arm_smmu_ecmdq_issue_cmdlist() for non-shared ECMDQ iommu/arm-smmu-v3: Add support for less than one ECMDQ per core iommu/arm-smmu-v3: Allow disabling ECMDQs at boot time arch/arm64/configs/openeuler_defconfig | 1 + drivers/iommu/Kconfig | 11 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 470 +++++++++++++++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 47 ++ 4 files changed, 524 insertions(+), 5 deletions(-) -- 2.17.1

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[PATCH V4 OLK-6.6 0/5] Add support for ecmdq
by Zhang Zekun 05 Feb '24

05 Feb '24

Add support for ecmdq v2: fix some code check errors v3: Add config isolations v4: Enable CONFIG_ARM_SMMU_V3_ECMDQ in openeuler_defconfig in ARCH arm64 Zhen Lei (5): iommu/arm-smmu-v3: Add support for ECMDQ register mode iommu/arm-smmu-v3: Ensure that a set of associated commands are inserted in the same ECMDQ iommu/arm-smmu-v3: Add arm_smmu_ecmdq_issue_cmdlist() for non-shared ECMDQ iommu/arm-smmu-v3: Add support for less than one ECMDQ per core iommu/arm-smmu-v3: Allow disabling ECMDQs at boot time arch/arm64/configs/openeuler_defconfig | 1 + drivers/iommu/Kconfig | 11 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 470 +++++++++++++++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 47 ++ 4 files changed, 524 insertions(+), 5 deletions(-) -- 2.17.1

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