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[PATCH OLK-5.10 1/1] etmem : fix page_ref count leak and head missing useing problem
by chenrenhui 03 Dec '24

03 Dec '24

euleros inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/IAXJCE CVE: NA ---------------------------------------------------- In the etmem swap process, use get_page_from_vaddr to obtain the page and add the page reference counting. If a page does not meet the recycling criteria, release the reference counting of the page. In the add_page_for_swap process, if the input page is the middle page of a compound page, head and page cannot be used together. Instead, head must be used as the input parameter. Fixes: 715de52cae8d ("etmem : fix page_ref count leak and head missing useing problem") Signed-off-by: chenrenhui <chenrenhui1(a)huawei.com> --- fs/proc/etmem_swap.c | 2 ++ mm/vmscan.c | 17 ++++++----------- 2 files changed, 8 insertions(+), 11 deletions(-) diff --git a/fs/proc/etmem_swap.c b/fs/proc/etmem_swap.c index 86f5cf8c90a1..becc7f7c2fa8 100644 --- a/fs/proc/etmem_swap.c +++ b/fs/proc/etmem_swap.c @@ -70,6 +70,8 @@ static ssize_t swap_pages_write(struct file *file, const char __user *buf, continue; add_page_for_swap(page, &pagelist); + /* release the ref count we get from the get_page_from_vaddr interface */ + put_page(page); } if (!list_empty(&pagelist)) diff --git a/mm/vmscan.c b/mm/vmscan.c index 7cb214d44417..08213f1c18ee 100644 --- a/mm/vmscan.c +++ b/mm/vmscan.c @@ -4623,7 +4623,6 @@ EXPORT_SYMBOL_GPL(check_move_unevictable_pages); #ifdef CONFIG_ETMEM int add_page_for_swap(struct page *page, struct list_head *pagelist) { - int err = -EBUSY; struct page *head; /* If the page is mapped by more than one process, do not swap it */ @@ -4634,19 +4633,15 @@ int add_page_for_swap(struct page *page, struct list_head *pagelist) return -EACCES; head = compound_head(page); - err = isolate_lru_page(head); - if (err) { - put_page(page); - return err; - } - put_page(page); - if (PageUnevictable(page)) - putback_lru_page(page); + if (isolate_lru_page(head)) + return -EBUSY; + + if (PageUnevictable(head)) + putback_lru_page(head); else list_add_tail(&head->lru, pagelist); - err = 0; - return err; + return 0; } EXPORT_SYMBOL_GPL(add_page_for_swap); -- 2.33.0

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[openeuler:OLK-5.10 2516/2516] drivers/gpu/drm/ast/ast_mm.c:91:39: sparse: sparse: incorrect type in assignment (different address spaces)
by kernel test robot 03 Dec '24

03 Dec '24

tree: https://gitee.com/openeuler/kernel.git OLK-5.10 head: f030ffc8e0c6dac3503bebddbf49cc339003fcdb commit: 968ee436e4d0ce09994f74015dc163ef280ccc1e [2516/2516] drm/ast: Fixed display error for ps23xx when using ast bmc card config: x86_64-randconfig-121-20241203 (https://download.01.org/0day-ci/archive/20241203/202412032029.eVzOP3UR-lkp@…) compiler: gcc-12 (Debian 12.2.0-14) 12.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241203/202412032029.eVzOP3UR-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202412032029.eVzOP3UR-lkp@intel.com/ sparse warnings: (new ones prefixed by >>) >> drivers/gpu/drm/ast/ast_mm.c:91:39: sparse: sparse: incorrect type in assignment (different address spaces) @@ expected void *addr @@ got void [noderef] __iomem * @@ drivers/gpu/drm/ast/ast_mm.c:91:39: sparse: expected void *addr drivers/gpu/drm/ast/ast_mm.c:91:39: sparse: got void [noderef] __iomem * vim +91 drivers/gpu/drm/ast/ast_mm.c 76 77 static int ast_driver_io_mem_reserve(struct ttm_bo_device *bdev, 78 struct ttm_resource *mem) 79 { 80 struct drm_vram_mm *vmm = drm_vram_mm_of_bdev(bdev); 81 size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT; 82 83 switch (mem->mem_type) { 84 case TTM_PL_SYSTEM: /* nothing to do */ 85 break; 86 case TTM_PL_VRAM: 87 mem->bus.offset = (mem->start << PAGE_SHIFT) + vmm->vram_base; 88 mem->bus.is_iomem = true; 89 90 mem->placement = TTM_PL_FLAG_UNCACHED; > 91 mem->bus.addr = ioremap(mem->bus.offset, bus_size); 92 93 if (!mem->bus.addr) 94 return -ENOMEM; 95 96 break; 97 default: 98 return -EINVAL; 99 } 100 101 return 0; 102 } 103 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[PATCH OLK-5.10] hwpoison, memory_hotplug: lock page before unmap for hwpoisoned page
by Wupeng Ma 03 Dec '24

03 Dec '24

From: Ma Wupeng <mawupeng1(a)huawei.com> hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/IB8TSF -------------------------------- Commit b15c87263a69 ("hwpoison, memory_hotplug: allow hwpoisoned pages to be offlined) add page poison checks in do_migrate_range in order to make offline hwpoisoned page possible by introducing isolate_lru_page and try_to_unmap for hwpoisoned page. However page lock must be held before calling try_to_unmap. Add it to fix this problem. Without page lock, kernel will BUG_ON with the following log: ------------[ cut here ]------------ kernel BUG at include/linux/swapops.h:326! Internal error: Oops - BUG: 00000000f2000800 [#1] SMP CPU: 55 PID: 59981 Comm: sh Kdump: loaded Tainted: G W OE 5.10.0 #1 pstate: 60400009 (nZCv daif +PAN -UAO -TCO BTYPE=--) pc : try_to_unmap_one+0xdfc/0x1380 lr : try_to_unmap_one+0x4f4/0x1380 Call trace: try_to_unmap_one+0xdfc/0x1380 rmap_walk_anon+0x150/0x45c rmap_walk+0x50/0xfc try_to_unmap+0x108/0x1b0 do_migrate_range+0x3bc/0x6d0 offline_pages+0x450/0x5b0 memory_subsys_offline+0x4c/0x9c device_offline+0xfc/0x14c state_store+0x98/0x110 dev_attr_store+0x1c/0x40 sysfs_kf_write+0x48/0x70 kernfs_fop_write_iter+0x128/0x1d0 new_sync_write+0xec/0x1a0 vfs_write+0x208/0x2b0 ksys_write+0x70/0x110 __arm64_sys_write+0x20/0x40 invoke_syscall+0x4c/0x124 el0_svc_common.constprop.0+0x140/0x15c do_el0_svc+0x30/0xd0 el0_svc+0x1c/0x2c el0_sync_handler+0xb0/0xb4 el0_sync+0x168/0x180 Code: 17ffffde d1000400 f9400000 3707a240 (d4210000) SMP: stopping secondary CPUs Fixes: b15c87263a69 ("hwpoison, memory_hotplug: allow hwpoisoned pages to be offlined") Signed-off-by: Ma Wupeng <mawupeng1(a)huawei.com> --- mm/memory_hotplug.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c index e49bc4753eca..465100749d2d 100644 --- a/mm/memory_hotplug.c +++ b/mm/memory_hotplug.c @@ -1160,8 +1160,11 @@ int do_migrate_range(unsigned long start_pfn, unsigned long end_pfn) if (PageHWPoison(page)) { if (WARN_ON(PageLRU(page))) isolate_lru_page(page); - if (page_mapped(page)) + if (page_mapped(page)) { + lock_page(page); try_to_unmap(page, TTU_IGNORE_MLOCK); + unlock_page(page); + } continue; } -- 2.25.1

2 1

[openeuler:openEuler-1.0-LTS 1297/1297] kernel/locking/.tmp_percpu-rwsem.o: warning: objtool: missing symbol for section .text
by kernel test robot 03 Dec '24

03 Dec '24

tree: https://gitee.com/openeuler/kernel.git openEuler-1.0-LTS head: 312efa97a54edf7e64f108312c4d8c6961a1abaf commit: 96d4baaa81cce700eb801a0a9bf28b7fbbba3162 [1297/1297] tasks, sched/core: With a grace period after finish_task_switch(), remove unnecessary code config: x86_64-buildonly-randconfig-002-20241117 (https://download.01.org/0day-ci/archive/20241203/202412032008.TV1mkLUs-lkp@…) compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241203/202412032008.TV1mkLUs-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202412032008.TV1mkLUs-lkp@intel.com/ All warnings (new ones prefixed by >>): >> kernel/locking/.tmp_percpu-rwsem.o: warning: objtool: missing symbol for section .text -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[PATCH OLK-5.10] drivers/perf: hisi: Enable HiSilicon Erratum 162400501 quirk
by Yushan Wang 03 Dec '24

03 Dec '24

From: Junhao He <hejunhao3(a)huawei.com> driver inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IB7OM0 CVE: NA ---------------------------------------------------------------------- On HiSilicon HIP10C platform, the DDRC PMU interrupt registers offset is modified, causing the interrupt handler to fail to properly handle counter overflows. This patch tries to fix this by correcting the HIP10C platform DDRC PMU interrupt registers offset (including mask/status/clear registers). Signed-off-by: Junhao He <hejunhao3(a)huawei.com> Signed-off-by: Qizhi Zhang <zhangqizhi3(a)h-partners.com> Signed-off-by: Yushan Wang <wangyushan12(a)huawei.com> --- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 70 +++++++++++++++++-- drivers/perf/hisilicon/hisi_uncore_pmu.h | 1 + 2 files changed, 65 insertions(+), 6 deletions(-) diff --git a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c index ee020669d134..816770ace86f 100644 --- a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c @@ -43,6 +43,16 @@ #define DDRC_V2_EVENT_TYPE 0xe74 #define DDRC_V2_PERF_CTRL 0xeA0 +/* + * HIP10C platform v2 PMU DDRC interrupt registers definition + * On HIP10C platform, the DDRC PMU interrupt register offset is + * modified, causing the interrupt handler to fail to properly + * handle counter overflows. + */ +#define DDRC_V2_HIP10C_INT_MASK 0x534 +#define DDRC_V2_HIP10C_INT_STATUS 0x538 +#define DDRC_V2_HIP10C_INT_CLEAR 0x53C + /* DDRC has 8-counters */ #define DDRC_NR_COUNTERS 0x8 #define DDRC_V1_PERF_CTRL_EN 0x2 @@ -58,11 +68,39 @@ */ #define GET_DDRC_EVENTID(hwc) (hwc->config_base & 0x7) +#define HISI_DDRC_PMU_NORMAL_PMU 0x0 /* HiSilicon normal PMU */ +#define HISI_DDRC_PMU_INCORRECT_INT_REGS BIT(0) /* HiSilicon HIP10C PMU */ + static const u32 ddrc_reg_off[] = { DDRC_FLUX_WR, DDRC_FLUX_RD, DDRC_FLUX_WCMD, DDRC_FLUX_RCMD, DDRC_PRE_CMD, DDRC_ACT_CMD, DDRC_RNK_CHG, DDRC_RW_CHG }; +static struct acpi_platform_list hisi_uncore_plat_info[] = { + /* HiSilicon Hip10C Platform */ + {"HISI ", "HIP10C ", 0, ACPI_SIG_DSDT, greater_than_or_equal, + "Erratum #162400501", HISI_DDRC_PMU_INCORRECT_INT_REGS}, + { } +}; + +static void hisi_ddrc_pmu_check_errata(struct platform_device *pdev, struct hisi_pmu *ddrc_pmu) +{ + int idx; + + idx = acpi_match_platform_list(hisi_uncore_plat_info); + if (idx >= 0) + ddrc_pmu->errata = hisi_uncore_plat_info[idx].data; + else + ddrc_pmu->errata = HISI_DDRC_PMU_NORMAL_PMU; + + dev_dbg(ddrc_pmu->dev, "errata mask %#x\n", ddrc_pmu->errata); +} + +static bool hisi_ddrc_pmu_has_erratum(struct hisi_pmu *ddrc_pmu, u32 erratum) +{ + return !!(ddrc_pmu->errata & erratum); +} + /* * Select the counter register offset using the counter index. * In PMU v1, there are no programmable counter, the count @@ -248,21 +286,29 @@ static void hisi_ddrc_pmu_v1_disable_counter_int(struct hisi_pmu *ddrc_pmu, static void hisi_ddrc_pmu_v2_enable_counter_int(struct hisi_pmu *ddrc_pmu, struct hw_perf_event *hwc) { + u32 int_mask = DDRC_V2_INT_MASK; u32 val; - val = readl(ddrc_pmu->base + DDRC_V2_INT_MASK); + if (hisi_ddrc_pmu_has_erratum(ddrc_pmu, HISI_DDRC_PMU_INCORRECT_INT_REGS)) + int_mask = DDRC_V2_HIP10C_INT_MASK; + + val = readl(ddrc_pmu->base + int_mask); val &= ~(1 << hwc->idx); - writel(val, ddrc_pmu->base + DDRC_V2_INT_MASK); + writel(val, ddrc_pmu->base + int_mask); } static void hisi_ddrc_pmu_v2_disable_counter_int(struct hisi_pmu *ddrc_pmu, struct hw_perf_event *hwc) { + u32 int_mask = DDRC_V2_INT_MASK; u32 val; - val = readl(ddrc_pmu->base + DDRC_V2_INT_MASK); + if (hisi_ddrc_pmu_has_erratum(ddrc_pmu, HISI_DDRC_PMU_INCORRECT_INT_REGS)) + int_mask = DDRC_V2_HIP10C_INT_MASK; + + val = readl(ddrc_pmu->base + int_mask); val |= 1 << hwc->idx; - writel(val, ddrc_pmu->base + DDRC_V2_INT_MASK); + writel(val, ddrc_pmu->base + int_mask); } static u32 hisi_ddrc_pmu_v1_get_int_status(struct hisi_pmu *ddrc_pmu) @@ -278,13 +324,23 @@ static void hisi_ddrc_pmu_v1_clear_int_status(struct hisi_pmu *ddrc_pmu, static u32 hisi_ddrc_pmu_v2_get_int_status(struct hisi_pmu *ddrc_pmu) { - return readl(ddrc_pmu->base + DDRC_V2_INT_STATUS); + u32 int_status = DDRC_V2_INT_STATUS; + + if (hisi_ddrc_pmu_has_erratum(ddrc_pmu, HISI_DDRC_PMU_INCORRECT_INT_REGS)) + int_status = DDRC_V2_HIP10C_INT_STATUS; + + return readl(ddrc_pmu->base + int_status); } static void hisi_ddrc_pmu_v2_clear_int_status(struct hisi_pmu *ddrc_pmu, int idx) { - writel(1 << idx, ddrc_pmu->base + DDRC_V2_INT_CLEAR); + u32 int_clear = DDRC_V2_INT_CLEAR; + + if (hisi_ddrc_pmu_has_erratum(ddrc_pmu, HISI_DDRC_PMU_INCORRECT_INT_REGS)) + int_clear = DDRC_V2_HIP10C_INT_CLEAR; + + writel(1 << idx, ddrc_pmu->base + int_clear); } static const struct acpi_device_id hisi_ddrc_pmu_acpi_match[] = { @@ -464,6 +520,8 @@ static int hisi_ddrc_pmu_dev_probe(struct platform_device *pdev, if (ret) return ret; + hisi_ddrc_pmu_check_errata(pdev, ddrc_pmu); + if (ddrc_pmu->identifier >= HISI_PMU_V2) { ddrc_pmu->counter_bits = 48; ddrc_pmu->check_event = DDRC_V2_NR_EVENTS; diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.h b/drivers/perf/hisilicon/hisi_uncore_pmu.h index 9cf06c80acf4..eeacf2e89568 100644 --- a/drivers/perf/hisilicon/hisi_uncore_pmu.h +++ b/drivers/perf/hisilicon/hisi_uncore_pmu.h @@ -107,6 +107,7 @@ struct hisi_pmu { /* check event code range */ int check_event; u32 identifier; + u32 errata; }; int hisi_uncore_pmu_get_event_idx(struct perf_event *event); -- 2.33.0

2 1

[PATCH OLK-6.6] drivers/perf: hisi: Enable HiSilicon Erratum 162400501 quirk
by Yushan Wang 03 Dec '24

03 Dec '24

From: Junhao He <hejunhao3(a)huawei.com> driver inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IB7ONX CVE: NA ---------------------------------------------------------------------- On HiSilicon HIP10C platform, the DDRC PMU interrupt registers offset is modified, causing the interrupt handler to fail to properly handle counter overflows. This patch tries to fix this by correcting the HIP10C platform DDRC PMU interrupt registers offset (including mask/status/clear registers). Signed-off-by: Junhao He <hejunhao3(a)huawei.com> Signed-off-by: Qizhi Zhang <zhangqizhi3(a)h-partners.com> Signed-off-by: Yushan Wang <wangyushan12(a)huawei.com> --- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 70 +++++++++++++++++-- drivers/perf/hisilicon/hisi_uncore_pmu.h | 1 + 2 files changed, 65 insertions(+), 6 deletions(-) diff --git a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c index ee020669d134..816770ace86f 100644 --- a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c @@ -43,6 +43,16 @@ #define DDRC_V2_EVENT_TYPE 0xe74 #define DDRC_V2_PERF_CTRL 0xeA0 +/* + * HIP10C platform v2 PMU DDRC interrupt registers definition + * On HIP10C platform, the DDRC PMU interrupt register offset is + * modified, causing the interrupt handler to fail to properly + * handle counter overflows. + */ +#define DDRC_V2_HIP10C_INT_MASK 0x534 +#define DDRC_V2_HIP10C_INT_STATUS 0x538 +#define DDRC_V2_HIP10C_INT_CLEAR 0x53C + /* DDRC has 8-counters */ #define DDRC_NR_COUNTERS 0x8 #define DDRC_V1_PERF_CTRL_EN 0x2 @@ -58,11 +68,39 @@ */ #define GET_DDRC_EVENTID(hwc) (hwc->config_base & 0x7) +#define HISI_DDRC_PMU_NORMAL_PMU 0x0 /* HiSilicon normal PMU */ +#define HISI_DDRC_PMU_INCORRECT_INT_REGS BIT(0) /* HiSilicon HIP10C PMU */ + static const u32 ddrc_reg_off[] = { DDRC_FLUX_WR, DDRC_FLUX_RD, DDRC_FLUX_WCMD, DDRC_FLUX_RCMD, DDRC_PRE_CMD, DDRC_ACT_CMD, DDRC_RNK_CHG, DDRC_RW_CHG }; +static struct acpi_platform_list hisi_uncore_plat_info[] = { + /* HiSilicon Hip10C Platform */ + {"HISI ", "HIP10C ", 0, ACPI_SIG_DSDT, greater_than_or_equal, + "Erratum #162400501", HISI_DDRC_PMU_INCORRECT_INT_REGS}, + { } +}; + +static void hisi_ddrc_pmu_check_errata(struct platform_device *pdev, struct hisi_pmu *ddrc_pmu) +{ + int idx; + + idx = acpi_match_platform_list(hisi_uncore_plat_info); + if (idx >= 0) + ddrc_pmu->errata = hisi_uncore_plat_info[idx].data; + else + ddrc_pmu->errata = HISI_DDRC_PMU_NORMAL_PMU; + + dev_dbg(ddrc_pmu->dev, "errata mask %#x\n", ddrc_pmu->errata); +} + +static bool hisi_ddrc_pmu_has_erratum(struct hisi_pmu *ddrc_pmu, u32 erratum) +{ + return !!(ddrc_pmu->errata & erratum); +} + /* * Select the counter register offset using the counter index. * In PMU v1, there are no programmable counter, the count @@ -248,21 +286,29 @@ static void hisi_ddrc_pmu_v1_disable_counter_int(struct hisi_pmu *ddrc_pmu, static void hisi_ddrc_pmu_v2_enable_counter_int(struct hisi_pmu *ddrc_pmu, struct hw_perf_event *hwc) { + u32 int_mask = DDRC_V2_INT_MASK; u32 val; - val = readl(ddrc_pmu->base + DDRC_V2_INT_MASK); + if (hisi_ddrc_pmu_has_erratum(ddrc_pmu, HISI_DDRC_PMU_INCORRECT_INT_REGS)) + int_mask = DDRC_V2_HIP10C_INT_MASK; + + val = readl(ddrc_pmu->base + int_mask); val &= ~(1 << hwc->idx); - writel(val, ddrc_pmu->base + DDRC_V2_INT_MASK); + writel(val, ddrc_pmu->base + int_mask); } static void hisi_ddrc_pmu_v2_disable_counter_int(struct hisi_pmu *ddrc_pmu, struct hw_perf_event *hwc) { + u32 int_mask = DDRC_V2_INT_MASK; u32 val; - val = readl(ddrc_pmu->base + DDRC_V2_INT_MASK); + if (hisi_ddrc_pmu_has_erratum(ddrc_pmu, HISI_DDRC_PMU_INCORRECT_INT_REGS)) + int_mask = DDRC_V2_HIP10C_INT_MASK; + + val = readl(ddrc_pmu->base + int_mask); val |= 1 << hwc->idx; - writel(val, ddrc_pmu->base + DDRC_V2_INT_MASK); + writel(val, ddrc_pmu->base + int_mask); } static u32 hisi_ddrc_pmu_v1_get_int_status(struct hisi_pmu *ddrc_pmu) @@ -278,13 +324,23 @@ static void hisi_ddrc_pmu_v1_clear_int_status(struct hisi_pmu *ddrc_pmu, static u32 hisi_ddrc_pmu_v2_get_int_status(struct hisi_pmu *ddrc_pmu) { - return readl(ddrc_pmu->base + DDRC_V2_INT_STATUS); + u32 int_status = DDRC_V2_INT_STATUS; + + if (hisi_ddrc_pmu_has_erratum(ddrc_pmu, HISI_DDRC_PMU_INCORRECT_INT_REGS)) + int_status = DDRC_V2_HIP10C_INT_STATUS; + + return readl(ddrc_pmu->base + int_status); } static void hisi_ddrc_pmu_v2_clear_int_status(struct hisi_pmu *ddrc_pmu, int idx) { - writel(1 << idx, ddrc_pmu->base + DDRC_V2_INT_CLEAR); + u32 int_clear = DDRC_V2_INT_CLEAR; + + if (hisi_ddrc_pmu_has_erratum(ddrc_pmu, HISI_DDRC_PMU_INCORRECT_INT_REGS)) + int_clear = DDRC_V2_HIP10C_INT_CLEAR; + + writel(1 << idx, ddrc_pmu->base + int_clear); } static const struct acpi_device_id hisi_ddrc_pmu_acpi_match[] = { @@ -464,6 +520,8 @@ static int hisi_ddrc_pmu_dev_probe(struct platform_device *pdev, if (ret) return ret; + hisi_ddrc_pmu_check_errata(pdev, ddrc_pmu); + if (ddrc_pmu->identifier >= HISI_PMU_V2) { ddrc_pmu->counter_bits = 48; ddrc_pmu->check_event = DDRC_V2_NR_EVENTS; diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.h b/drivers/perf/hisilicon/hisi_uncore_pmu.h index 9cf06c80acf4..eeacf2e89568 100644 --- a/drivers/perf/hisilicon/hisi_uncore_pmu.h +++ b/drivers/perf/hisilicon/hisi_uncore_pmu.h @@ -107,6 +107,7 @@ struct hisi_pmu { /* check event code range */ int check_event; u32 identifier; + u32 errata; }; int hisi_uncore_pmu_get_event_idx(struct perf_event *event); -- 2.33.0

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[openeuler:OLK-6.6 1577/1577] drivers/ata/libahci.c:210:5: warning: no previous prototype for function 'get_ahci_em_messages'
by kernel test robot 03 Dec '24

03 Dec '24

tree: https://gitee.com/openeuler/kernel.git OLK-6.6 head: d72146e885adc1fe1f656075dccd9344d0024041 commit: fb43492008c11fe89e510dd63383a2d37ea3cf8e [1577/1577] ata: ahci: Add support for AHCI SGPIO Enclosure Management config: x86_64-buildonly-randconfig-001-20241203 (https://download.01.org/0day-ci/archive/20241203/202412031924.l8eOZ6vd-lkp@…) compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241203/202412031924.l8eOZ6vd-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202412031924.l8eOZ6vd-lkp@intel.com/ All warnings (new ones prefixed by >>): In file included from drivers/ata/libahci.c:24: In file included from include/linux/blkdev.h:9: In file included from include/linux/blk_types.h:10: In file included from include/linux/bvec.h:10: In file included from include/linux/highmem.h:8: In file included from include/linux/cacheflush.h:5: In file included from arch/x86/include/asm/cacheflush.h:5: In file included from include/linux/mm.h:2235: include/linux/vmstat.h:508:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion] 508 | return vmstat_text[NR_VM_ZONE_STAT_ITEMS + | ~~~~~~~~~~~~~~~~~~~~~ ^ 509 | item]; | ~~~~ include/linux/vmstat.h:515:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion] 515 | return vmstat_text[NR_VM_ZONE_STAT_ITEMS + | ~~~~~~~~~~~~~~~~~~~~~ ^ 516 | NR_VM_NUMA_EVENT_ITEMS + | ~~~~~~~~~~~~~~~~~~~~~~ include/linux/vmstat.h:522:36: warning: arithmetic between different enumeration types ('enum node_stat_item' and 'enum lru_list') [-Wenum-enum-conversion] 522 | return node_stat_name(NR_LRU_BASE + lru) + 3; // skip "nr_" | ~~~~~~~~~~~ ^ ~~~ include/linux/vmstat.h:527:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion] 527 | return vmstat_text[NR_VM_ZONE_STAT_ITEMS + | ~~~~~~~~~~~~~~~~~~~~~ ^ 528 | NR_VM_NUMA_EVENT_ITEMS + | ~~~~~~~~~~~~~~~~~~~~~~ include/linux/vmstat.h:536:43: warning: arithmetic between different enumeration types ('enum zone_stat_item' and 'enum numa_stat_item') [-Wenum-enum-conversion] 536 | return vmstat_text[NR_VM_ZONE_STAT_ITEMS + | ~~~~~~~~~~~~~~~~~~~~~ ^ 537 | NR_VM_NUMA_EVENT_ITEMS + | ~~~~~~~~~~~~~~~~~~~~~~ >> drivers/ata/libahci.c:210:5: warning: no previous prototype for function 'get_ahci_em_messages' [-Wmissing-prototypes] 210 | int get_ahci_em_messages(void) | ^ drivers/ata/libahci.c:210:1: note: declare 'static' if the function is not intended to be used outside of this translation unit 210 | int get_ahci_em_messages(void) | ^ | static 6 warnings generated. vim +/get_ahci_em_messages +210 drivers/ata/libahci.c 209 > 210 int get_ahci_em_messages(void) 211 { 212 return ahci_em_messages; 213 } 214 EXPORT_SYMBOL_GPL(get_ahci_em_messages); 215 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[openeuler:OLK-5.10 2516/2516] drivers/ub/urma/uburma/uburma_cmd.c:144:6: warning: no previous prototype for 'uburma_jfc_event_cb'
by kernel test robot 03 Dec '24

03 Dec '24

Hi Yizhen, FYI, the error/warning still remains. tree: https://gitee.com/openeuler/kernel.git OLK-5.10 head: f030ffc8e0c6dac3503bebddbf49cc339003fcdb commit: c4cd0655c0c898569c0a70162f36258fd5c50eeb [2516/2516] ub: uburma add cmd create jfc implementation. config: arm64-randconfig-003-20241203 (https://download.01.org/0day-ci/archive/20241203/202412031918.JBUCfUTV-lkp@…) compiler: aarch64-linux-gcc (GCC) 14.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241203/202412031918.JBUCfUTV-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202412031918.JBUCfUTV-lkp@intel.com/ All warnings (new ones prefixed by >>): >> drivers/ub/urma/uburma/uburma_cmd.c:144:6: warning: no previous prototype for 'uburma_jfc_event_cb' [-Wmissing-prototypes] 144 | void uburma_jfc_event_cb(struct ubcore_event *event, struct ubcore_ucontext *ctx) | ^~~~~~~~~~~~~~~~~~~ drivers/ub/urma/uburma/uburma_cmd.c:156:6: warning: no previous prototype for 'uburma_jfs_event_cb' [-Wmissing-prototypes] 156 | void uburma_jfs_event_cb(struct ubcore_event *event, struct ubcore_ucontext *ctx) | ^~~~~~~~~~~~~~~~~~~ drivers/ub/urma/uburma/uburma_cmd.c:168:6: warning: no previous prototype for 'uburma_jfr_event_cb' [-Wmissing-prototypes] 168 | void uburma_jfr_event_cb(struct ubcore_event *event, struct ubcore_ucontext *ctx) | ^~~~~~~~~~~~~~~~~~~ vim +/uburma_jfc_event_cb +144 drivers/ub/urma/uburma/uburma_cmd.c 143 > 144 void uburma_jfc_event_cb(struct ubcore_event *event, struct ubcore_ucontext *ctx) 145 { 146 struct uburma_jfc_uobj *jfc_uobj; 147 148 if (event->element.jfc == NULL) 149 return; 150 151 jfc_uobj = (struct uburma_jfc_uobj *)event->element.jfc->jfc_cfg.jfc_context; 152 uburma_write_async_event(ctx, event->element.jfc->urma_jfc, event->event_type, 153 &jfc_uobj->async_event_list, &jfc_uobj->async_events_reported); 154 } 155 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[PATCH OLK-6.6] xfs: Fix data overflow in xfs_mod_fdblocks()
by Zizhi Wo 03 Dec '24

03 Dec '24

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/IB7V02 -------------------------------- If the xfs reserve block related ioctl takes a large input value, the input reserved size is still assigned to mp->m_resblks in xfs_reserve_blocks() even if the requested size is larger than the total free size in the filesystem. This is because the subsequent xfs_mod_fdblocks() will handle the adjustment. However, in the current code, xfs_mod_fdblocks() calculates mp->m_resblks - mp->m_resblks_avail and casts the result to a long long type, while both mp->m_resblks and mp->m_resblks_avail are of type unsigned long long. If the difference between these two values is very large, and the most significant bit (MSB) is set to 1 (indicating a large unsigned value), the result of the cast becomes a large negative value. This causes mp->m_fdblocks to be updated to a very large value. As a result, xfs will incorrectly determine that there is always free space during foreground writes, while background writebacks may fail due to lack of space. Modify the relevant data types in xfs_mod_fdblocks() to address this issue. Fixes: 0d485ada404b ("xfs: use generic percpu counters for free block counter") Signed-off-by: Zizhi Wo <wozizhi(a)huawei.com> --- fs/xfs/xfs_mount.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/fs/xfs/xfs_mount.c b/fs/xfs/xfs_mount.c index 78c72d0aa0a6..8f938db6bc6b 100644 --- a/fs/xfs/xfs_mount.c +++ b/fs/xfs/xfs_mount.c @@ -1151,7 +1151,7 @@ xfs_mod_freecounter( bool rsvd) { int64_t lcounter; - long long res_used; + uint64_t res_used; uint64_t set_aside = 0; s32 batch; bool has_resv_pool; @@ -1173,9 +1173,9 @@ xfs_mod_freecounter( } spin_lock(&mp->m_sb_lock); - res_used = (long long)(mp->m_resblks - mp->m_resblks_avail); + res_used = mp->m_resblks - mp->m_resblks_avail; - if (res_used > delta) { + if (res_used > (uint64_t)delta) { mp->m_resblks_avail += delta; } else { delta -= res_used; -- 2.46.1

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[openeuler:OLK-5.10 2516/2516] fs/proc/base.c:1454:6: warning: no previous prototype for 'pbha_bit0_hide_file'
by kernel test robot 03 Dec '24

03 Dec '24

Hi Ma, FYI, the error/warning still remains. tree: https://gitee.com/openeuler/kernel.git OLK-5.10 head: f86196bf02fd9bea8511335c45bf10b6b0a3ea13 commit: bea38841945a52bd03004240eb0da6a5115bae21 [2516/2516] arm64: mm: Hide pbha_bit0 in procfs if pbha is not enabled config: arm64-randconfig-002-20241203 (https://download.01.org/0day-ci/archive/20241203/202412031640.QjUBley5-lkp@…) compiler: aarch64-linux-gcc (GCC) 14.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241203/202412031640.QjUBley5-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202412031640.QjUBley5-lkp@intel.com/ All warnings (new ones prefixed by >>): >> fs/proc/base.c:1454:6: warning: no previous prototype for 'pbha_bit0_hide_file' [-Wmissing-prototypes] 1454 | bool pbha_bit0_hide_file(const char *name) | ^~~~~~~~~~~~~~~~~~~ Kconfig warnings: (for reference only) WARNING: unmet direct dependencies detected for HARDLOCKUP_DETECTOR Depends on [n]: DEBUG_KERNEL [=n] && !S390 && (HAVE_HARDLOCKUP_DETECTOR_PERF [=n] || HAVE_HARDLOCKUP_DETECTOR_ARCH [=y]) Selected by [y]: - SDEI_WATCHDOG [=y] && ARM64 [=y] && ARM_SDE_INTERFACE [=y] && !HARDLOCKUP_CHECK_TIMESTAMP [=n] WARNING: unmet direct dependencies detected for PGP_PRELOAD Depends on [n]: CRYPTO [=y] && ASYMMETRIC_KEY_TYPE [=n] Selected by [y]: - PGP_PRELOAD_PUBLIC_KEYS [=y] && CRYPTO [=y] vim +/pbha_bit0_hide_file +1454 fs/proc/base.c 1453 > 1454 bool pbha_bit0_hide_file(const char *name) 1455 { 1456 if (!system_support_pbha_bit0() && !strncmp("pbha_bit0", name, 9)) 1457 return true; 1458 1459 return false; 1460 } 1461 #else 1462 static bool pbha_bit0_hide_file(const char *name) { return false; } 1463 #endif 1464 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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