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[PATCH openEuler-1.0-LTS] PM: hibernate: Get block device exclusively in swsusp_check()
by Yang Yingliang 01 Nov '21

01 Nov '21

From: Ye Bin <yebin10(a)huawei.com> mainline inclusion from mainline-v5.16 commit 39fbef4b0f77f9c89c8f014749ca533643a37c9f category: bugfix bugzilla: 182871 CVE: NA ----------------------------------------------- The following kernel crash can be triggered: [ 89.266592] ------------[ cut here ]------------ [ 89.267427] kernel BUG at fs/buffer.c:3020! [ 89.268264] invalid opcode: 0000 [#1] SMP KASAN PTI [ 89.269116] CPU: 7 PID: 1750 Comm: kmmpd-loop0 Not tainted 5.10.0-862.14.0.6.x86_64-08610-gc932cda3cef4-dirty #20 [ 89.273169] RIP: 0010:submit_bh_wbc.isra.0+0x538/0x6d0 [ 89.277157] RSP: 0018:ffff888105ddfd08 EFLAGS: 00010246 [ 89.278093] RAX: 0000000000000005 RBX: ffff888124231498 RCX: ffffffffb2772612 [ 89.279332] RDX: 1ffff11024846293 RSI: 0000000000000008 RDI: ffff888124231498 [ 89.280591] RBP: ffff8881248cc000 R08: 0000000000000001 R09: ffffed1024846294 [ 89.281851] R10: ffff88812423149f R11: ffffed1024846293 R12: 0000000000003800 [ 89.283095] R13: 0000000000000001 R14: 0000000000000000 R15: ffff8881161f7000 [ 89.284342] FS: 0000000000000000(0000) GS:ffff88839b5c0000(0000) knlGS:0000000000000000 [ 89.285711] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 89.286701] CR2: 00007f166ebc01a0 CR3: 0000000435c0e000 CR4: 00000000000006e0 [ 89.287919] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 89.289138] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 89.290368] Call Trace: [ 89.290842] write_mmp_block+0x2ca/0x510 [ 89.292218] kmmpd+0x433/0x9a0 [ 89.294902] kthread+0x2dd/0x3e0 [ 89.296268] ret_from_fork+0x22/0x30 [ 89.296906] Modules linked in: by running the following commands: 1. mkfs.ext4 -O mmp /dev/sda -b 1024 2. mount /dev/sda /home/test 3. echo "/dev/sda" > /sys/power/resume That happens because swsusp_check() calls set_blocksize() on the target partition which confuses the file system: Thread1 Thread2 mount /dev/sda /home/test get s_mmp_bh --> has mapped flag start kmmpd thread echo "/dev/sda" > /sys/power/resume resume_store software_resume swsusp_check set_blocksize truncate_inode_pages_range truncate_cleanup_page block_invalidatepage discard_buffer --> clean mapped flag write_mmp_block submit_bh submit_bh_wbc BUG_ON(!buffer_mapped(bh)) To address this issue, modify swsusp_check() to open the target block device with exclusive access. Signed-off-by: Ye Bin <yebin10(a)huawei.com> [ rjw: Subject and changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki(a)intel.com> Signed-off-by: Ye Bin <yebin10(a)huawei.com> Reviewed-by: Jason Yan <yanaijie(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- kernel/power/swap.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/kernel/power/swap.c b/kernel/power/swap.c index d7f6c1a288d33..4fde37fce4ea4 100644 --- a/kernel/power/swap.c +++ b/kernel/power/swap.c @@ -1512,9 +1512,10 @@ int swsusp_read(unsigned int *flags_p) int swsusp_check(void) { int error; + void *holder; hib_resume_bdev = blkdev_get_by_dev(swsusp_resume_device, - FMODE_READ, NULL); + FMODE_READ | FMODE_EXCL, &holder); if (!IS_ERR(hib_resume_bdev)) { set_blocksize(hib_resume_bdev, PAGE_SIZE); clear_page(swsusp_header); @@ -1536,7 +1537,7 @@ int swsusp_check(void) put: if (error) - blkdev_put(hib_resume_bdev, FMODE_READ); + blkdev_put(hib_resume_bdev, FMODE_READ | FMODE_EXCL); else pr_debug("Image signature found, resuming\n"); } else { -- 2.25.1

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[PATCH openEuler-1.0-LTS V3] README: README optimize
by Laibin Qiu 01 Nov '21

01 Nov '21

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4FS3G?from=project-issue CVE: NA --------------------------- There are some language problems in the README file, and MarkDown fromat syntax is not effective, and it needs to be adjusted. Signed-off-by: suqin <suqin2(a)huawei.com> Signed-off-by: Laibin Qiu <qiulaibin(a)huawei.com> Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> --- README | 311 +++++++++++++++++++++++++++++---------------------------- 1 file changed, 161 insertions(+), 150 deletions(-) diff --git a/README b/README index 46c9ea352..3374c4726 100644 --- a/README +++ b/README @@ -1,174 +1,188 @@ -Contributions to openEuler kernel project -========================================= +# How to Contribute +------- -Sign CLA --------- +- [How to Contribute](#How to Contribute) -Before submitting any Contributions to openEuler, you have to sign CLA. + \- [Sign the CLA](#Sign the CLA) -See: - https://openeuler.org/zh/cla.html - https://openeuler.org/en/cla.html + \- [Steps of submitting patches](#Steps of submitting patches) -Steps of submitting patches ---------------------------- + \- [Use the unified patch format](#Use the unified patch format) -1. Compile and test your patches successfully. -2. Generate patches - Your patches should be based on top of latest openEuler branch, and should - use git-format-patch to generate patches, and if it's a patchset, it's - better to use --cover-letter option to describe what the patchset does. + \- [Define the patch format](#Define the patch format) - Using scripts/checkpatch.pl to make sure there's no coding style issue. + \- [Examples](#Examples) - And make sure your patch follow unified openEuler patch format describe - below. + \- [Email client - Thunderbird settings](#Email client - Thunderbird settings) -3. Send patch to openEuler mailing list - Use this command to send patches to openEuler mailing list: +- [Linux kernel](#Linux kernel) - git send-email *.patch -to="kernel(a)openeuler.org" --suppress-cc=all +### Sign the CLA - *NOTE*: that you must add --suppress-cc=all if you use git send-email, - otherwise the email will be cced to the people in upstream community and mailing - lists. +------- - *See*: How to send patches using git-send-email - https://git-scm.com/docs/git-send-email +Before making any contributions to openEuler, sign the CLA first. -4. Mark "v1, v2, v3 ..." in your patch subject if you have multiple versions - to send out. +Address: [https://openeuler.org/en/cla.html](https://openeuler.org/en/cla.html) - Use --subject-prefix="PATCH v2" option to add v2 tag for patchset. - git format-patch --subject-prefix="PATCH v2" -1 +### Steps of submitting patches +------- - Subject examples: - Subject: [PATCH v2 01/27] fork: fix some -Wmissing-prototypes warnings - Subject: [PATCH v3] ext2: improve scalability of bitmap searching +**Step 1** Compile and test your patches. -5. Upstream your kernel patch to kernel community is strongly recommended. - openEuler will sync up with kernel master timely. +**Step 2** Generate patches. -6. Sign your work - the Developer’s Certificate of Origin - As the same of upstream kernel community, you also need to sign your patch. +Your patches should be generated based on the latest openEuler branch using git-format-patch. If your patches are in a patchset, it is better to use the **--cover-letter** option to describe what the patchset does. - See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html +Use **scripts/checkpatch.pl** to ensure that no coding style issue exists. - The sign-off is a simple line at the end of the explanation for the patch, - which certifies that you wrote it or otherwise have the right to pass it - on as an open-source patch. The rules are pretty simple: if you can certify - the below: +In addition, ensure that your patches comply with the unified openEuler patch format described below. - Developer’s Certificate of Origin 1.1 - ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +**Step 3** Send your patches to the openEuler mailing list. - By making a contribution to this project, I certify that: +To do so, run the following command: - (a) The contribution was created in whole or in part by me and I have - the right to submit it under the open source license indicated in - the file; or + `git send-email *.patch -to="kernel(a)openeuler.org" --suppress-cc=all` - (b The contribution is based upon previous work that, to the best of - my knowledge, is covered under an appropriate open source license - and I have the right under that license to submit that work with - modifications, whether created in whole or in part by me, under - the same open source license (unless I am permitted to submit under - a different license), as indicated in the file; or +*NOTE*: Add **--suppress-cc=all** if you use git-send-email; otherwise, the email will be copied to all people in the upstream community and mailing lists. - (c) The contribution was provided directly to me by some other person - who certified (a), (b) or (c) and I have not modified it. +For details about how to send patches using git-send-email, see [https://git-scm.com/docs/git-send-email](https://git-scm.com/docs/git-send-…. - (d) I understand and agree that this project and the contribution are - public and that a record of the contribution (including all personal - information I submit with it, including my sign-off) is maintained - indefinitely and may be redistributed consistent with this project - or the open source license(s) involved. +**Step 4** Mark "v1, v2, v3 ..." in your patch subject if you have multiple versions to send out. - then you just add a line saying: +Use the **--subject-prefix="PATCH v2"** option to add the v2 tag to the patchset. - Signed-off-by: Random J Developer <random(a)developer.example.org> + `git format-patch --subject-prefix="PATCH v2" -1` - using your real name (sorry, no pseudonyms or anonymous contributions.) +Subject examples: -Use unified patch format ------------------------- + Subject: [PATCH v2 01/27] fork: fix some -Wmissing-prototypes warnings + + Subject: [PATCH v3] ext2: improve scalability of bitmap searching + +**Step 5** Upstream your kernel patches to the kernel community (recommended). openEuler will synchronize with the kernel master in a timely manner. + +**Step 6** Sign your work - the Developer’s Certificate of Origin. + + Similar to the upstream kernel community, you also need to sign your patch. + + For details, see [https://www.kernel.org/doc/html/latest/process/submitting-patches.html](htt…. + + The sign-off is a simple line at the end of the explanation of the patch, which certifies that you wrote it or otherwise have the right to pass it on as an open source patch. The rules are pretty simple. You can certify as below: + + Developer’s Certificate of Origin 1.1 + + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + By making a contribution to this project, I certify that: + + (a) The contribution was created in whole or in part by me and I have the right to submit it under the open source license indicated in the file; + + (b) The contribution is based upon previous work that, to the best of my knowledge, is covered under an appropriate open source license and I have the right under that license to submit that work with modifications, whether created in whole or in part by me, under the same open source license (unless I am permitted to submit under a different license), as indicated in the file; + + (c) The contribution was provided directly to me by some other person who certified (a), (b) or (c) and I have not modified it. + + (d) I understand and agree that this project and the contribution are public and that a record of the contribution (including all personal information I submit with it, including my sign-off) is maintained indefinitely and may be redistributed consistent with this project or the open source license(s) involved. + +Then you add a line saying: + +Signed-off-by: Random J Developer <random(a)developer.example.org> + +Use your real name (sorry, no pseudonyms or anonymous contributions). + +### Use the unified patch format +------- Reasons: -1. long term maintainability - openEuler will merge massive patches. If all patches are merged by casual - changelog format without a unified format, the git log will be messy, and - then it's hard to figure out the original patch. +1. Long term maintainability + + openEuler will merge massive patches. If all patches are merged by casual + + changelog formats without a unified format, the git logs will be messy, and + + then it is hard to figure out the original patches. + +2. Kernel upgrade -2. kernel upgrade - We definitely will upgrade our openEuler kernel in someday, using strict - patch management will alleviate the pain to migrate patches during big upgrade. + We definitely will upgrade our openEuler kernel in someday, so strict patch management -3. easy for script parsing - Keyword highlighting is necessary for script parsing. + will alleviate the pain to migrate patches during big upgrades. -Patch format definition ------------------------ +3. Easy for script parsing + + Keyword highlighting is necessary for script parsing. + +### Define the patch format +------- + +[M] stands for "mandatory". + +[O] stands for "option". -[M] stands for "mandatory" -[O] stands for "option" $category can be: bug preparation, bugfix, perf, feature, doc, other... -If category is feature, then we also need to add feature name like below: - category: feature - feature: YYY (the feature name) +If category is feature, we need to add a feature name as below: -If the patch is related to CVE or bugzilla, then we need add the corresponding -tag like below (In general, it should include at least one of the following): - CVE: $cve-id - bugzilla: $bug-id +```cpp +category: feature +feature: YYY (the feature name) +``` -Additional changelog should include at least one of the flollwing: - 1) Why we should apply this patch - 2) What real problem in product does this patch resolved - 3) How could we reproduce this bug or how to test - 4) Other useful information for help to understand this patch or problem +If the patch is related to CVE or bugzilla, we need to add the corresponding tag as below (In general, it should include at least one of the following): -The detail information is very useful for porting patch to another kenrel branch. +```cpp +CVE: $cve-id +bugzilla: $bug-id +``` -Example for mainline patch: +Additional changelog should include at least one of the following: - mainline inclusion [M] - from $mainline-version [M] - commit $id [M] - category: $category [M] - bugzilla: $bug-id [O] - CVE: $cve-id [O] +1. Why we should apply this patch - additional changelog [O] +2. What real problems in the product does this patch resolved + +3. How could we reproduce this bug or how to test + +4. Other useful information for help to understand this patch or problem + +The detailed information is very useful for migrating a patch to another kernel branch. + +Example for mainline patch: - -------------------------------- +```cpp +mainline inclusion [M] +from $mainline-version [M] +commit $id [M] +category: $category [M] +bugzilla: $bug-id [O] +CVE: $cve-id [O] - original changelog +additional changelog [O] - Signed-off-by: $yourname <$yourname(a)huawei.com> [M] +-------------------------------- - ($mainline-version could be mainline-3.5, mainline-3.6, etc...) +original changelog +Signed-off-by: $yourname <$yourname(a)huawei.com> [M] +($mainline-version could be mainline-3.5, mainline-3.6, etc...) +``` -Examples --------- +### Examples +------- +```cpp mainline inclusion from mainline-4.10 commit 0becc0ae5b42828785b589f686725ff5bc3b9b25 category: bugfix bugzilla: 3004 -CVE: NA - -The patch fixes a BUG_ON in the product: injecting single bit ECC error -to memory before system boot use hardware inject tools, which cause a -large amount of CMCI during system booting . +CVE: N/A -[ 1.146580] mce: [Hardware Error]: Machine check events logged -[ 1.152908] ------------[ cut here ]------------ -[ 1.157751] kernel BUG at kernel/timer.c:951! -[ 1.162321] invalid opcode: 0000 [#1] SMP -... +The patch fixes a BUG_ON in the product: Injecting a single bit ECC error to the memory before system boot using hardware inject tools will cause a large amount of CMCI during system booting . +[ 1.146580] mce: [Hardware Error]: Machine check events logged +[ 1.152908] ------------[ cut here ]------------ +[ 1.157751] kernel BUG at kernel/timer.c:951! +[ 1.162321] invalid opcode: 0000 [#1] SMP ------------------------------------------------- @@ -177,50 +191,47 @@ original changelog <original S-O-B> Signed-off-by: Zhang San <zhangsan(a)huawei.com> Tested-by: Li Si <lisi(a)huawei.com> +``` + +### Email client - Thunderbird settings +------- + +If you are a new developer in the kernel community, it is highly recommended that you use the Thunderbird mail client. + +1. Thunderbird Installation + + Obtain the English version of Thunderbird from [http://www.mozilla.org/]( http://www.mozilla.org/) and install it on your system. + + Download URL: https://www.thunderbird.net/en-US/thunderbird/all/ + +2. Settings + + 2.1 Use the plain text format instead of the HTML format. + + Choose **Options > Account Settings > Composition & Addressing**, and do **NOT** select Compose message in HTML format. -Email Client - Thunderbird Settings ------------------------------------ + 2.2 Editor settings -If you are newly developer in the kernel community, it is highly recommended -to use thunderbird mail client. + **Tools > Options> Advanced > Config editor** -1. Thunderbird Installation - Get English version Thunderbird from http://www.mozilla.org/ and install - it on your system。 + \- To bring up the Thunderbird's registry editor, set **mailnews.send_plaintext_flowed** to **false**. - Download url: https://www.thunderbird.net/en-US/thunderbird/all/ + \- Disable HTML Format: Set **mail.identity.id1.compose_html** to **false**. -2. Settings - 2.1 Use plain text format instead of HTML format - Options -> Account Settings -> Composition & Addressing, do *NOT* select - "Compose message in HTML format". + \- Enable UTF-8: Set **prefs.converted-to-utf8** to **true**. - 2.2 Editor Settings - Tools->Options->Advanced->Config editor. + \- View messages in UTF-8: Set **mailnews.view_default_charset** to **UTF-8**. - - To bring up the thunderbird's registry editor, and set: - "mailnews.send_plaintext_flowed" to "false". - - Disable HTML Format: Set "mail.identity.id1.compose_html" to "false". - - Enable UTF8: Set "prefs.converted-to-utf8" to "true". - - View message in UTF-8: Set "mailnews.view_default_charset" to "UTF-8". - - Set mailnews.wraplength to 9999 for avoiding auto-wrap + \- Set **mailnews.wraplength** to **9999** to avoid auto-wrap. -Linux kernel -============ +# Linux kernel +------- -There are several guides for kernel developers and users. These guides can -be rendered in a number of formats, like HTML and PDF. Please read -Documentation/admin-guide/README.rst first. +There are several guides for kernel developers and users, which can be rendered in a number of formats, like HTML and PDF. You can read **Documentation/admin-guide/README.rst** first. -In order to build the documentation, use ``make htmldocs`` or -``make pdfdocs``. The formatted documentation can also be read online at: +In order to build the documentation, use **make htmldocs** or **make pdfdocs**. The formatted documentation can also be read online at: https://www.kernel.org/doc/html/latest/ - https://www.kernel.org/doc/html/latest/ +There are various text files in the Documentation/ subdirectory, several of which use the Restructured Text markup notation. See Documentation/00-INDEX for a list of what is contained in each file. -There are various text files in the Documentation/ subdirectory, -several of them using the Restructured Text markup notation. -See Documentation/00-INDEX for a list of what is contained in each file. +Read the **Documentation/process/changes.rst** file, as it contains the requirements for building and running the kernel, and information about the problems that may be caused by upgrading your kernel. -Please read the Documentation/process/changes.rst file, as it contains the -requirements for building and running the kernel, and information about -the problems which may result by upgrading your kernel. -- 2.22.0

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[PATCH openEuler-1.0-LTS] blk-cgroup: synchronize blkg creation against policy deactivation
by Yang Yingliang 01 Nov '21

01 Nov '21

From: Yu Kuai <yukuai3(a)huawei.com> mainline inclusion from mainline-v5.16 commit 0c9d338c8443b06da8e8d3bfce824c5ea6d3488f category: bugfix bugzilla: 182378 CVE: NA --------------------------- Our test reports a null pointer dereference: [ 168.534653] ================================================================== [ 168.535614] Disabling lock debugging due to kernel taint [ 168.536346] BUG: kernel NULL pointer dereference, address: 0000000000000008 [ 168.537274] #PF: supervisor read access in kernel mode [ 168.537964] #PF: error_code(0x0000) - not-present page [ 168.538667] PGD 0 P4D 0 [ 168.539025] Oops: 0000 [#1] PREEMPT SMP KASAN [ 168.539656] CPU: 13 PID: 759 Comm: bash Tainted: G B 5.15.0-rc2-next-202100 [ 168.540954] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS ?-20190727_0738364 [ 168.542736] RIP: 0010:bfq_pd_init+0x88/0x1e0 [ 168.543318] Code: 98 00 00 00 e8 c9 e4 5b ff 4c 8b 65 00 49 8d 7c 24 08 e8 bb e4 5b ff 4d0 [ 168.545803] RSP: 0018:ffff88817095f9c0 EFLAGS: 00010002 [ 168.546497] RAX: 0000000000000001 RBX: ffff888101a1c000 RCX: 0000000000000000 [ 168.547438] RDX: 0000000000000003 RSI: 0000000000000002 RDI: ffff888106553428 [ 168.548402] RBP: ffff888106553400 R08: ffffffff961bcaf4 R09: 0000000000000001 [ 168.549365] R10: ffffffffa2e16c27 R11: fffffbfff45c2d84 R12: 0000000000000000 [ 168.550291] R13: ffff888101a1c098 R14: ffff88810c7a08c8 R15: ffffffffa55541a0 [ 168.551221] FS: 00007fac75227700(0000) GS:ffff88839ba80000(0000) knlGS:0000000000000000 [ 168.552278] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 168.553040] CR2: 0000000000000008 CR3: 0000000165ce7000 CR4: 00000000000006e0 [ 168.554000] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 168.554929] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 168.555888] Call Trace: [ 168.556221] <TASK> [ 168.556510] blkg_create+0x1c0/0x8c0 [ 168.556989] blkg_conf_prep+0x574/0x650 [ 168.557502] ? stack_trace_save+0x99/0xd0 [ 168.558033] ? blkcg_conf_open_bdev+0x1b0/0x1b0 [ 168.558629] tg_set_conf.constprop.0+0xb9/0x280 [ 168.559231] ? kasan_set_track+0x29/0x40 [ 168.559758] ? kasan_set_free_info+0x30/0x60 [ 168.560344] ? tg_set_limit+0xae0/0xae0 [ 168.560853] ? do_sys_openat2+0x33b/0x640 [ 168.561383] ? do_sys_open+0xa2/0x100 [ 168.561877] ? __x64_sys_open+0x4e/0x60 [ 168.562383] ? __kasan_check_write+0x20/0x30 [ 168.562951] ? copyin+0x48/0x70 [ 168.563390] ? _copy_from_iter+0x234/0x9e0 [ 168.563948] tg_set_conf_u64+0x17/0x20 [ 168.564467] cgroup_file_write+0x1ad/0x380 [ 168.565014] ? cgroup_file_poll+0x80/0x80 [ 168.565568] ? __mutex_lock_slowpath+0x30/0x30 [ 168.566165] ? pgd_free+0x100/0x160 [ 168.566649] kernfs_fop_write_iter+0x21d/0x340 [ 168.567246] ? cgroup_file_poll+0x80/0x80 [ 168.567796] new_sync_write+0x29f/0x3c0 [ 168.568314] ? new_sync_read+0x410/0x410 [ 168.568840] ? __handle_mm_fault+0x1c97/0x2d80 [ 168.569425] ? copy_page_range+0x2b10/0x2b10 [ 168.570007] ? _raw_read_lock_bh+0xa0/0xa0 [ 168.570622] vfs_write+0x46e/0x630 [ 168.571091] ksys_write+0xcd/0x1e0 [ 168.571563] ? __x64_sys_read+0x60/0x60 [ 168.572081] ? __kasan_check_write+0x20/0x30 [ 168.572659] ? do_user_addr_fault+0x446/0xff0 [ 168.573264] __x64_sys_write+0x46/0x60 [ 168.573774] do_syscall_64+0x35/0x80 [ 168.574264] entry_SYSCALL_64_after_hwframe+0x44/0xae [ 168.574960] RIP: 0033:0x7fac74915130 [ 168.575456] Code: 73 01 c3 48 8b 0d 58 ed 2c 00 f7 d8 64 89 01 48 83 c8 ff c3 66 0f 1f 444 [ 168.577969] RSP: 002b:00007ffc3080e288 EFLAGS: 00000246 ORIG_RAX: 0000000000000001 [ 168.578986] RAX: ffffffffffffffda RBX: 0000000000000009 RCX: 00007fac74915130 [ 168.579937] RDX: 0000000000000009 RSI: 000056007669f080 RDI: 0000000000000001 [ 168.580884] RBP: 000056007669f080 R08: 000000000000000a R09: 00007fac75227700 [ 168.581841] R10: 000056007655c8f0 R11: 0000000000000246 R12: 0000000000000009 [ 168.582796] R13: 0000000000000001 R14: 00007fac74be55e0 R15: 00007fac74be08c0 [ 168.583757] </TASK> [ 168.584063] Modules linked in: [ 168.584494] CR2: 0000000000000008 [ 168.584964] ---[ end trace 2475611ad0f77a1a ]--- This is because blkg_alloc() is called from blkg_conf_prep() without holding 'q->queue_lock', and elevator is exited before blkg_create(): thread 1 thread 2 blkg_conf_prep spin_lock_irq(&q->queue_lock); blkg_lookup_check -> return NULL spin_unlock_irq(&q->queue_lock); blkg_alloc blkcg_policy_enabled -> true pd = ->pd_alloc_fn blkg->pd[i] = pd blk_mq_exit_sched bfq_exit_queue blkcg_deactivate_policy spin_lock_irq(&q->queue_lock); __clear_bit(pol->plid, q->blkcg_pols); spin_unlock_irq(&q->queue_lock); q->elevator = NULL; spin_lock_irq(&q->queue_lock); blkg_create if (blkg->pd[i]) ->pd_init_fn -> q->elevator is NULL spin_unlock_irq(&q->queue_lock); Because blkcg_deactivate_policy() requires queue to be frozen, we can grab q_usage_counter to synchoronize blkg_conf_prep() against blkcg_deactivate_policy(). Fixes: e21b7a0b9887 ("block, bfq: add full hierarchical scheduling and cgroups support") Signed-off-by: Yu Kuai <yukuai3(a)huawei.com> Acked-by: Tejun Heo <tj(a)kernel.org> Link: https://lore.kernel.org/r/20211020014036.2141723-1-yukuai3@huawei.com Signed-off-by: Jens Axboe <axboe(a)kernel.dk> Conflict: block/blk-cgroup.c - commit ed6cddefdfd3 ("block: convert the rest of block to bdev_get_queue") is not backported. - commit 015d254cb02b ("blkcg: separate blkcg_conf_get_disk() out of blkg_conf_prep()") is not backported. Signed-off-by: Yu Kuai <yukuai3(a)huawei.com> Reviewed-by: Jason Yan <yanaijie(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- block/blk-cgroup.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c index 7dca3a0144243..d4a8d8fbe1a0e 100644 --- a/block/blk-cgroup.c +++ b/block/blk-cgroup.c @@ -857,6 +857,14 @@ int blkg_conf_prep(struct blkcg *blkcg, const struct blkcg_policy *pol, q = disk->queue; + /* + * blkcg_deactivate_policy() requires queue to be frozen, we can grab + * q_usage_counter to prevent concurrent with blkcg_deactivate_policy(). + */ + ret = blk_queue_enter(q, 0); + if (ret) + goto fail; + rcu_read_lock(); spin_lock_irq(q->queue_lock); @@ -891,13 +899,13 @@ int blkg_conf_prep(struct blkcg *blkcg, const struct blkcg_policy *pol, new_blkg = blkg_alloc(pos, q, GFP_KERNEL); if (unlikely(!new_blkg)) { ret = -ENOMEM; - goto fail; + goto fail_exit_queue; } if (radix_tree_preload(GFP_KERNEL)) { blkg_free(new_blkg); ret = -ENOMEM; - goto fail; + goto fail_exit_queue; } rcu_read_lock(); @@ -926,6 +934,7 @@ int blkg_conf_prep(struct blkcg *blkcg, const struct blkcg_policy *pol, goto success; } success: + blk_queue_exit(q); ctx->disk = disk; ctx->blkg = blkg; ctx->body = body; @@ -936,6 +945,8 @@ int blkg_conf_prep(struct blkcg *blkcg, const struct blkcg_policy *pol, fail_unlock: spin_unlock_irq(q->queue_lock); rcu_read_unlock(); +fail_exit_queue: + blk_queue_exit(q); fail: put_disk_and_module(disk); /* -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS] isdn: cpai: check ctr->cnr to avoid array index out of bound
by Yang Yingliang 01 Nov '21

01 Nov '21

From: Xiaolong Huang <butterflyhuangxx(a)gmail.com> stable inclusion from linux-4.19.214 commit 7d91adc0ccb060ce564103315189466eb822cc6a CVE: CVE-2021-3896 -------------------------------- commit 1f3e2e97c003f80c4b087092b225c8787ff91e4d upstream. The cmtp_add_connection() would add a cmtp session to a controller and run a kernel thread to process cmtp. __module_get(THIS_MODULE); session->task = kthread_run(cmtp_session, session, "kcmtpd_ctr_%d", session->num); During this process, the kernel thread would call detach_capi_ctr() to detach a register controller. if the controller was not attached yet, detach_capi_ctr() would trigger an array-index-out-bounds bug. [ 46.866069][ T6479] UBSAN: array-index-out-of-bounds in drivers/isdn/capi/kcapi.c:483:21 [ 46.867196][ T6479] index -1 is out of range for type 'capi_ctr *[32]' [ 46.867982][ T6479] CPU: 1 PID: 6479 Comm: kcmtpd_ctr_0 Not tainted 5.15.0-rc2+ #8 [ 46.869002][ T6479] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.14.0-2 04/01/2014 [ 46.870107][ T6479] Call Trace: [ 46.870473][ T6479] dump_stack_lvl+0x57/0x7d [ 46.870974][ T6479] ubsan_epilogue+0x5/0x40 [ 46.871458][ T6479] __ubsan_handle_out_of_bounds.cold+0x43/0x48 [ 46.872135][ T6479] detach_capi_ctr+0x64/0xc0 [ 46.872639][ T6479] cmtp_session+0x5c8/0x5d0 [ 46.873131][ T6479] ? __init_waitqueue_head+0x60/0x60 [ 46.873712][ T6479] ? cmtp_add_msgpart+0x120/0x120 [ 46.874256][ T6479] kthread+0x147/0x170 [ 46.874709][ T6479] ? set_kthread_struct+0x40/0x40 [ 46.875248][ T6479] ret_from_fork+0x1f/0x30 [ 46.875773][ T6479] Signed-off-by: Xiaolong Huang <butterflyhuangxx(a)gmail.com> Acked-by: Arnd Bergmann <arnd(a)arndb.de> Link: https://lore.kernel.org/r/20211008065830.305057-1-butterflyhuangxx@gmail.com Signed-off-by: Jakub Kicinski <kuba(a)kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Signed-off-by: Rui Xiang <rui.xiang(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/isdn/capi/kcapi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/isdn/capi/kcapi.c b/drivers/isdn/capi/kcapi.c index a4ceb61c5b603..ed9ee2bbf232e 100644 --- a/drivers/isdn/capi/kcapi.c +++ b/drivers/isdn/capi/kcapi.c @@ -565,6 +565,11 @@ int detach_capi_ctr(struct capi_ctr *ctr) ctr_down(ctr, CAPI_CTR_DETACHED); + if (ctr->cnr < 1 || ctr->cnr - 1 >= CAPI_MAXCONTR) { + err = -EINVAL; + goto unlock_out; + } + if (capi_controller[ctr->cnr - 1] != ctr) { err = -EINVAL; goto unlock_out; -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS] nbd: Fix use-after-free in pid_show
by Yang Yingliang 01 Nov '21

01 Nov '21

From: Ye Bin <yebin10(a)huawei.com> mainline inclusion from mainline-v5.16 commit 0c98057be9efa32de78dbc4685fc73da9d71faa1 category: bugfix bugzilla: 182939 CVE: NA ----------------------------------------------- I got issue as follows: [ 263.886511] BUG: KASAN: use-after-free in pid_show+0x11f/0x13f [ 263.888359] Read of size 4 at addr ffff8880bf0648c0 by task cat/746 [ 263.890479] CPU: 0 PID: 746 Comm: cat Not tainted 4.19.90-dirty #140 [ 263.893162] Call Trace: [ 263.893509] dump_stack+0x108/0x15f [ 263.893999] print_address_description+0xa5/0x372 [ 263.894641] kasan_report.cold+0x236/0x2a8 [ 263.895696] __asan_report_load4_noabort+0x25/0x30 [ 263.896365] pid_show+0x11f/0x13f [ 263.897422] dev_attr_show+0x48/0x90 [ 263.898361] sysfs_kf_seq_show+0x24d/0x4b0 [ 263.899479] kernfs_seq_show+0x14e/0x1b0 [ 263.900029] seq_read+0x43f/0x1150 [ 263.900499] kernfs_fop_read+0xc7/0x5a0 [ 263.903764] vfs_read+0x113/0x350 [ 263.904231] ksys_read+0x103/0x270 [ 263.905230] __x64_sys_read+0x77/0xc0 [ 263.906284] do_syscall_64+0x106/0x360 [ 263.906797] entry_SYSCALL_64_after_hwframe+0x44/0xa9 Reproduce this issue as follows: 1. nbd-server 8000 /tmp/disk 2. nbd-client localhost 8000 /dev/nbd1 3. cat /sys/block/nbd1/pid Then trigger use-after-free in pid_show. Reason is after do step '2', nbd-client progress is already exit. So it's task_struct already freed. To solve this issue, revert part of 6521d39a64b3's modify and remove useless 'recv_task' member of nbd_device. Fixes: 6521d39a64b3 ("nbd: Remove variable 'pid'") Signed-off-by: Ye Bin <yebin10(a)huawei.com> Reviewed-by: Josef Bacik <josef(a)toxicpanda.com> Link: https://lore.kernel.org/r/20211020073959.2679255-1-yebin10@huawei.com Signed-off-by: Jens Axboe <axboe(a)kernel.dk> conflicts: drivers/block/nbd.c Signed-off-by: Ye Bin <yebin10(a)huawei.com> Reviewed-by: Jason Yan <yanaijie(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/block/nbd.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c index 45e6ae6add382..2a3794801704a 100644 --- a/drivers/block/nbd.c +++ b/drivers/block/nbd.c @@ -112,11 +112,11 @@ struct nbd_device { struct workqueue_struct *recv_workq; struct list_head list; - struct task_struct *task_recv; struct task_struct *task_setup; struct completion *destroy_complete; unsigned long flags; + pid_t pid; /* pid of nbd-client, if attached */ }; #define NBD_CMD_REQUEUED 1 @@ -211,7 +211,7 @@ static ssize_t pid_show(struct device *dev, struct gendisk *disk = dev_to_disk(dev); struct nbd_device *nbd = (struct nbd_device *)disk->private_data; - return sprintf(buf, "%d\n", task_pid_nr(nbd->task_recv)); + return sprintf(buf, "%d\n", nbd->pid); } static const struct device_attribute pid_attr = { @@ -329,7 +329,7 @@ static void nbd_size_set(struct nbd_device *nbd, loff_t blocksize, struct nbd_config *config = nbd->config; config->blksize = blocksize; config->bytesize = blocksize * nr_blocks; - if (nbd->task_recv != NULL) + if (nbd->pid) nbd_size_update(nbd, false); } @@ -1234,7 +1234,7 @@ static void nbd_config_put(struct nbd_device *nbd) if (test_and_clear_bit(NBD_RT_HAS_PID_FILE, &config->runtime_flags)) device_remove_file(disk_to_dev(nbd->disk), &pid_attr); - nbd->task_recv = NULL; + nbd->pid = 0; nbd_clear_sock(nbd); if (config->num_connections) { int i; @@ -1269,7 +1269,7 @@ static int nbd_start_device(struct nbd_device *nbd) int num_connections = config->num_connections; int error = 0, i; - if (nbd->task_recv) + if (nbd->pid) return -EBUSY; if (!config->socks) return -EINVAL; @@ -1288,7 +1288,7 @@ static int nbd_start_device(struct nbd_device *nbd) } blk_mq_update_nr_hw_queues(&nbd->tag_set, config->num_connections); - nbd->task_recv = current; + nbd->pid = task_pid_nr(current); nbd_parse_flags(nbd); @@ -1546,8 +1546,8 @@ static int nbd_dbg_tasks_show(struct seq_file *s, void *unused) { struct nbd_device *nbd = s->private; - if (nbd->task_recv) - seq_printf(s, "recv: %d\n", task_pid_nr(nbd->task_recv)); + if (nbd->pid) + seq_printf(s, "recv: %d\n", nbd->pid); return 0; } @@ -2106,7 +2106,7 @@ static int nbd_genl_reconfigure(struct sk_buff *skb, struct genl_info *info) mutex_lock(&nbd->config_lock); config = nbd->config; if (!test_bit(NBD_RT_BOUND, &config->runtime_flags) || - !nbd->task_recv) { + !nbd->pid) { dev_err(nbd_to_dev(nbd), "not configured, cannot reconfigure\n"); ret = -EINVAL; -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS] iommu/arm-smmu-v3: Add suspend and resume support
by Yang Yingliang 01 Nov '21

01 Nov '21

From: Bixuan Cui <cuibixuan(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4DZ7Q CVE: NA ------------------------------------------------------- Add suspend and resume support for smmuv3. The smmu is stopped when suspending and started when resuming. Signed-off-by: Bixuan Cui <cuibixuan(a)huawei.com> Signed-off-by: Zhou Guanghui <zhouguanghui1(a)huawei.com> Reviewed-by: Hanjun Guo <guohanjun(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/iommu/arm-smmu-v3.c | 98 +++++++++++++++++++++++++++++++++---- 1 file changed, 88 insertions(+), 10 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 560980c54014a..12d503bb3b1e0 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -693,6 +693,7 @@ struct arm_smmu_device { unsigned int mpam_partid_max; unsigned int mpam_pmg_max; + bool bypass; }; struct arm_smmu_stream { @@ -3455,6 +3456,13 @@ static void arm_smmu_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg) doorbell = (((u64)msg->address_hi) << 32) | msg->address_lo; doorbell &= MSI_CFG0_ADDR_MASK; +#ifdef CONFIG_PM_SLEEP + /* Saves the msg (base addr of msi irq) and restores it during resume */ + desc->msg.address_lo = msg->address_lo; + desc->msg.address_hi = msg->address_hi; + desc->msg.data = msg->data; +#endif + writeq_relaxed(doorbell, smmu->base + cfg[0]); writel_relaxed(msg->data, smmu->base + cfg[1]); writel_relaxed(ARM_SMMU_MEMATTR_DEVICE_nGnRE, smmu->base + cfg[2]); @@ -3510,6 +3518,40 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu) devm_add_action(dev, arm_smmu_free_msis, dev); } +#ifdef CONFIG_PM_SLEEP +static void arm_smmu_resume_msis(struct arm_smmu_device *smmu) +{ + struct msi_desc *desc; + struct device *dev = smmu->dev; + + for_each_msi_entry(desc, dev) { + switch (desc->platform.msi_index) { + case EVTQ_MSI_INDEX: + case GERROR_MSI_INDEX: + case PRIQ_MSI_INDEX: { + phys_addr_t *cfg = arm_smmu_msi_cfg[desc->platform.msi_index]; + struct msi_msg *msg = &desc->msg; + phys_addr_t doorbell = (((u64)msg->address_hi) << 32) | msg->address_lo; + + doorbell &= MSI_CFG0_ADDR_MASK; + writeq_relaxed(doorbell, smmu->base + cfg[0]); + writel_relaxed(msg->data, smmu->base + cfg[1]); + writel_relaxed(ARM_SMMU_MEMATTR_DEVICE_nGnRE, + smmu->base + cfg[2]); + break; + } + default: + continue; + + } + } +} +#else +static void arm_smmu_resume_msis(struct arm_smmu_device *smmu) +{ +} +#endif + static void arm_smmu_setup_message_based_spi(struct arm_smmu_device *smmu) { struct irq_desc *desc; @@ -3541,11 +3583,17 @@ static void arm_smmu_setup_message_based_spi(struct arm_smmu_device *smmu) } } -static void arm_smmu_setup_unique_irqs(struct arm_smmu_device *smmu) +static void arm_smmu_setup_unique_irqs(struct arm_smmu_device *smmu, bool resume) { int irq, ret; - arm_smmu_setup_msis(smmu); + if (!resume) + arm_smmu_setup_msis(smmu); + else { + /* The irq doesn't need to be re-requested during resume */ + arm_smmu_resume_msis(smmu); + return; + } /* Request interrupt lines */ irq = smmu->evtq.q.irq; @@ -3587,7 +3635,7 @@ static void arm_smmu_setup_unique_irqs(struct arm_smmu_device *smmu) } } -static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu) +static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu, bool resume) { int ret, irq; u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; @@ -3614,7 +3662,7 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu) if (ret < 0) dev_warn(smmu->dev, "failed to enable combined irq\n"); } else - arm_smmu_setup_unique_irqs(smmu); + arm_smmu_setup_unique_irqs(smmu, resume); if (smmu->features & ARM_SMMU_FEAT_PRI) irqen_flags |= IRQ_CTRL_PRIQ_IRQEN; @@ -3642,7 +3690,7 @@ static int arm_smmu_device_disable(struct arm_smmu_device *smmu) return ret; } -static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) +static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool resume) { int ret; u32 reg, enables; @@ -3747,7 +3795,7 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) } } - ret = arm_smmu_setup_irqs(smmu); + ret = arm_smmu_setup_irqs(smmu, resume); if (ret) { dev_err(smmu->dev, "failed to setup irqs\n"); return ret; @@ -3757,7 +3805,7 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass) enables &= ~(CR0_EVTQEN | CR0_PRIQEN); /* Enable the SMMU interface, or ensure bypass */ - if (!bypass || disable_bypass) { + if (!smmu->bypass || disable_bypass) { enables |= CR0_SMMUEN; } else { ret = arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT); @@ -4383,6 +4431,26 @@ int arm_smmu_get_dev_user_mpam_en(struct device *dev, int *user_mpam_en) } EXPORT_SYMBOL(arm_smmu_get_dev_user_mpam_en); +#ifdef CONFIG_PM_SLEEP +static int arm_smmu_suspend(struct device *dev) +{ + /* + * The smmu is powered off and related registers are automatically + * cleared when suspend. No need to do anything. + */ + return 0; +} + +static int arm_smmu_resume(struct device *dev) +{ + struct arm_smmu_device *smmu = dev_get_drvdata(dev); + + arm_smmu_device_reset(smmu, true); + + return 0; +} +#endif + static int arm_smmu_device_probe(struct platform_device *pdev) { int irq, ret; @@ -4390,7 +4458,6 @@ static int arm_smmu_device_probe(struct platform_device *pdev) resource_size_t ioaddr; struct arm_smmu_device *smmu; struct device *dev = &pdev->dev; - bool bypass; smmu = devm_kzalloc(dev, sizeof(*smmu), GFP_KERNEL); if (!smmu) { @@ -4408,7 +4475,7 @@ static int arm_smmu_device_probe(struct platform_device *pdev) } /* Set bypass mode according to firmware probing result */ - bypass = !!ret; + smmu->bypass = !!ret; /* Base address */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -4454,7 +4521,7 @@ static int arm_smmu_device_probe(struct platform_device *pdev) platform_set_drvdata(pdev, smmu); /* Reset the device */ - ret = arm_smmu_device_reset(smmu, bypass); + ret = arm_smmu_device_reset(smmu, false); if (ret) return ret; @@ -4527,11 +4594,22 @@ static const struct of_device_id arm_smmu_of_match[] = { }; MODULE_DEVICE_TABLE(of, arm_smmu_of_match); +#ifdef CONFIG_PM_SLEEP +static const struct dev_pm_ops arm_smmu_pm_ops = { + .suspend = arm_smmu_suspend, + .resume = arm_smmu_resume, +}; +#define ARM_SMMU_PM_OPS (&arm_smmu_pm_ops) +#else +#define ARM_SMMU_PM_OPS NULL +#endif + static struct platform_driver arm_smmu_driver = { .driver = { .name = "arm-smmu-v3", .of_match_table = of_match_ptr(arm_smmu_of_match), .suppress_bind_attrs = true, + .pm = ARM_SMMU_PM_OPS, }, .probe = arm_smmu_device_probe, .remove = arm_smmu_device_remove, -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS 1/2] scsi: scsi_debug: Fix out-of-bound read in resp_readcap16()
by Yang Yingliang 01 Nov '21

01 Nov '21

From: Ye Bin <yebin10(a)huawei.com> mainline inclusion from mainline-v5.16 commit 4e3ace0051e7e504b55d239daab8789dd89b863c category: bugfix bugzilla: 176010 CVE: NA ----------------------------------------------- The following warning was observed running syzkaller: [ 3813.830724] sg_write: data in/out 65466/242 bytes for SCSI command 0x9e-- guessing data in; [ 3813.830724] program syz-executor not setting count and/or reply_len properly [ 3813.836956] ================================================================== [ 3813.839465] BUG: KASAN: stack-out-of-bounds in sg_copy_buffer+0x157/0x1e0 [ 3813.841773] Read of size 4096 at addr ffff8883cf80f540 by task syz-executor/1549 [ 3813.846612] Call Trace: [ 3813.846995] dump_stack+0x108/0x15f [ 3813.847524] print_address_description+0xa5/0x372 [ 3813.848243] kasan_report.cold+0x236/0x2a8 [ 3813.849439] check_memory_region+0x240/0x270 [ 3813.850094] memcpy+0x30/0x80 [ 3813.850553] sg_copy_buffer+0x157/0x1e0 [ 3813.853032] sg_copy_from_buffer+0x13/0x20 [ 3813.853660] fill_from_dev_buffer+0x135/0x370 [ 3813.854329] resp_readcap16+0x1ac/0x280 [ 3813.856917] schedule_resp+0x41f/0x1630 [ 3813.858203] scsi_debug_queuecommand+0xb32/0x17e0 [ 3813.862699] scsi_dispatch_cmd+0x330/0x950 [ 3813.863329] scsi_request_fn+0xd8e/0x1710 [ 3813.863946] __blk_run_queue+0x10b/0x230 [ 3813.864544] blk_execute_rq_nowait+0x1d8/0x400 [ 3813.865220] sg_common_write.isra.0+0xe61/0x2420 [ 3813.871637] sg_write+0x6c8/0xef0 [ 3813.878853] __vfs_write+0xe4/0x800 [ 3813.883487] vfs_write+0x17b/0x530 [ 3813.884008] ksys_write+0x103/0x270 [ 3813.886268] __x64_sys_write+0x77/0xc0 [ 3813.886841] do_syscall_64+0x106/0x360 [ 3813.887415] entry_SYSCALL_64_after_hwframe+0x44/0xa9 This issue can be reproduced with the following syzkaller log: r0 = openat(0xffffffffffffff9c, &(0x7f0000000040)='./file0\x00', 0x26e1, 0x0) r1 = syz_open_procfs(0xffffffffffffffff, &(0x7f0000000000)='fd/3\x00') open_by_handle_at(r1, &(0x7f00000003c0)=ANY=[@ANYRESHEX], 0x602000) r2 = syz_open_dev$sg(&(0x7f0000000000), 0x0, 0x40782) write$binfmt_aout(r2, &(0x7f0000000340)=ANY=[@ANYBLOB="00000000deff000000000000000000000000000000000000000000000000000047f007af9e107a41ec395f1bded7be24277a1501ff6196a83366f4e6362bc0ff2b247f68a972989b094b2da4fb3607fcf611a22dd04310d28c75039d"], 0x126) In resp_readcap16() we get "int alloc_len" value -1104926854, and then pass the huge arr_len to fill_from_dev_buffer(), but arr is only 32 bytes. This leads to OOB in sg_copy_buffer(). To solve this issue, define alloc_len as u32. Link: https://lore.kernel.org/r/20211013033913.2551004-2-yebin10@huawei.com Acked-by: Douglas Gilbert <dgilbert(a)interlog.com> Signed-off-by: Ye Bin <yebin10(a)huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen(a)oracle.com> conflicts: drivers/scsi/scsi_debug.c Signed-off-by: Ye Bin <yebin10(a)huawei.com> Reviewed-by: Jason Yan <yanaijie(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/scsi/scsi_debug.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/scsi/scsi_debug.c b/drivers/scsi/scsi_debug.c index 082b2695e02f3..d8befc6fbec9c 100644 --- a/drivers/scsi/scsi_debug.c +++ b/drivers/scsi/scsi_debug.c @@ -1665,7 +1665,7 @@ static int resp_readcap16(struct scsi_cmnd *scp, { unsigned char *cmd = scp->cmnd; unsigned char arr[SDEBUG_READCAP16_ARR_SZ]; - int alloc_len; + u32 alloc_len; alloc_len = get_unaligned_be32(cmd + 10); /* following just in case virtual_gb changed */ @@ -1694,7 +1694,7 @@ static int resp_readcap16(struct scsi_cmnd *scp, } return fill_from_dev_buffer(scp, arr, - min(alloc_len, SDEBUG_READCAP16_ARR_SZ)); + min_t(u32, alloc_len, SDEBUG_READCAP16_ARR_SZ)); } #define SDEBUG_MAX_TGTPGS_ARR_SZ 1412 -- 2.25.1

1 1

[PATCH openEuler-1.0-LTS V2] README: README optimize
by Laibin Qiu 01 Nov '21

01 Nov '21

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4FS3G?from=project-issue CVE: NA --------------------------- There are some language problems in the README file, and MarkDown fromat syntax is not effective, and it needs to be adjusted. Signed-off-by: suqin <suqin2(a)huawei.com> Signed-off-by: Laibin Qiu <qiulaibin(a)huawei.com> --- README | 226 ---------------------------------------- README.md | 237 ++++++++++++++++++++++++++++++++++++++++++ scripts/checkpatch.pl | 2 +- 3 files changed, 238 insertions(+), 227 deletions(-) delete mode 100644 README create mode 100644 README.md diff --git a/README b/README deleted file mode 100644 index 46c9ea352..000000000 --- a/README +++ /dev/null @@ -1,226 +0,0 @@ -Contributions to openEuler kernel project -========================================= - -Sign CLA --------- - -Before submitting any Contributions to openEuler, you have to sign CLA. - -See: - https://openeuler.org/zh/cla.html - https://openeuler.org/en/cla.html - -Steps of submitting patches ---------------------------- - -1. Compile and test your patches successfully. -2. Generate patches - Your patches should be based on top of latest openEuler branch, and should - use git-format-patch to generate patches, and if it's a patchset, it's - better to use --cover-letter option to describe what the patchset does. - - Using scripts/checkpatch.pl to make sure there's no coding style issue. - - And make sure your patch follow unified openEuler patch format describe - below. - -3. Send patch to openEuler mailing list - Use this command to send patches to openEuler mailing list: - - git send-email *.patch -to="kernel(a)openeuler.org" --suppress-cc=all - - *NOTE*: that you must add --suppress-cc=all if you use git send-email, - otherwise the email will be cced to the people in upstream community and mailing - lists. - - *See*: How to send patches using git-send-email - https://git-scm.com/docs/git-send-email - -4. Mark "v1, v2, v3 ..." in your patch subject if you have multiple versions - to send out. - - Use --subject-prefix="PATCH v2" option to add v2 tag for patchset. - git format-patch --subject-prefix="PATCH v2" -1 - - Subject examples: - Subject: [PATCH v2 01/27] fork: fix some -Wmissing-prototypes warnings - Subject: [PATCH v3] ext2: improve scalability of bitmap searching - -5. Upstream your kernel patch to kernel community is strongly recommended. - openEuler will sync up with kernel master timely. - -6. Sign your work - the Developer’s Certificate of Origin - As the same of upstream kernel community, you also need to sign your patch. - - See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html - - The sign-off is a simple line at the end of the explanation for the patch, - which certifies that you wrote it or otherwise have the right to pass it - on as an open-source patch. The rules are pretty simple: if you can certify - the below: - - Developer’s Certificate of Origin 1.1 - ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - - By making a contribution to this project, I certify that: - - (a) The contribution was created in whole or in part by me and I have - the right to submit it under the open source license indicated in - the file; or - - (b The contribution is based upon previous work that, to the best of - my knowledge, is covered under an appropriate open source license - and I have the right under that license to submit that work with - modifications, whether created in whole or in part by me, under - the same open source license (unless I am permitted to submit under - a different license), as indicated in the file; or - - (c) The contribution was provided directly to me by some other person - who certified (a), (b) or (c) and I have not modified it. - - (d) I understand and agree that this project and the contribution are - public and that a record of the contribution (including all personal - information I submit with it, including my sign-off) is maintained - indefinitely and may be redistributed consistent with this project - or the open source license(s) involved. - - then you just add a line saying: - - Signed-off-by: Random J Developer <random(a)developer.example.org> - - using your real name (sorry, no pseudonyms or anonymous contributions.) - -Use unified patch format ------------------------- - -Reasons: - -1. long term maintainability - openEuler will merge massive patches. If all patches are merged by casual - changelog format without a unified format, the git log will be messy, and - then it's hard to figure out the original patch. - -2. kernel upgrade - We definitely will upgrade our openEuler kernel in someday, using strict - patch management will alleviate the pain to migrate patches during big upgrade. - -3. easy for script parsing - Keyword highlighting is necessary for script parsing. - -Patch format definition ------------------------ - -[M] stands for "mandatory" -[O] stands for "option" -$category can be: bug preparation, bugfix, perf, feature, doc, other... - -If category is feature, then we also need to add feature name like below: - category: feature - feature: YYY (the feature name) - -If the patch is related to CVE or bugzilla, then we need add the corresponding -tag like below (In general, it should include at least one of the following): - CVE: $cve-id - bugzilla: $bug-id - -Additional changelog should include at least one of the flollwing: - 1) Why we should apply this patch - 2) What real problem in product does this patch resolved - 3) How could we reproduce this bug or how to test - 4) Other useful information for help to understand this patch or problem - -The detail information is very useful for porting patch to another kenrel branch. - -Example for mainline patch: - - mainline inclusion [M] - from $mainline-version [M] - commit $id [M] - category: $category [M] - bugzilla: $bug-id [O] - CVE: $cve-id [O] - - additional changelog [O] - - -------------------------------- - - original changelog - - Signed-off-by: $yourname <$yourname(a)huawei.com> [M] - - ($mainline-version could be mainline-3.5, mainline-3.6, etc...) - -Examples --------- - -mainline inclusion -from mainline-4.10 -commit 0becc0ae5b42828785b589f686725ff5bc3b9b25 -category: bugfix -bugzilla: 3004 -CVE: NA - -The patch fixes a BUG_ON in the product: injecting single bit ECC error -to memory before system boot use hardware inject tools, which cause a -large amount of CMCI during system booting . - -[ 1.146580] mce: [Hardware Error]: Machine check events logged -[ 1.152908] ------------[ cut here ]------------ -[ 1.157751] kernel BUG at kernel/timer.c:951! -[ 1.162321] invalid opcode: 0000 [#1] SMP -... - -------------------------------------------------- - -original changelog - -<original S-O-B> -Signed-off-by: Zhang San <zhangsan(a)huawei.com> -Tested-by: Li Si <lisi(a)huawei.com> - -Email Client - Thunderbird Settings ------------------------------------ - -If you are newly developer in the kernel community, it is highly recommended -to use thunderbird mail client. - -1. Thunderbird Installation - Get English version Thunderbird from http://www.mozilla.org/ and install - it on your system。 - - Download url: https://www.thunderbird.net/en-US/thunderbird/all/ - -2. Settings - 2.1 Use plain text format instead of HTML format - Options -> Account Settings -> Composition & Addressing, do *NOT* select - "Compose message in HTML format". - - 2.2 Editor Settings - Tools->Options->Advanced->Config editor. - - - To bring up the thunderbird's registry editor, and set: - "mailnews.send_plaintext_flowed" to "false". - - Disable HTML Format: Set "mail.identity.id1.compose_html" to "false". - - Enable UTF8: Set "prefs.converted-to-utf8" to "true". - - View message in UTF-8: Set "mailnews.view_default_charset" to "UTF-8". - - Set mailnews.wraplength to 9999 for avoiding auto-wrap - -Linux kernel -============ - -There are several guides for kernel developers and users. These guides can -be rendered in a number of formats, like HTML and PDF. Please read -Documentation/admin-guide/README.rst first. - -In order to build the documentation, use ``make htmldocs`` or -``make pdfdocs``. The formatted documentation can also be read online at: - - https://www.kernel.org/doc/html/latest/ - -There are various text files in the Documentation/ subdirectory, -several of them using the Restructured Text markup notation. -See Documentation/00-INDEX for a list of what is contained in each file. - -Please read the Documentation/process/changes.rst file, as it contains the -requirements for building and running the kernel, and information about -the problems which may result by upgrading your kernel. diff --git a/README.md b/README.md new file mode 100644 index 000000000..3374c4726 --- /dev/null +++ b/README.md @@ -0,0 +1,237 @@ +# How to Contribute +------- + +- [How to Contribute](#How to Contribute) + + \- [Sign the CLA](#Sign the CLA) + + \- [Steps of submitting patches](#Steps of submitting patches) + + \- [Use the unified patch format](#Use the unified patch format) + + \- [Define the patch format](#Define the patch format) + + \- [Examples](#Examples) + + \- [Email client - Thunderbird settings](#Email client - Thunderbird settings) + +- [Linux kernel](#Linux kernel) + +### Sign the CLA + +------- + +Before making any contributions to openEuler, sign the CLA first. + +Address: [https://openeuler.org/en/cla.html](https://openeuler.org/en/cla.html) + +### Steps of submitting patches +------- + +**Step 1** Compile and test your patches. + +**Step 2** Generate patches. + +Your patches should be generated based on the latest openEuler branch using git-format-patch. If your patches are in a patchset, it is better to use the **--cover-letter** option to describe what the patchset does. + +Use **scripts/checkpatch.pl** to ensure that no coding style issue exists. + +In addition, ensure that your patches comply with the unified openEuler patch format described below. + +**Step 3** Send your patches to the openEuler mailing list. + +To do so, run the following command: + + `git send-email *.patch -to="kernel(a)openeuler.org" --suppress-cc=all` + +*NOTE*: Add **--suppress-cc=all** if you use git-send-email; otherwise, the email will be copied to all people in the upstream community and mailing lists. + +For details about how to send patches using git-send-email, see [https://git-scm.com/docs/git-send-email](https://git-scm.com/docs/git-send-…. + +**Step 4** Mark "v1, v2, v3 ..." in your patch subject if you have multiple versions to send out. + +Use the **--subject-prefix="PATCH v2"** option to add the v2 tag to the patchset. + + `git format-patch --subject-prefix="PATCH v2" -1` + +Subject examples: + + Subject: [PATCH v2 01/27] fork: fix some -Wmissing-prototypes warnings + + Subject: [PATCH v3] ext2: improve scalability of bitmap searching + +**Step 5** Upstream your kernel patches to the kernel community (recommended). openEuler will synchronize with the kernel master in a timely manner. + +**Step 6** Sign your work - the Developer’s Certificate of Origin. + + Similar to the upstream kernel community, you also need to sign your patch. + + For details, see [https://www.kernel.org/doc/html/latest/process/submitting-patches.html](htt…. + + The sign-off is a simple line at the end of the explanation of the patch, which certifies that you wrote it or otherwise have the right to pass it on as an open source patch. The rules are pretty simple. You can certify as below: + + Developer’s Certificate of Origin 1.1 + + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + By making a contribution to this project, I certify that: + + (a) The contribution was created in whole or in part by me and I have the right to submit it under the open source license indicated in the file; + + (b) The contribution is based upon previous work that, to the best of my knowledge, is covered under an appropriate open source license and I have the right under that license to submit that work with modifications, whether created in whole or in part by me, under the same open source license (unless I am permitted to submit under a different license), as indicated in the file; + + (c) The contribution was provided directly to me by some other person who certified (a), (b) or (c) and I have not modified it. + + (d) I understand and agree that this project and the contribution are public and that a record of the contribution (including all personal information I submit with it, including my sign-off) is maintained indefinitely and may be redistributed consistent with this project or the open source license(s) involved. + +Then you add a line saying: + +Signed-off-by: Random J Developer <random(a)developer.example.org> + +Use your real name (sorry, no pseudonyms or anonymous contributions). + +### Use the unified patch format +------- + +Reasons: + +1. Long term maintainability + + openEuler will merge massive patches. If all patches are merged by casual + + changelog formats without a unified format, the git logs will be messy, and + + then it is hard to figure out the original patches. + +2. Kernel upgrade + + We definitely will upgrade our openEuler kernel in someday, so strict patch management + + will alleviate the pain to migrate patches during big upgrades. + +3. Easy for script parsing + + Keyword highlighting is necessary for script parsing. + +### Define the patch format +------- + +[M] stands for "mandatory". + +[O] stands for "option". + +$category can be: bug preparation, bugfix, perf, feature, doc, other... + +If category is feature, we need to add a feature name as below: + +```cpp +category: feature +feature: YYY (the feature name) +``` + +If the patch is related to CVE or bugzilla, we need to add the corresponding tag as below (In general, it should include at least one of the following): + +```cpp +CVE: $cve-id +bugzilla: $bug-id +``` + +Additional changelog should include at least one of the following: + +1. Why we should apply this patch + +2. What real problems in the product does this patch resolved + +3. How could we reproduce this bug or how to test + +4. Other useful information for help to understand this patch or problem + +The detailed information is very useful for migrating a patch to another kernel branch. + +Example for mainline patch: + +```cpp +mainline inclusion [M] +from $mainline-version [M] +commit $id [M] +category: $category [M] +bugzilla: $bug-id [O] +CVE: $cve-id [O] + +additional changelog [O] + +-------------------------------- + +original changelog +Signed-off-by: $yourname <$yourname(a)huawei.com> [M] +($mainline-version could be mainline-3.5, mainline-3.6, etc...) +``` + +### Examples +------- + +```cpp +mainline inclusion +from mainline-4.10 +commit 0becc0ae5b42828785b589f686725ff5bc3b9b25 +category: bugfix +bugzilla: 3004 +CVE: N/A + +The patch fixes a BUG_ON in the product: Injecting a single bit ECC error to the memory before system boot using hardware inject tools will cause a large amount of CMCI during system booting . +[ 1.146580] mce: [Hardware Error]: Machine check events logged +[ 1.152908] ------------[ cut here ]------------ +[ 1.157751] kernel BUG at kernel/timer.c:951! +[ 1.162321] invalid opcode: 0000 [#1] SMP + +------------------------------------------------- + +original changelog + +<original S-O-B> +Signed-off-by: Zhang San <zhangsan(a)huawei.com> +Tested-by: Li Si <lisi(a)huawei.com> +``` + +### Email client - Thunderbird settings +------- + +If you are a new developer in the kernel community, it is highly recommended that you use the Thunderbird mail client. + +1. Thunderbird Installation + + Obtain the English version of Thunderbird from [http://www.mozilla.org/]( http://www.mozilla.org/) and install it on your system. + + Download URL: https://www.thunderbird.net/en-US/thunderbird/all/ + +2. Settings + + 2.1 Use the plain text format instead of the HTML format. + + Choose **Options > Account Settings > Composition & Addressing**, and do **NOT** select Compose message in HTML format. + + 2.2 Editor settings + + **Tools > Options> Advanced > Config editor** + + \- To bring up the Thunderbird's registry editor, set **mailnews.send_plaintext_flowed** to **false**. + + \- Disable HTML Format: Set **mail.identity.id1.compose_html** to **false**. + + \- Enable UTF-8: Set **prefs.converted-to-utf8** to **true**. + + \- View messages in UTF-8: Set **mailnews.view_default_charset** to **UTF-8**. + + \- Set **mailnews.wraplength** to **9999** to avoid auto-wrap. + +# Linux kernel +------- + +There are several guides for kernel developers and users, which can be rendered in a number of formats, like HTML and PDF. You can read **Documentation/admin-guide/README.rst** first. + +In order to build the documentation, use **make htmldocs** or **make pdfdocs**. The formatted documentation can also be read online at: https://www.kernel.org/doc/html/latest/ + +There are various text files in the Documentation/ subdirectory, several of which use the Restructured Text markup notation. See Documentation/00-INDEX for a list of what is contained in each file. + +Read the **Documentation/process/changes.rst** file, as it contains the requirements for building and running the kernel, and information about the problems that may be caused by upgrading your kernel. + diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 161b0224d..d9a8ae4da 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -1063,7 +1063,7 @@ sub top_of_kernel_tree { my @tree_check = ( "COPYING", "CREDITS", "Kbuild", "MAINTAINERS", "Makefile", - "README", "Documentation", "arch", "include", "drivers", + "README.md", "Documentation", "arch", "include", "drivers", "fs", "init", "ipc", "kernel", "lib", "scripts", ); -- 2.22.0

1 0

[PATCH openEuler-1.0-LTS] scsi: hisi_sas: unsupported DIX between OS and HBA only for SATA device
by Yang Yingliang 01 Nov '21

01 Nov '21

From: Yang Xingui <yangxingui(a)huawei.com> driver inclusion category: bugfix bugzilla: NA CVE: NA Signed-off-by: Yang Xingui <yangxingui(a)huawei.com> Reviewed-by: Ouyangdelong <ouyangdelong(a)huawei.com> Reviewed-by: Kangfenglong <kangfenglong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/scsi/hisi_sas/hisi_sas.h | 10 ++++++++++ drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 7 ++++++- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas.h b/drivers/scsi/hisi_sas/hisi_sas.h index 3fd32606ecb00..8e9424e62a150 100644 --- a/drivers/scsi/hisi_sas/hisi_sas.h +++ b/drivers/scsi/hisi_sas/hisi_sas.h @@ -77,6 +77,16 @@ #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10 +#define HISI_SAS_DIF_PROT_MASK (SHOST_DIF_TYPE1_PROTECTION | \ + SHOST_DIF_TYPE2_PROTECTION | \ + SHOST_DIF_TYPE3_PROTECTION) + +#define HISI_SAS_DIX_PROT_MASK (SHOST_DIX_TYPE1_PROTECTION | \ + SHOST_DIX_TYPE2_PROTECTION | \ + SHOST_DIX_TYPE3_PROTECTION) + +#define HISI_SAS_PROT_MASK (HISI_SAS_DIF_PROT_MASK | HISI_SAS_DIX_PROT_MASK) + #define CLEAR_ITCT_TIMEOUT 20 struct hisi_hba; diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 0e4cc16e542d6..9d6e21be35841 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -3357,9 +3357,14 @@ hisi_sas_shost_alloc_pci(struct pci_dev *pdev) hisi_hba->dev = dev; hisi_hba->shost = shost; SHOST_TO_SAS_HA(shost) = &hisi_hba->sha; - hisi_hba->enable_dix_dif = enable_dix_dif; hisi_hba->user_ctl_irq = user_ctl_irq; + if (enable_dix_dif & ~HISI_SAS_PROT_MASK) + dev_err(dev, "unsupported protection mask 0x%x, using default (0x0)\n", + enable_dix_dif); + else + hisi_hba->enable_dix_dif = enable_dix_dif; + timer_setup(&hisi_hba->timer, NULL, 0); if (hisi_sas_get_fw_info(hisi_hba) < 0) -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS 01/19] nbd: don't handle response without a corresponding request message
by Yang Yingliang 30 Oct '21

30 Oct '21

From: Yu Kuai <yukuai3(a)huawei.com> mainline inclusion from mainline-next-20211018 commit b5644a3a79bf3be5f1238db1b2f241374b27b0f0 category: bugfix bugzilla: 49890 CVE: NA --------------------------- While handling a response message from server, nbd_read_stat() will try to get request by tag, and then complete the request. However, this is problematic if nbd haven't sent a corresponding request message: t1 t2 submit_bio nbd_queue_rq blk_mq_start_request recv_work nbd_read_stat blk_mq_tag_to_rq blk_mq_complete_request nbd_send_cmd Thus add a new cmd flag 'NBD_CMD_INFLIGHT', it will be set in nbd_send_cmd() and checked in nbd_read_stat(). Noted that this patch can't fix that blk_mq_tag_to_rq() might return a freed request, and this will be fixed in following patches. Signed-off-by: Yu Kuai <yukuai3(a)huawei.com> Reviewed-by: Ming Lei <ming.lei(a)redhat.com> Reviewed-by: Josef Bacik <josef(a)toxicpanda.com> Link: https://lore.kernel.org/r/20210916093350.1410403-2-yukuai3@huawei.com Signed-off-by: Jens Axboe <axboe(a)kernel.dk> Reviewed-by: Jason Yan <yanaijie(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/block/nbd.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c index 6a72c07ce3cba..05153b84d5400 100644 --- a/drivers/block/nbd.c +++ b/drivers/block/nbd.c @@ -120,6 +120,12 @@ struct nbd_device { }; #define NBD_CMD_REQUEUED 1 +/* + * This flag will be set if nbd_queue_rq() succeed, and will be checked and + * cleared in completion. Both setting and clearing of the flag are protected + * by cmd->lock. + */ +#define NBD_CMD_INFLIGHT 2 struct nbd_cmd { struct nbd_device *nbd; @@ -369,6 +375,7 @@ static enum blk_eh_timer_return nbd_xmit_timeout(struct request *req, if (!mutex_trylock(&cmd->lock)) return BLK_EH_RESET_TIMER; + __clear_bit(NBD_CMD_INFLIGHT, &cmd->flags); if (!refcount_inc_not_zero(&nbd->config_refs)) { cmd->status = BLK_STS_TIMEOUT; mutex_unlock(&cmd->lock); @@ -674,6 +681,12 @@ static struct nbd_cmd *nbd_read_stat(struct nbd_device *nbd, int index) cmd = blk_mq_rq_to_pdu(req); mutex_lock(&cmd->lock); + if (!__test_and_clear_bit(NBD_CMD_INFLIGHT, &cmd->flags)) { + dev_err(disk_to_dev(nbd->disk), "Suspicious reply %d (status %u flags %lu)", + tag, cmd->status, cmd->flags); + ret = -ENOENT; + goto out; + } if (cmd->cmd_cookie != nbd_handle_to_cookie(handle)) { dev_err(disk_to_dev(nbd->disk), "Double reply on req %p, cmd_cookie %u, handle cookie %u\n", req, cmd->cmd_cookie, nbd_handle_to_cookie(handle)); @@ -768,6 +781,7 @@ static void nbd_clear_req(struct request *req, void *data, bool reserved) struct nbd_cmd *cmd = blk_mq_rq_to_pdu(req); mutex_lock(&cmd->lock); + __clear_bit(NBD_CMD_INFLIGHT, &cmd->flags); cmd->status = BLK_STS_IOERR; mutex_unlock(&cmd->lock); @@ -903,7 +917,13 @@ static int nbd_handle_cmd(struct nbd_cmd *cmd, int index) * returns EAGAIN can be retried on a different socket. */ ret = nbd_send_cmd(nbd, cmd, index); - if (ret == -EAGAIN) { + /* + * Access to this flag is protected by cmd->lock, thus it's safe to set + * the flag after nbd_send_cmd() succeed to send request to server. + */ + if (!ret) + __set_bit(NBD_CMD_INFLIGHT, &cmd->flags); + else if (ret == -EAGAIN) { dev_err_ratelimited(disk_to_dev(nbd->disk), "Request send failed, requeueing\n"); nbd_mark_nsock_dead(nbd, nsock, 1); -- 2.25.1

1 18

[PATCH openEuler-1.0-LTS 1/5] numa: Move the management structures for cdm nodes to ddr
by Yang Yingliang 30 Oct '21

30 Oct '21

From: Wang Wensheng <wangwensheng4(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4D63I CVE: NA ------------------------------------------------- The cdm nodes are easiler to raise an ECC error and it may cause the kernel crash if the essential structures went wrong. So move the management structures for hbm nodes to the ddr nodes of the same partion to reduce the probability of kernel crashes. Signed-off-by: Wang Wensheng <wangwensheng4(a)huawei.com> Reviewed-by: Kefeng Wang <wangkefeng.wang(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- arch/arm64/Kconfig | 10 ++++++++ arch/arm64/mm/numa.c | 54 +++++++++++++++++++++++++++++++++++++++- include/linux/nodemask.h | 7 ++++++ mm/sparse.c | 8 +++--- 4 files changed, 75 insertions(+), 4 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 9d49b9524e1d4..2f34aef79179e 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1470,6 +1470,16 @@ config ASCEND_SHARE_POOL help This feature allows multiple processes to share virtual memory both in kernel and user level, which is only enabled for ascend platform. + +config ASCEND_CLEAN_CDM + bool "move the management structure for HBM to DDR" + def_bool n + depends on COHERENT_DEVICE + help + The cdm nodes sometimes are easiler to raise an ECC error and it may + cause the kernel crash if the essential structures went wrong. So move + the management structures for hbm nodes to the ddr nodes of the same + partion to reduce the probability of kernel crashes. endif endmenu diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c index a9d3ad5ee0cc3..a194bad6fdfcf 100644 --- a/arch/arm64/mm/numa.c +++ b/arch/arm64/mm/numa.c @@ -45,6 +45,57 @@ inline int arch_check_node_cdm(int nid) return node_isset(nid, cdmmask); } +#ifdef CONFIG_ASCEND_CLEAN_CDM +/** + * cdm_node_to_ddr_node - Convert the cdm node to the ddr node of the + * same partion. + * @nid: input node ID + * + * Here is a typical memory topology in usage. + * There are some DDR and HBM in each partion and DDRs present at first, then + * come all the HBMs of the first partion, then HBMs of the second partion, etc. + * + * ------------------------- + * | P0 | P1 | + * ----------- | ----------- + * |node0 DDR| | |node1 DDR| + * |---------- | ----------| + * |node2 HBM| | |node4 HBM| + * |---------- | ----------| + * |node3 HBM| | |node5 HBM| + * ----------- | ----------- + * + * Return: + * This function returns a ddr node which is of the same partion with the input + * node if the input node is a HBM node. + * The input nid is returned if it is a DDR node or if the memory topology of + * the system doesn't apply to the above model. + */ +int __init cdm_node_to_ddr_node(int nid) +{ + nodemask_t ddr_mask; + int nr_ddr, cdm_per_part, fake_nid; + int nr_cdm = nodes_weight(cdmmask); + + if (!nr_cdm || nodes_empty(numa_nodes_parsed)) + return nid; + + if (!node_isset(nid, cdmmask)) + return nid; + + nodes_xor(ddr_mask, cdmmask, numa_nodes_parsed); + nr_ddr = nodes_weight(ddr_mask); + cdm_per_part = nr_cdm / nr_ddr ? : 1; + + fake_nid = (nid - nr_ddr) / cdm_per_part; + fake_nid = !node_isset(fake_nid, cdmmask) ? fake_nid : nid; + + pr_info("nid: %d, fake_nid: %d\n", nid, fake_nid); + + return fake_nid; +} +#endif + static int __init cdm_nodes_setup(char *s) { int nid; @@ -264,11 +315,12 @@ static void __init setup_node_data(int nid, u64 start_pfn, u64 end_pfn) u64 nd_pa; void *nd; int tnid; + int fake_nid = cdm_node_to_ddr_node(nid); if (start_pfn >= end_pfn) pr_info("Initmem setup node %d [<memory-less node>]\n", nid); - nd_pa = memblock_alloc_try_nid(nd_size, SMP_CACHE_BYTES, nid); + nd_pa = memblock_alloc_try_nid(nd_size, SMP_CACHE_BYTES, fake_nid); nd = __va(nd_pa); /* report and initialize */ diff --git a/include/linux/nodemask.h b/include/linux/nodemask.h index 41fb047bdba80..7c0571b95ce4d 100644 --- a/include/linux/nodemask.h +++ b/include/linux/nodemask.h @@ -508,6 +508,12 @@ static inline int node_random(const nodemask_t *mask) #ifdef CONFIG_COHERENT_DEVICE extern int arch_check_node_cdm(int nid); +#ifdef CONFIG_ASCEND_CLEAN_CDM +extern int cdm_node_to_ddr_node(int nid); +#else +static inline int cdm_node_to_ddr_node(int nid) { return nid; } +#endif + static inline nodemask_t system_mem_nodemask(void) { nodemask_t system_mem; @@ -551,6 +557,7 @@ static inline void node_clear_state_cdm(int node) #else static inline int arch_check_node_cdm(int nid) { return 0; } +static inline int cdm_node_to_ddr_node(int nid) { return nid; } static inline nodemask_t system_mem_nodemask(void) { diff --git a/mm/sparse.c b/mm/sparse.c index 62ae3880a9add..f19d2ca250cee 100644 --- a/mm/sparse.c +++ b/mm/sparse.c @@ -458,21 +458,23 @@ static void __init sparse_init_nid(int nid, unsigned long pnum_begin, { unsigned long pnum, usemap_longs, *usemap; struct page *map; + int fake_nid = cdm_node_to_ddr_node(nid); usemap_longs = BITS_TO_LONGS(SECTION_BLOCKFLAGS_BITS); - usemap = sparse_early_usemaps_alloc_pgdat_section(NODE_DATA(nid), + usemap = sparse_early_usemaps_alloc_pgdat_section(NODE_DATA(fake_nid), usemap_size() * map_count); if (!usemap) { pr_err("%s: node[%d] usemap allocation failed", __func__, nid); goto failed; } - sparse_buffer_init(map_count * section_map_size(), nid); + + sparse_buffer_init(map_count * section_map_size(), fake_nid); for_each_present_section_nr(pnum_begin, pnum) { if (pnum >= pnum_end) break; - map = sparse_mem_map_populate(pnum, nid, NULL); + map = sparse_mem_map_populate(pnum, fake_nid, NULL); if (!map) { pr_err("%s: node[%d] memory map backing failed. Some memory will not be available.", __func__, nid); -- 2.25.1

1 4

[PATCH openEuler-1.0-LTS 1/4] perf: hisi: Add support for HiSilicon SoC PMU driver dt probe
by Yang Yingliang 30 Oct '21

30 Oct '21

From: Fang Lijun <fanglijun3(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4D4WR CVE: NA --------------------------- Add support for hisi PMU driver dt probe, Fix its compile error when disable CONFIG_ACPI. Signed-off-by: Fang Lijun <fanglijun3(a)huawei.com> Reviewed-by: Hanjun Guo <guohanjun(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/perf/Kconfig | 2 +- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 1 + drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 23 +++++++++++++++---- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 20 +++++++++++++--- 4 files changed, 38 insertions(+), 8 deletions(-) diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index 92be6a36a128f..d4b9681418f88 100644 --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -72,7 +72,7 @@ config ARM_DSU_PMU config HISI_PMU bool "HiSilicon SoC PMU" - depends on ARM64 && ACPI + depends on ARM64 help Support for HiSilicon SoC uncore performance monitoring unit (PMU), such as: L3C, HHA and DDRC. diff --git a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c index 090667d487504..3f3f4ab3aacce 100644 --- a/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c @@ -17,6 +17,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/list.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/smp.h> diff --git a/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c b/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c index c35bc248db7e7..4dd4d6b650aed 100644 --- a/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_hha_pmu.c @@ -17,6 +17,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/list.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/smp.h> @@ -235,20 +236,34 @@ static const struct acpi_device_id hisi_hha_pmu_acpi_match[] = { }; MODULE_DEVICE_TABLE(acpi, hisi_hha_pmu_acpi_match); -static int hisi_hha_pmu_init_data(struct platform_device *pdev, +#ifdef CONFIG_ACPI +static int hisi_hha_pmu_init_index(struct platform_device *pdev, struct hisi_pmu *hha_pmu) { - unsigned long long id; - struct resource *res; acpi_status status; + unsigned long long id; status = acpi_evaluate_integer(ACPI_HANDLE(&pdev->dev), - "_UID", NULL, &id); + "_UID", NULL, &id); if (ACPI_FAILURE(status)) return -EINVAL; hha_pmu->index_id = id; + return 0; +} +#endif + +static int hisi_hha_pmu_init_data(struct platform_device *pdev, + struct hisi_pmu *hha_pmu) +{ + struct resource *res; + +#ifdef CONFIG_ACPI + if (hisi_hha_pmu_init_index(pdev, hha_pmu)) + dev_info(&pdev->dev, "Can not init index id by acpi!\n"); +#endif + /* * Use SCCL_ID and UID to identify the HHA PMU, while * SCCL_ID is in MPIDR[aff2]. diff --git a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c index 6ce1d69c63198..4a42926800e50 100644 --- a/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c @@ -17,6 +17,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/list.h> +#include <linux/of.h> #include <linux/platform_device.h> #include <linux/smp.h> @@ -234,20 +235,33 @@ static const struct acpi_device_id hisi_l3c_pmu_acpi_match[] = { }; MODULE_DEVICE_TABLE(acpi, hisi_l3c_pmu_acpi_match); -static int hisi_l3c_pmu_init_data(struct platform_device *pdev, +#ifdef CONFIG_ACPI +static int hisi_l3c_pmu_init_index(struct platform_device *pdev, struct hisi_pmu *l3c_pmu) { unsigned long long id; - struct resource *res; acpi_status status; status = acpi_evaluate_integer(ACPI_HANDLE(&pdev->dev), - "_UID", NULL, &id); + "_UID", NULL, &id); if (ACPI_FAILURE(status)) return -EINVAL; l3c_pmu->index_id = id; + return 0; +} +#endif + +static int hisi_l3c_pmu_init_data(struct platform_device *pdev, + struct hisi_pmu *l3c_pmu) +{ + struct resource *res; + +#ifdef CONFIG_ACPI + if (hisi_l3c_pmu_init_index(pdev, l3c_pmu)) + dev_info(&pdev->dev, "Can not init index id by acpi!"); +#endif /* * Use the SCCL_ID and CCL_ID to identify the L3C PMU, while * SCCL_ID is in MPIDR[aff2] and CCL_ID is in MPIDR[aff1]. -- 2.25.1

1 3

[PATCH openEuler-1.0-LTS 1/7] corelockup: Add support of cpu core hang check
by Yang Yingliang 30 Oct '21

30 Oct '21

From: Dong Kai <dongkai11(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4F3V1 CVE: NA -------------------------------- The softlockup and hardlockup detector only check the status of the cpu which it resides. If certain cpu core suspends, they are both not works. There is no any valid log but the cpu already abnormal and brings a lot of problems of system. To detect this case, we add the corelockup detector. First we use whether cpu core can responds to nmi as a sectence to determine if it is suspended. Then things is simple. Per cpu core maintains it's nmi interrupt counts and detector the nmi_counts of next cpu core. If the nmi interrupt counts not changed any more which means it can't respond nmi normally, we regard it as suspend. To ensure robustness, only consecutive lost nmi more than two times then trigger the warn. The detection chain is as following: cpu0->cpu1->...->cpuN->cpu0 Signed-off-by: Dong Kai <dongkai11(a)huawei.com> Reviewed-by: Kuohai Xu <xukuohai(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> Reviewed-by: Ding Tianhong <dingtianhong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- include/linux/nmi.h | 6 ++ kernel/watchdog.c | 15 +++- kernel/watchdog_hld.c | 165 ++++++++++++++++++++++++++++++++++++++++++ lib/Kconfig.debug | 8 ++ 4 files changed, 192 insertions(+), 2 deletions(-) diff --git a/include/linux/nmi.h b/include/linux/nmi.h index 84f324d65068b..745d66c36e244 100644 --- a/include/linux/nmi.h +++ b/include/linux/nmi.h @@ -124,6 +124,12 @@ static inline int hardlockup_detector_perf_init(void) { return 0; } # endif #endif +#ifdef CONFIG_CORELOCKUP_DETECTOR +extern void corelockup_detector_init(void); +extern void corelockup_detector_online_cpu(unsigned int cpu); +extern void corelockup_detector_offline_cpu(unsigned int cpu); +#endif + void watchdog_nmi_stop(void); void watchdog_nmi_start(void); int watchdog_nmi_probe(void); diff --git a/kernel/watchdog.c b/kernel/watchdog.c index 0dd17265dcbd4..8b54fd30a597f 100644 --- a/kernel/watchdog.c +++ b/kernel/watchdog.c @@ -551,15 +551,23 @@ static void softlockup_start_all(void) int lockup_detector_online_cpu(unsigned int cpu) { - if (cpumask_test_cpu(cpu, &watchdog_allowed_mask)) + if (cpumask_test_cpu(cpu, &watchdog_allowed_mask)) { watchdog_enable(cpu); +#ifdef CONFIG_CORELOCKUP_DETECTOR + corelockup_detector_online_cpu(cpu); +#endif + } return 0; } int lockup_detector_offline_cpu(unsigned int cpu) { - if (cpumask_test_cpu(cpu, &watchdog_allowed_mask)) + if (cpumask_test_cpu(cpu, &watchdog_allowed_mask)) { watchdog_disable(cpu); +#ifdef CONFIG_CORELOCKUP_DETECTOR + corelockup_detector_offline_cpu(cpu); +#endif + } return 0; } @@ -783,4 +791,7 @@ void __init lockup_detector_init(void) if (!watchdog_nmi_probe()) nmi_watchdog_available = true; lockup_detector_setup(); +#ifdef CONFIG_CORELOCKUP_DETECTOR + corelockup_detector_init(); +#endif } diff --git a/kernel/watchdog_hld.c b/kernel/watchdog_hld.c index 904a95262fcf6..e965c31958203 100644 --- a/kernel/watchdog_hld.c +++ b/kernel/watchdog_hld.c @@ -39,6 +39,163 @@ notrace void __weak arch_touch_nmi_watchdog(void) } EXPORT_SYMBOL(arch_touch_nmi_watchdog); +#ifdef CONFIG_CORELOCKUP_DETECTOR +/* + * The softlockup and hardlockup detector only check the status + * of the cpu which it resides. If certain cpu core suspends, + * they are both not works. There is no any valid log but the + * cpu already abnormal and brings a lot of problems of system. + * To detect this case, we add the corelockup detector. + * + * First we use whether cpu core can responds to nmi as a sectence + * to determine if it is suspended. Then things is simple. Per cpu + * core maintains it's nmi interrupt counts and detector the + * nmi_counts of next cpu core. If the nmi interrupt counts not + * changed any more which means it can't respond nmi normally, we + * regard it as suspend. + * + * To ensure robustness, only consecutive lost nmi more than two + * times then trigger the warn. + * + * The detection chain is as following: + * cpu0->cpu1->...->cpuN->cpu0 + * + * detector_cpu: the target cpu to detector of current cpu + * nmi_interrupts: the nmi counts of current cpu + * nmi_cnt_saved: saved nmi counts of detector_cpu + * nmi_cnt_missed: the nmi consecutive miss counts of detector_cpu + */ +static DEFINE_PER_CPU(unsigned int, detector_cpu); +static DEFINE_PER_CPU(unsigned long, nmi_interrupts); +static DEFINE_PER_CPU(unsigned long, nmi_cnt_saved); +static DEFINE_PER_CPU(unsigned long, nmi_cnt_missed); +static DEFINE_PER_CPU(bool, core_watchdog_warn); + +static void watchdog_nmi_interrupts(void) +{ + __this_cpu_inc(nmi_interrupts); +} + +static void corelockup_status_copy(unsigned int from, unsigned int to) +{ + per_cpu(nmi_cnt_saved, to) = per_cpu(nmi_cnt_saved, from); + per_cpu(nmi_cnt_missed, to) = per_cpu(nmi_cnt_missed, from); + + /* always update detector cpu at the end */ + per_cpu(detector_cpu, to) = per_cpu(detector_cpu, from); +} + +static void corelockup_status_init(unsigned int cpu, unsigned int target) +{ + /* + * initialize saved count to max to avoid unnecessary misjudge + * caused by delay running of nmi on target cpu + */ + per_cpu(nmi_cnt_saved, cpu) = ULONG_MAX; + per_cpu(nmi_cnt_missed, cpu) = 0; + + /* always update detector cpu at the end */ + per_cpu(detector_cpu, cpu) = target; +} + +void __init corelockup_detector_init(void) +{ + unsigned int cpu, next; + + /* detector cpu is set to the next valid logically one */ + for_each_cpu_and(cpu, &watchdog_cpumask, cpu_online_mask) { + next = cpumask_next_and(cpu, &watchdog_cpumask, + cpu_online_mask); + if (next >= nr_cpu_ids) + next = cpumask_first_and(&watchdog_cpumask, + cpu_online_mask); + corelockup_status_init(cpu, next); + } +} + +/* + * Before: first->next + * After: first->[new]->next + */ +void corelockup_detector_online_cpu(unsigned int cpu) +{ + unsigned int first = cpumask_first_and(&watchdog_cpumask, + cpu_online_mask); + + if (WARN_ON(first >= nr_cpu_ids)) + return; + + /* cpu->next */ + corelockup_status_copy(first, cpu); + + /* first->cpu */ + corelockup_status_init(first, cpu); +} + +/* + * Before: prev->cpu->next + * After: prev->next + */ +void corelockup_detector_offline_cpu(unsigned int cpu) +{ + unsigned int prev = nr_cpu_ids; + unsigned int i; + + /* found prev cpu */ + for_each_cpu_and(i, &watchdog_cpumask, cpu_online_mask) { + if (per_cpu(detector_cpu, i) == cpu) { + prev = i; + break; + } + } + + if (WARN_ON(prev == nr_cpu_ids)) + return; + + /* prev->next */ + corelockup_status_copy(cpu, prev); +} + +static bool is_corelockup(unsigned int cpu) +{ + unsigned long nmi_int = per_cpu(nmi_interrupts, cpu); + + /* skip check if only one cpu online */ + if (cpu == smp_processor_id()) + return false; + + if (__this_cpu_read(nmi_cnt_saved) != nmi_int) { + __this_cpu_write(nmi_cnt_saved, nmi_int); + __this_cpu_write(nmi_cnt_missed, 0); + per_cpu(core_watchdog_warn, cpu) = false; + return false; + } + + __this_cpu_inc(nmi_cnt_missed); + if (__this_cpu_read(nmi_cnt_missed) > 2) + return true; + + return false; +} +NOKPROBE_SYMBOL(is_corelockup); + +static void watchdog_corelockup_check(struct pt_regs *regs) +{ + unsigned int cpu = __this_cpu_read(detector_cpu); + + if (is_corelockup(cpu)) { + if (per_cpu(core_watchdog_warn, cpu) == true) + return; + pr_emerg("Watchdog detected core LOCKUP on cpu %d\n", cpu); + + if (hardlockup_panic) + nmi_panic(regs, "Core LOCKUP"); + + per_cpu(core_watchdog_warn, cpu) = true; + } +} +#endif + #ifdef CONFIG_HARDLOCKUP_CHECK_TIMESTAMP static DEFINE_PER_CPU(ktime_t, last_timestamp); static DEFINE_PER_CPU(unsigned int, nmi_rearmed); @@ -106,6 +263,14 @@ static inline bool watchdog_check_timestamp(void) void watchdog_hardlockup_check(struct pt_regs *regs) { +#ifdef CONFIG_CORELOCKUP_DETECTOR + /* Kick nmi interrupts */ + watchdog_nmi_interrupts(); + + /* corelockup check */ + watchdog_corelockup_check(regs); +#endif + if (__this_cpu_read(watchdog_nmi_touch) == true) { __this_cpu_write(watchdog_nmi_touch, false); return; diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug index 0ee305de7d0ec..4a78bacd405bd 100644 --- a/lib/Kconfig.debug +++ b/lib/Kconfig.debug @@ -881,6 +881,14 @@ config HARDLOCKUP_DETECTOR chance to run. The current stack trace is displayed upon detection and the system will stay locked up. +config CORELOCKUP_DETECTOR + bool "Detect Core Lockups" + depends on HARDLOCKUP_DETECTOR && SOFTLOCKUP_DETECTOR + depends on ARM64 + default n + help + Corelockups is used to check whether cpu core hungup or not. + config BOOTPARAM_HARDLOCKUP_PANIC bool "Panic (Reboot) On Hard Lockups" depends on HARDLOCKUP_DETECTOR -- 2.25.1

1 6

[PATCH openEuler-1.0-LTS 01/41] share_pool: Rename sp_stat_idr to sp_proc_stat_idr
by Yang Yingliang 30 Oct '21

30 Oct '21

From: Tang Yizhou <tangyizhou(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4EUVI CVE: NA ------------------------------------------------- We are going to redesign the accounting subsystem of share pool. We need to disambiguate the meaning of sp_stat_idr, as we will introduce an struct which representing per-spg statistics. Signed-off-by: Tang Yizhou <tangyizhou(a)huawei.com> Reviewed-by: Ding Tianhong <dingtianhong(a)huawei.com> Signed-off-by: Zhou Guanghui <zhouguanghui1(a)huawei.com> Reviewed-by: Weilong Chen <chenweilong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- mm/share_pool.c | 44 ++++++++++++++++++++++---------------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/mm/share_pool.c b/mm/share_pool.c index cd6e137fe6698..c4b8daa47fcfd 100644 --- a/mm/share_pool.c +++ b/mm/share_pool.c @@ -95,9 +95,9 @@ static DEFINE_IDA(sp_group_id_ida); /*** Statistical and maintenance tools ***/ /* idr of all sp_proc_stats */ -static DEFINE_IDR(sp_stat_idr); -/* rw semaphore for sp_stat_idr and mm->sp_stat_id */ -static DECLARE_RWSEM(sp_stat_sem); +static DEFINE_IDR(sp_proc_stat_idr); +/* rw semaphore for sp_proc_stat_idr */ +static DECLARE_RWSEM(sp_proc_stat_sem); /* for kthread buff_module_guard_work */ static struct sp_proc_stat kthread_stat; @@ -107,7 +107,7 @@ static struct sp_proc_stat *sp_get_proc_stat_locked(int tgid) { struct sp_proc_stat *stat; - stat = idr_find(&sp_stat_idr, tgid); + stat = idr_find(&sp_proc_stat_idr, tgid); /* maybe NULL or not, we always return it */ return stat; @@ -118,7 +118,7 @@ static struct sp_proc_stat *sp_get_proc_stat_ref_locked(int tgid) { struct sp_proc_stat *stat; - stat = idr_find(&sp_stat_idr, tgid); + stat = idr_find(&sp_proc_stat_idr, tgid); if (!stat || !atomic_inc_not_zero(&stat->use_count)) stat = NULL; @@ -137,16 +137,16 @@ static struct sp_proc_stat *sp_init_proc_stat(struct task_struct *tsk, int id, tgid = tsk->tgid; int ret; - down_write(&sp_stat_sem); + down_write(&sp_proc_stat_sem); id = mm->sp_group_master->sp_stat_id; if (id) { /* other threads in the same process may have initialized it */ stat = sp_get_proc_stat_locked(tgid); if (stat) { - up_write(&sp_stat_sem); + up_write(&sp_proc_stat_sem); return stat; } else { - up_write(&sp_stat_sem); + up_write(&sp_proc_stat_sem); /* if enter this branch, that's our mistake */ pr_err_ratelimited("share pool: proc stat invalid id %d\n", id); return ERR_PTR(-EBUSY); @@ -155,7 +155,7 @@ static struct sp_proc_stat *sp_init_proc_stat(struct task_struct *tsk, stat = kzalloc(sizeof(*stat), GFP_KERNEL); if (stat == NULL) { - up_write(&sp_stat_sem); + up_write(&sp_proc_stat_sem); pr_err_ratelimited("share pool: alloc proc stat failed due to lack of memory\n"); return ERR_PTR(-ENOMEM); } @@ -167,16 +167,16 @@ static struct sp_proc_stat *sp_init_proc_stat(struct task_struct *tsk, stat->mm = mm; get_task_comm(stat->comm, tsk); - ret = idr_alloc(&sp_stat_idr, stat, tgid, tgid + 1, GFP_KERNEL); + ret = idr_alloc(&sp_proc_stat_idr, stat, tgid, tgid + 1, GFP_KERNEL); if (ret < 0) { - up_write(&sp_stat_sem); + up_write(&sp_proc_stat_sem); pr_err_ratelimited("share pool: proc stat idr alloc failed %d\n", ret); kfree(stat); return ERR_PTR(ret); } mm->sp_group_master->sp_stat_id = ret; - up_write(&sp_stat_sem); + up_write(&sp_proc_stat_sem); return stat; } @@ -184,9 +184,9 @@ static struct sp_proc_stat *sp_get_proc_stat(int tgid) { struct sp_proc_stat *stat; - down_read(&sp_stat_sem); + down_read(&sp_proc_stat_sem); stat = sp_get_proc_stat_locked(tgid); - up_read(&sp_stat_sem); + up_read(&sp_proc_stat_sem); return stat; } @@ -195,9 +195,9 @@ struct sp_proc_stat *sp_get_proc_stat_ref(int tgid) { struct sp_proc_stat *stat; - down_read(&sp_stat_sem); + down_read(&sp_proc_stat_sem); stat = sp_get_proc_stat_ref_locked(tgid); - up_read(&sp_stat_sem); + up_read(&sp_proc_stat_sem); return stat; } @@ -2850,10 +2850,10 @@ __setup("enable_sp_multi_group_mode", enable_sp_multi_group_mode); static void free_sp_proc_stat(struct sp_proc_stat *stat) { - down_write(&sp_stat_sem); + down_write(&sp_proc_stat_sem); stat->mm->sp_group_master->sp_stat_id = 0; - idr_remove(&sp_stat_idr, stat->tgid); - up_write(&sp_stat_sem); + idr_remove(&sp_proc_stat_idr, stat->tgid); + up_write(&sp_proc_stat_sem); kfree(stat); } @@ -3163,9 +3163,9 @@ static int proc_stat_show(struct seq_file *seq, void *offset) byte2kb(atomic64_read(&kthread_stat.k2u_size))); /* pay attention to potential ABBA deadlock */ - down_read(&sp_stat_sem); - idr_for_each(&sp_stat_idr, idr_proc_stat_cb, seq); - up_read(&sp_stat_sem); + down_read(&sp_proc_stat_sem); + idr_for_each(&sp_proc_stat_idr, idr_proc_stat_cb, seq); + up_read(&sp_proc_stat_sem); return 0; } -- 2.25.1

1 40

[PATCH openEuler-1.0-LTS 1/7] sharepool: Fix ASLR broken
by Yang Yingliang 30 Oct '21

30 Oct '21

From: Wang Wensheng <wangwensheng4(a)huawei.com> ascend inclusion category: bugfix bugzilla: NA CVE: NA --------------------------- To avoid mmap vspace reserved for sharepool, we currently change the high_limit to MMAP_SHARE_POOL_START in arch_get_unmapped_area() and arch_get_unmapped_area_topdown(). In mmap-topdown scene, this make the start address of mmap being always MMAP_SHARE_POOL_START. ASLR got broken. To fix this, this patch set the mm->mmap_base based on MMAP_SHARE_POOL_START instead of STACK_TOP in topdown scene. Fixes: 4bdd5c21793e ("ascend: memory: introduce do_mm_populate and hugetlb_insert_hugepage") Signed-off-by: Wang Wensheng <wangwensheng4(a)huawei.com> Reviewed-by: Weilong Chen <chenweilong(a)huawei.com> Reviewed-by: Ding Tianhong <dingtianhong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- arch/arm64/mm/mmap.c | 6 +++++- include/linux/share_pool.h | 4 ++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm64/mm/mmap.c b/arch/arm64/mm/mmap.c index ac89686c4af89..87f29df8126ba 100644 --- a/arch/arm64/mm/mmap.c +++ b/arch/arm64/mm/mmap.c @@ -28,6 +28,7 @@ #include <linux/io.h> #include <linux/personality.h> #include <linux/random.h> +#include <linux/share_pool.h> #include <asm/cputype.h> @@ -80,7 +81,10 @@ static unsigned long mmap_base(unsigned long rnd, struct rlimit *rlim_stack) else if (gap > MAX_GAP) gap = MAX_GAP; - return PAGE_ALIGN(STACK_TOP - gap - rnd); + if (sp_is_enabled()) + return ALIGN_DOWN(MMAP_SHARE_POOL_START - rnd, PAGE_SIZE); + else + return PAGE_ALIGN(STACK_TOP - gap - rnd); } /* diff --git a/include/linux/share_pool.h b/include/linux/share_pool.h index 9650f257b3ad7..9557a8be46677 100644 --- a/include/linux/share_pool.h +++ b/include/linux/share_pool.h @@ -130,8 +130,6 @@ struct sp_proc_stat { atomic64_t k2u_size; }; -#ifdef CONFIG_ASCEND_SHARE_POOL - #define MAP_SHARE_POOL 0x100000 #define MMAP_TOP_4G_SIZE 0x100000000UL @@ -148,6 +146,8 @@ struct sp_proc_stat { #define MMAP_SHARE_POOL_START (MMAP_SHARE_POOL_END - MMAP_SHARE_POOL_SIZE) #define MMAP_SHARE_POOL_16G_START (MMAP_SHARE_POOL_END - MMAP_SHARE_POOL_DVPP_SIZE) +#ifdef CONFIG_ASCEND_SHARE_POOL + static inline void sp_init_mm(struct mm_struct *mm) { mm->sp_group = NULL; -- 2.25.1

1 6

[PATCH openEuler-5.10 01/20] perf stat: Add --quiet option
by Zheng Zengkai 30 Oct '21

30 Oct '21

From: Andi Kleen <andi(a)firstfloor.org> mainline inclusion from mainline-5.11 commit 55a4de94c64bacffbcd802c954764e0de2ab217f category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4CMQA CVE: NA -------------------------------- Add a new --quiet option to 'perf stat'. This is useful with 'perf stat record' to write the data only to the perf.data file, which can lower measurement overhead because the data doesn't need to be formatted. On my 4C desktop: % time ./perf stat record -e $(python -c 'print ",\ ".join(["cycles"]*1000)') -a -I 1000 sleep 5 ... real 0m5.377s user 0m0.238s sys 0m0.452s % time ./perf stat record --quiet -e $(python -c 'print ",\ ".join(["cycles"]*1000)') -a -I 1000 sleep 5 real 0m5.452s user 0m0.183s sys 0m0.423s In this example it cuts the user time by 20%. On systems with more cores the savings are higher. Signed-off-by: Andi Kleen <andi(a)firstfloor.org> Acked-by: Jiri Olsa <jolsa(a)kernel.org> Cc: Alexey Budankov <alexey.budankov(a)linux.intel.com> Link: http://lore.kernel.org/lkml/20201027002737.30942-1-andi@firstfloor.org Signed-off-by: Arnaldo Carvalho de Melo <acme(a)redhat.com> Signed-off-by: yin-xiujiang <yinxiujiang(a)kylinos.cn> Reviewed-by: Wang ShaoBo <bobo.shaobowang(a)huawei.com> Reviewed-by: Yang Jihong <yangjihong1(a)huawei.com> Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> --- tools/perf/Documentation/perf-stat.txt | 4 ++++ tools/perf/builtin-stat.c | 6 +++++- tools/perf/util/stat.h | 1 + 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/tools/perf/Documentation/perf-stat.txt b/tools/perf/Documentation/perf-stat.txt index 9f9f29025e49..f9bcd95bf352 100644 --- a/tools/perf/Documentation/perf-stat.txt +++ b/tools/perf/Documentation/perf-stat.txt @@ -320,6 +320,10 @@ STAT RECORD ----------- Stores stat data into perf data file. +--quiet:: +Don't print output. This is useful with perf stat record below to only +write data to the perf.data file. + -o file:: --output file:: Output file name. diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c index b01af171d94f..89e80a3bc9c3 100644 --- a/tools/perf/builtin-stat.c +++ b/tools/perf/builtin-stat.c @@ -973,6 +973,8 @@ static void print_counters(struct timespec *ts, int argc, const char **argv) if (STAT_RECORD && perf_stat.data.is_pipe) return; + if (stat_config.quiet) + return; perf_evlist__print_counters(evsel_list, &stat_config, &target, ts, argc, argv); } @@ -1171,6 +1173,8 @@ static struct option stat_options[] = { "threads of same physical core"), OPT_BOOLEAN(0, "summary", &stat_config.summary, "print summary for interval mode"), + OPT_BOOLEAN(0, "quiet", &stat_config.quiet, + "don't print output (useful with record)"), #ifdef HAVE_LIBPFM OPT_CALLBACK(0, "pfm-events", &evsel_list, "event", "libpfm4 event selector. use 'perf list' to list available events", @@ -2132,7 +2136,7 @@ int cmd_stat(int argc, const char **argv) goto out; } - if (!output) { + if (!output && !stat_config.quiet) { struct timespec tm; mode = append_file ? "a" : "w"; diff --git a/tools/perf/util/stat.h b/tools/perf/util/stat.h index 487010c624be..05adf8165025 100644 --- a/tools/perf/util/stat.h +++ b/tools/perf/util/stat.h @@ -122,6 +122,7 @@ struct perf_stat_config { bool metric_no_group; bool metric_no_merge; bool stop_read_counter; + bool quiet; FILE *output; unsigned int interval; unsigned int timeout; -- 2.20.1

1 19

[PATCH openEuler-1.0-LTS 001/103] mm/vmalloc: Hugepage vmalloc mappings
by Yang Yingliang 30 Oct '21

30 Oct '21

From: Nicholas Piggin <npiggin(a)gmail.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4EUVI CVE: NA https://lwn.net/ml/linux-kernel/20200825145753.529284-12-npiggin@gmail.com/ Don't distinction between vmalloc and hugepage vmalloc, because there is no size print in alloc_large_system_hash in v4.19. And this patch add page_order in vm_struct, it will break kabi. -------------- Support huge page vmalloc mappings. Config option HAVE_ARCH_HUGE_VMALLOC enables support on architectures that define HAVE_ARCH_HUGE_VMAP and supports PMD sized vmap mappings. vmalloc will attempt to allocate PMD-sized pages if allocating PMD size or larger, and fall back to small pages if that was unsuccessful. Allocations that do not use PAGE_KERNEL prot are not permitted to use huge pages, because not all callers expect this (e.g., module allocations vs strict module rwx). This reduces TLB misses by nearly 30x on a `git diff` workload on a 2-node POWER9 (59,800 -> 2,100) and reduces CPU cycles by 0.54%. This can result in more internal fragmentation and memory overhead for a given allocation, an option nohugevmalloc is added to disable at boot. Signed-off-by: Nicholas Piggin <npiggin(a)gmail.com> Signed-off-by: Rui Xiang <rui.xiang(a)huawei.com> Reviewed-by: Ding Tianhong <dingtianhong(a)huawei.com> Reviewed-by: Zefan Li <lizefan(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> Reviewed-by: Weilong Chen <chenweilong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- arch/Kconfig | 4 + include/linux/vmalloc.h | 1 + mm/vmalloc.c | 160 +++++++++++++++++++++++++++++++--------- 3 files changed, 130 insertions(+), 35 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index e906cbb213444..00f55932ba781 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -559,6 +559,10 @@ config HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD config HAVE_ARCH_HUGE_VMAP bool +config HAVE_ARCH_HUGE_VMALLOC + depends on HAVE_ARCH_HUGE_VMAP + bool + config HAVE_ARCH_SOFT_DIRTY bool diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h index 496ac80046c01..07b4b1141ed8a 100644 --- a/include/linux/vmalloc.h +++ b/include/linux/vmalloc.h @@ -39,6 +39,7 @@ struct vm_struct { unsigned long size; unsigned long flags; struct page **pages; + unsigned int page_order; unsigned int nr_pages; phys_addr_t phys_addr; const void *caller; diff --git a/mm/vmalloc.c b/mm/vmalloc.c index fc6394184a1ba..e76b806a6c003 100644 --- a/mm/vmalloc.c +++ b/mm/vmalloc.c @@ -41,6 +41,19 @@ #include "internal.h" +#ifdef CONFIG_HAVE_ARCH_HUGE_VMALLOC +static bool __ro_after_init vmap_allow_huge = true; + +static int __init set_nohugevmalloc(char *str) +{ + vmap_allow_huge = false; + return 0; +} +early_param("nohugevmalloc", set_nohugevmalloc); +#else /* CONFIG_HAVE_ARCH_HUGE_VMALLOC */ +static const bool vmap_allow_huge = false; +#endif /* CONFIG_HAVE_ARCH_HUGE_VMALLOC */ + struct vfree_deferred { struct llist_head list; struct work_struct wq; @@ -410,6 +423,61 @@ static int vmap_pages_p4d_range(pgd_t *pgd, unsigned long addr, return 0; } +static int vmap_small_pages_range_noflush(unsigned long addr, unsigned long end, + pgprot_t prot, struct page **pages) +{ + pgd_t *pgd; + unsigned long next; + int err = 0; + int nr = 0; + + BUG_ON(addr >= end); + pgd = pgd_offset_k(addr); + do { + next = pgd_addr_end(addr, end); + err = vmap_pages_p4d_range(pgd, addr, next, prot, pages, &nr); + if (err) + return err; + } while (pgd++, addr = next, addr != end); + + return 0; +} + +static int vmap_pages_range_noflush(unsigned long addr, unsigned long end, + pgprot_t prot, struct page **pages, unsigned int page_shift) +{ + unsigned int i, nr = (end - addr) >> PAGE_SHIFT; + + WARN_ON(page_shift < PAGE_SHIFT); + + if (page_shift == PAGE_SHIFT) + return vmap_small_pages_range_noflush(addr, end, prot, pages); + + for (i = 0; i < nr; i += 1U << (page_shift - PAGE_SHIFT)) { + int err; + + err = vmap_range_noflush(addr, addr + (1UL << page_shift), + __pa(page_address(pages[i])), prot, + page_shift); + if (err) + return err; + + addr += 1UL << page_shift; + } + + return 0; +} + +static int vmap_pages_range(unsigned long addr, unsigned long end, + pgprot_t prot, struct page **pages, unsigned int page_shift) +{ + int err; + + err = vmap_pages_range_noflush(addr, end, prot, pages, page_shift); + flush_cache_vmap(addr, end); + return err; +} + /** * map_kernel_range_noflush - map kernel VM area with the specified pages * @addr: start of the VM area to map @@ -431,22 +499,7 @@ static int vmap_pages_p4d_range(pgd_t *pgd, unsigned long addr, int map_kernel_range_noflush(unsigned long addr, unsigned long size, pgprot_t prot, struct page **pages) { - unsigned long end = addr + size; - unsigned long next; - pgd_t *pgd; - int err = 0; - int nr = 0; - - BUG_ON(addr >= end); - pgd = pgd_offset_k(addr); - do { - next = pgd_addr_end(addr, end); - err = vmap_pages_p4d_range(pgd, addr, next, prot, pages, &nr); - if (err) - return err; - } while (pgd++, addr = next, addr != end); - - return 0; + return vmap_pages_range_noflush(addr, addr + size, prot, pages, PAGE_SHIFT); } int map_kernel_range(unsigned long start, unsigned long size, pgprot_t prot, @@ -2270,11 +2323,11 @@ static void __vunmap(const void *addr, int deallocate_pages) if (deallocate_pages) { int i; - for (i = 0; i < area->nr_pages; i++) { + for (i = 0; i < area->nr_pages; i += 1U << area->page_order) { struct page *page = area->pages[i]; BUG_ON(!page); - __free_pages(page, 0); + __free_pages(page, area->page_order); } kvfree(area->pages); @@ -2403,9 +2456,12 @@ static void *__vmalloc_node(unsigned long size, unsigned long align, gfp_t gfp_mask, pgprot_t prot, int node, const void *caller); static void *__vmalloc_area_node(struct vm_struct *area, gfp_t gfp_mask, - pgprot_t prot, int node) + pgprot_t prot, unsigned int page_shift, int node) { struct page **pages; + unsigned long addr = (unsigned long)area->addr; + unsigned long size = get_vm_area_size(area); + unsigned int page_order = page_shift - PAGE_SHIFT; unsigned int nr_pages; unsigned long array_size; unsigned int i; @@ -2415,7 +2471,7 @@ static void *__vmalloc_area_node(struct vm_struct *area, gfp_t gfp_mask, 0 : __GFP_HIGHMEM; - nr_pages = get_vm_area_size(area) >> PAGE_SHIFT; + nr_pages = size >> PAGE_SHIFT; array_size = (unsigned long)nr_pages * sizeof(struct page *); /* Please note that the recursion is strictly bounded. */ @@ -2434,27 +2490,27 @@ static void *__vmalloc_area_node(struct vm_struct *area, gfp_t gfp_mask, area->pages = pages; area->nr_pages = nr_pages; + area->page_order = page_order; - for (i = 0; i < area->nr_pages; i++) { + for (i = 0; i < area->nr_pages; i += 1U << page_order) { struct page *page; + int p; - if (node == NUMA_NO_NODE) - page = alloc_page(alloc_mask|highmem_mask); - else - page = alloc_pages_node(node, alloc_mask|highmem_mask, 0); - + page = alloc_pages_node(node, alloc_mask|highmem_mask, page_order); if (unlikely(!page)) { /* Successfully allocated i pages, free them in __vunmap() */ area->nr_pages = i; goto fail; } - area->pages[i] = page; + + for (p = 0; p < (1U << page_order); p++) + area->pages[i + p] = page + p; + if (gfpflags_allow_blocking(gfp_mask|highmem_mask)) cond_resched(); } - if (map_kernel_range((unsigned long)area->addr, get_vm_area_size(area), - prot, pages) < 0) + if (vmap_pages_range(addr, addr + size, prot, pages, page_shift) < 0) goto fail; return area->addr; @@ -2462,7 +2518,7 @@ static void *__vmalloc_area_node(struct vm_struct *area, gfp_t gfp_mask, fail: warn_alloc(gfp_mask, NULL, "vmalloc: allocation failure, allocated %ld of %ld bytes", - (area->nr_pages*PAGE_SIZE), area->size); + (area->nr_pages*PAGE_SIZE), size); vfree(area->addr); return NULL; } @@ -2491,19 +2547,42 @@ void *__vmalloc_node_range(unsigned long size, unsigned long align, struct vm_struct *area; void *addr; unsigned long real_size = size; + unsigned long real_align = align; + unsigned int shift = PAGE_SHIFT; - size = PAGE_ALIGN(size); if (!size || (size >> PAGE_SHIFT) > totalram_pages) goto fail; + if (vmap_allow_huge && (pgprot_val(prot) == pgprot_val(PAGE_KERNEL))) { + unsigned long size_per_node; + + /* + * Try huge pages. Only try for PAGE_KERNEL allocations, + * others like modules don't yet expect huge pages in + * their allocations due to apply_to_page_range not + * supporting them. + */ + + size_per_node = size; + if (node == NUMA_NO_NODE) + size_per_node /= num_online_nodes(); + if (size_per_node >= PMD_SIZE) { + shift = PMD_SHIFT; + align = max(real_align, 1UL << shift); + size = ALIGN(real_size, 1UL << shift); + } + } + +again: + size = PAGE_ALIGN(size); area = __get_vm_area_node(size, align, VM_ALLOC | VM_UNINITIALIZED | vm_flags, start, end, node, gfp_mask, caller); if (!area) goto fail; - addr = __vmalloc_area_node(area, gfp_mask, prot, node); + addr = __vmalloc_area_node(area, gfp_mask, prot, shift, node); if (!addr) - return NULL; + goto fail; /* * First make sure the mappings are removed from all page-tables @@ -2523,8 +2602,19 @@ void *__vmalloc_node_range(unsigned long size, unsigned long align, return addr; fail: - warn_alloc(gfp_mask, NULL, + if (shift > PAGE_SHIFT) { + free_vm_area(area); + shift = PAGE_SHIFT; + align = real_align; + size = real_size; + goto again; + } + + if (!area) { + /* Warn for area allocation, page allocations already warn */ + warn_alloc(gfp_mask, NULL, "vmalloc: allocation failure: %lu bytes", real_size); + } return NULL; } @@ -3503,7 +3593,7 @@ static int s_show(struct seq_file *m, void *p) seq_printf(m, " %pS", v->caller); if (v->nr_pages) - seq_printf(m, " pages=%d", v->nr_pages); + seq_printf(m, " pages=%d order=%d", v->nr_pages, v->page_order); if (v->phys_addr) seq_printf(m, " phys=%pa", &v->phys_addr); -- 2.25.1

1 102

[PATCH openEuler-1.0-LTS 01/26] mm: add do_vm_mmap
by Yang Yingliang 29 Oct '21

29 Oct '21

From: Fang Lijun <fanglijun3(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4D63I CVE: NA ------------------------------------------------- An interface do_vm_mmap is added to support the allocation in the address spaces of other processes. Signed-off-by: Fang Lijun <fanglijun3(a)huawei.com> Signed-off-by: Zhou Guanghui <zhouguanghui1(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- include/linux/mm.h | 3 +++ mm/mmap.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+) diff --git a/include/linux/mm.h b/include/linux/mm.h index 75d94ea5d1c20..58fe28dd959b9 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -2436,6 +2436,9 @@ static inline void mm_populate(unsigned long addr, unsigned long len) {} extern int __must_check vm_brk(unsigned long, unsigned long); extern int __must_check vm_brk_flags(unsigned long, unsigned long, unsigned long); extern int vm_munmap(unsigned long, size_t); +extern unsigned long do_vm_mmap(struct mm_struct *mm, unsigned long addr, + unsigned long len, unsigned long prot, + unsigned long flag, unsigned long pgoff); extern unsigned long __must_check vm_mmap(struct file *, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long); diff --git a/mm/mmap.c b/mm/mmap.c index 80779bbb1c048..f7f1fd3b5fa39 100644 --- a/mm/mmap.c +++ b/mm/mmap.c @@ -3094,6 +3094,40 @@ int vm_munmap(unsigned long start, size_t len) } EXPORT_SYMBOL(vm_munmap); +/* + * Must acquire an additional reference to the mm struct to prevent the + * mm struct of other process from being released. + * + * This interface is applicable only to kernel thread scenarios. + */ +unsigned long do_vm_mmap(struct mm_struct *mm, unsigned long addr, + unsigned long len, unsigned long prot, + unsigned long flag, unsigned long pgoff) +{ + unsigned long ret; + unsigned long populate; + LIST_HEAD(uf); + + if (mm == NULL || current->mm) + return -EINVAL; + + if (down_write_killable(&mm->mmap_sem)) + return -EINTR; + + current->mm = mm; + ret = do_mmap_pgoff(0, addr, len, prot, flag, pgoff, + &populate, &uf); + + current->mm = NULL; + up_write(&mm->mmap_sem); + userfaultfd_unmap_complete(mm, &uf); + if (populate) + mm_populate(ret, populate); + + return ret; +} +EXPORT_SYMBOL(do_vm_mmap); + SYSCALL_DEFINE2(munmap, unsigned long, addr, size_t, len) { profile_munmap(addr); -- 2.25.1

1 25

Re: [PATCH openEuler-21.03] vfio-ccw: Reset FSM state to IDLE inside FSM
by Wangshaobo (bobo) 29 Oct '21

29 Oct '21

Reviewed-by: Wang ShaoBo <bobo.shaobowang(a)huawei.com> 在 2021/10/28 22:42, Chen Silong 写道: > From: Eric Farman <farman(a)linux.ibm.com> > > stable inclusion > from stable-v5.10.44 > commit cad3dc73c0645d00adfe96cebc8d950897cc1227 > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=453 > CVE: NA > > ------------------------------------------------- > > [ Upstream commit 6c02ac4c9211edabe17bda437ac97e578756f31b ] > > When an I/O request is made, the fsm_io_request() routine > moves the FSM state from IDLE to CP_PROCESSING, and then > fsm_io_helper() moves it to CP_PENDING if the START SUBCHANNEL > received a cc0. Yet, the error case to go from CP_PROCESSING > back to IDLE is done after the FSM call returns. > > Let's move this up into the FSM proper, to provide some > better symmetry when unwinding in this case. > > Signed-off-by: Eric Farman <farman(a)linux.ibm.com> > Reviewed-by: Cornelia Huck <cohuck(a)redhat.com> > Acked-by: Matthew Rosato <mjrosato(a)linux.ibm.com> > Message-Id: <20210511195631.3995081-3-farman(a)linux.ibm.com> > Signed-off-by: Cornelia Huck <cohuck(a)redhat.com> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: Chen Silong <2019117735(a)my.swjtu.edu.cn> > --- > drivers/s390/cio/vfio_ccw_fsm.c | 1 + > drivers/s390/cio/vfio_ccw_ops.c | 2 -- > 2 files changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/s390/cio/vfio_ccw_fsm.c b/drivers/s390/cio/vfio_ccw_fsm.c > index 23e61aa638e4..e435a9cd92da 100644 > --- a/drivers/s390/cio/vfio_ccw_fsm.c > +++ b/drivers/s390/cio/vfio_ccw_fsm.c > @@ -318,6 +318,7 @@ static void fsm_io_request(struct vfio_ccw_private *private, > } > > err_out: > + private->state = VFIO_CCW_STATE_IDLE; > trace_vfio_ccw_fsm_io_request(scsw->cmd.fctl, schid, > io_region->ret_code, errstr); > } > diff --git a/drivers/s390/cio/vfio_ccw_ops.c b/drivers/s390/cio/vfio_ccw_ops.c > index 1ad5f7018ec2..2280f51dd679 100644 > --- a/drivers/s390/cio/vfio_ccw_ops.c > +++ b/drivers/s390/cio/vfio_ccw_ops.c > @@ -276,8 +276,6 @@ static ssize_t vfio_ccw_mdev_write_io_region(struct vfio_ccw_private *private, > } > > vfio_ccw_fsm_event(private, VFIO_CCW_EVENT_IO_REQ); > - if (region->ret_code != 0) > - private->state = VFIO_CCW_STATE_IDLE; > ret = (region->ret_code != 0) ? region->ret_code : count; > > out_unlock:

1 0

[PATCH openEuler-1.0-LTS V3 0/6] Fix the problem that the number of tcp timeout retransmissions is lost
by Laibin Qiu 29 Oct '21

29 Oct '21

issue: https://gitee.com/openeuler/kernel/issues/I4AFRJ?from=project-issue Eric Dumazet (4): tcp: switch tcp and sch_fq to new earliest departure time model net_sched: sch_fq: ensure maxrate fq parameter applies to EDT flows tcp: address problems caused by EDT misshaps tcp: adjust rto_base in retransmits_timed_out() Yuchung Cheng (2): tcp: always set retrans_stamp on recovery tcp: create a helper to model exponential backoff net/ipv4/tcp_bbr.c | 7 +++-- net/ipv4/tcp_input.c | 17 +++++++----- net/ipv4/tcp_output.c | 31 +++++++++++++++------ net/ipv4/tcp_timer.c | 64 ++++++++++++++++++++----------------------- net/sched/sch_fq.c | 46 ++++++++++++++++++------------- 5 files changed, 93 insertions(+), 72 deletions(-) -- 2.22.0

1 6

[PATCH openEuler-1.0-LTS V2 0/6] Fix the problem that the
by Laibin Qiu 29 Oct '21

29 Oct '21

issue: https://gitee.com/openeuler/kernel/issues/I4AFRJ?from=project-issue Eric Dumazet (4): tcp: switch tcp and sch_fq to new earliest departure time model net_sched: sch_fq: ensure maxrate fq parameter applies to EDT flows tcp: address problems caused by EDT misshaps tcp: adjust rto_base in retransmits_timed_out() Yuchung Cheng (2): tcp: always set retrans_stamp on recovery tcp: create a helper to model exponential backoff net/ipv4/tcp_bbr.c | 7 +++-- net/ipv4/tcp_input.c | 17 +++++++----- net/ipv4/tcp_output.c | 31 +++++++++++++++------ net/ipv4/tcp_timer.c | 64 ++++++++++++++++++++----------------------- net/sched/sch_fq.c | 46 ++++++++++++++++++------------- 5 files changed, 93 insertions(+), 72 deletions(-) -- 2.22.0

1 6

[PATCH openEuler-1.0-LTS] README: README optimize
by Laibin Qiu 29 Oct '21

29 Oct '21

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4FS3G?from=project-issue CVE: NA --------------------------- There are some language problems in the README file, and MarkDown fromat syntax is not effective, and it needs to be adjusted. Signed-off-by: suqin <suqin2(a)huawei.com> Signed-off-by: Laibin Qiu <qiulaibin(a)huawei.com> --- README | 226 --------------------------------------------------- README.md | 237 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 237 insertions(+), 226 deletions(-) delete mode 100644 README create mode 100644 README.md diff --git a/README b/README deleted file mode 100644 index 46c9ea352..000000000 --- a/README +++ /dev/null @@ -1,226 +0,0 @@ -Contributions to openEuler kernel project -========================================= - -Sign CLA --------- - -Before submitting any Contributions to openEuler, you have to sign CLA. - -See: - https://openeuler.org/zh/cla.html - https://openeuler.org/en/cla.html - -Steps of submitting patches ---------------------------- - -1. Compile and test your patches successfully. -2. Generate patches - Your patches should be based on top of latest openEuler branch, and should - use git-format-patch to generate patches, and if it's a patchset, it's - better to use --cover-letter option to describe what the patchset does. - - Using scripts/checkpatch.pl to make sure there's no coding style issue. - - And make sure your patch follow unified openEuler patch format describe - below. - -3. Send patch to openEuler mailing list - Use this command to send patches to openEuler mailing list: - - git send-email *.patch -to="kernel(a)openeuler.org" --suppress-cc=all - - *NOTE*: that you must add --suppress-cc=all if you use git send-email, - otherwise the email will be cced to the people in upstream community and mailing - lists. - - *See*: How to send patches using git-send-email - https://git-scm.com/docs/git-send-email - -4. Mark "v1, v2, v3 ..." in your patch subject if you have multiple versions - to send out. - - Use --subject-prefix="PATCH v2" option to add v2 tag for patchset. - git format-patch --subject-prefix="PATCH v2" -1 - - Subject examples: - Subject: [PATCH v2 01/27] fork: fix some -Wmissing-prototypes warnings - Subject: [PATCH v3] ext2: improve scalability of bitmap searching - -5. Upstream your kernel patch to kernel community is strongly recommended. - openEuler will sync up with kernel master timely. - -6. Sign your work - the Developer’s Certificate of Origin - As the same of upstream kernel community, you also need to sign your patch. - - See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html - - The sign-off is a simple line at the end of the explanation for the patch, - which certifies that you wrote it or otherwise have the right to pass it - on as an open-source patch. The rules are pretty simple: if you can certify - the below: - - Developer’s Certificate of Origin 1.1 - ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - - By making a contribution to this project, I certify that: - - (a) The contribution was created in whole or in part by me and I have - the right to submit it under the open source license indicated in - the file; or - - (b The contribution is based upon previous work that, to the best of - my knowledge, is covered under an appropriate open source license - and I have the right under that license to submit that work with - modifications, whether created in whole or in part by me, under - the same open source license (unless I am permitted to submit under - a different license), as indicated in the file; or - - (c) The contribution was provided directly to me by some other person - who certified (a), (b) or (c) and I have not modified it. - - (d) I understand and agree that this project and the contribution are - public and that a record of the contribution (including all personal - information I submit with it, including my sign-off) is maintained - indefinitely and may be redistributed consistent with this project - or the open source license(s) involved. - - then you just add a line saying: - - Signed-off-by: Random J Developer <random(a)developer.example.org> - - using your real name (sorry, no pseudonyms or anonymous contributions.) - -Use unified patch format ------------------------- - -Reasons: - -1. long term maintainability - openEuler will merge massive patches. If all patches are merged by casual - changelog format without a unified format, the git log will be messy, and - then it's hard to figure out the original patch. - -2. kernel upgrade - We definitely will upgrade our openEuler kernel in someday, using strict - patch management will alleviate the pain to migrate patches during big upgrade. - -3. easy for script parsing - Keyword highlighting is necessary for script parsing. - -Patch format definition ------------------------ - -[M] stands for "mandatory" -[O] stands for "option" -$category can be: bug preparation, bugfix, perf, feature, doc, other... - -If category is feature, then we also need to add feature name like below: - category: feature - feature: YYY (the feature name) - -If the patch is related to CVE or bugzilla, then we need add the corresponding -tag like below (In general, it should include at least one of the following): - CVE: $cve-id - bugzilla: $bug-id - -Additional changelog should include at least one of the flollwing: - 1) Why we should apply this patch - 2) What real problem in product does this patch resolved - 3) How could we reproduce this bug or how to test - 4) Other useful information for help to understand this patch or problem - -The detail information is very useful for porting patch to another kenrel branch. - -Example for mainline patch: - - mainline inclusion [M] - from $mainline-version [M] - commit $id [M] - category: $category [M] - bugzilla: $bug-id [O] - CVE: $cve-id [O] - - additional changelog [O] - - -------------------------------- - - original changelog - - Signed-off-by: $yourname <$yourname(a)huawei.com> [M] - - ($mainline-version could be mainline-3.5, mainline-3.6, etc...) - -Examples --------- - -mainline inclusion -from mainline-4.10 -commit 0becc0ae5b42828785b589f686725ff5bc3b9b25 -category: bugfix -bugzilla: 3004 -CVE: NA - -The patch fixes a BUG_ON in the product: injecting single bit ECC error -to memory before system boot use hardware inject tools, which cause a -large amount of CMCI during system booting . - -[ 1.146580] mce: [Hardware Error]: Machine check events logged -[ 1.152908] ------------[ cut here ]------------ -[ 1.157751] kernel BUG at kernel/timer.c:951! -[ 1.162321] invalid opcode: 0000 [#1] SMP -... - -------------------------------------------------- - -original changelog - -<original S-O-B> -Signed-off-by: Zhang San <zhangsan(a)huawei.com> -Tested-by: Li Si <lisi(a)huawei.com> - -Email Client - Thunderbird Settings ------------------------------------ - -If you are newly developer in the kernel community, it is highly recommended -to use thunderbird mail client. - -1. Thunderbird Installation - Get English version Thunderbird from http://www.mozilla.org/ and install - it on your system。 - - Download url: https://www.thunderbird.net/en-US/thunderbird/all/ - -2. Settings - 2.1 Use plain text format instead of HTML format - Options -> Account Settings -> Composition & Addressing, do *NOT* select - "Compose message in HTML format". - - 2.2 Editor Settings - Tools->Options->Advanced->Config editor. - - - To bring up the thunderbird's registry editor, and set: - "mailnews.send_plaintext_flowed" to "false". - - Disable HTML Format: Set "mail.identity.id1.compose_html" to "false". - - Enable UTF8: Set "prefs.converted-to-utf8" to "true". - - View message in UTF-8: Set "mailnews.view_default_charset" to "UTF-8". - - Set mailnews.wraplength to 9999 for avoiding auto-wrap - -Linux kernel -============ - -There are several guides for kernel developers and users. These guides can -be rendered in a number of formats, like HTML and PDF. Please read -Documentation/admin-guide/README.rst first. - -In order to build the documentation, use ``make htmldocs`` or -``make pdfdocs``. The formatted documentation can also be read online at: - - https://www.kernel.org/doc/html/latest/ - -There are various text files in the Documentation/ subdirectory, -several of them using the Restructured Text markup notation. -See Documentation/00-INDEX for a list of what is contained in each file. - -Please read the Documentation/process/changes.rst file, as it contains the -requirements for building and running the kernel, and information about -the problems which may result by upgrading your kernel. diff --git a/README.md b/README.md new file mode 100644 index 000000000..20832fd85 --- /dev/null +++ b/README.md @@ -0,0 +1,237 @@ +# How to Contribute +------- + +- [How to Contribute](#How to Contribute) + + \- [Sign the CLA](#Sign the CLA) + + \- [Steps of submitting patches](#Steps of submitting patches) + + \- [Use the unified patch format](#Use the unified patch format) + + \- [Define the patch format](#Define the patch format) + + \- [Examples](#Examples) + + \- [Email client - Thunderbird settings](#Email client - Thunderbird settings) + +- [Linux kernel](#Linux kernel) + +### Sign the CLA + +------- + +Before making any contributions to openEuler, sign the CLA first. + +Address: [https://openeuler.org/en/cla.html](https://openeuler.org/en/cla.html) + +### Steps of submitting patches +------- + +**Step 1** Compile and test your patches. + +**Step 2** Generate patches. + +Your patches should be generated based on the latest openEuler branch using git-format-patch. If your patches are in a patchset, it is better to use the **--cover-letter** option to describe what the patchset does. + +Use **scripts/checkpatch.pl** to ensure that no coding style issue exists. + +In addition, ensure that your patches comply with the unified openEuler patch format described below. + +**Step 3** Send your patches to the openEuler mailing list. + +To do so, run the following command: + + `git send-email *.patch -to="kernel(a)openeuler.org" --suppress-cc=all` + +*NOTE*: Add **--suppress-cc=all** if you use git-send-email; otherwise, the email will be copied to all people in the upstream community and mailing lists. + +For details about how to send patches using git-send-email, see [https://git-scm.com/docs/git-send-email](https://git-scm.com/docs/git-send-…. + +**Step 4** Mark "v1, v2, v3 ..." in your patch subject if you have multiple versions to send out. + +Use the **--subject-prefix="PATCH v2"** option to add the v2 tag to the patchset. + + `git format-patch --subject-prefix="PATCH v2" -1` + +Subject examples: + + Subject: [PATCH v2 01/27] fork: fix some -Wmissing-prototypes warnings + + Subject: [PATCH v3] ext2: improve scalability of bitmap searching + +**Step 5** Upstream your kernel patches to the kernel community (recommended). openEuler will synchronize with the kernel master in a timely manner. + +**Step 6** Sign your work - the Developer’s Certificate of Origin. + + Similar to the upstream kernel community, you also need to sign your patch. + + For details, see [https://www.kernel.org/doc/html/latest/process/submitting-patches.html](htt…. + + The sign-off is a simple line at the end of the explanation of the patch, which certifies that you wrote it or otherwise have the right to pass it on as an open source patch. The rules are pretty simple. You can certify as below: + + Developer’s Certificate of Origin 1.1 + + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + By making a contribution to this project, I certify that: + + (a) The contribution was created in whole or in part by me and I have the right to submit it under the open source license indicated in the file; + + (b) The contribution is based upon previous work that, to the best of my knowledge, is covered under an appropriate open source license and I have the right under that license to submit that work with modifications, whether created in whole or in part by me, under the same open source license (unless I am permitted to submit under a different license), as indicated in the file; + + (c) The contribution was provided directly to me by some other person who certified (a), (b) or (c) and I have not modified it. + + (d) I understand and agree that this project and the contribution are public and that a record of the contribution (including all personal information I submit with it, including my sign-off) is maintained indefinitely and may be redistributed consistent with this project or the open source license(s) involved. + +Then you add a line saying: + +Signed-off-by: Random J Developer <random(a)developer.example.org> + +Use your real name (sorry, no pseudonyms or anonymous contributions). + +### Use the unified patch format +------- + +Reasons: + +1. Long term maintainability + + openEuler will merge massive patches. If all patches are merged by casual + + changelog formats without a unified format, the git logs will be messy, and + + then it is hard to figure out the original patches. + +2. Kernel upgrade + + We definitely will upgrade our openEuler kernel in someday, so strict patch management + + will alleviate the pain to migrate patches during big upgrades. + +3. Easy for script parsing + + Keyword highlighting is necessary for script parsing. + +### Define the patch format +------- + +[M] stands for "mandatory". + +[O] stands for "option". + +$category can be: bug preparation, bugfix, perf, feature, doc, other... + +If category is feature, we need to add a feature name as below: + +```cpp +category: feature +feature: YYY (the feature name) +``` + +If the patch is related to CVE or bugzilla, we need to add the corresponding tag as below (In general, it should include at least one of the following): + +```cpp +CVE: $cve-id +bugzilla: $bug-id +``` + +Additional changelog should include at least one of the following: + +1. Why we should apply this patch + +2. What real problems in the product does this patch resolved + +3. How could we reproduce this bug or how to test + +4. Other useful information for help to understand this patch or problem + +The detailed information is very useful for migrating a patch to another kernel branch. + +Example for mainline patch: + +```cpp +mainline inclusion [M] +from $mainline-version [M] +commit $id [M] +category: $category [M] +bugzilla: $bug-id [O] +CVE: $cve-id [O] + +additional changelog [O] + +-------------------------------- + +original changelog +Signed-off-by: $yourname <$yourname(a)huawei.com> [M] +($mainline-version could be mainline-3.5, mainline-3.6, etc...) +``` + +### Examples +------- + +```cpp +mainline inclusion +from mainline-4.10 +commit 0becc0ae5b42828785b589f686725ff5bc3b9b25 +category: bugfix +bugzilla: 3004 +CVE: N/A + +The patch fixes a BUG_ON in the product: Injecting a single bit ECC error to the memory before system boot using hardware inject tools will cause a large amount of CMCI during system booting . +[ 1.146580] mce: [Hardware Error]: Machine check events logged +[ 1.152908] ------------[ cut here ]------------ +[ 1.157751] kernel BUG at kernel/timer.c:951! +[ 1.162321] invalid opcode: 0000 [#1] SMP + +------------------------------------------------- + +original changelog + +<original S-O-B> +Signed-off-by: Zhang San <zhangsan(a)huawei.com> +Tested-by: Li Si <lisi(a)huawei.com> +``` + +### Email client - Thunderbird settings +------- + +If you are a new developer in the kernel community, it is highly recommended that you use the Thunderbird mail client. + +1. Thunderbird Installation + + Obtain the English version of Thunderbird from [http://www.mozilla.org/]( http://www.mozilla.org/) and install it on your system. + + Download URL: https://www.thunderbird.net/en-US/thunderbird/all/ + +2. Settings + + 2.1 Use the plain text format instead of the HTML format. + + Choose **Options > Account Settings > Composition & Addressing**, and do **NOT** select Compose message in HTML format. + + 2.2 Editor settings + + **Tools > Options> Advanced > Config editor** + + \- To bring up the Thunderbird's registry editor, set **mailnews.send_plaintext_flowed** to **false**. + + \- Disable HTML Format: Set **mail.identity.id1.compose_html** to **false**. + + \- Enable UTF-8: Set **prefs.converted-to-utf8** to **true**. + + \- View messages in UTF-8: Set **mailnews.view_default_charset** to **UTF-8**. + + \- Set **mailnews.wraplength** to **9999** to avoid auto-wrap. + +# Linux kernel +------- + +There are several guides for kernel developers and users, which can be rendered in a number of formats, like HTML and PDF. You can read **Documentation/admin-guide/README.rst** first. + +In order to build the documentation, use **make htmldocs** or **make pdfdocs**. The formatted documentation can also be read online at: https://www.kernel.org/doc/html/latest/ + +There are various text files in the Documentation/ subdirectory, several of which use the Restructured Text markup notation. See Documentation/00-INDEX for a list of what is contained in each file. + +Read the **Documentation/process/changes.rst** file, as it contains the requirements for building and running the kernel, and information about the problems that may be caused by upgrading your kernel. + -- 2.22.0

1 0

[PATCH openEuler-1.0-LTS v2 00/26] support psi feature
by Liu Xinpeng 28 Oct '21

28 Oct '21

backport psi feature and avoid kabi change bugzilla: https://gitee.com/openeuler/kernel/issues/I47QS2 Baruch Siach (1): psi: fix reference to kernel commandline enable Dan Schatzberg (1): kernel/sched/psi.c: expose pressure metrics on root cgroup Johannes Weiner (12): mm: workingset: tell cache transitions from workingset thrashing sched: loadavg: consolidate LOAD_INT, LOAD_FRAC, CALC_LOAD sched: loadavg: make calc_load_n() public sched: sched.h: make rq locking and clock functions available in stats.h sched: introduce this_rq_lock_irq() psi: pressure stall information for CPU, memory, and IO psi: cgroup support psi: make disabling/enabling easier for vendor kernels psi: fix aggregation idle shut-off psi: avoid divide-by-zero crash inside virtual machines fs: kernfs: add poll file operation sched/psi: Fix sampling error and rare div0 crashes with cgroups and high uptime Josef Bacik (1): blk-iolatency: use a percentile approache for ssd's Liu Xinpeng (2): psi:enable psi in config psi:avoid kabi change Miklos Szeredi (1): fuse: ignore PG_workingset after stealing Olof Johansson (1): kernel/sched/psi.c: simplify cgroup_move_task() Suren Baghdasaryan (6): psi: introduce state_mask to represent stalled psi states psi: make psi_enable static psi: rename psi fields in preparation for psi trigger addition psi: split update_stats into parts psi: track changed states include/: refactor headers to allow kthread.h inclusion in psi_types.h Yafang Shao (1): mm, memcg: add workingset_restore in memory.stat Documentation/accounting/psi.txt | 73 +++ Documentation/admin-guide/cgroup-v2.rst | 22 + Documentation/admin-guide/kernel-parameters.txt | 4 + arch/arm64/configs/openeuler_defconfig | 2 + arch/powerpc/platforms/cell/cpufreq_spudemand.c | 2 +- arch/powerpc/platforms/cell/spufs/sched.c | 9 +- arch/s390/appldata/appldata_os.c | 4 - arch/x86/configs/openeuler_defconfig | 2 + block/blk-iolatency.c | 183 +++++- drivers/cpuidle/governors/menu.c | 4 - drivers/spi/spi-rockchip.c | 1 + fs/fuse/dev.c | 1 + fs/kernfs/file.c | 31 +- fs/proc/loadavg.c | 3 - include/linux/cgroup-defs.h | 12 + include/linux/cgroup.h | 17 + include/linux/kernfs.h | 8 + include/linux/kthread.h | 4 + include/linux/mmzone.h | 3 + include/linux/page-flags.h | 5 + include/linux/psi.h | 55 ++ include/linux/psi_types.h | 95 +++ include/linux/sched.h | 13 + include/linux/sched/loadavg.h | 24 +- include/linux/swap.h | 1 + include/trace/events/mmflags.h | 1 + init/Kconfig | 28 + kernel/cgroup/cgroup.c | 55 +- kernel/debug/kdb/kdb_main.c | 7 +- kernel/fork.c | 4 + kernel/kthread.c | 3 + kernel/sched/Makefile | 1 + kernel/sched/core.c | 16 +- kernel/sched/loadavg.c | 139 ++-- kernel/sched/psi.c | 823 ++++++++++++++++++++++++ kernel/sched/sched.h | 178 ++--- kernel/sched/stats.h | 86 +++ kernel/workqueue.c | 23 + kernel/workqueue_internal.h | 6 +- mm/compaction.c | 5 + mm/filemap.c | 20 +- mm/huge_memory.c | 1 + mm/memcontrol.c | 2 + mm/migrate.c | 2 + mm/page_alloc.c | 9 + mm/swap_state.c | 1 + mm/vmscan.c | 10 + mm/vmstat.c | 1 + mm/workingset.c | 117 +++- 49 files changed, 1837 insertions(+), 279 deletions(-) create mode 100644 Documentation/accounting/psi.txt create mode 100644 include/linux/psi.h create mode 100644 include/linux/psi_types.h create mode 100644 kernel/sched/psi.c -- 1.8.3.1

1 25

[PATCH openEuler-1.0-LTS] config: update hulk_defconfig
by Yang Yingliang 28 Oct '21

28 Oct '21

hulk inclusion category: bugfix bugzilla: NA CVE: NA --------------------------- enable CONFIG_HISILICON_ERRATUM_1980005 by default for test. set default value of CONFIG_MMC_DW_IDMAC and CONFIG_MMC_DW_HI3XXX. Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- arch/arm64/configs/hulk_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/configs/hulk_defconfig b/arch/arm64/configs/hulk_defconfig index b146c2e2a93dc..01e02aa2cb092 100644 --- a/arch/arm64/configs/hulk_defconfig +++ b/arch/arm64/configs/hulk_defconfig @@ -398,7 +398,7 @@ CONFIG_ARM64_ERRATUM_845719=y # CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set # CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set CONFIG_HISILICON_ERRATUM_161600802=y -# CONFIG_HISILICON_ERRATUM_1980005 is not set +CONFIG_HISILICON_ERRATUM_1980005=y # CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set CONFIG_HISILICON_ERRATUM_HIP08_RU_PREFETCH=y # CONFIG_HISILICON_HIP08_RU_PREFETCH_DEFAULT_OFF is not set @@ -4204,10 +4204,12 @@ CONFIG_MMC_SPI=m CONFIG_MMC_CB710=m CONFIG_MMC_VIA_SDMMC=m CONFIG_MMC_DW=m +# CONFIG_MMC_DW_IDMAC is not set CONFIG_MMC_DW_PLTFM=m CONFIG_MMC_DW_BLUEFIELD=m # CONFIG_MMC_DW_EXYNOS is not set # CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_HI3XXX is not set # CONFIG_MMC_DW_K3 is not set # CONFIG_MMC_DW_PCI is not set CONFIG_MMC_VUB300=m -- 2.25.1

1 0

[PATCH kernel-4.19 1/4] iommu/arm-smmu: Prevent forced unbinding of Arm SMMU drivers
by Yang Yingliang 28 Oct '21

28 Oct '21

From: Will Deacon <will(a)kernel.org> mainline inclusion from mainline-v5.5-rc1 commit 34debdca68efd5625a2fcea7df1a215591a01f80 category: bugfix bugzilla: 95382 CVE: NA ------------------------------------------------- Forcefully unbinding the Arm SMMU drivers is a pretty dangerous operation, since it will likely lead to catastrophic failure for any DMA devices mastering through the SMMU being unbound. When the driver then attempts to "handle" the fatal faults, it's very easy to trip over dead data structures, leading to use-after-free. On John's machine, he reports that the machine was "unusable" due to loss of the storage controller following a forced unbind of the SMMUv3 driver: | # cd ./bus/platform/drivers/arm-smmu-v3 | # echo arm-smmu-v3.0.auto > unbind | hisi_sas_v2_hw HISI0162:01: CQE_AXI_W_ERR (0x800) found! | platform arm-smmu-v3.0.auto: CMD_SYNC timeout at 0x00000146 | [hwprod 0x00000146, hwcons 0x00000000] Prevent this forced unbinding of the drivers by setting "suppress_bind_attrs" to true. Link: https://lore.kernel.org/lkml/06dfd385-1af0-3106-4cc5-6a5b8e864759@huawei.com Reported-by: John Garry <john.garry(a)huawei.com> Signed-off-by: Will Deacon <will(a)kernel.org> Tested-by: John Garry <john.garry(a)huawei.com> # smmu v3 Reviewed-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Signed-off-by: Joerg Roedel <jroedel(a)suse.de> Signed-off-by: Nanyong Sun <sunnanyong(a)huawei.com> Reviewed-by: Kefeng Wang <wangkefeng.wang(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/iommu/arm-smmu-v3.c | 5 +++-- drivers/iommu/arm-smmu.c | 7 ++++--- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index c9ff437cb3283..49408e73716e7 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -4532,8 +4532,9 @@ MODULE_DEVICE_TABLE(of, arm_smmu_of_match); static struct platform_driver arm_smmu_driver = { .driver = { - .name = "arm-smmu-v3", - .of_match_table = of_match_ptr(arm_smmu_of_match), + .name = "arm-smmu-v3", + .of_match_table = of_match_ptr(arm_smmu_of_match), + .suppress_bind_attrs = true, }, .probe = arm_smmu_device_probe, .remove = arm_smmu_device_remove, diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index f948de8af412c..2c2bdeac758e0 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -2287,9 +2287,10 @@ static SIMPLE_DEV_PM_OPS(arm_smmu_pm_ops, NULL, arm_smmu_pm_resume); static struct platform_driver arm_smmu_driver = { .driver = { - .name = "arm-smmu", - .of_match_table = of_match_ptr(arm_smmu_of_match), - .pm = &arm_smmu_pm_ops, + .name = "arm-smmu", + .of_match_table = of_match_ptr(arm_smmu_of_match), + .pm = &arm_smmu_pm_ops, + .suppress_bind_attrs = true, }, .probe = arm_smmu_device_probe, .remove = arm_smmu_device_remove, -- 2.25.1

2 4

[PATCH kernel-4.19 v6 00/23] support psi feature
by Liu Xinpeng 28 Oct '21

28 Oct '21

backport psi feature from upstream 5.4 bugzilla: https://gitee.com/openeuler/kernel/issues/I47QS2 Baruch Siach (1): psi: fix reference to kernel commandline enable Dan Schatzberg (1): kernel/sched/psi.c: expose pressure metrics on root cgroup Johannes Weiner (11): sched: loadavg: consolidate LOAD_INT, LOAD_FRAC, CALC_LOAD sched: loadavg: make calc_load_n() public sched: sched.h: make rq locking and clock functions available in stats.h sched: introduce this_rq_lock_irq() psi: pressure stall information for CPU, memory, and IO psi: cgroup support psi: make disabling/enabling easier for vendor kernels psi: fix aggregation idle shut-off psi: avoid divide-by-zero crash inside virtual machines fs: kernfs: add poll file operation sched/psi: Fix sampling error and rare div0 crashes with cgroups and high uptime Josef Bacik (1): blk-iolatency: use a percentile approache for ssd's Liu Xinpeng (2): psi:enable psi in config psi:avoid kabi change Olof Johansson (1): kernel/sched/psi.c: simplify cgroup_move_task() Suren Baghdasaryan (6): psi: introduce state_mask to represent stalled psi states psi: make psi_enable static psi: rename psi fields in preparation for psi trigger addition psi: split update_stats into parts psi: track changed states include/: refactor headers to allow kthread.h inclusion in psi_types.h Documentation/accounting/psi.txt | 73 +++ Documentation/admin-guide/cgroup-v2.rst | 18 + Documentation/admin-guide/kernel-parameters.txt | 4 + arch/arm64/configs/openeuler_defconfig | 2 + arch/powerpc/platforms/cell/cpufreq_spudemand.c | 2 +- arch/powerpc/platforms/cell/spufs/sched.c | 9 +- arch/s390/appldata/appldata_os.c | 4 - arch/x86/configs/openeuler_defconfig | 2 + block/blk-iolatency.c | 183 +++++- drivers/cpuidle/governors/menu.c | 4 - drivers/spi/spi-rockchip.c | 1 + fs/kernfs/file.c | 31 +- fs/proc/loadavg.c | 3 - include/linux/cgroup-defs.h | 12 + include/linux/cgroup.h | 17 + include/linux/kernfs.h | 8 + include/linux/kthread.h | 4 + include/linux/psi.h | 55 ++ include/linux/psi_types.h | 95 +++ include/linux/sched.h | 13 + include/linux/sched/loadavg.h | 24 +- init/Kconfig | 28 + kernel/cgroup/cgroup.c | 55 +- kernel/debug/kdb/kdb_main.c | 7 +- kernel/fork.c | 4 + kernel/kthread.c | 3 + kernel/sched/Makefile | 1 + kernel/sched/core.c | 16 +- kernel/sched/loadavg.c | 139 ++-- kernel/sched/psi.c | 823 ++++++++++++++++++++++++ kernel/sched/sched.h | 178 ++--- kernel/sched/stats.h | 86 +++ kernel/workqueue.c | 23 + kernel/workqueue_internal.h | 6 +- mm/compaction.c | 5 + mm/filemap.c | 11 + mm/page_alloc.c | 9 + mm/vmscan.c | 9 + 38 files changed, 1726 insertions(+), 241 deletions(-) create mode 100644 Documentation/accounting/psi.txt create mode 100644 include/linux/psi.h create mode 100644 include/linux/psi_types.h create mode 100644 kernel/sched/psi.c -- 1.8.3.1

2 24

[PATCH kernel-4.19 1/8] EMMC: ascend customized emmc host
by Yang Yingliang 28 Oct '21

28 Oct '21

From: zhangguijiang <zhangguijiang(a)huawei.com> ascend inclusion category: feature feature: Ascend emmc adaption bugzilla: https://gitee.com/openeuler/kernel/issues/I4F4LL CVE: NA -------------------- To identify Ascend HiSilicon emmc chip, we add a customized property to dts. In this patch we add an interface to read this property. At the same time, we provided a switch, which is CONFIG_ASCEND_HISI_MMC, for you to get rid of our modifications. Signed-off-by: zhangguijiang <zhangguijiang(a)huawei.com> Reviewed-by: Ding Tianhong <dingtianhong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/mmc/Kconfig | 10 ++++ drivers/mmc/core/host.c | 43 ++++++++++++--- include/linux/mmc/host.h | 115 +++++++++++++++++++++++++++++++++++++++ include/linux/mmc/pm.h | 1 + 4 files changed, 162 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index ec21388311db2..8b29ecadd1862 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -12,6 +12,16 @@ menuconfig MMC If you want MMC/SD/SDIO support, you should say Y here and also to your specific host controller driver. +config ASCEND_HISI_MMC + bool "Ascend HiSilicon MMC card support" + depends on MMC + default n + help + This selects for Hisilicon SoC specific extensions to the + Synopsys DesignWare Memory Card Interface driver. + You should select this option if you want mmc support on + Ascend platform. + if MMC source "drivers/mmc/core/Kconfig" diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index dd1c14d8f6863..b29ee31e7865e 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c @@ -348,6 +348,11 @@ int mmc_of_parse(struct mmc_host *host) EXPORT_SYMBOL(mmc_of_parse); +static inline int mmc_is_ascend_hi_mci_1(struct device *dev) +{ + return !strncmp(dev_name(dev), "hi_mci.1", strlen("hi_mci.1")); +} + /** * mmc_alloc_host - initialise the per-host structure. * @extra: sizeof private data structure @@ -374,7 +379,10 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev) } host->index = err; - + if (mmc_is_ascend_customized(dev)) { + if (mmc_is_ascend_hi_mci_1(dev)) + host->index = 1; + } dev_set_name(&host->class_dev, "mmc%d", host->index); host->parent = dev; @@ -383,10 +391,11 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev) device_initialize(&host->class_dev); device_enable_async_suspend(&host->class_dev); - if (mmc_gpio_alloc(host)) { - put_device(&host->class_dev); - return NULL; - } + if (!mmc_is_ascend_customized(host->parent)) + if (mmc_gpio_alloc(host)) { + put_device(&host->class_dev); + return NULL; + } spin_lock_init(&host->lock); init_waitqueue_head(&host->wq); @@ -439,7 +448,9 @@ int mmc_add_host(struct mmc_host *host) #endif mmc_start_host(host); - mmc_register_pm_notifier(host); + if (!mmc_is_ascend_customized(host->parent) || + !(host->pm_flags & MMC_PM_IGNORE_PM_NOTIFY)) + mmc_register_pm_notifier(host); return 0; } @@ -456,7 +467,9 @@ EXPORT_SYMBOL(mmc_add_host); */ void mmc_remove_host(struct mmc_host *host) { - mmc_unregister_pm_notifier(host); + if (!mmc_is_ascend_customized(host->parent) || + !(host->pm_flags & MMC_PM_IGNORE_PM_NOTIFY)) + mmc_unregister_pm_notifier(host); mmc_stop_host(host); #ifdef CONFIG_DEBUG_FS @@ -483,3 +496,19 @@ void mmc_free_host(struct mmc_host *host) } EXPORT_SYMBOL(mmc_free_host); + + +int mmc_is_ascend_customized(struct device *dev) +{ +#ifdef CONFIG_ASCEND_HISI_MMC + static int is_ascend_customized = -1; + + if (is_ascend_customized == -1) + is_ascend_customized = ((dev == NULL) ? 0 : + of_find_property(dev->of_node, "customized", NULL) != NULL); + return is_ascend_customized; +#else + return 0; +#endif +} +EXPORT_SYMBOL(mmc_is_ascend_customized); diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 7e8e5b20e82b0..2cd5a73ab12a2 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -19,6 +19,9 @@ #include <linux/mmc/pm.h> #include <linux/dma-direction.h> +#include <linux/jiffies.h> +#include <linux/version.h> + struct mmc_ios { unsigned int clock; /* clock rate */ unsigned short vdd; @@ -63,6 +66,7 @@ struct mmc_ios { #define MMC_TIMING_MMC_DDR52 8 #define MMC_TIMING_MMC_HS200 9 #define MMC_TIMING_MMC_HS400 10 +#define MMC_TIMING_NEW_SD MMC_TIMING_UHS_SDR12 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */ @@ -78,7 +82,25 @@ struct mmc_ios { #define MMC_SET_DRIVER_TYPE_D 3 bool enhanced_strobe; /* hs400es selection */ +#ifdef CONFIG_ASCEND_HISI_MMC + unsigned int clock_store; /*store the clock before power off*/ +#endif +}; + +#ifdef CONFIG_ASCEND_HISI_MMC +struct mmc_cmdq_host_ops { + int (*enable)(struct mmc_host *mmc); + int (*disable)(struct mmc_host *mmc, bool soft); + int (*restore_irqs)(struct mmc_host *mmc); + int (*request)(struct mmc_host *mmc, struct mmc_request *mrq); + int (*halt)(struct mmc_host *mmc, bool halt); + void (*post_req)(struct mmc_host *mmc, struct mmc_request *mrq, + int err); + void (*disable_immediately)(struct mmc_host *mmc); + int (*clear_and_halt)(struct mmc_host *mmc); }; +#endif + struct mmc_host; @@ -168,6 +190,12 @@ struct mmc_host_ops { */ int (*multi_io_quirk)(struct mmc_card *card, unsigned int direction, int blk_size); +#ifdef CONFIG_ASCEND_HISI_MMC + /* Slow down clk for ascend chip SD cards */ + void (*slowdown_clk)(struct mmc_host *host, int timing); + int (*enable_enhanced_strobe)(struct mmc_host *host); + int (*send_cmd_direct)(struct mmc_host *host, struct mmc_request *mrq); +#endif }; struct mmc_cqe_ops { @@ -255,6 +283,30 @@ struct mmc_context_info { wait_queue_head_t wait; }; +#ifdef CONFIG_ASCEND_HISI_MMC +/** + * mmc_cmdq_context_info - describes the contexts of cmdq + * @active_reqs requests being processed + * @active_dcmd dcmd in progress, don't issue any + * more dcmd requests + * @rpmb_in_wait do not pull any more reqs till rpmb is handled + * @cmdq_state state of cmdq engine + * @req_starved completion should invoke the request_fn since + * no tags were available + * @cmdq_ctx_lock acquire this before accessing this structure + */ +struct mmc_cmdq_context_info { + unsigned long active_reqs; /* in-flight requests */ + bool active_dcmd; + bool rpmb_in_wait; + unsigned long curr_state; + + /* no free tag available */ + unsigned long req_starved; + spinlock_t cmdq_ctx_lock; +}; +#endif + struct regulator; struct mmc_pwrseq; @@ -328,6 +380,9 @@ struct mmc_host { #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */ #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */ #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */ +#ifdef CONFIG_ASCEND_HISI_MMC +#define MMC_CAP_RUNTIME_RESUME (1 << 20) /* Resume at runtime_resume. */ +#endif #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \ MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \ MMC_CAP_UHS_DDR50) @@ -368,6 +423,34 @@ struct mmc_host { #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */ #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */ #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */ +#ifdef CONFIG_ASCEND_HISI_MMC +#define MMC_CAP2_CACHE_CTRL (1 << 1) /* Allow cache control */ +#define MMC_CAP2_NO_MULTI_READ (1 << 3) /* Multiblock read don't work */ +#define MMC_CAP2_NO_SLEEP_CMD (1 << 4) /* Don't allow sleep command */ +#define MMC_CAP2_BROKEN_VOLTAGE (1 << 7) /* Use the broken voltage */ +#define MMC_CAP2_DETECT_ON_ERR (1 << 8) /* I/O err check card removal */ +#define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */ +#define MMC_CAP2_PACKED_RD (1 << 12) /* Allow packed read */ +#define MMC_CAP2_PACKED_WR (1 << 13) /* Allow packed write */ +#define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \ + MMC_CAP2_PACKED_WR) +#define MMC_CAP2_CMD_QUEUE (1 << 18) /* support eMMC command queue */ +#define MMC_CAP2_ENHANCED_STROBE (1 << 19) +#define MMC_CAP2_CACHE_FLUSH_BARRIER (1 << 20) +/* Allow background operations auto enable control */ +#define MMC_CAP2_BKOPS_AUTO_CTRL (1 << 21) +/* Allow background operations manual enable control */ +#define MMC_CAP2_BKOPS_MANUAL_CTRL (1 << 22) + +/* host is connected by via modem through sdio */ +#define MMC_CAP2_SUPPORT_VIA_MODEM (1 << 26) +/* host is connected by wifi through sdio */ +#define MMC_CAP2_SUPPORT_WIFI (1 << 27) +/* host is connected to 1102 wifi */ +#define MMC_CAP2_SUPPORT_WIFI_CMD11 (1 << 28) +/* host do not support low power for wifi*/ +#define MMC_CAP2_WIFI_NO_LOWPWR (1 << 29) +#endif int fixed_drv_type; /* fixed driver type for non-removable media */ @@ -461,6 +544,12 @@ struct mmc_host { bool cqe_on; unsigned long private[0] ____cacheline_aligned; +#ifdef CONFIG_ASCEND_HISI_MMC + const struct mmc_cmdq_host_ops *cmdq_ops; + int sdio_present; + unsigned int cmdq_slots; + struct mmc_cmdq_context_info cmdq_ctx; +#endif }; struct device_node; @@ -588,4 +677,30 @@ static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data) int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error); int mmc_abort_tuning(struct mmc_host *host, u32 opcode); +#ifdef CONFIG_ASCEND_HISI_MMC +int mmc_cache_ctrl(struct mmc_host *host, u8 enable); +int mmc_card_awake(struct mmc_host *host); +int mmc_card_sleep(struct mmc_host *host); +int mmc_card_can_sleep(struct mmc_host *host); +#else +static inline int mmc_cache_ctrl(struct mmc_host *host, u8 enable) +{ + return 0; +} +static inline int mmc_card_awake(struct mmc_host *host) +{ + return 0; +} +static inline int mmc_card_sleep(struct mmc_host *host) +{ + return 0; +} +static inline int mmc_card_can_sleep(struct mmc_host *host) +{ + return 0; +} +#endif + +int mmc_is_ascend_customized(struct device *dev); + #endif /* LINUX_MMC_HOST_H */ diff --git a/include/linux/mmc/pm.h b/include/linux/mmc/pm.h index 4a139204c20c0..6e2d6a135c7e0 100644 --- a/include/linux/mmc/pm.h +++ b/include/linux/mmc/pm.h @@ -26,5 +26,6 @@ typedef unsigned int mmc_pm_flag_t; #define MMC_PM_KEEP_POWER (1 << 0) /* preserve card power during suspend */ #define MMC_PM_WAKE_SDIO_IRQ (1 << 1) /* wake up host system on SDIO IRQ assertion */ +#define MMC_PM_IGNORE_PM_NOTIFY (1 << 2) /* ignore mmc pm notify */ #endif /* LINUX_MMC_PM_H */ -- 2.25.1

1 7

[PATCH openEuler-1.0-LTS 1/8] EMMC: ascend customized emmc host
by Yang Yingliang 27 Oct '21

27 Oct '21

From: zhangguijiang <zhangguijiang(a)huawei.com> ascend inclusion category: feature feature: Ascend emmc adaption bugzilla: https://gitee.com/openeuler/kernel/issues/I4F4LL CVE: NA -------------------- To identify Ascend HiSilicon emmc chip, we add a customized property to dts. In this patch we add an interface to read this property. At the same time, we provided a switch, which is CONFIG_ASCEND_HISI_MMC, for you to get rid of our modifications. Signed-off-by: zhangguijiang <zhangguijiang(a)huawei.com> Reviewed-by: Ding Tianhong <dingtianhong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/mmc/Kconfig | 10 ++++ drivers/mmc/core/host.c | 47 +++++++++++++--- include/linux/mmc/host.h | 115 +++++++++++++++++++++++++++++++++++++++ include/linux/mmc/pm.h | 1 + 4 files changed, 164 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index ec21388311db2..8b29ecadd1862 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -12,6 +12,16 @@ menuconfig MMC If you want MMC/SD/SDIO support, you should say Y here and also to your specific host controller driver. +config ASCEND_HISI_MMC + bool "Ascend HiSilicon MMC card support" + depends on MMC + default n + help + This selects for Hisilicon SoC specific extensions to the + Synopsys DesignWare Memory Card Interface driver. + You should select this option if you want mmc support on + Ascend platform. + if MMC source "drivers/mmc/core/Kconfig" diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index f57f5de542064..69cc778706855 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c @@ -348,6 +348,11 @@ int mmc_of_parse(struct mmc_host *host) EXPORT_SYMBOL(mmc_of_parse); +static inline int mmc_is_ascend_hi_mci_1(struct device *dev) +{ + return !strncmp(dev_name(dev), "hi_mci.1", strlen("hi_mci.1")); +} + /** * mmc_alloc_host - initialise the per-host structure. * @extra: sizeof private data structure @@ -374,7 +379,10 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev) } host->index = err; - + if (mmc_is_ascend_customized(dev)) { + if (mmc_is_ascend_hi_mci_1(dev)) + host->index = 1; + } dev_set_name(&host->class_dev, "mmc%d", host->index); host->parent = dev; @@ -383,12 +391,13 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *dev) device_initialize(&host->class_dev); device_enable_async_suspend(&host->class_dev); - if (mmc_gpio_alloc(host)) { - put_device(&host->class_dev); - ida_simple_remove(&mmc_host_ida, host->index); - kfree(host); - return NULL; - } + if (!mmc_is_ascend_customized(host->parent)) + if (mmc_gpio_alloc(host)) { + put_device(&host->class_dev); + ida_simple_remove(&mmc_host_ida, host->index); + kfree(host); + return NULL; + } spin_lock_init(&host->lock); init_waitqueue_head(&host->wq); @@ -441,7 +450,9 @@ int mmc_add_host(struct mmc_host *host) #endif mmc_start_host(host); - mmc_register_pm_notifier(host); + if (!mmc_is_ascend_customized(host->parent) || + !(host->pm_flags & MMC_PM_IGNORE_PM_NOTIFY)) + mmc_register_pm_notifier(host); return 0; } @@ -458,7 +469,9 @@ EXPORT_SYMBOL(mmc_add_host); */ void mmc_remove_host(struct mmc_host *host) { - mmc_unregister_pm_notifier(host); + if (!mmc_is_ascend_customized(host->parent) || + !(host->pm_flags & MMC_PM_IGNORE_PM_NOTIFY)) + mmc_unregister_pm_notifier(host); mmc_stop_host(host); #ifdef CONFIG_DEBUG_FS @@ -485,3 +498,19 @@ void mmc_free_host(struct mmc_host *host) } EXPORT_SYMBOL(mmc_free_host); + + +int mmc_is_ascend_customized(struct device *dev) +{ +#ifdef CONFIG_ASCEND_HISI_MMC + static int is_ascend_customized = -1; + + if (is_ascend_customized == -1) + is_ascend_customized = ((dev == NULL) ? 0 : + of_find_property(dev->of_node, "customized", NULL) != NULL); + return is_ascend_customized; +#else + return 0; +#endif +} +EXPORT_SYMBOL(mmc_is_ascend_customized); diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 840462ed1ec7e..78b4d0a813b71 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -19,6 +19,9 @@ #include <linux/mmc/pm.h> #include <linux/dma-direction.h> +#include <linux/jiffies.h> +#include <linux/version.h> + struct mmc_ios { unsigned int clock; /* clock rate */ unsigned short vdd; @@ -63,6 +66,7 @@ struct mmc_ios { #define MMC_TIMING_MMC_DDR52 8 #define MMC_TIMING_MMC_HS200 9 #define MMC_TIMING_MMC_HS400 10 +#define MMC_TIMING_NEW_SD MMC_TIMING_UHS_SDR12 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */ @@ -78,7 +82,25 @@ struct mmc_ios { #define MMC_SET_DRIVER_TYPE_D 3 bool enhanced_strobe; /* hs400es selection */ +#ifdef CONFIG_ASCEND_HISI_MMC + unsigned int clock_store; /*store the clock before power off*/ +#endif +}; + +#ifdef CONFIG_ASCEND_HISI_MMC +struct mmc_cmdq_host_ops { + int (*enable)(struct mmc_host *mmc); + int (*disable)(struct mmc_host *mmc, bool soft); + int (*restore_irqs)(struct mmc_host *mmc); + int (*request)(struct mmc_host *mmc, struct mmc_request *mrq); + int (*halt)(struct mmc_host *mmc, bool halt); + void (*post_req)(struct mmc_host *mmc, struct mmc_request *mrq, + int err); + void (*disable_immediately)(struct mmc_host *mmc); + int (*clear_and_halt)(struct mmc_host *mmc); }; +#endif + struct mmc_host; @@ -168,6 +190,12 @@ struct mmc_host_ops { */ int (*multi_io_quirk)(struct mmc_card *card, unsigned int direction, int blk_size); +#ifdef CONFIG_ASCEND_HISI_MMC + /* Slow down clk for ascend chip SD cards */ + void (*slowdown_clk)(struct mmc_host *host, int timing); + int (*enable_enhanced_strobe)(struct mmc_host *host); + int (*send_cmd_direct)(struct mmc_host *host, struct mmc_request *mrq); +#endif }; struct mmc_cqe_ops { @@ -255,6 +283,30 @@ struct mmc_context_info { wait_queue_head_t wait; }; +#ifdef CONFIG_ASCEND_HISI_MMC +/** + * mmc_cmdq_context_info - describes the contexts of cmdq + * @active_reqs requests being processed + * @active_dcmd dcmd in progress, don't issue any + * more dcmd requests + * @rpmb_in_wait do not pull any more reqs till rpmb is handled + * @cmdq_state state of cmdq engine + * @req_starved completion should invoke the request_fn since + * no tags were available + * @cmdq_ctx_lock acquire this before accessing this structure + */ +struct mmc_cmdq_context_info { + unsigned long active_reqs; /* in-flight requests */ + bool active_dcmd; + bool rpmb_in_wait; + unsigned long curr_state; + + /* no free tag available */ + unsigned long req_starved; + spinlock_t cmdq_ctx_lock; +}; +#endif + struct regulator; struct mmc_pwrseq; @@ -328,6 +380,9 @@ struct mmc_host { #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */ #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */ #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */ +#ifdef CONFIG_ASCEND_HISI_MMC +#define MMC_CAP_RUNTIME_RESUME (1 << 20) /* Resume at runtime_resume. */ +#endif #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \ MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \ MMC_CAP_UHS_DDR50) @@ -367,6 +422,34 @@ struct mmc_host { #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */ #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */ #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */ +#ifdef CONFIG_ASCEND_HISI_MMC +#define MMC_CAP2_CACHE_CTRL (1 << 1) /* Allow cache control */ +#define MMC_CAP2_NO_MULTI_READ (1 << 3) /* Multiblock read don't work */ +#define MMC_CAP2_NO_SLEEP_CMD (1 << 4) /* Don't allow sleep command */ +#define MMC_CAP2_BROKEN_VOLTAGE (1 << 7) /* Use the broken voltage */ +#define MMC_CAP2_DETECT_ON_ERR (1 << 8) /* I/O err check card removal */ +#define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */ +#define MMC_CAP2_PACKED_RD (1 << 12) /* Allow packed read */ +#define MMC_CAP2_PACKED_WR (1 << 13) /* Allow packed write */ +#define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \ + MMC_CAP2_PACKED_WR) +#define MMC_CAP2_CMD_QUEUE (1 << 18) /* support eMMC command queue */ +#define MMC_CAP2_ENHANCED_STROBE (1 << 19) +#define MMC_CAP2_CACHE_FLUSH_BARRIER (1 << 20) +/* Allow background operations auto enable control */ +#define MMC_CAP2_BKOPS_AUTO_CTRL (1 << 21) +/* Allow background operations manual enable control */ +#define MMC_CAP2_BKOPS_MANUAL_CTRL (1 << 22) + +/* host is connected by via modem through sdio */ +#define MMC_CAP2_SUPPORT_VIA_MODEM (1 << 26) +/* host is connected by wifi through sdio */ +#define MMC_CAP2_SUPPORT_WIFI (1 << 27) +/* host is connected to 1102 wifi */ +#define MMC_CAP2_SUPPORT_WIFI_CMD11 (1 << 28) +/* host do not support low power for wifi*/ +#define MMC_CAP2_WIFI_NO_LOWPWR (1 << 29) +#endif int fixed_drv_type; /* fixed driver type for non-removable media */ @@ -460,6 +543,12 @@ struct mmc_host { bool cqe_on; unsigned long private[0] ____cacheline_aligned; +#ifdef CONFIG_ASCEND_HISI_MMC + const struct mmc_cmdq_host_ops *cmdq_ops; + int sdio_present; + unsigned int cmdq_slots; + struct mmc_cmdq_context_info cmdq_ctx; +#endif }; struct device_node; @@ -587,4 +676,30 @@ static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data) int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error); int mmc_abort_tuning(struct mmc_host *host, u32 opcode); +#ifdef CONFIG_ASCEND_HISI_MMC +int mmc_cache_ctrl(struct mmc_host *host, u8 enable); +int mmc_card_awake(struct mmc_host *host); +int mmc_card_sleep(struct mmc_host *host); +int mmc_card_can_sleep(struct mmc_host *host); +#else +static inline int mmc_cache_ctrl(struct mmc_host *host, u8 enable) +{ + return 0; +} +static inline int mmc_card_awake(struct mmc_host *host) +{ + return 0; +} +static inline int mmc_card_sleep(struct mmc_host *host) +{ + return 0; +} +static inline int mmc_card_can_sleep(struct mmc_host *host) +{ + return 0; +} +#endif + +int mmc_is_ascend_customized(struct device *dev); + #endif /* LINUX_MMC_HOST_H */ diff --git a/include/linux/mmc/pm.h b/include/linux/mmc/pm.h index 4a139204c20c0..6e2d6a135c7e0 100644 --- a/include/linux/mmc/pm.h +++ b/include/linux/mmc/pm.h @@ -26,5 +26,6 @@ typedef unsigned int mmc_pm_flag_t; #define MMC_PM_KEEP_POWER (1 << 0) /* preserve card power during suspend */ #define MMC_PM_WAKE_SDIO_IRQ (1 << 1) /* wake up host system on SDIO IRQ assertion */ +#define MMC_PM_IGNORE_PM_NOTIFY (1 << 2) /* ignore mmc pm notify */ #endif /* LINUX_MMC_PM_H */ -- 2.25.1

1 7

[PATCH openEuler-21.03 00/37] 补丁合入创新分支告知
by Wang ShaoBo 27 Oct '21

27 Oct '21

首先非常感谢大家参与openEuler社区，并给openEuler kernel开源项目提补丁。 openEuler kernel开源项目的openEuler-21.03创新分支以更加开阔的视野接纳企业，高校以及所有爱好和关注Linux内核人士的想法和建议，期望和大家共同探索底层软件在构建云与计算、5G、终端等全场景下的前景和潜力，共同推动底软在物联网、智能计算背景下的全新视界；另外openEuler-21.03创新分支同时希望给高校提供更多的教学素材，为高校基础研究和产教结合道路奉献绵薄之力。 - 如果您对如何参与openEuler kernel开源项目有疑问，可以发邮件至bobo.shaobowang(a)huawei.com, 也可以参考文档：https://mp.weixin.qq.com/s/a42a5VfayFeJgWitqbI8Qw - 您也可以通过openEuler kernel官网提交issue: https://gitee.com/openeuler/kernel 以下补丁已经过社区maintainer review和openEuler社区的验证测试，将合入到openEuler-21.03分支5.10.0-4.25.0版本。 0ee74f5aa533 (HEAD -> openEuler-21.03, tag: 5.10.0-4.25.0) RDS tcp loopback connection can hang fc7ec5aebb45 usb: gadget: f_fs: Ensure io_completion_wq is idle during unbind dae6a368dafc ALSA: seq: Fix race of snd_seq_timer_open() 3a00695cb8e2 RDMA/mlx4: Do not map the core_clock page to user space unless enabled ed4fd7c42adc Revert "ACPI: sleep: Put the FACS table after using it" 37c85837cf42 ASoC: Intel: bytcr_rt5640: Add quirk for the Glavey TM800A550L tablet 94fccf25dd49 nvme-tcp: remove incorrect Kconfig dep in BLK_DEV_NVME 47f090fbcbb9 regulator: fan53880: Fix missing n_voltages setting 0b9b74807478 net/nfc/rawsock.c: fix a permission check bug 789459f344e7 scsi: core: Only put parent device if host state differs from SHOST_CREATED 08f8e0fb4b59 usb: typec: ucsi: Clear PPM capability data in ucsi_init() error path 0e2bd1220f8a phy: cadence: Sierra: Fix error return code in cdns_sierra_phy_probe() 47f3671cfd67 usb: pd: Set PD_T_SINK_WAIT_CAP to 310ms 559b80a5925d scsi: core: Fix failure handling of scsi_add_host_with_dma() e897c103ecde ALSA: hda/realtek: headphone and mic don't work on an Acer laptop d39b22f602f5 isdn: mISDN: netjet: Fix crash in nj_probe: 1013d6a98975 nvmet: fix false keep-alive timeout when a controller is torn down 9ffec7fff577 cgroup: disable controllers at parse time e2c4bbd88218 RDMA/ipoib: Fix warning caused by destroying non-initial netns 0eb3e33d9814 gpio: wcd934x: Fix shift-out-of-bounds error af64e02cb927 NFSv4: Fix deadlock between nfs4_evict_inode() and nfs4_opendata_get_inode() 34a0d49e311d usb: dwc3: ep0: fix NULL pointer exception ca5ed7b6d2ac spi: bcm2835: Fix out-of-bounds access with more than 4 slaves 420a6301307e NFSv4: nfs4_proc_set_acl needs to restore NFS_CAP_UIDGID_NOMAP on error. 762e6acf28f1 regulator: core: resolve supply for boot-on/always-on regulators d84eb5070d03 net: macb: ensure the device is available before accessing GEMGXL control registers b9a3b65556e9 sched/fair: Make sure to update tg contrib for blocked load 074babe38e68 KVM: x86: Ensure liveliness of nested VM-Enter fail tracepoint message 447f10de04c8 ALSA: firewire-lib: fix the context to call snd_pcm_stop_xrun() 262986c9f618 dm verity: fix require_signatures module_param permissions bfa96859a312 usb: chipidea: udc: assign interrupt number to USB gadget structure 177f5f81e9fc regulator: max77620: Use device_set_of_node_from_dev() 818f49a8aa09 USB: serial: omninet: add device id for Zyxel Omni 56K Plus 1790bfdad278 spi: Cleanup on failure of initial setup 642b2258a1f7 drm/msm/a6xx: avoid shadow NULL reference in failure path be1c43cba161 USB: f_ncm: ncm_bitrate (speed) is unsigned e41037151205 nvme-fabrics: decode host pathing error for connect 期待后续合作。 Alexandre GRIVEAUX (1): USB: serial: omninet: add device id for Zyxel Omni 56K Plus Axel Lin (1): regulator: fan53880: Fix missing n_voltages setting Dai Ngo (1): NFSv4: nfs4_proc_set_acl needs to restore NFS_CAP_UIDGID_NOMAP on error. Dmitry Baryshkov (1): regulator: core: resolve supply for boot-on/always-on regulators Dmitry Osipenko (1): regulator: max77620: Use device_set_of_node_from_dev() Hannes Reinecke (1): nvme-fabrics: decode host pathing error for connect Hans de Goede (1): ASoC: Intel: bytcr_rt5640: Add quirk for the Glavey TM800A550L tablet Hui Wang (1): ALSA: hda/realtek: headphone and mic don't work on an Acer laptop Jeimon (1): net/nfc/rawsock.c: fix a permission check bug John Keeping (1): dm verity: fix require_signatures module_param permissions Jonathan Marek (1): drm/msm/a6xx: avoid shadow NULL reference in failure path Kamal Heib (1): RDMA/ipoib: Fix warning caused by destroying non-initial netns Kyle Tso (1): usb: pd: Set PD_T_SINK_WAIT_CAP to 310ms Li Jun (1): usb: chipidea: udc: assign interrupt number to USB gadget structure Lukas Wunner (2): spi: Cleanup on failure of initial setup spi: bcm2835: Fix out-of-bounds access with more than 4 slaves Maciej Żenczykowski (1): USB: f_ncm: ncm_bitrate (speed) is unsigned Marian-Cristian Rotariu (1): usb: dwc3: ep0: fix NULL pointer exception Mayank Rana (1): usb: typec: ucsi: Clear PPM capability data in ucsi_init() error path Ming Lei (2): scsi: core: Fix failure handling of scsi_add_host_with_dma() scsi: core: Only put parent device if host state differs from SHOST_CREATED Rao Shoaib (1): RDS tcp loopback connection can hang Sagi Grimberg (2): nvmet: fix false keep-alive timeout when a controller is torn down nvme-tcp: remove incorrect Kconfig dep in BLK_DEV_NVME Sean Christopherson (1): KVM: x86: Ensure liveliness of nested VM-Enter fail tracepoint message Shakeel Butt (1): cgroup: disable controllers at parse time Shay Drory (1): RDMA/mlx4: Do not map the core_clock page to user space unless enabled Srinivas Kandagatla (1): gpio: wcd934x: Fix shift-out-of-bounds error Takashi Iwai (1): ALSA: seq: Fix race of snd_seq_timer_open() Takashi Sakamoto (1): ALSA: firewire-lib: fix the context to call snd_pcm_stop_xrun() Trond Myklebust (1): NFSv4: Fix deadlock between nfs4_evict_inode() and nfs4_opendata_get_inode() Vincent Guittot (1): sched/fair: Make sure to update tg contrib for blocked load Wang Wensheng (1): phy: cadence: Sierra: Fix error return code in cdns_sierra_phy_probe() Wesley Cheng (1): usb: gadget: f_fs: Ensure io_completion_wq is idle during unbind Zhang Rui (1): Revert "ACPI: sleep: Put the FACS table after using it" Zheyu Ma (1): isdn: mISDN: netjet: Fix crash in nj_probe: Zong Li (1): net: macb: ensure the device is available before accessing GEMGXL control registers arch/x86/kvm/trace.h | 6 ++-- drivers/acpi/sleep.c | 4 +-- drivers/gpio/gpio-wcd934x.c | 2 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- drivers/infiniband/hw/mlx4/main.c | 5 +-- drivers/infiniband/ulp/ipoib/ipoib_netlink.c | 1 + drivers/isdn/hardware/mISDN/netjet.c | 1 - drivers/md/dm-verity-verify-sig.c | 2 +- drivers/net/ethernet/cadence/macb_main.c | 3 ++ drivers/net/ethernet/mellanox/mlx4/fw.c | 3 ++ drivers/net/ethernet/mellanox/mlx4/fw.h | 1 + drivers/net/ethernet/mellanox/mlx4/main.c | 6 ++++ drivers/nvme/host/Kconfig | 3 +- drivers/nvme/host/fabrics.c | 5 +++ drivers/nvme/target/core.c | 15 ++++++--- drivers/nvme/target/nvmet.h | 2 +- drivers/phy/cadence/phy-cadence-sierra.c | 1 + drivers/regulator/core.c | 6 ++++ drivers/regulator/fan53880.c | 3 ++ drivers/regulator/max77620-regulator.c | 7 +++++ drivers/scsi/hosts.c | 16 +++++----- drivers/spi/spi-bcm2835.c | 10 ++++-- drivers/spi/spi-bitbang.c | 18 ++++++++--- drivers/spi/spi-fsl-spi.c | 4 +++ drivers/spi/spi-omap-uwire.c | 9 +++++- drivers/spi/spi-omap2-mcspi.c | 33 ++++++++++++-------- drivers/spi/spi-pxa2xx.c | 9 +++++- drivers/usb/chipidea/udc.c | 1 + drivers/usb/dwc3/ep0.c | 3 ++ drivers/usb/gadget/function/f_fs.c | 3 ++ drivers/usb/gadget/function/f_ncm.c | 2 +- drivers/usb/serial/omninet.c | 2 ++ drivers/usb/typec/ucsi/ucsi.c | 1 + fs/nfs/nfs4_fs.h | 1 + fs/nfs/nfs4proc.c | 20 +++++++++++- include/linux/mlx4/device.h | 1 + include/linux/usb/pd.h | 2 +- kernel/cgroup/cgroup.c | 13 ++++---- kernel/sched/fair.c | 2 +- net/nfc/rawsock.c | 2 +- net/rds/connection.c | 23 ++++++++++---- net/rds/tcp.c | 4 +-- net/rds/tcp.h | 3 +- net/rds/tcp_listen.c | 6 ++++ sound/core/seq/seq_timer.c | 10 +++++- sound/firewire/amdtp-stream.c | 2 +- sound/pci/hda/patch_realtek.c | 12 +++++++ sound/soc/intel/boards/bytcr_rt5640.c | 11 +++++++ 48 files changed, 228 insertions(+), 73 deletions(-) -- 2.25.1

1 37

[PATCH] Add the limit on page cache
by wenzhiwei 27 Oct '21

27 Oct '21

kylin inclusion category: feature bugfix: https://gitee.com/openeuler-competition/summer-2021/issues/I3EIMT?from=proj… CVE: NA -------------------------------------------------- In some atomic operation scenarios, such as interrupt context, it is not possible to sleep. Therefore, when memory allocation in this scenario, it will not enter the direct_reclaim link, and will not even wake up the kswapd process. For example, in the soft interrupt processing function of the network card receiving packets, there may be a phenomenon that the page cache is too occupied and the remaining memory of the system is insufficient, and the memory cannot be allocated for the received data packet, and the packet is directly lost. This is the problem to be solved by the page cache limit. The page cache limit is mainly used to detect whether the page cache exceeds the upper limit we set (/proc/sys/vm/pagecache_limit_ratio) when the page cache is added to the application (that is, when the add_to_page_cache_lru function is called) Provides 3 /proc interfaces, respectively: echo x > /proc/sys/vm/pagecache_limit_ratio（0 < x < 100）:Enable page cache limit function x means limit the percentage of page cache to the total system memory /proc/sys/vm/pagecache_limit_ignore_dirty :Whether to ignore dirty pages when calculating the memory occupied by the page cache. The default value is 1, which means ignore. Because the recycling of dirty pages is time-consuming. /proc/sys/vm/pagecache_limit_async:1 means asynchronous recycling, 0 means synchronous recycling signed-off-by: wen zhiwei <wenzhiwei(a)kylinos.cn> Signed-off-by: wenzhiwei <wenzhiwei(a)kylinos.cn> --- include/linux/memcontrol.h | 7 +- include/linux/mmzone.h | 7 + include/linux/swap.h | 15 + include/trace/events/vmscan.h | 28 +- kernel/sysctl.c | 139 ++++++++ mm/filemap.c | 2 + mm/page_alloc.c | 52 +++ mm/vmscan.c | 650 ++++++++++++++++++++++++++++++++-- mm/workingset.c | 1 + 9 files changed, 862 insertions(+), 39 deletions(-) diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h index 71a5b589bddb..731a2cd2ea86 100644 --- a/include/linux/memcontrol.h +++ b/include/linux/memcontrol.h @@ -50,6 +50,7 @@ enum memcg_memory_event { struct mem_cgroup_reclaim_cookie { pg_data_t *pgdat; + int priority; unsigned int generation; }; @@ -492,8 +493,7 @@ mem_cgroup_nodeinfo(struct mem_cgroup *memcg, int nid) * @node combination. This can be the node lruvec, if the memory * controller is disabled. */ -static inline struct lruvec *mem_cgroup_lruvec(struct mem_cgroup *memcg, - struct pglist_data *pgdat) +static inline struct lruvec *mem_cgroup_lruvec(struct mem_cgroup *memcg, struct pglist_data *pgdat) { struct mem_cgroup_per_node *mz; struct lruvec *lruvec; @@ -1066,8 +1066,7 @@ static inline void mem_cgroup_migrate(struct page *old, struct page *new) { } -static inline struct lruvec *mem_cgroup_lruvec(struct mem_cgroup *memcg, - struct pglist_data *pgdat) +static inline struct lruvec *mem_cgroup_lruvec(struct mem_cgroup *memcg, struct pglist_data *pgdat) { return &pgdat->__lruvec; } diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index 82fceef88448..d3c5258e5d0d 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -445,6 +445,13 @@ struct zone { * changes. */ long lowmem_reserve[MAX_NR_ZONES]; + /* + * This atomic counter is set when there is pagecache limit + * reclaim going on on this particular zone. Other potential + * reclaiers should back off to prevent from heavy lru_lock + * bouncing. + */ + atomic_t pagecache_reclaim; #ifdef CONFIG_NEED_MULTIPLE_NODES int node; diff --git a/include/linux/swap.h b/include/linux/swap.h index 9b708c0288bc..b9329e575836 100644 --- a/include/linux/swap.h +++ b/include/linux/swap.h @@ -377,6 +377,21 @@ extern unsigned long mem_cgroup_shrink_node(struct mem_cgroup *mem, unsigned long *nr_scanned); extern unsigned long shrink_all_memory(unsigned long nr_pages); extern int vm_swappiness; + +#define ADDITIONAL_RECLAIM_RATIO 2 +extern unsigned long pagecache_over_limit(void); +extern void shrink_page_cache(gfp_t mask, struct page *page); +extern unsigned long vm_pagecache_limit_pages; +extern unsigned long vm_pagecache_limit_reclaim_pages; +extern int unsigned vm_pagecache_limit_ratio; +extern int vm_pagecache_limit_reclaim_ratio; +extern unsigned int vm_pagecache_ignore_dirty; +extern unsigned long pagecache_over_limit(void); +extern unsigned int vm_pagecache_limit_async; +extern int kpagecache_limitd_run(void); +extern void kpagecache_limitd_stop(void); +extern unsigned int vm_pagecache_ignore_slab; + extern int remove_mapping(struct address_space *mapping, struct page *page); extern unsigned long reclaim_pages(struct list_head *page_list); diff --git a/include/trace/events/vmscan.h b/include/trace/events/vmscan.h index 2070df64958e..3bfe47a85f6f 100644 --- a/include/trace/events/vmscan.h +++ b/include/trace/events/vmscan.h @@ -183,48 +183,48 @@ DEFINE_EVENT(mm_vmscan_direct_reclaim_end_template, mm_vmscan_memcg_softlimit_re #endif /* CONFIG_MEMCG */ TRACE_EVENT(mm_shrink_slab_start, - TP_PROTO(struct shrinker *shr, struct shrink_control *sc, - long nr_objects_to_shrink, unsigned long cache_items, - unsigned long long delta, unsigned long total_scan, - int priority), - - TP_ARGS(shr, sc, nr_objects_to_shrink, cache_items, delta, total_scan, - priority), + TP_PROTO(struct shrinker *shr, struct shrink_control *sc, + long nr_objects_to_shrink,unsigned long pgs_scanned, + unsigned long lru_pgs, unsigned long cache_items, + unsigned long long delta, unsigned long total_scan), + TP_ARGS(shr, sc, nr_objects_to_shrink,pgs_scanned, lru_pgs, cache_items, delta, total_scan), TP_STRUCT__entry( __field(struct shrinker *, shr) __field(void *, shrink) __field(int, nid) __field(long, nr_objects_to_shrink) __field(gfp_t, gfp_flags) + __field(unsigned long, pgs_scanned) + __field(unsigned long, lru_pgs) __field(unsigned long, cache_items) __field(unsigned long long, delta) __field(unsigned long, total_scan) - __field(int, priority) ), TP_fast_assign( - __entry->shr = shr; + __entry->shr = shr; __entry->shrink = shr->scan_objects; __entry->nid = sc->nid; __entry->nr_objects_to_shrink = nr_objects_to_shrink; __entry->gfp_flags = sc->gfp_mask; + __entry->pgs_scanned = pgs_scanned; + __entry->lru_pgs = lru_pgs; __entry->cache_items = cache_items; __entry->delta = delta; __entry->total_scan = total_scan; - __entry->priority = priority; ), - - TP_printk("%pS %p: nid: %d objects to shrink %ld gfp_flags %s cache items %ld delta %lld total_scan %ld priority %d", +TP_printk("%pF %p: nid: %d objects to shrink %ld gfp_flags %s pgs_scanned %ld lru_pgs %ld cache items %ld delta %lld total_scan %ld", __entry->shrink, __entry->shr, __entry->nid, __entry->nr_objects_to_shrink, show_gfp_flags(__entry->gfp_flags), + __entry->pgs_scanned, + __entry->lru_pgs, __entry->cache_items, __entry->delta, - __entry->total_scan, - __entry->priority) + __entry->total_scan) ); TRACE_EVENT(mm_shrink_slab_end, diff --git a/kernel/sysctl.c b/kernel/sysctl.c index c7ca58de3b1b..4ef436cdfdad 100644 --- a/kernel/sysctl.c +++ b/kernel/sysctl.c @@ -111,6 +111,7 @@ static int sixty = 60; #endif +static int zero; static int __maybe_unused neg_one = -1; static int __maybe_unused two = 2; static int __maybe_unused four = 4; @@ -648,6 +649,68 @@ static int do_proc_dointvec(struct ctl_table *table, int write, return __do_proc_dointvec(table->data, table, write, buffer, lenp, ppos, conv, data); } +int setup_pagecache_limit(void) +{ + /* reclaim $ADDITIONAL_RECLAIM_PAGES more than limit. */ + vm_pagecache_limit_reclaim_ratio = vm_pagecache_limit_ratio + ADDITIONAL_RECLAIM_RATIO; + + if (vm_pagecache_limit_reclaim_ratio > 100) + vm_pagecache_limit_reclaim_ratio = 100; + if (vm_pagecache_limit_ratio == 0) + vm_pagecache_limit_reclaim_ratio = 0; + + vm_pagecache_limit_pages = vm_pagecache_limit_ratio * totalram_pages() / 100; + vm_pagecache_limit_reclaim_pages = vm_pagecache_limit_reclaim_ratio * totalram_pages() / 100; + return 0; +} + +static int pc_limit_proc_dointvec(struct ctl_table *table, int write, + void __user *buffer, size_t *lenp, loff_t *ppos) +{ + int ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos); + if (write && !ret) + ret = setup_pagecache_limit(); + return ret; +} +static int pc_reclaim_limit_proc_dointvec(struct ctl_table *table, int write, + void __user *buffer, size_t *lenp, loff_t *ppos) +{ + int pre_reclaim_ratio = vm_pagecache_limit_reclaim_ratio; + int ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos); + + if (write && vm_pagecache_limit_ratio == 0) + return -EINVAL; + + if (write && !ret) { + if (vm_pagecache_limit_reclaim_ratio - vm_pagecache_limit_ratio < ADDITIONAL_RECLAIM_RATIO) { + vm_pagecache_limit_reclaim_ratio = pre_reclaim_ratio; + return -EINVAL; + } + vm_pagecache_limit_reclaim_pages = vm_pagecache_limit_reclaim_ratio * totalram_pages() / 100; + } + return ret; +} +static int pc_limit_async_handler(struct ctl_table *table, int write, + void __user *buffer, size_t *lenp, loff_t *ppos) +{ + int ret = proc_dointvec_minmax(table, write, buffer, lenp, ppos); + + if (write && vm_pagecache_limit_ratio == 0) + return -EINVAL; + + if (write && !ret) { + if (vm_pagecache_limit_async > 0) { + if (kpagecache_limitd_run()) { + vm_pagecache_limit_async = 0; + return -EINVAL; + } + } + else { + kpagecache_limitd_stop(); + } + } + return ret; +} static int do_proc_douintvec_w(unsigned int *tbl_data, struct ctl_table *table, @@ -2711,6 +2774,14 @@ static struct ctl_table kern_table[] = { }, { } }; +static int pc_limit_proc_dointvec(struct ctl_table *table, int write, + void __user *buffer, size_t *lenp, loff_t *ppos); + +static int pc_reclaim_limit_proc_dointvec(struct ctl_table *table, int write, + void __user *buffer, size_t *lenp, loff_t *ppos); + +static int pc_limit_async_handler(struct ctl_table *table, int write, + void __user *buffer, size_t *lenp, loff_t *ppos); static struct ctl_table vm_table[] = { { @@ -2833,6 +2904,74 @@ static struct ctl_table vm_table[] = { .extra1 = SYSCTL_ZERO, .extra2 = &two_hundred, }, + { + .procname = "pagecache_limit_ratio", + .data = &vm_pagecache_limit_ratio, + .maxlen = sizeof(vm_pagecache_limit_ratio), + .mode = 0644, + .proc_handler = &pc_limit_proc_dointvec, + .extra1 = &zero, + .extra2 = &one_hundred, + }, + { + .procname = "pagecache_limit_reclaim_ratio", + .data = &vm_pagecache_limit_reclaim_ratio, + .maxlen = sizeof(vm_pagecache_limit_reclaim_ratio), + .mode = 0644, + .proc_handler = &pc_reclaim_limit_proc_dointvec, + .extra1 = &zero, + .extra2 = &one_hundred, + }, + { + .procname = "pagecache_limit_ignore_dirty", + .data = &vm_pagecache_ignore_dirty, + .maxlen = sizeof(vm_pagecache_ignore_dirty), + .mode = 0644, + .proc_handler = &proc_dointvec, + }, +#ifdef CONFIG_SHRINK_PAGECACHE + { + .procname = "cache_reclaim_s", + .data = &vm_cache_reclaim_s, + .maxlen = sizeof(vm_cache_reclaim_s), + .mode = 0644, + .proc_handler = cache_reclaim_sysctl_handler, + .extra1 = &vm_cache_reclaim_s_min, + .extra2 = &vm_cache_reclaim_s_max, + }, + { + .procname = "cache_reclaim_weight", + .data = &vm_cache_reclaim_weight, + .maxlen = sizeof(vm_cache_reclaim_weight), + .mode = 0644, + .proc_handler = proc_dointvec_minmax, + .extra1 = &vm_cache_reclaim_weight_min, + .extra2 = &vm_cache_reclaim_weight_max, + }, + { + .procname = "cache_reclaim_enable", + .data = &vm_cache_reclaim_enable, + .maxlen = sizeof(vm_cache_reclaim_enable), + .mode = 0644, + .proc_handler = cache_reclaim_enable_handler, + .extra1 = &zero, + .extra2 = &one, + }, + { + .procname = "pagecache_limit_async", + .data = &vm_pagecache_limit_async, + .maxlen = sizeof(vm_pagecache_limit_async), + .mode = 0644, + .proc_handler = &pc_limit_async_handler, + }, + { + .procname = "pagecache_limit_ignore_slab", + .data = &vm_pagecache_ignore_slab, + .maxlen = sizeof(vm_pagecache_ignore_slab), + .mode = 0644, + .proc_handler = &proc_dointvec, + }, +#endif #ifdef CONFIG_HUGETLB_PAGE { .procname = "nr_hugepages", diff --git a/mm/filemap.c b/mm/filemap.c index ef611eb34aa7..808d4f02b5a5 100644 --- a/mm/filemap.c +++ b/mm/filemap.c @@ -922,6 +922,8 @@ int add_to_page_cache_lru(struct page *page, struct address_space *mapping, { void *shadow = NULL; int ret; + if (unlikely(vm_pagecache_limit_pages) && pagecache_over_limit() > 0) + shrink_page_cache(gfp_mask, page); __SetPageLocked(page); ret = __add_to_page_cache_locked(page, mapping, offset, diff --git a/mm/page_alloc.c b/mm/page_alloc.c index 71afec177233..08feba42d3d7 100644 --- a/mm/page_alloc.c +++ b/mm/page_alloc.c @@ -8933,6 +8933,58 @@ void zone_pcp_reset(struct zone *zone) local_irq_restore(flags); } +/* Returns a number that's positive if the pagecache is above + * the set limit*/ +unsigned long pagecache_over_limit() +{ + unsigned long should_reclaim_pages = 0; + unsigned long overlimit_pages = 0; + unsigned long delta_pages = 0; + unsigned long pgcache_lru_pages = 0; + /* We only want to limit unmapped and non-shmem page cache pages; + * normally all shmem pages are mapped as well*/ + unsigned long pgcache_pages = global_node_page_state(NR_FILE_PAGES) + - max_t(unsigned long, + global_node_page_state(NR_FILE_MAPPED), + global_node_page_state(NR_SHMEM)); + /* We certainly can't free more than what's on the LRU lists + * minus the dirty ones*/ + if (vm_pagecache_ignore_slab) + pgcache_lru_pages = global_node_page_state(NR_ACTIVE_FILE) + + global_node_page_state(NR_INACTIVE_FILE); + else + pgcache_lru_pages = global_node_page_state(NR_ACTIVE_FILE) + + global_node_page_state(NR_INACTIVE_FILE) + + global_node_page_state(NR_SLAB_RECLAIMABLE_B) + + global_node_page_state(NR_SLAB_UNRECLAIMABLE_B); + + if (vm_pagecache_ignore_dirty != 0) + pgcache_lru_pages -= global_node_page_state(NR_FILE_DIRTY) / vm_pagecache_ignore_dirty; + /* Paranoia */ + if (unlikely(pgcache_lru_pages > LONG_MAX)) + return 0; + + /* Limit it to 94% of LRU (not all there might be unmapped) */ + pgcache_lru_pages -= pgcache_lru_pages/16; + if (vm_pagecache_ignore_slab) + pgcache_pages = min_t(unsigned long, pgcache_pages, pgcache_lru_pages); + else + pgcache_pages = pgcache_lru_pages; + + /* + *delta_pages: we should reclaim at least 2% more pages than overlimit_page, values get from + * /proc/vm/pagecache_limit_reclaim_pages + *should_reclaim_pages: the real pages we will reclaim, but it should less than pgcache_pages; + */ + if (pgcache_pages > vm_pagecache_limit_pages) { + overlimit_pages = pgcache_pages - vm_pagecache_limit_pages; + delta_pages = vm_pagecache_limit_reclaim_pages - vm_pagecache_limit_pages; + should_reclaim_pages = min_t(unsigned long, delta_pages, vm_pagecache_limit_pages) + overlimit_pages; + return should_reclaim_pages; + } + return 0; +} + #ifdef CONFIG_MEMORY_HOTREMOVE /* * All pages in the range must be in a single zone, must not contain holes, diff --git a/mm/vmscan.c b/mm/vmscan.c index 23f8a5242de7..1fe2c74a1c10 100644 --- a/mm/vmscan.c +++ b/mm/vmscan.c @@ -175,6 +175,39 @@ struct scan_control { */ int vm_swappiness = 60; +/* + * The total number of pages which are beyond the high watermark within all + * zones. + */ +unsigned long vm_pagecache_limit_pages __read_mostly = 0; +unsigned long vm_pagecache_limit_reclaim_pages = 0; +unsigned int vm_pagecache_limit_ratio __read_mostly = 0; +int vm_pagecache_limit_reclaim_ratio __read_mostly = 0; +unsigned int vm_pagecache_ignore_dirty __read_mostly = 1; + +unsigned long vm_total_pages; +static struct task_struct *kpclimitd = NULL; +unsigned int vm_pagecache_ignore_slab __read_mostly = 1; +unsigned int vm_pagecache_limit_async __read_mostly = 0; + +#ifdef CONFIG_SHRINK_PAGECACHE +unsigned long vm_cache_limit_ratio; +unsigned long vm_cache_limit_ratio_min; +unsigned long vm_cache_limit_ratio_max; +unsigned long vm_cache_limit_mbytes __read_mostly; +unsigned long vm_cache_limit_mbytes_min; +unsigned long vm_cache_limit_mbytes_max; +static bool kpclimitd_context = false; +int vm_cache_reclaim_s __read_mostly; +int vm_cache_reclaim_s_min; +int vm_cache_reclaim_s_max; +int vm_cache_reclaim_weight __read_mostly; +int vm_cache_reclaim_weight_min; +int vm_cache_reclaim_weight_max; +int vm_cache_reclaim_enable; +static DEFINE_PER_CPU(struct delayed_work, vmscan_work); +#endif + static void set_task_reclaim_state(struct task_struct *task, struct reclaim_state *rs) { @@ -187,10 +220,12 @@ static void set_task_reclaim_state(struct task_struct *task, task->reclaim_state = rs; } +static bool kpclimitd_context = false; static LIST_HEAD(shrinker_list); static DECLARE_RWSEM(shrinker_rwsem); #ifdef CONFIG_MEMCG +static DEFINE_IDR(shrinker_idr); static int shrinker_nr_max; /* The shrinker_info is expanded in a batch of BITS_PER_LONG */ @@ -346,7 +381,6 @@ void set_shrinker_bit(struct mem_cgroup *memcg, int nid, int shrinker_id) } } -static DEFINE_IDR(shrinker_idr); static int prealloc_memcg_shrinker(struct shrinker *shrinker) { @@ -646,7 +680,9 @@ EXPORT_SYMBOL(unregister_shrinker); #define SHRINK_BATCH 128 static unsigned long do_shrink_slab(struct shrink_control *shrinkctl, - struct shrinker *shrinker, int priority) + struct shrinker *shrinker, + unsigned long nr_scanned, + unsigned long nr_eligible) { unsigned long freed = 0; unsigned long long delta; @@ -670,8 +706,10 @@ static unsigned long do_shrink_slab(struct shrink_control *shrinkctl, nr = xchg_nr_deferred(shrinker, shrinkctl); if (shrinker->seeks) { - delta = freeable >> priority; - delta *= 4; + //delta = freeable >> priority; + //delta *= 4; + delta = (4 * nr_scanned) / shrinker->seeks; + delta *= freeable; do_div(delta, shrinker->seeks); } else { /* @@ -682,12 +720,12 @@ static unsigned long do_shrink_slab(struct shrink_control *shrinkctl, delta = freeable / 2; } - total_scan = nr >> priority; + total_scan = nr; total_scan += delta; total_scan = min(total_scan, (2 * freeable)); trace_mm_shrink_slab_start(shrinker, shrinkctl, nr, - freeable, delta, total_scan, priority); + freeable, delta, total_scan, nr_scanned,nr_eligible); /* * Normally, we should not scan less than batch_size objects in one @@ -744,7 +782,7 @@ static unsigned long do_shrink_slab(struct shrink_control *shrinkctl, #ifdef CONFIG_MEMCG static unsigned long shrink_slab_memcg(gfp_t gfp_mask, int nid, - struct mem_cgroup *memcg, int priority) + struct mem_cgroup *memcg, unsigned long nr_scanned, unsigned long nr_eligible) { struct shrinker_info *info; unsigned long ret, freed = 0; @@ -780,7 +818,7 @@ static unsigned long shrink_slab_memcg(gfp_t gfp_mask, int nid, !(shrinker->flags & SHRINKER_NONSLAB)) continue; - ret = do_shrink_slab(&sc, shrinker, priority); + ret = do_shrink_slab(&sc, shrinker, nr_scanned, nr_eligible); if (ret == SHRINK_EMPTY) { clear_bit(i, info->map); /* @@ -799,7 +837,7 @@ static unsigned long shrink_slab_memcg(gfp_t gfp_mask, int nid, * set_bit() do_shrink_slab() */ smp_mb__after_atomic(); - ret = do_shrink_slab(&sc, shrinker, priority); + ret = do_shrink_slab(&sc, shrinker, nr_scanned, nr_eligible); if (ret == SHRINK_EMPTY) ret = 0; else @@ -846,7 +884,8 @@ static unsigned long shrink_slab_memcg(gfp_t gfp_mask, int nid, */ static unsigned long shrink_slab(gfp_t gfp_mask, int nid, struct mem_cgroup *memcg, - int priority) + unsigned long nr_scanned, + unsigned long nr_eligible) { unsigned long ret, freed = 0; struct shrinker *shrinker; @@ -859,7 +898,8 @@ static unsigned long shrink_slab(gfp_t gfp_mask, int nid, * oom. */ if (!mem_cgroup_disabled() && !mem_cgroup_is_root(memcg)) - return shrink_slab_memcg(gfp_mask, nid, memcg, priority); + return 0; + // return shrink_slab_memcg(gfp_mask, nid, memcg, priority); if (!down_read_trylock(&shrinker_rwsem)) goto out; @@ -871,7 +911,14 @@ static unsigned long shrink_slab(gfp_t gfp_mask, int nid, .memcg = memcg, }; - ret = do_shrink_slab(&sc, shrinker, priority); + if (memcg_kmem_enabled() && + !!memcg != !!(shrinker->flags & SHRINKER_MEMCG_AWARE)) + continue; + + if (!(shrinker->flags & SHRINKER_NUMA_AWARE)) + sc.nid = 0; + + ret = do_shrink_slab(&sc, shrinker, nr_scanned, nr_eligible); if (ret == SHRINK_EMPTY) ret = 0; freed += ret; @@ -905,7 +952,7 @@ void drop_slab_node(int nid) freed = 0; memcg = mem_cgroup_iter(NULL, NULL, NULL); do { - freed += shrink_slab(GFP_KERNEL, nid, memcg, 0); + freed += shrink_slab(GFP_KERNEL, nid, memcg, 1000,1000); } while ((memcg = mem_cgroup_iter(NULL, memcg, NULL)) != NULL); } while (freed > 10); } @@ -2369,7 +2416,7 @@ unsigned long reclaim_pages(struct list_head *page_list) EXPORT_SYMBOL_GPL(reclaim_pages); static unsigned long shrink_list(enum lru_list lru, unsigned long nr_to_scan, - struct lruvec *lruvec, struct scan_control *sc) + struct lruvec *lruvec, struct mem_cgroup *memcg, struct scan_control *sc) { if (is_active_lru(lru)) { if (sc->may_deactivate & (1 << is_file_lru(lru))) @@ -2683,7 +2730,7 @@ static void shrink_lruvec(struct lruvec *lruvec, struct scan_control *sc) nr[lru] -= nr_to_scan; nr_reclaimed += shrink_list(lru, nr_to_scan, - lruvec, sc); + lruvec, NULL, sc); } } @@ -2836,7 +2883,7 @@ static void shrink_node_memcgs(pg_data_t *pgdat, struct scan_control *sc) struct lruvec *lruvec = mem_cgroup_lruvec(memcg, pgdat); unsigned long reclaimed; unsigned long scanned; - + unsigned long lru_pages; /* * This loop can become CPU-bound when target memcgs * aren't eligible for reclaim - either because they @@ -2873,7 +2920,8 @@ static void shrink_node_memcgs(pg_data_t *pgdat, struct scan_control *sc) shrink_lruvec(lruvec, sc); shrink_slab(sc->gfp_mask, pgdat->node_id, memcg, - sc->priority); + sc->nr_scanned - scanned, + lru_pages); /* Record the group's reclaim efficiency */ vmpressure(sc->gfp_mask, memcg, false, @@ -3202,6 +3250,7 @@ static void shrink_zones(struct zonelist *zonelist, struct scan_control *sc) static void snapshot_refaults(struct mem_cgroup *target_memcg, pg_data_t *pgdat) { + struct mem_cgroup *memcg; struct lruvec *target_lruvec; unsigned long refaults; @@ -3273,8 +3322,7 @@ static unsigned long do_try_to_free_pages(struct zonelist *zonelist, if (cgroup_reclaim(sc)) { struct lruvec *lruvec; - lruvec = mem_cgroup_lruvec(sc->target_mem_cgroup, - zone->zone_pgdat); + lruvec = mem_cgroup_lruvec(sc->target_mem_cgroup, zone->zone_pgdat); clear_bit(LRUVEC_CONGESTED, &lruvec->flags); } } @@ -3745,6 +3793,8 @@ static bool kswapd_shrink_node(pg_data_t *pgdat, return sc->nr_scanned >= sc->nr_to_reclaim; } +static void __shrink_page_cache(gfp_t mask); + /* * For kswapd, balance_pgdat() will reclaim pages across a node from zones * that are eligible for use by the caller until at least one zone is @@ -4208,6 +4258,27 @@ void wakeup_kswapd(struct zone *zone, gfp_t gfp_flags, int order, wake_up_interruptible(&pgdat->kswapd_wait); } +/* + * The reclaimable count would be mostly accurate. + * The less reclaimable pages may be + * - mlocked pages, which will be moved to unevictable list when encountered + * - mapped pages, which may require several travels to be reclaimed + * - dirty pages, which is not "instantly" reclaimable + */ + +static unsigned long global_reclaimable_pages(void) +{ + int nr; + + nr = global_node_page_state(NR_ACTIVE_FILE) + + global_node_page_state(NR_INACTIVE_FILE); + + if (get_nr_swap_pages() > 0) + nr += global_node_page_state(NR_ACTIVE_ANON) + + global_node_page_state(NR_INACTIVE_ANON); + return nr; +} + #ifdef CONFIG_HIBERNATION /* * Try to free `nr_to_reclaim' of memory, system-wide, and return the number of @@ -4246,6 +4317,498 @@ unsigned long shrink_all_memory(unsigned long nr_to_reclaim) return nr_reclaimed; } #endif /* CONFIG_HIBERNATION */ +/* + * Returns non-zero if the lock has been acquired, false if somebody + * else is holding the lock. + */ +static int pagecache_reclaim_lock_zone(struct zone *zone) +{ + return atomic_add_unless(&zone->pagecache_reclaim, 1, 1); +} + +static void pagecache_reclaim_unlock_zone(struct zone *zone) +{ + BUG_ON(atomic_dec_return(&zone->pagecache_reclaim)); +} + +/* + * Potential page cache reclaimers who are not able to take + * reclaim lock on any zone are sleeping on this waitqueue. + * So this is basically a congestion wait queue for them. + */ +DECLARE_WAIT_QUEUE_HEAD(pagecache_reclaim_wq); +DECLARE_WAIT_QUEUE_HEAD(kpagecache_limitd_wq); + +/* + * Similar to shrink_zone but it has a different consumer - pagecache limit + * so we cannot reuse the original function - and we do not want to clobber + * that code path so we have to live with this code duplication. + * + * In short this simply scans through the given lru for all cgroups for the + * give zone. + * + * returns true if we managed to cumulatively reclaim (via nr_reclaimed) + * the given nr_to_reclaim pages, false otherwise. The caller knows that + * it doesn't have to touch other zones if the target was hit already. + * + * DO NOT USE OUTSIDE of shrink_all_zones unless you have a really really + * really good reason. + */ + +static bool shrink_zone_per_memcg(struct zone *zone, enum lru_list lru, + unsigned long nr_to_scan, unsigned long nr_to_reclaim, + unsigned long *nr_reclaimed, struct scan_control *sc) +{ + struct mem_cgroup *root = sc->target_mem_cgroup; + struct mem_cgroup *memcg; + struct mem_cgroup_reclaim_cookie reclaim = { + .pgdat = zone->zone_pgdat, + .priority = sc->priority, + }; + + memcg = mem_cgroup_iter(root, NULL, &reclaim); + do { + struct lruvec *lruvec; + + lruvec = mem_cgroup_lruvec(memcg, zone->zone_pgdat); + *nr_reclaimed += shrink_list(lru, nr_to_scan, lruvec, memcg, sc); + if (*nr_reclaimed >= nr_to_reclaim) { + mem_cgroup_iter_break(root, memcg); + return true; + } + memcg = mem_cgroup_iter(root, memcg, &reclaim); + } while (memcg); + + return false; +} +/* + * Tries to reclaim 'nr_pages' pages from LRU lists system-wide, for given + * pass. + * + * For pass > 3 we also try to shrink the LRU lists that contain a few pages + * + * Returns the number of scanned zones. + */ +static int shrink_all_zones(unsigned long nr_pages, int pass, + struct scan_control *sc) +{ + struct zone *zone; + unsigned long nr_reclaimed = 0; + unsigned int nr_locked_zones = 0; + DEFINE_WAIT(wait); + + prepare_to_wait(&pagecache_reclaim_wq, &wait, TASK_INTERRUPTIBLE); + + for_each_populated_zone(zone) { + enum lru_list lru; + + /* + * Back off if somebody is already reclaiming this zone + * for the pagecache reclaim. + */ + if (!pagecache_reclaim_lock_zone(zone)) + continue; + + + /* + * This reclaimer might scan a zone so it will never + * sleep on pagecache_reclaim_wq + */ + finish_wait(&pagecache_reclaim_wq, &wait); + nr_locked_zones++; + + for_each_evictable_lru(lru) { + enum zone_stat_item ls = NR_ZONE_LRU_BASE + lru; + unsigned long lru_pages = zone_page_state(zone, ls); + + /* For pass = 0, we don't shrink the active list */ + if (pass == 0 && (lru == LRU_ACTIVE_ANON || + lru == LRU_ACTIVE_FILE)) + continue; + + /* Original code relied on nr_saved_scan which is no + * longer present so we are just considering LRU pages. + * This means that the zone has to have quite large + * LRU list for default priority and minimum nr_pages + * size (8*SWAP_CLUSTER_MAX). In the end we will tend + * to reclaim more from large zones wrt. small. + * This should be OK because shrink_page_cache is called + * when we are getting to short memory condition so + * LRUs tend to be large. + */ + if (((lru_pages >> sc->priority) + 1) >= nr_pages || pass >= 3) { + unsigned long nr_to_scan; + + nr_to_scan = min(nr_pages, lru_pages); + + /* + * A bit of a hack but the code has always been + * updating sc->nr_reclaimed once per shrink_all_zones + * rather than accumulating it for all calls to shrink + * lru. This costs us an additional argument to + * shrink_zone_per_memcg but well... + * + * Let's stick with this for bug-to-bug compatibility + */ + while (nr_to_scan > 0) { + /* shrink_list takes lru_lock with IRQ off so we + * should be careful about really huge nr_to_scan + */ + unsigned long batch = min_t(unsigned long, nr_to_scan, SWAP_CLUSTER_MAX); + + if (shrink_zone_per_memcg(zone, lru, + batch, nr_pages, &nr_reclaimed, sc)) { + pagecache_reclaim_unlock_zone(zone); + goto out_wakeup; + } + nr_to_scan -= batch; + } + } + } + pagecache_reclaim_unlock_zone(zone); + } + /* + * We have to go to sleep because all the zones are already reclaimed. + * One of the reclaimer will wake us up or __shrink_page_cache will + * do it if there is nothing to be done. + */ + if (!nr_locked_zones) { + if (!kpclimitd_context) + schedule(); + finish_wait(&pagecache_reclaim_wq, &wait); + goto out; + } + +out_wakeup: + wake_up_interruptible(&pagecache_reclaim_wq); + sc->nr_reclaimed += nr_reclaimed; +out: + return nr_locked_zones; +} + +/* + * Function to shrink the page cache + * + * This function calculates the number of pages (nr_pages) the page + * cache is over its limit and shrinks the page cache accordingly. + * + * The maximum number of pages, the page cache shrinks in one call of + * this function is limited to SWAP_CLUSTER_MAX pages. Therefore it may + * require a number of calls to actually reach the vm_pagecache_limit_kb. + * + * This function is similar to shrink_all_memory, except that it may never + * swap out mapped pages and only does four passes. + */ +static void __shrink_page_cache(gfp_t mask) +{ + unsigned long ret = 0; + int pass = 0; + struct reclaim_state reclaim_state; + struct scan_control sc = { + .gfp_mask = mask, + .may_swap = 0, + .may_unmap = 0, + .may_writepage = 0, + .target_mem_cgroup = NULL, + .reclaim_idx = MAX_NR_ZONES, + }; + struct reclaim_state *old_rs = current->reclaim_state; + long nr_pages; + + /* We might sleep during direct reclaim so make atomic context + * is certainly a bug. + */ + BUG_ON(!(mask & __GFP_RECLAIM)); + +retry: + /* How many pages are we over the limit?*/ + nr_pages = pagecache_over_limit(); + + /* + * Return early if there's no work to do. + * Wake up reclaimers that couldn't scan any zone due to congestion. + * There is apparently nothing to do so they do not have to sleep. + * This makes sure that no sleeping reclaimer will stay behind. + * Allow breaching the limit if the task is on the way out. + */ + if (nr_pages <= 0 || fatal_signal_pending(current)) { + wake_up_interruptible(&pagecache_reclaim_wq); + goto out; + } + + /* But do a few at least */ + nr_pages = max_t(unsigned long, nr_pages, 8*SWAP_CLUSTER_MAX); + + current->reclaim_state = &reclaim_state; + + /* + * Shrink the LRU in 4 passes: + * 0 = Reclaim from inactive_list only (fast) + * 1 = Reclaim from active list but don't reclaim mapped and dirtied (not that fast) + * 2 = Reclaim from active list but don't reclaim mapped (2nd pass) + * it may reclaim dirtied if vm_pagecache_ignore_dirty = 0 + * 3 = same as pass 2, but it will reclaim some few pages , detail in shrink_all_zones + */ + for (; pass <= 3; pass++) { + for (sc.priority = DEF_PRIORITY; sc.priority >= 0; sc.priority--) { + unsigned long nr_to_scan = nr_pages - ret; + struct mem_cgroup *memcg = NULL; + int nid; + + sc.nr_scanned = 0; + + /* + * No zone reclaimed because of too many reclaimers. Retry whether + * there is still something to do + */ + if (!shrink_all_zones(nr_to_scan, pass, &sc)) + goto retry; + + ret += sc.nr_reclaimed; + if (ret >= nr_pages) + goto out; + + reclaim_state.reclaimed_slab = 0; + for_each_online_node(nid) { + do { + shrink_slab(mask, nid, memcg, sc.nr_scanned, + global_reclaimable_pages()); + } while ((memcg = mem_cgroup_iter(NULL, memcg, NULL)) != NULL); + } + ret += reclaim_state.reclaimed_slab; + + if (ret >= nr_pages) + goto out; + + } + if (pass == 1) { + if (vm_pagecache_ignore_dirty == 1 || + (mask & (__GFP_IO | __GFP_FS)) != (__GFP_IO | __GFP_FS) ) + break; + else + sc.may_writepage = 1; + } + } + +out: + current->reclaim_state = old_rs; +} + +#ifdef CONFIG_SHRINK_PAGECACHE +static unsigned long __shrink_page_cache(gfp_t mask) +{ + struct scan_control sc = { + .gfp_mask = current_gfp_context(mask), + .reclaim_idx = gfp_zone(mask), + .may_writepage = !laptop_mode, + .nr_to_reclaim = SWAP_CLUSTER_MAX * + (unsigned long)vm_cache_reclaim_weight, + .may_unmap = 1, + .may_swap = 1, + .order = 0, + .priority = DEF_PRIORITY, + .target_mem_cgroup = NULL, + .nodemask = NULL, + }; + + struct zonelist *zonelist = node_zonelist(numa_node_id(), mask); + + return do_try_to_free_pages(zonelist, &sc); +} + + +static void shrink_page_cache_work(struct work_struct *w); +static void shrink_shepherd(struct work_struct *w); +static DECLARE_DEFERRABLE_WORK(shepherd, shrink_shepherd); + +static void shrink_shepherd(struct work_struct *w) +{ + int cpu; + + get_online_cpus(); + + for_each_online_cpu(cpu) { + struct delayed_work *work = &per_cpu(vmscan_work, cpu); + + if (!delayed_work_pending(work) && vm_cache_reclaim_enable) + queue_delayed_work_on(cpu, system_wq, work, 0); + } + + put_online_cpus(); + + /* we want all kernel thread to stop */ + if (vm_cache_reclaim_enable) { + if (vm_cache_reclaim_s == 0) + schedule_delayed_work(&shepherd, + round_jiffies_relative(120 * HZ)); + else + schedule_delayed_work(&shepherd, + round_jiffies_relative((unsigned long) + vm_cache_reclaim_s * HZ)); + } +} +static void shrink_shepherd_timer(void) +{ + int cpu; + + for_each_possible_cpu(cpu) { + struct delayed_work *work = &per_cpu(vmscan_work, cpu); + + INIT_DEFERRABLE_WORK(work, shrink_page_cache_work); + } + + schedule_delayed_work(&shepherd, + round_jiffies_relative((unsigned long)vm_cache_reclaim_s * HZ)); +} + +unsigned long shrink_page_cache(gfp_t mask) +{ + unsigned long nr_pages; + + /* We reclaim the highmem zone too, it is useful for 32bit arch */ + nr_pages = __shrink_page_cache(mask | __GFP_HIGHMEM); + + return nr_pages; +} +static void shrink_page_cache_work(struct work_struct *w) +{ + struct delayed_work *work = to_delayed_work(w); + unsigned long nr_pages; + + /* + * if vm_cache_reclaim_enable or vm_cache_reclaim_s is zero, + * we do not shrink page cache again. + */ + if (vm_cache_reclaim_s == 0 || !vm_cache_reclaim_enable) + return; + + /* It should wait more time if we hardly reclaim the page cache */ + nr_pages = shrink_page_cache(GFP_KERNEL); + if ((nr_pages < SWAP_CLUSTER_MAX) && vm_cache_reclaim_enable) + queue_delayed_work_on(smp_processor_id(), system_wq, work, + round_jiffies_relative(120 * HZ)); +} + +static void shrink_page_cache_init(void) +{ + vm_cache_limit_ratio = 0; + vm_cache_limit_ratio_min = 0; + vm_cache_limit_ratio_max = 100; + vm_cache_limit_mbytes = 0; + vm_cache_limit_mbytes_min = 0; + vm_cache_limit_mbytes_max = totalram_pages >> (20 - PAGE_SHIFT); + vm_cache_reclaim_s = 0; + vm_cache_reclaim_s_min = 0; + vm_cache_reclaim_s_max = 43200; + vm_cache_reclaim_weight = 1; + vm_cache_reclaim_weight_min = 1; + vm_cache_reclaim_weight_max = 100; + vm_cache_reclaim_enable = 1; + + shrink_shepherd_timer(); +} + +static int kswapd_cpu_down_prep(unsigned int cpu) +{ + cancel_delayed_work_sync(&per_cpu(vmscan_work, cpu)); + + return 0; +} +int cache_reclaim_enable_handler(struct ctl_table *table, int write, + void __user *buffer, size_t *length, loff_t *ppos) +{ + int ret; + + ret = proc_dointvec_minmax(table, write, buffer, length, ppos); + if (ret) + return ret; + + if (write) + schedule_delayed_work(&shepherd, round_jiffies_relative((unsigned long)vm_cache_reclaim_s * HZ)); + + return 0; +} + +int cache_reclaim_sysctl_handler(struct ctl_table *table, int write, + void __user *buffer, size_t *length, loff_t *ppos) +{ + int ret; + + ret = proc_dointvec_minmax(table, write, buffer, length, ppos); + if (ret) + return ret; + + if (write) + mod_delayed_work(system_wq, &shepherd, + round_jiffies_relative( + (unsigned long)vm_cache_reclaim_s * HZ)); + + return ret; +} +#endif + +static int kpagecache_limitd(void *data) +{ + DEFINE_WAIT(wait); + kpclimitd_context = true; + + /* + * make sure all work threads woken up, when switch to async mode + */ + if (waitqueue_active(&pagecache_reclaim_wq)) + wake_up_interruptible(&pagecache_reclaim_wq); + + for ( ; ; ) { + __shrink_page_cache(GFP_KERNEL); + prepare_to_wait(&kpagecache_limitd_wq, &wait, TASK_INTERRUPTIBLE); + + if (!kthread_should_stop()) + schedule(); + else { + finish_wait(&kpagecache_limitd_wq, &wait); + break; + } + finish_wait(&kpagecache_limitd_wq, &wait); + } + kpclimitd_context = false; + return 0; +} + +static void wakeup_kpclimitd(gfp_t mask) +{ + if (!waitqueue_active(&kpagecache_limitd_wq)) + return; + wake_up_interruptible(&kpagecache_limitd_wq); +} + +void shrink_page_cache(gfp_t mask, struct page *page) +{ + if (0 == vm_pagecache_limit_async) + __shrink_page_cache(mask); + else + wakeup_kpclimitd(mask); +} + +/* It's optimal to keep kswapds on the same CPUs as their memory, but + not required for correctness. So if the last cpu in a node goes + away, we get changed to run anywhere: as the first one comes back, + restore their cpu bindings. */ +static int kswapd_cpu_online(unsigned int cpu) +{ + int nid; + + for_each_node_state(nid, N_MEMORY) { + pg_data_t *pgdat = NODE_DATA(nid); + const struct cpumask *mask; + + mask = cpumask_of_node(pgdat->node_id); + + if (cpumask_any_and(cpu_online_mask, mask) < nr_cpu_ids) + /* One of our CPUs online: restore mask */ + set_cpus_allowed_ptr(pgdat->kswapd, mask); + } + return 0; +} /* * This kswapd start function will be called by init and node-hot-add. @@ -4286,16 +4849,61 @@ void kswapd_stop(int nid) static int __init kswapd_init(void) { - int nid; + /*int nid; swap_setup(); for_each_node_state(nid, N_MEMORY) kswapd_run(nid); - return 0; + return 0;*/ + int nid, ret; + + swap_setup(); + for_each_node_state(nid, N_MEMORY) + kswapd_run(nid); +#ifdef CONFIG_SHRINK_PAGECACHE + ret = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, + "mm/vmscan:online", kswapd_cpu_online, + kswapd_cpu_down_prep); +#else + ret = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, + "mm/vmscan:online", kswapd_cpu_online, + NULL); +#endif + WARN_ON(ret < 0); +#ifdef CONFIG_SHRINK_PAGECACHE + shrink_page_cache_init(); +#endif + return 0; + } module_init(kswapd_init) +int kpagecache_limitd_run(void) +{ + int ret = 0; + + if (kpclimitd) + return 0; + + kpclimitd = kthread_run(kpagecache_limitd, NULL, "kpclimitd"); + if (IS_ERR(kpclimitd)) { + pr_err("Failed to start kpagecache_limitd thread\n"); + ret = PTR_ERR(kpclimitd); + kpclimitd = NULL; + } + return ret; + +} + +void kpagecache_limitd_stop(void) +{ + if (kpclimitd) { + kthread_stop(kpclimitd); + kpclimitd = NULL; + } +} + #ifdef CONFIG_NUMA /* * Node reclaim mode diff --git a/mm/workingset.c b/mm/workingset.c index bba4380405b4..9a5ad145b9bd 100644 --- a/mm/workingset.c +++ b/mm/workingset.c @@ -253,6 +253,7 @@ void workingset_age_nonresident(struct lruvec *lruvec, unsigned long nr_pages) void *workingset_eviction(struct page *page, struct mem_cgroup *target_memcg) { struct pglist_data *pgdat = page_pgdat(page); + struct mem_cgroup *memcg = page_memcg(page); unsigned long eviction; struct lruvec *lruvec; int memcgid; -- 2.30.0

1 0

[PATCH kernel-4.19] drivers/txgbe: fix buffer not null terminated by strncpy in txgbe_ethtool.c
by shenzijun 26 Oct '21

26 Oct '21

From: 沈子俊 <shenzijun(a)kylinos.cn> kylin inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4AG3E?from=project-issue CVE: NA --------------------------------------------------- change copy size in the function strncpy(). Signed-off-by: 沈子俊 <shenzijun(a)kylinos.cn> --- drivers/net/ethernet/netswift/txgbe/txgbe_ethtool.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/netswift/txgbe/txgbe_ethtool.c b/drivers/net/ethernet/netswift/txgbe/txgbe_ethtool.c index 5cb8ef61e04b..9af9f19fb491 100644 --- a/drivers/net/ethernet/netswift/txgbe/txgbe_ethtool.c +++ b/drivers/net/ethernet/netswift/txgbe/txgbe_ethtool.c @@ -1040,7 +1040,7 @@ static void txgbe_get_drvinfo(struct net_device *netdev, strncpy(drvinfo->version, txgbe_driver_version, sizeof(drvinfo->version) - 1); strncpy(drvinfo->fw_version, adapter->eeprom_id, - sizeof(drvinfo->fw_version)); + sizeof(drvinfo->fw_version) - 1); strncpy(drvinfo->bus_info, pci_name(adapter->pdev), sizeof(drvinfo->bus_info) - 1); if (adapter->num_tx_queues <= TXGBE_NUM_RX_QUEUES) { -- 2.30.0

1 0

[PATCH openEuler-1.0-LTS] blk-mq: complete req in softirq context in case of single queue
by Yang Yingliang 26 Oct '21

26 Oct '21

From: Ming Lei <ming.lei(a)redhat.com> mainline inclusion from mainline-4.20-rc1 commit 36e765392e48e0322222347c4d21078c0b94758c category: bugfix bugzilla: 175585 CVE: NA ------------------------------------------------- Lot of controllers may have only one irq vector for completing IO request. And usually affinity of the only irq vector is all possible CPUs, however, on most of ARCH, there may be only one specific CPU for handling this interrupt. So if all IOs are completed in hardirq context, it is inevitable to degrade IO performance because of increased irq latency. This patch tries to address this issue by allowing to complete request in softirq context, like the legacy IO path. IOPS is observed as ~13%+ in the following randread test on raid0 over virtio-scsi. mdadm --create --verbose /dev/md0 --level=0 --chunk=1024 --raid-devices=8 /dev/sdb /dev/sdc /dev/sdd /dev/sde /dev/sdf /dev/sdg /dev/sdh /dev/sdi fio --time_based --name=benchmark --runtime=30 --filename=/dev/md0 --nrfiles=1 --ioengine=libaio --iodepth=32 --direct=1 --invalidate=1 --verify=0 --verify_fatal=0 --numjobs=32 --rw=randread --blocksize=4k Cc: Dongli Zhang <dongli.zhang(a)oracle.com> Cc: Zach Marano <zmarano(a)google.com> Cc: Christoph Hellwig <hch(a)lst.de> Cc: Bart Van Assche <bvanassche(a)acm.org> Cc: Jianchao Wang <jianchao.w.wang(a)oracle.com> Signed-off-by: Ming Lei <ming.lei(a)redhat.com> Signed-off-by: Jens Axboe <axboe(a)kernel.dk> Signed-off-by: Lihong Kou <koulihong(a)huawei.com> Reviewed-by: Hou Tao <houtao1(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- block/blk-mq.c | 14 ++++++++++++++ block/blk-softirq.c | 5 ++--- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/block/blk-mq.c b/block/blk-mq.c index 7106c94ea58fe..55c81dcafbdc2 100644 --- a/block/blk-mq.c +++ b/block/blk-mq.c @@ -600,6 +600,20 @@ void blk_mq_force_complete_rq(struct request *rq) if (rq->internal_tag != -1) blk_mq_sched_completed_request(rq); + /* + * Most of single queue controllers, there is only one irq vector + * for handling IO completion, and the only irq's affinity is set + * as all possible CPUs. On most of ARCHs, this affinity means the + * irq is handled on one specific CPU. + * + * So complete IO reqeust in softirq context in case of single queue + * for not degrading IO performance by irqsoff latency. + */ + if (rq->q->nr_hw_queues == 1) { + __blk_complete_request(rq); + return; + } + if (!test_bit(QUEUE_FLAG_SAME_COMP, &rq->q->queue_flags)) { rq->q->softirq_done_fn(rq); return; diff --git a/block/blk-softirq.c b/block/blk-softirq.c index 15c1f5e12eb89..e47a2f751884d 100644 --- a/block/blk-softirq.c +++ b/block/blk-softirq.c @@ -97,8 +97,8 @@ static int blk_softirq_cpu_dead(unsigned int cpu) void __blk_complete_request(struct request *req) { - int ccpu, cpu; struct request_queue *q = req->q; + int cpu, ccpu = q->mq_ops ? req->mq_ctx->cpu : req->cpu; unsigned long flags; bool shared = false; @@ -110,8 +110,7 @@ void __blk_complete_request(struct request *req) /* * Select completion CPU */ - if (req->cpu != -1) { - ccpu = req->cpu; + if (test_bit(QUEUE_FLAG_SAME_COMP, &q->queue_flags) && ccpu != -1) { if (!test_bit(QUEUE_FLAG_SAME_FORCE, &q->queue_flags)) shared = cpus_share_cache(cpu, ccpu); } else -- 2.25.1

1 0

[PATCH kernel-4.19] blk-mq: complete req in softirq context in case of single queue
by Yang Yingliang 26 Oct '21

26 Oct '21

From: Ming Lei <ming.lei(a)redhat.com> mainline inclusion from mainline-4.20-rc1 commit 36e765392e48e0322222347c4d21078c0b94758c category: bugfix bugzilla: 175585 CVE: NA ------------------------------------------------- Lot of controllers may have only one irq vector for completing IO request. And usually affinity of the only irq vector is all possible CPUs, however, on most of ARCH, there may be only one specific CPU for handling this interrupt. So if all IOs are completed in hardirq context, it is inevitable to degrade IO performance because of increased irq latency. This patch tries to address this issue by allowing to complete request in softirq context, like the legacy IO path. IOPS is observed as ~13%+ in the following randread test on raid0 over virtio-scsi. mdadm --create --verbose /dev/md0 --level=0 --chunk=1024 --raid-devices=8 /dev/sdb /dev/sdc /dev/sdd /dev/sde /dev/sdf /dev/sdg /dev/sdh /dev/sdi fio --time_based --name=benchmark --runtime=30 --filename=/dev/md0 --nrfiles=1 --ioengine=libaio --iodepth=32 --direct=1 --invalidate=1 --verify=0 --verify_fatal=0 --numjobs=32 --rw=randread --blocksize=4k Cc: Dongli Zhang <dongli.zhang(a)oracle.com> Cc: Zach Marano <zmarano(a)google.com> Cc: Christoph Hellwig <hch(a)lst.de> Cc: Bart Van Assche <bvanassche(a)acm.org> Cc: Jianchao Wang <jianchao.w.wang(a)oracle.com> Signed-off-by: Ming Lei <ming.lei(a)redhat.com> Signed-off-by: Jens Axboe <axboe(a)kernel.dk> Signed-off-by: Lihong Kou <koulihong(a)huawei.com> Reviewed-by: Tao Hou <houtao1(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- block/blk-mq.c | 14 ++++++++++++++ block/blk-softirq.c | 5 ++--- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/block/blk-mq.c b/block/blk-mq.c index be1e2ad4631aa..52a04f6ffeea2 100644 --- a/block/blk-mq.c +++ b/block/blk-mq.c @@ -603,6 +603,20 @@ void blk_mq_force_complete_rq(struct request *rq) if (rq->internal_tag != -1) blk_mq_sched_completed_request(rq); + /* + * Most of single queue controllers, there is only one irq vector + * for handling IO completion, and the only irq's affinity is set + * as all possible CPUs. On most of ARCHs, this affinity means the + * irq is handled on one specific CPU. + * + * So complete IO reqeust in softirq context in case of single queue + * for not degrading IO performance by irqsoff latency. + */ + if (rq->q->nr_hw_queues == 1) { + __blk_complete_request(rq); + return; + } + if (!test_bit(QUEUE_FLAG_SAME_COMP, &rq->q->queue_flags)) { rq->q->softirq_done_fn(rq); return; diff --git a/block/blk-softirq.c b/block/blk-softirq.c index 15c1f5e12eb89..e47a2f751884d 100644 --- a/block/blk-softirq.c +++ b/block/blk-softirq.c @@ -97,8 +97,8 @@ static int blk_softirq_cpu_dead(unsigned int cpu) void __blk_complete_request(struct request *req) { - int ccpu, cpu; struct request_queue *q = req->q; + int cpu, ccpu = q->mq_ops ? req->mq_ctx->cpu : req->cpu; unsigned long flags; bool shared = false; @@ -110,8 +110,7 @@ void __blk_complete_request(struct request *req) /* * Select completion CPU */ - if (req->cpu != -1) { - ccpu = req->cpu; + if (test_bit(QUEUE_FLAG_SAME_COMP, &q->queue_flags) && ccpu != -1) { if (!test_bit(QUEUE_FLAG_SAME_FORCE, &q->queue_flags)) shared = cpus_share_cache(cpu, ccpu); } else -- 2.25.1

1 0

[PATCH kernel-4.19 1/8] ovl: simplify setting of origin for index lookup
by Yang Yingliang 26 Oct '21

26 Oct '21

From: Vivek Goyal <vgoyal(a)redhat.com> mainline inclusion from mainline-v5.8-rc1 commit 59fb20138a9b5249a4176d5bbc5c670a97343061 category: bugfix bugzilla: NA CVE: NA ------------------------------------------------- overlayfs can keep index of copied up files and directories and it seems to serve two primary puroposes. For regular files, it avoids breaking lower hardlinks over copy up. For directories it seems to be used for various error checks. During ovl_lookup(), we lookup for index using lower dentry in many a cases. That lower dentry is called "origin" and following is a summary of current logic. If there is no upperdentry, always lookup for index using lower dentry. For regular files it helps avoiding breaking hard links over copyup and for directories it seems to be just error checks. If there is an upperdentry, then there are 3 possible cases. - For directories, lower dentry is found using two ways. One is regular path based lookup in lower layers and second is using ORIGIN xattr on upper dentry. First verify that path based lookup lower dentry matches the one pointed by upper ORIGIN xattr. If yes, use this verified origin for index lookup. - For regular files (non-metacopy), there is no path based lookup in lower layers as lookup stops once we find upper dentry. So there is no origin verification. If there is ORIGIN xattr present on upper, use that to lookup index otherwise don't. - For regular metacopy files, again lower dentry is found using path based lookup as well as ORIGIN xattr on upper. Path based lookup is continued in this case to find lower data dentry for metacopy upper. So like directories we only use verified origin. If ORIGIN xattr is not present (Either because lower did not support file handles or because this is hardlink copied up with index=off), then don't use path lookup based lower dentry as origin. This is same as regular non-metacopy file case. Suggested-by: Amir Goldstein <amir73il(a)gmail.com> Signed-off-by: Vivek Goyal <vgoyal(a)redhat.com> Reviewed-by: Amir Goldstein <amir73il(a)gmail.com> Signed-off-by: Miklos Szeredi <mszeredi(a)redhat.com> Signed-off-by: Zheng Liang <zhengliang6(a)huawei.com> Reviewed-by: Zhang Yi <yi.zhang(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- fs/overlayfs/namei.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/fs/overlayfs/namei.c b/fs/overlayfs/namei.c index 145bfdde53feb..968ad757c578e 100644 --- a/fs/overlayfs/namei.c +++ b/fs/overlayfs/namei.c @@ -1014,25 +1014,30 @@ struct dentry *ovl_lookup(struct inode *dir, struct dentry *dentry, } stack = origin_path; ctr = 1; + origin = origin_path->dentry; origin_path = NULL; } /* - * Lookup index by lower inode and verify it matches upper inode. - * We only trust dir index if we verified that lower dir matches - * origin, otherwise dir index entries may be inconsistent and we - * ignore them. + * Always lookup index if there is no-upperdentry. * - * For non-dir upper metacopy dentry, we already set "origin" if we - * verified that lower matched upper origin. If upper origin was - * not present (because lower layer did not support fh encode/decode), - * or indexing is not enabled, do not set "origin" and skip looking up - * index. This case should be handled in same way as a non-dir upper - * without ORIGIN is handled. + * For the case of upperdentry, we have set origin by now if it + * needed to be set. There are basically three cases. + * + * For directories, lookup index by lower inode and verify it matches + * upper inode. We only trust dir index if we verified that lower dir + * matches origin, otherwise dir index entries may be inconsistent + * and we ignore them. + * + * For regular upper, we already set origin if upper had ORIGIN + * xattr. There is no verification though as there is no path + * based dentry lookup in lower in this case. + * + * For metacopy upper, we set a verified origin already if index + * is enabled and if upper had an ORIGIN xattr. * - * Always lookup index of non-dir non-metacopy and non-upper. */ - if (ctr && (!upperdentry || (!d.is_dir && !metacopy))) + if (!upperdentry && ctr) origin = stack[0].dentry; if (origin && ovl_indexdir(dentry->d_sb) && -- 2.25.1

1 7

Re: [PATCH openEuler-21.03] USB: f_ncm: ncm_bitrate (speed) is unsigned
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:03, xjx00 写道: > From: Maciej Żenczykowski <maze(a)google.com> > > stable inclusion > from stable-v5.10.44 > commit 0f5a20b1fd9da3ac9f7c6edcad522712ca694d5c > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=358 > CVE: NA > > ------------------------------------------------- > > commit 3370139745853f7826895293e8ac3aec1430508e upstream. > > [ 190.544755] configfs-gadget gadget: notify speed -44967296 > > This is because 4250000000 - 2**32 is -44967296. > > Fixes: 9f6ce4240a2b ("usb: gadget: f_ncm.c added") > Cc: Brooke Basile <brookebasile(a)gmail.com> > Cc: Bryan O'Donoghue <bryan.odonoghue(a)linaro.org> > Cc: Felipe Balbi <balbi(a)kernel.org> > Cc: Lorenzo Colitti <lorenzo(a)google.com> > Cc: Yauheni Kaliuta <yauheni.kaliuta(a)nokia.com> > Cc: Linux USB Mailing List <linux-usb(a)vger.kernel.org> > Acked-By: Lorenzo Colitti <lorenzo(a)google.com> > Signed-off-by: Maciej Żenczykowski <maze(a)google.com> > Cc: stable <stable(a)vger.kernel.org> > Link: https://lore.kernel.org/r/20210608005344.3762668-1-zenczykowski@gmail.com > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: xjx00 <xjxyklwx(a)126.com> > --- > drivers/usb/gadget/function/f_ncm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/usb/gadget/function/f_ncm.c b/drivers/usb/gadget/function/f_ncm.c > index 019bea8e09cc..0d23c6c11a13 100644 > --- a/drivers/usb/gadget/function/f_ncm.c > +++ b/drivers/usb/gadget/function/f_ncm.c > @@ -583,7 +583,7 @@ static void ncm_do_notify(struct f_ncm *ncm) > data[0] = cpu_to_le32(ncm_bitrate(cdev->gadget)); > data[1] = data[0]; > > - DBG(cdev, "notify speed %d\n", ncm_bitrate(cdev->gadget)); > + DBG(cdev, "notify speed %u\n", ncm_bitrate(cdev->gadget)); > ncm->notify_state = NCM_NOTIFY_CONNECT; > break; > }

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Re: [PATCH openEuler-21.03] ALSA: firewire-lib: fix the context to call snd_pcm_stop_xrun()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 21:17, lihao 写道: > From: Takashi Sakamoto <o-takashi(a)sakamocchi.jp> > > stable inclusion > from stable-v5.10.44 > commit 98f842951f8aa222e8a8453e6dbce6c056e9984f > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=430 > CVE: NA > > ------------------------------------------------- > > commit 9981b20a5e3694f4625ab5a1ddc98ce7503f6d12 upstream. > > In the workqueue to queue wake-up event, isochronous context is not > processed, thus it's useless to check context for the workqueue to switch > status of runtime for PCM substream to XRUN. On the other hand, in > software IRQ context of 1394 OHCI, it's needed. > > This commit fixes the bug introduced when tasklet was replaced with > workqueue. > > Cc: <stable(a)vger.kernel.org> > Fixes: 2b3d2987d800 ("ALSA: firewire: Replace tasklet with work") > Signed-off-by: Takashi Sakamoto <o-takashi(a)sakamocchi.jp> > Link: https://lore.kernel.org/r/20210605091054.68866-1-o-takashi@sakamocchi.jp > Signed-off-by: Takashi Iwai <tiwai(a)suse.de> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: lihao <380525608(a)qq.com> > --- > sound/firewire/amdtp-stream.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/sound/firewire/amdtp-stream.c b/sound/firewire/amdtp-stream.c > index e0faa6601966..5805c5de39fb 100644 > --- a/sound/firewire/amdtp-stream.c > +++ b/sound/firewire/amdtp-stream.c > @@ -804,7 +804,7 @@ static void generate_pkt_descs(struct amdtp_stream *s, struct pkt_desc *descs, > static inline void cancel_stream(struct amdtp_stream *s) > { > s->packet_index = -1; > - if (current_work() == &s->period_work) > + if (in_interrupt()) > amdtp_stream_pcm_abort(s); > WRITE_ONCE(s->pcm_buffer_pointer, SNDRV_PCM_POS_XRUN); > }

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Re: [PATCH openEuler-21.03] drm/msm/a6xx: avoid shadow NULL reference in failure path
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:02, lzb 写道: > From: Jonathan Marek <jonathan(a)marek.ca> > > stable inclusion > from stable-v5.10.44 > commit fd681a8c7ac8f649a0718f6cbf2fe75d0587c9a2 > bugzilla: > CVE: NA > > https://bugzilla.openeuler.org/show_bug.cgi?id=472-------------------------… > > commit ce86c239e4d218ae6040bec18e6d19a58edb8b7c upstream. > > If a6xx_hw_init() fails before creating the shadow_bo, the a6xx_pm_suspend > code referencing it will crash. Change the condition to one that avoids > this problem (note: creation of shadow_bo is behind this same condition) > > Fixes: e8b0b994c3a5 ("drm/msm/a6xx: Clear shadow on suspend") > Signed-off-by: Jonathan Marek <jonathan(a)marek.ca> > Reviewed-by: Akhil P Oommen <akhilpo(a)codeaurora.org> > Link: https://lore.kernel.org/r/20210513171431.18632-6-jonathan@marek.ca > Signed-off-by: Rob Clark <robdclark(a)chromium.org> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: lzb <zbliancs(a)qq.com> > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index 722c2fe3bfd5..7061ba457c5b 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -1055,7 +1055,7 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu) > if (ret) > return ret; > > - if (adreno_gpu->base.hw_apriv || a6xx_gpu->has_whereami) > + if (a6xx_gpu->shadow_bo) > for (i = 0; i < gpu->nr_rings; i++) > a6xx_gpu->shadow[i] = 0; >

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Re: [PATCH openEuler-21.03] sched/fair: Make sure to update tg contrib for blocked load
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:09, wjy 写道: > From: Vincent Guittot <vincent.guittot(a)linaro.org> > > stable inclusion > from stable-v5.10.44 > commit 32e22db8b25ea165bd9e446c7f92b089c8568eaf > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=379 > CVE: NA > > ------------------------------------------------- > > commit 02da26ad5ed6ea8680e5d01f20661439611ed776 upstream. > > During the update of fair blocked load (__update_blocked_fair()), we > update the contribution of the cfs in tg->load_avg if cfs_rq's pelt > has decayed. Nevertheless, the pelt values of a cfs_rq could have > been recently updated while propagating the change of a child. In this > case, cfs_rq's pelt will not decayed because it has already been > updated and we don't update tg->load_avg. > > __update_blocked_fair > ... > for_each_leaf_cfs_rq_safe: child cfs_rq > update cfs_rq_load_avg() for child cfs_rq > ... > update_load_avg(cfs_rq_of(se), se, 0) > ... > update cfs_rq_load_avg() for parent cfs_rq > -propagation of child's load makes parent cfs_rq->load_sum > becoming null > -UPDATE_TG is not set so it doesn't update parent > cfs_rq->tg_load_avg_contrib > .. > for_each_leaf_cfs_rq_safe: parent cfs_rq > update cfs_rq_load_avg() for parent cfs_rq > - nothing to do because parent cfs_rq has already been updated > recently so cfs_rq->tg_load_avg_contrib is not updated > ... > parent cfs_rq is decayed > list_del_leaf_cfs_rq parent cfs_rq > - but it still contibutes to tg->load_avg > > we must set UPDATE_TG flags when propagting pending load to the parent > > Fixes: 039ae8bcf7a5 ("sched/fair: Fix O(nr_cgroups) in the load balancing path") > Reported-by: Odin Ugedal <odin(a)uged.al> > Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> > Signed-off-by: Peter Zijlstra (Intel) <peterz(a)infradead.org> > Reviewed-by: Odin Ugedal <odin(a)uged.al> > Link: https://lkml.kernel.org/r/20210527122916.27683-3-vincent.guittot@linaro.org > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: wjy <464310675(a)qq.com> > --- > kernel/sched/fair.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c > index 1ad0e52487f6..43497d88a330 100644 > --- a/kernel/sched/fair.c > +++ b/kernel/sched/fair.c > @@ -7961,7 +7961,7 @@ static bool __update_blocked_fair(struct rq *rq, bool *done) > /* Propagate pending load changes to the parent, if any: */ > se = cfs_rq->tg->se[cpu]; > if (se && !skip_blocked_update(se)) > - update_load_avg(cfs_rq_of(se), se, 0); > + update_load_avg(cfs_rq_of(se), se, UPDATE_TG); > > /* > * There can be a lot of idle CPU cgroups. Don't let fully

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Re: [PATCH openEuler-21.03] NFSv4: Fix second deadlock in nfs4_evict_inode()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:13, wyp 写道: > From: Trond Myklebust <trond.myklebust(a)hammerspace.com> > > stable inclusion > from stable-v5.10.44 > commit d973bd0d6e7f9b4ea976cc619e8d6e0d235b9056 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=462 > CVE: NA > > ------------------------------------------------- > > commit c3aba897c6e67fa464ec02b1f17911577d619713 upstream. > > If the inode is being evicted but has to return a layout first, then > that too can cause a deadlock in the corner case where the server > reboots. > > Signed-off-by: Trond Myklebust <trond.myklebust(a)hammerspace.com> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: Hang <haihangyiyuan(a)163.com> > Reviewed-by: Jian Cheng <cj.chengjian(a)huawei.com> > Signed-off-by: Wang ShaoBo <bobo.shaobowang(a)huawei.com> > --- > fs/nfs/nfs4proc.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c > index c92d6ff0fcea..eedcbe6832fb 100644 > --- a/fs/nfs/nfs4proc.c > +++ b/fs/nfs/nfs4proc.c > @@ -9619,15 +9619,20 @@ int nfs4_proc_layoutreturn(struct nfs4_layoutreturn *lrp, bool sync) > &task_setup_data.rpc_client, &msg); > > dprintk("--> %s\n", __func__); > + lrp->inode = nfs_igrab_and_active(lrp->args.inode); > if (!sync) { > - lrp->inode = nfs_igrab_and_active(lrp->args.inode); > if (!lrp->inode) { > nfs4_layoutreturn_release(lrp); > return -EAGAIN; > } > task_setup_data.flags |= RPC_TASK_ASYNC; > } > - nfs4_init_sequence(&lrp->args.seq_args, &lrp->res.seq_res, 1, 0); > + if (!lrp->inode) > + nfs4_init_sequence(&lrp->args.seq_args, &lrp->res.seq_res, 1, > + 1); > + else > + nfs4_init_sequence(&lrp->args.seq_args, &lrp->res.seq_res, 1, > + 0); > task = rpc_run_task(&task_setup_data); > if (IS_ERR(task)) > return PTR_ERR(task);

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Re: [PATCH openEuler-21.03] net: mdiobus: get rid of a BUG_ON()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:15, gpj 写道: > From: Dan Carpenter <dan.carpenter(a)oracle.com> > > stable inclusion > from stable-v5.10.44 > commit be23c4af3d8a1b986fe9b43b8966797653a76ca4 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=341 > CVE: NA > > -------------------------------- > > [ Upstream commit 1dde47a66d4fb181830d6fa000e5ea86907b639e ] > > We spotted a bug recently during a review where a driver was > unregistering a bus that wasn't registered, which would trigger this > BUG_ON(). Let's handle that situation more gracefully, and just print > a warning and return. > > Reported-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> > Reviewed-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Reviewed-by: Andrew Lunn <andrew(a)lunn.ch> > Signed-off-by: David S. Miller <davem(a)davemloft.net> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: wangqing <wangqing(a)uniontech.com> > Reviewed-by: Xie XiuQi <xiexiuqi(a)huawei.com> > Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> > --- > drivers/net/phy/mdio_bus.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c > index 757e950fb745..b848439fa837 100644 > --- a/drivers/net/phy/mdio_bus.c > +++ b/drivers/net/phy/mdio_bus.c > @@ -608,7 +608,8 @@ void mdiobus_unregister(struct mii_bus *bus) > struct mdio_device *mdiodev; > int i; > > - BUG_ON(bus->state != MDIOBUS_REGISTERED); > + if (WARN_ON_ONCE(bus->state != MDIOBUS_REGISTERED)) > + return; > bus->state = MDIOBUS_UNREGISTERED; > > for (i = 0; i < PHY_MAX_ADDR; i++) {

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Re: [PATCH openEuler-21.03] net: mdiobus: get rid of a BUG_ON()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:18, dqh 写道: > From: Dan Carpenter <dan.carpenter(a)oracle.com> > > stable inclusion > from stable-v5.10.44 > commit be23c4af3d8a1b986fe9b43b8966797653a76ca4 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=341 > CVE: NA > > -------------------------------- > > [ Upstream commit 1dde47a66d4fb181830d6fa000e5ea86907b639e ] > > We spotted a bug recently during a review where a driver was > unregistering a bus that wasn't registered, which would trigger this > BUG_ON(). Let's handle that situation more gracefully, and just print > a warning and return. > > Reported-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> > Reviewed-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Reviewed-by: Andrew Lunn <andrew(a)lunn.ch> > Signed-off-by: David S. Miller <davem(a)davemloft.net> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: wangqing <wangqing(a)uniontech.com> > Reviewed-by: Xie XiuQi <xiexiuqi(a)huawei.com> > Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> > --- > drivers/net/phy/mdio_bus.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c > index 757e950fb745..b848439fa837 100644 > --- a/drivers/net/phy/mdio_bus.c > +++ b/drivers/net/phy/mdio_bus.c > @@ -608,7 +608,8 @@ void mdiobus_unregister(struct mii_bus *bus) > struct mdio_device *mdiodev; > int i; > > - BUG_ON(bus->state != MDIOBUS_REGISTERED); > + if (WARN_ON_ONCE(bus->state != MDIOBUS_REGISTERED)) > + return; > bus->state = MDIOBUS_UNREGISTERED; > > for (i = 0; i < PHY_MAX_ADDR; i++) {

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Re: [PATCH openEuler-21.03] spi: Cleanup on failure of initial setup
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:18, dqh 写道: > From: Lukas Wunner <lukas(a)wunner.de> > > stable inclusion > from stable-v5.10.44 > commit fa05ba61967ad051f5f2b7c4f39d6c56719c9900 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=470 > CVE: NA > > ------------------------------------------------- > > [ Upstream commit 2ec6f20b33eb4f62ab90bdcd620436c883ec3af6 ] > > Commit c7299fea6769 ("spi: Fix spi device unregister flow") changed the > SPI core's behavior if the ->setup() hook returns an error upon adding > an spi_device: Before, the ->cleanup() hook was invoked to free any > allocations that were made by ->setup(). With the commit, that's no > longer the case, so the ->setup() hook is expected to free the > allocations itself. > > I've identified 5 drivers which depend on the old behavior and am fixing > them up hereinafter: spi-bitbang.c spi-fsl-spi.c spi-omap-uwire.c > spi-omap2-mcspi.c spi-pxa2xx.c > > Importantly, ->setup() is not only invoked on spi_device *addition*: > It may subsequently be called to *change* SPI parameters. If changing > these SPI parameters fails, freeing memory allocations would be wrong. > That should only be done if the spi_device is finally destroyed. > I am therefore using a bool "initial_setup" in 4 of the affected drivers > to differentiate between the invocation on *adding* the spi_device and > any subsequent invocations: spi-bitbang.c spi-fsl-spi.c spi-omap-uwire.c > spi-omap2-mcspi.c > > In spi-pxa2xx.c, it seems the ->setup() hook can only fail on spi_device > addition, not any subsequent calls. It therefore doesn't need the bool. > > It's worth noting that 5 other drivers already perform a cleanup if the > ->setup() hook fails. Before c7299fea6769, they caused a double-free > if ->setup() failed on spi_device addition. Since the commit, they're > fine. These drivers are: spi-mpc512x-psc.c spi-pl022.c spi-s3c64xx.c > spi-st-ssc4.c spi-tegra114.c > > (spi-pxa2xx.c also already performs a cleanup, but only in one of > several error paths.) > > Fixes: c7299fea6769 ("spi: Fix spi device unregister flow") > Signed-off-by: Lukas Wunner <lukas(a)wunner.de> > Cc: Saravana Kannan <saravanak(a)google.com> > Acked-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> # pxa2xx > Link: https://lore.kernel.org/r/f76a0599469f265b69c371538794101fa37b5536.16221493… > Signed-off-by: Mark Brown <broonie(a)kernel.org> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: dqh <1486653795(a)qq.com> > --- > drivers/spi/spi-bitbang.c | 18 ++++++++++++++---- > drivers/spi/spi-fsl-spi.c | 4 ++++ > drivers/spi/spi-omap-uwire.c | 9 ++++++++- > drivers/spi/spi-omap2-mcspi.c | 33 ++++++++++++++++++++------------- > drivers/spi/spi-pxa2xx.c | 9 ++++++++- > 5 files changed, 54 insertions(+), 19 deletions(-) > > diff --git a/drivers/spi/spi-bitbang.c b/drivers/spi/spi-bitbang.c > index 1a7352abd878..3d8948a17095 100644 > --- a/drivers/spi/spi-bitbang.c > +++ b/drivers/spi/spi-bitbang.c > @@ -181,6 +181,8 @@ int spi_bitbang_setup(struct spi_device *spi) > { > struct spi_bitbang_cs *cs = spi->controller_state; > struct spi_bitbang *bitbang; > + bool initial_setup = false; > + int retval; > > bitbang = spi_master_get_devdata(spi->master); > > @@ -189,22 +191,30 @@ int spi_bitbang_setup(struct spi_device *spi) > if (!cs) > return -ENOMEM; > spi->controller_state = cs; > + initial_setup = true; > } > > /* per-word shift register access, in hardware or bitbanging */ > cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)]; > - if (!cs->txrx_word) > - return -EINVAL; > + if (!cs->txrx_word) { > + retval = -EINVAL; > + goto err_free; > + } > > if (bitbang->setup_transfer) { > - int retval = bitbang->setup_transfer(spi, NULL); > + retval = bitbang->setup_transfer(spi, NULL); > if (retval < 0) > - return retval; > + goto err_free; > } > > dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs); > > return 0; > + > +err_free: > + if (initial_setup) > + kfree(cs); > + return retval; > } > EXPORT_SYMBOL_GPL(spi_bitbang_setup); > > diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c > index d0e5aa18b7ba..bdf94cc7be1a 100644 > --- a/drivers/spi/spi-fsl-spi.c > +++ b/drivers/spi/spi-fsl-spi.c > @@ -440,6 +440,7 @@ static int fsl_spi_setup(struct spi_device *spi) > { > struct mpc8xxx_spi *mpc8xxx_spi; > struct fsl_spi_reg __iomem *reg_base; > + bool initial_setup = false; > int retval; > u32 hw_mode; > struct spi_mpc8xxx_cs *cs = spi_get_ctldata(spi); > @@ -452,6 +453,7 @@ static int fsl_spi_setup(struct spi_device *spi) > if (!cs) > return -ENOMEM; > spi_set_ctldata(spi, cs); > + initial_setup = true; > } > mpc8xxx_spi = spi_master_get_devdata(spi->master); > > @@ -475,6 +477,8 @@ static int fsl_spi_setup(struct spi_device *spi) > retval = fsl_spi_setup_transfer(spi, NULL); > if (retval < 0) { > cs->hw_mode = hw_mode; /* Restore settings */ > + if (initial_setup) > + kfree(cs); > return retval; > } > > diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c > index 71402f71ddd8..df28c6664aba 100644 > --- a/drivers/spi/spi-omap-uwire.c > +++ b/drivers/spi/spi-omap-uwire.c > @@ -424,15 +424,22 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t) > static int uwire_setup(struct spi_device *spi) > { > struct uwire_state *ust = spi->controller_state; > + bool initial_setup = false; > + int status; > > if (ust == NULL) { > ust = kzalloc(sizeof(*ust), GFP_KERNEL); > if (ust == NULL) > return -ENOMEM; > spi->controller_state = ust; > + initial_setup = true; > } > > - return uwire_setup_transfer(spi, NULL); > + status = uwire_setup_transfer(spi, NULL); > + if (status && initial_setup) > + kfree(ust); > + > + return status; > } > > static void uwire_cleanup(struct spi_device *spi) > diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c > index d4c9510af393..3596bbe4b776 100644 > --- a/drivers/spi/spi-omap2-mcspi.c > +++ b/drivers/spi/spi-omap2-mcspi.c > @@ -1032,8 +1032,22 @@ static void omap2_mcspi_release_dma(struct spi_master *master) > } > } > > +static void omap2_mcspi_cleanup(struct spi_device *spi) > +{ > + struct omap2_mcspi_cs *cs; > + > + if (spi->controller_state) { > + /* Unlink controller state from context save list */ > + cs = spi->controller_state; > + list_del(&cs->node); > + > + kfree(cs); > + } > +} > + > static int omap2_mcspi_setup(struct spi_device *spi) > { > + bool initial_setup = false; > int ret; > struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master); > struct omap2_mcspi_regs *ctx = &mcspi->ctx; > @@ -1051,35 +1065,28 @@ static int omap2_mcspi_setup(struct spi_device *spi) > spi->controller_state = cs; > /* Link this to context save list */ > list_add_tail(&cs->node, &ctx->cs); > + initial_setup = true; > } > > ret = pm_runtime_get_sync(mcspi->dev); > if (ret < 0) { > pm_runtime_put_noidle(mcspi->dev); > + if (initial_setup) > + omap2_mcspi_cleanup(spi); > > return ret; > } > > ret = omap2_mcspi_setup_transfer(spi, NULL); > + if (ret && initial_setup) > + omap2_mcspi_cleanup(spi); > + > pm_runtime_mark_last_busy(mcspi->dev); > pm_runtime_put_autosuspend(mcspi->dev); > > return ret; > } > > -static void omap2_mcspi_cleanup(struct spi_device *spi) > -{ > - struct omap2_mcspi_cs *cs; > - > - if (spi->controller_state) { > - /* Unlink controller state from context save list */ > - cs = spi->controller_state; > - list_del(&cs->node); > - > - kfree(cs); > - } > -} > - > static irqreturn_t omap2_mcspi_irq_handler(int irq, void *data) > { > struct omap2_mcspi *mcspi = data; > diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c > index d6b534d38e5d..56a62095ec8c 100644 > --- a/drivers/spi/spi-pxa2xx.c > +++ b/drivers/spi/spi-pxa2xx.c > @@ -1254,6 +1254,8 @@ static int setup_cs(struct spi_device *spi, struct chip_data *chip, > chip->gpio_cs_inverted = spi->mode & SPI_CS_HIGH; > > err = gpiod_direction_output(gpiod, !chip->gpio_cs_inverted); > + if (err) > + gpiod_put(chip->gpiod_cs); > } > > return err; > @@ -1267,6 +1269,7 @@ static int setup(struct spi_device *spi) > struct driver_data *drv_data = > spi_controller_get_devdata(spi->controller); > uint tx_thres, tx_hi_thres, rx_thres; > + int err; > > switch (drv_data->ssp_type) { > case QUARK_X1000_SSP: > @@ -1413,7 +1416,11 @@ static int setup(struct spi_device *spi) > if (drv_data->ssp_type == CE4100_SSP) > return 0; > > - return setup_cs(spi, chip, chip_info); > + err = setup_cs(spi, chip, chip_info); > + if (err) > + kfree(chip); > + > + return err; > } > > static void cleanup(struct spi_device *spi)

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Re: [PATCH openEuler-21.03] usb: chipidea: udc: assign interrupt number to USB gadget structure
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:19, chensiyan96 写道: > From: Li Jun <jun.li(a)nxp.com> > > stable inclusion > from stable-v5.10.44 > commit 2e2145ccfbcb0dd38d8423681d22b595ca735846 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=376 > CVE: NA > > ------------------------------------------------- > > [ Upstream commit 9e3927f6373da54cb17e17f4bd700907e1123d2f ] > > Chipidea also need sync interrupt before unbind the udc while > gadget remove driver, otherwise setup irq handling may happen > while unbind, see below dump generated from android function > switch stress test: > > [ 4703.503056] android_work: sent uevent USB_STATE=CONNECTED > [ 4703.514642] android_work: sent uevent USB_STATE=DISCONNECTED > [ 4703.651339] android_work: sent uevent USB_STATE=CONNECTED > [ 4703.661806] init: Control message: Processed ctl.stop for 'adbd' from pid: 561 (system_server) > [ 4703.673469] init: processing action (init.svc.adbd=stopped) from (/system/etc/init/hw/init.usb.configfs.rc:14) > [ 4703.676451] Unable to handle kernel read from unreadable memory at virtual address 0000000000000090 > [ 4703.676454] Mem abort info: > [ 4703.676458] ESR = 0x96000004 > [ 4703.676461] EC = 0x25: DABT (current EL), IL = 32 bits > [ 4703.676464] SET = 0, FnV = 0 > [ 4703.676466] EA = 0, S1PTW = 0 > [ 4703.676468] Data abort info: > [ 4703.676471] ISV = 0, ISS = 0x00000004 > [ 4703.676473] CM = 0, WnR = 0 > [ 4703.676478] user pgtable: 4k pages, 48-bit VAs, pgdp=000000004a867000 > [ 4703.676481] [0000000000000090] pgd=0000000000000000, p4d=0000000000000000 > [ 4703.676503] Internal error: Oops: 96000004 [#1] PREEMPT SMP > [ 4703.758297] Modules linked in: synaptics_dsx_i2c moal(O) mlan(O) > [ 4703.764327] CPU: 0 PID: 235 Comm: lmkd Tainted: G W O 5.10.9-00001-g3f5fd8487c38-dirty #63 > [ 4703.773720] Hardware name: NXP i.MX8MNano EVK board (DT) > [ 4703.779033] pstate: 60400085 (nZCv daIf +PAN -UAO -TCO BTYPE=--) > [ 4703.785046] pc : _raw_write_unlock_bh+0xc0/0x2c8 > [ 4703.789667] lr : android_setup+0x4c/0x168 > [ 4703.793676] sp : ffff80001256bd80 > [ 4703.796989] x29: ffff80001256bd80 x28: 00000000000000a8 > [ 4703.802304] x27: ffff800012470000 x26: ffff80006d923000 > [ 4703.807616] x25: ffff800012471000 x24: ffff00000b091140 > [ 4703.812929] x23: ffff0000077dbd38 x22: ffff0000077da490 > [ 4703.818242] x21: ffff80001256be30 x20: 0000000000000000 > [ 4703.823554] x19: 0000000000000080 x18: ffff800012561048 > [ 4703.828867] x17: 0000000000000000 x16: 0000000000000039 > [ 4703.834180] x15: ffff8000106ad258 x14: ffff80001194c277 > [ 4703.839493] x13: 0000000000003934 x12: 0000000000000000 > [ 4703.844805] x11: 0000000000000000 x10: 0000000000000001 > [ 4703.850117] x9 : 0000000000000000 x8 : 0000000000000090 > [ 4703.855429] x7 : 6f72646e61203a70 x6 : ffff8000124f2450 > [ 4703.860742] x5 : ffffffffffffffff x4 : 0000000000000009 > [ 4703.866054] x3 : ffff8000108a290c x2 : ffff00007fb3a9c8 > [ 4703.871367] x1 : 0000000000000000 x0 : 0000000000000090 > [ 4703.876681] Call trace: > [ 4703.879129] _raw_write_unlock_bh+0xc0/0x2c8 > [ 4703.883397] android_setup+0x4c/0x168 > [ 4703.887059] udc_irq+0x824/0xa9c > [ 4703.890287] ci_irq+0x124/0x148 > [ 4703.893429] __handle_irq_event_percpu+0x84/0x268 > [ 4703.898131] handle_irq_event+0x64/0x14c > [ 4703.902054] handle_fasteoi_irq+0x110/0x210 > [ 4703.906236] __handle_domain_irq+0x8c/0xd4 > [ 4703.910332] gic_handle_irq+0x6c/0x124 > [ 4703.914081] el1_irq+0xdc/0x1c0 > [ 4703.917221] _raw_spin_unlock_irq+0x20/0x54 > [ 4703.921405] finish_task_switch+0x84/0x224 > [ 4703.925502] __schedule+0x4a4/0x734 > [ 4703.928990] schedule+0xa0/0xe8 > [ 4703.932132] do_notify_resume+0x150/0x184 > [ 4703.936140] work_pending+0xc/0x40c > [ 4703.939633] Code: d5384613 521b0a69 d5184609 f9800111 (885ffd01) > [ 4703.945732] ---[ end trace ba5c1875ae49d53c ]--- > [ 4703.950350] Kernel panic - not syncing: Oops: Fatal exception in interrupt > [ 4703.957223] SMP: stopping secondary CPUs > [ 4703.961151] Kernel Offset: disabled > [ 4703.964638] CPU features: 0x0240002,2000200c > [ 4703.968905] Memory Limit: none > [ 4703.971963] Rebooting in 5 seconds.. > > Tested-by: faqiang.zhu <faqiang.zhu(a)nxp.com> > Signed-off-by: Li Jun <jun.li(a)nxp.com> > Link: https://lore.kernel.org/r/1620989984-7653-1-git-send-email-jun.li@nxp.com > Signed-off-by: Peter Chen <peter.chen(a)kernel.org> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: chensiyan96 <3225973902(a)qq.com> > --- > drivers/usb/chipidea/udc.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c > index 60ea932afe2b..5f35cdd2cf1d 100644 > --- a/drivers/usb/chipidea/udc.c > +++ b/drivers/usb/chipidea/udc.c > @@ -2055,6 +2055,7 @@ static int udc_start(struct ci_hdrc *ci) > ci->gadget.name = ci->platdata->name; > ci->gadget.otg_caps = otg_caps; > ci->gadget.sg_supported = 1; > + ci->gadget.irq = ci->irq; > > if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) > ci->gadget.quirk_avoids_skb_reserve = 1;

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Re: [PATCH openEuler-21.03] net: mdiobus: get rid of a BUG_ON()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:25, ZhuoliHuang 写道: > From: Dan Carpenter <dan.carpenter(a)oracle.com> > > stable inclusion > from stable-v5.10.44 > commit be23c4af3d8a1b986fe9b43b8966797653a76ca4 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=341 > CVE: NA > > -------------------------------- > > [ Upstream commit 1dde47a66d4fb181830d6fa000e5ea86907b639e ] > > We spotted a bug recently during a review where a driver was > unregistering a bus that wasn't registered, which would trigger this > BUG_ON(). Let's handle that situation more gracefully, and just print > a warning and return. > > Reported-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> > Reviewed-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Reviewed-by: Andrew Lunn <andrew(a)lunn.ch> > Signed-off-by: David S. Miller <davem(a)davemloft.net> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: wangqing <wangqing(a)uniontech.com> > Reviewed-by: Xie XiuQi <xiexiuqi(a)huawei.com> > Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> > --- > drivers/net/phy/mdio_bus.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c > index 757e950fb745..b848439fa837 100644 > --- a/drivers/net/phy/mdio_bus.c > +++ b/drivers/net/phy/mdio_bus.c > @@ -608,7 +608,8 @@ void mdiobus_unregister(struct mii_bus *bus) > struct mdio_device *mdiodev; > int i; > > - BUG_ON(bus->state != MDIOBUS_REGISTERED); > + if (WARN_ON_ONCE(bus->state != MDIOBUS_REGISTERED)) > + return; > bus->state = MDIOBUS_UNREGISTERED; > > for (i = 0; i < PHY_MAX_ADDR; i++) {

1 0

Re: [PATCH openEuler-21.03] net: mdiobus: get rid of a BUG_ON()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:26, lihao 写道: > From: Dan Carpenter <dan.carpenter(a)oracle.com> > > stable inclusion > from stable-v5.10.44 > commit be23c4af3d8a1b986fe9b43b8966797653a76ca4 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=341 > CVE: NA > > -------------------------------- > > [ Upstream commit 1dde47a66d4fb181830d6fa000e5ea86907b639e ] > > We spotted a bug recently during a review where a driver was > unregistering a bus that wasn't registered, which would trigger this > BUG_ON(). Let's handle that situation more gracefully, and just print > a warning and return. > > Reported-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> > Reviewed-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Reviewed-by: Andrew Lunn <andrew(a)lunn.ch> > Signed-off-by: David S. Miller <davem(a)davemloft.net> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: wangqing <wangqing(a)uniontech.com> > Reviewed-by: Xie XiuQi <xiexiuqi(a)huawei.com> > Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> > --- > drivers/net/phy/mdio_bus.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c > index 757e950fb745..b848439fa837 100644 > --- a/drivers/net/phy/mdio_bus.c > +++ b/drivers/net/phy/mdio_bus.c > @@ -608,7 +608,8 @@ void mdiobus_unregister(struct mii_bus *bus) > struct mdio_device *mdiodev; > int i; > > - BUG_ON(bus->state != MDIOBUS_REGISTERED); > + if (WARN_ON_ONCE(bus->state != MDIOBUS_REGISTERED)) > + return; > bus->state = MDIOBUS_UNREGISTERED; > > for (i = 0; i < PHY_MAX_ADDR; i++) {

1 0

Re: [PATCH openEuler-21.03] net: mdiobus: get rid of a BUG_ON()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:27, zanderzhao 写道: > From: Dan Carpenter <dan.carpenter(a)oracle.com> > > stable inclusion > from stable-v5.10.44 > commit be23c4af3d8a1b986fe9b43b8966797653a76ca4 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=341 > CVE: NA > > -------------------------------- > > [ Upstream commit 1dde47a66d4fb181830d6fa000e5ea86907b639e ] > > We spotted a bug recently during a review where a driver was > unregistering a bus that wasn't registered, which would trigger this > BUG_ON(). Let's handle that situation more gracefully, and just print > a warning and return. > > Reported-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> > Reviewed-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Reviewed-by: Andrew Lunn <andrew(a)lunn.ch> > Signed-off-by: David S. Miller <davem(a)davemloft.net> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: wangqing <wangqing(a)uniontech.com> > Reviewed-by: Xie XiuQi <xiexiuqi(a)huawei.com> > Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> > --- > drivers/net/phy/mdio_bus.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c > index 757e950fb745..b848439fa837 100644 > --- a/drivers/net/phy/mdio_bus.c > +++ b/drivers/net/phy/mdio_bus.c > @@ -608,7 +608,8 @@ void mdiobus_unregister(struct mii_bus *bus) > struct mdio_device *mdiodev; > int i; > > - BUG_ON(bus->state != MDIOBUS_REGISTERED); > + if (WARN_ON_ONCE(bus->state != MDIOBUS_REGISTERED)) > + return; > bus->state = MDIOBUS_UNREGISTERED; > > for (i = 0; i < PHY_MAX_ADDR; i++) {

1 0

Re: [PATCH openEuler-21.03] scsi: core: Fix failure handling of scsi_add_host_with_dma()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:32, dongenyang 写道: > From: Ming Lei <ming.lei(a)redhat.com> > > stable inclusion > from stable-v5.10.44 > commit 146446a43b3dbaa3a58364ef99fd606b3f324832 > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=361 > CVE: NA > > ------------------------------------------------- > > commit 3719f4ff047e20062b8314c23ec3cab84d74c908 upstream. > > When scsi_add_host_with_dma() returns failure, the caller will call > scsi_host_put(shost) to release everything allocated for this host > instance. Consequently we can't also free allocated stuff in > scsi_add_host_with_dma(), otherwise we will end up with a double free. > > Strictly speaking, host resource allocations should have been done in > scsi_host_alloc(). However, the allocations may need information which is > not yet provided by the driver when that function is called. So leave the > allocations where they are but rely on host device's release handler to > free resources. > > Link: https://lore.kernel.org/r/20210602133029.2864069-3-ming.lei@redhat.com > Cc: Bart Van Assche <bvanassche(a)acm.org> > Cc: John Garry <john.garry(a)huawei.com> > Cc: Hannes Reinecke <hare(a)suse.de> > Tested-by: John Garry <john.garry(a)huawei.com> > Reviewed-by: Bart Van Assche <bvanassche(a)acm.org> > Reviewed-by: John Garry <john.garry(a)huawei.com> > Reviewed-by: Hannes Reinecke <hare(a)suse.de> > Signed-off-by: Ming Lei <ming.lei(a)redhat.com> > Signed-off-by: Martin K. Petersen <martin.petersen(a)oracle.com> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: dongenyang <sdlpdey(a)163.com> > --- > drivers/scsi/hosts.c | 14 ++++++-------- > 1 file changed, 6 insertions(+), 8 deletions(-) > > diff --git a/drivers/scsi/hosts.c b/drivers/scsi/hosts.c > index 2f162603876f..85ec3cce43f1 100644 > --- a/drivers/scsi/hosts.c > +++ b/drivers/scsi/hosts.c > @@ -278,23 +278,22 @@ int scsi_add_host_with_dma(struct Scsi_Host *shost, struct device *dev, > > if (!shost->work_q) { > error = -EINVAL; > - goto out_free_shost_data; > + goto out_del_dev; > } > } > > error = scsi_sysfs_add_host(shost); > if (error) > - goto out_destroy_host; > + goto out_del_dev; > > scsi_proc_host_add(shost); > scsi_autopm_put_host(shost); > return error; > > - out_destroy_host: > - if (shost->work_q) > - destroy_workqueue(shost->work_q); > - out_free_shost_data: > - kfree(shost->shost_data); > + /* > + * Any host allocation in this function will be freed in > + * scsi_host_dev_release(). > + */ > out_del_dev: > device_del(&shost->shost_dev); > out_del_gendev: > @@ -304,7 +303,6 @@ int scsi_add_host_with_dma(struct Scsi_Host *shost, struct device *dev, > pm_runtime_disable(&shost->shost_gendev); > pm_runtime_set_suspended(&shost->shost_gendev); > pm_runtime_put_noidle(&shost->shost_gendev); > - scsi_mq_destroy_tags(shost); > fail: > return error; > }

1 0

Re: [PATCH openEuler-21.03] USB: f_ncm: ncm_bitrate (speed) is unsigned
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 17:32, xjx00 写道: > From: Maciej Żenczykowski <maze(a)google.com> > > stable inclusion > from stable-v5.10.44 > commit 0f5a20b1fd9da3ac9f7c6edcad522712ca694d5c > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=358 > CVE: NA > > ------------------------------------------------- > > commit 3370139745853f7826895293e8ac3aec1430508e upstream. > > [ 190.544755] configfs-gadget gadget: notify speed -44967296 > > This is because 4250000000 - 2**32 is -44967296. > > Fixes: 9f6ce4240a2b ("usb: gadget: f_ncm.c added") > Cc: Brooke Basile <brookebasile(a)gmail.com> > Cc: Bryan O'Donoghue <bryan.odonoghue(a)linaro.org> > Cc: Felipe Balbi <balbi(a)kernel.org> > Cc: Lorenzo Colitti <lorenzo(a)google.com> > Cc: Yauheni Kaliuta <yauheni.kaliuta(a)nokia.com> > Cc: Linux USB Mailing List <linux-usb(a)vger.kernel.org> > Acked-By: Lorenzo Colitti <lorenzo(a)google.com> > Signed-off-by: Maciej Żenczykowski <maze(a)google.com> > Cc: stable <stable(a)vger.kernel.org> > Link: https://lore.kernel.org/r/20210608005344.3762668-1-zenczykowski@gmail.com > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: xjx00 <xjxyklwx(a)126.com> > --- > drivers/usb/gadget/function/f_ncm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/usb/gadget/function/f_ncm.c b/drivers/usb/gadget/function/f_ncm.c > index 019bea8e09cc..0d23c6c11a13 100644 > --- a/drivers/usb/gadget/function/f_ncm.c > +++ b/drivers/usb/gadget/function/f_ncm.c > @@ -583,7 +583,7 @@ static void ncm_do_notify(struct f_ncm *ncm) > data[0] = cpu_to_le32(ncm_bitrate(cdev->gadget)); > data[1] = data[0]; > > - DBG(cdev, "notify speed %d\n", ncm_bitrate(cdev->gadget)); > + DBG(cdev, "notify speed %u\n", ncm_bitrate(cdev->gadget)); > ncm->notify_state = NCM_NOTIFY_CONNECT; > break; > }

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Re: [PATCH openEuler-21.03] gpio: wcd934x: Fix shift-out-of-bounds error
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 20:18, zcj 写道: > From: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> > > stable inclusion > from stable-v5.10.44 > commit e0b518a2eb44d8a74c19e50f79a8ed393e96d634 > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=463 > CVE: NA > > ------------------------------------------------- > > commit dbec64b11c65d74f31427e2b9d5746fbf17bf840 upstream. > > bit-mask for pins 0 to 4 is BIT(0) to BIT(4) however we ended up with BIT(n - 1) > which is not right, and this was caught by below usban check > > UBSAN: shift-out-of-bounds in drivers/gpio/gpio-wcd934x.c:34:14 > > Fixes: 59c324683400 ("gpio: wcd934x: Add support to wcd934x gpio controller") > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> > Reviewed-by: Andy Shevchenko <andy.shevchenko(a)gmail.com> > Reviewed-by: Bjorn Andersson <bjorn.andersson(a)linaro.org> > Signed-off-by: Bartosz Golaszewski <bgolaszewski(a)baylibre.com> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: zcj <2459770937(a)qq.com> > --- > drivers/gpio/gpio-wcd934x.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpio/gpio-wcd934x.c b/drivers/gpio/gpio-wcd934x.c > index 1cbce5990855..97e6caedf1f3 100644 > --- a/drivers/gpio/gpio-wcd934x.c > +++ b/drivers/gpio/gpio-wcd934x.c > @@ -7,7 +7,7 @@ > #include <linux/slab.h> > #include <linux/of_device.h> > > -#define WCD_PIN_MASK(p) BIT(p - 1) > +#define WCD_PIN_MASK(p) BIT(p) > #define WCD_REG_DIR_CTL_OFFSET 0x42 > #define WCD_REG_VAL_CTL_OFFSET 0x43 > #define WCD934X_NPINS 5

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Re: [PATCH openEuler-21.03] regulator: fan53880: Fix missing n_voltages setting
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 20:49, lantianbaiyun 写道: > From: Axel Lin <axel.lin(a)ingics.com> > > stable inclusion > from stable-v5.10.44 > commit 5a5f5cfb5f0996d65eae3cc034513d90f4be6783 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=401 > CVE: NA > > ------------------------------------------------- > > commit 34991ee96fd8477479dd15adadceb6b28b30d9b0 upstream. > > Fixes: e6dea51e2d41 ("regulator: fan53880: Add initial support") > Signed-off-by: Axel Lin <axel.lin(a)ingics.com> > Acked-by: Christoph Fritz <chf.fritz(a)googlemail.com> > Link: https://lore.kernel.org/r/20210517105325.1227393-1-axel.lin@ingics.com > Signed-off-by: Mark Brown <broonie(a)kernel.org> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: lantianbaiyun <lianyi21(a)mails.ucas.ac.cn> > --- > drivers/regulator/fan53880.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/regulator/fan53880.c b/drivers/regulator/fan53880.c > index e83eb4fb1876..1684faf82ed2 100644 > --- a/drivers/regulator/fan53880.c > +++ b/drivers/regulator/fan53880.c > @@ -51,6 +51,7 @@ static const struct regulator_ops fan53880_ops = { > REGULATOR_LINEAR_RANGE(800000, 0xf, 0x73, 25000), \ > }, \ > .n_linear_ranges = 2, \ > + .n_voltages = 0x74, \ > .vsel_reg = FAN53880_LDO ## _num ## VOUT, \ > .vsel_mask = 0x7f, \ > .enable_reg = FAN53880_ENABLE, \ > @@ -76,6 +77,7 @@ static const struct regulator_desc fan53880_regulators[] = { > REGULATOR_LINEAR_RANGE(600000, 0x1f, 0xf7, 12500), > }, > .n_linear_ranges = 2, > + .n_voltages = 0xf8, > .vsel_reg = FAN53880_BUCKVOUT, > .vsel_mask = 0x7f, > .enable_reg = FAN53880_ENABLE, > @@ -95,6 +97,7 @@ static const struct regulator_desc fan53880_regulators[] = { > REGULATOR_LINEAR_RANGE(3000000, 0x4, 0x70, 25000), > }, > .n_linear_ranges = 2, > + .n_voltages = 0x71, > .vsel_reg = FAN53880_BOOSTVOUT, > .vsel_mask = 0x7f, > .enable_reg = FAN53880_ENABLE_BOOST,

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Re: [PATCH openEuler-21.03] NFSv4: Fix second deadlock in nfs4_evict_inode()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 20:55, smilezhangs 写道: > From: Trond Myklebust <trond.myklebust(a)hammerspace.com> > > stable inclusion > from stable-v5.10.44 > commit d973bd0d6e7f9b4ea976cc619e8d6e0d235b9056 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=462 > CVE: NA > > ------------------------------------------------- > > commit c3aba897c6e67fa464ec02b1f17911577d619713 upstream. > > If the inode is being evicted but has to return a layout first, then > that too can cause a deadlock in the corner case where the server > reboots. > > Signed-off-by: Trond Myklebust <trond.myklebust(a)hammerspace.com> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: Hang <haihangyiyuan(a)163.com> > Reviewed-by: Jian Cheng <cj.chengjian(a)huawei.com> > Signed-off-by: Wang ShaoBo <bobo.shaobowang(a)huawei.com> > --- > fs/nfs/nfs4proc.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c > index c92d6ff0fcea..eedcbe6832fb 100644 > --- a/fs/nfs/nfs4proc.c > +++ b/fs/nfs/nfs4proc.c > @@ -9619,15 +9619,20 @@ int nfs4_proc_layoutreturn(struct nfs4_layoutreturn *lrp, bool sync) > &task_setup_data.rpc_client, &msg); > > dprintk("--> %s\n", __func__); > + lrp->inode = nfs_igrab_and_active(lrp->args.inode); > if (!sync) { > - lrp->inode = nfs_igrab_and_active(lrp->args.inode); > if (!lrp->inode) { > nfs4_layoutreturn_release(lrp); > return -EAGAIN; > } > task_setup_data.flags |= RPC_TASK_ASYNC; > } > - nfs4_init_sequence(&lrp->args.seq_args, &lrp->res.seq_res, 1, 0); > + if (!lrp->inode) > + nfs4_init_sequence(&lrp->args.seq_args, &lrp->res.seq_res, 1, > + 1); > + else > + nfs4_init_sequence(&lrp->args.seq_args, &lrp->res.seq_res, 1, > + 0); > task = rpc_run_task(&task_setup_data); > if (IS_ERR(task)) > return PTR_ERR(task);

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Re: [PATCH openEuler-21.03] net/nfc/rawsock.c: fix a permission check bug
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 21:10, lf 写道: > From: Jeimon <jjjinmeng.zhou(a)gmail.com> > > stable inclusion > from stable-v5.10.44 > commit 1e5cab50208c8fb7351b798cb1d569debfeb994a > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=371 > CVE: NA > > ------------------------------------------------- > > [ Upstream commit 8ab78863e9eff11910e1ac8bcf478060c29b379e ] > > The function rawsock_create() calls a privileged function sk_alloc(), which requires a ns-aware check to check net->user_ns, i.e., ns_capable(). However, the original code checks the init_user_ns using capable(). So we replace the capable() with ns_capable(). > > Signed-off-by: Jeimon <jjjinmeng.zhou(a)gmail.com> > Signed-off-by: David S. Miller <davem(a)davemloft.net> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: lf <15042944259(a)163.com> > --- > net/nfc/rawsock.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/net/nfc/rawsock.c b/net/nfc/rawsock.c > index 9c7eb8455ba8..5f1d438a0a23 100644 > --- a/net/nfc/rawsock.c > +++ b/net/nfc/rawsock.c > @@ -329,7 +329,7 @@ static int rawsock_create(struct net *net, struct socket *sock, > return -ESOCKTNOSUPPORT; > > if (sock->type == SOCK_RAW) { > - if (!capable(CAP_NET_RAW)) > + if (!ns_capable(net->user_ns, CAP_NET_RAW)) > return -EPERM; > sock->ops = &rawsock_raw_ops; > } else {

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Re: [PATCH openEuler-21.03] net: mdiobus: get rid of a BUG_ON()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 21:09, lf 写道: > From: Dan Carpenter <dan.carpenter(a)oracle.com> > > stable inclusion > from stable-v5.10.44 > commit be23c4af3d8a1b986fe9b43b8966797653a76ca4 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=341 > CVE: NA > > -------------------------------- > > [ Upstream commit 1dde47a66d4fb181830d6fa000e5ea86907b639e ] > > We spotted a bug recently during a review where a driver was > unregistering a bus that wasn't registered, which would trigger this > BUG_ON(). Let's handle that situation more gracefully, and just print > a warning and return. > > Reported-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> > Reviewed-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Reviewed-by: Andrew Lunn <andrew(a)lunn.ch> > Signed-off-by: David S. Miller <davem(a)davemloft.net> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: wangqing <wangqing(a)uniontech.com> > Reviewed-by: Xie XiuQi <xiexiuqi(a)huawei.com> > Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> > --- > drivers/net/phy/mdio_bus.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c > index 757e950fb745..b848439fa837 100644 > --- a/drivers/net/phy/mdio_bus.c > +++ b/drivers/net/phy/mdio_bus.c > @@ -608,7 +608,8 @@ void mdiobus_unregister(struct mii_bus *bus) > struct mdio_device *mdiodev; > int i; > > - BUG_ON(bus->state != MDIOBUS_REGISTERED); > + if (WARN_ON_ONCE(bus->state != MDIOBUS_REGISTERED)) > + return; > bus->state = MDIOBUS_UNREGISTERED; > > for (i = 0; i < PHY_MAX_ADDR; i++) {

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Re: [PATCH openEuler-21.03] Revert "ACPI: sleep: Put the FACS table after using it"
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 21:18, ws 写道: > From: Zhang Rui <rui.zhang(a)intel.com> > > stable inclusion > from stable-v5.10.44 > commit afd87792db355282c4608356b98bb2dd650a6885 > Bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=438 > CVE: NA > > ------------------------------------------------- > > commit f1ffa9d4cccc8fdf6c03fb1b3429154d22037988 upstream. > > Commit 95722237cb2a ("ACPI: sleep: Put the FACS table after using it") > puts the FACS table during initialization. > > But the hardware signature bits in the FACS table need to be accessed, > after every hibernation, to compare with the original hardware > signature. > > So there is no reason to release the FACS table mapping after > initialization. > > This reverts commit 95722237cb2ae4f7b73471058cdb19e8f4057c93. > > An alternative solution is to use acpi_gbl_FACS variable instead, which > is mapped by the ACPICA core and never released. > > Link: https://bugzilla.kernel.org/show_bug.cgi?id=212277 > Reported-by: Stephan Hohe <sth.dev(a)tejp.de> > Signed-off-by: Zhang Rui <rui.zhang(a)intel.com> > Cc: 5.8+ <stable(a)vger.kernel.org> # 5.8+ > Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki(a)intel.com> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: ws <3045672234(a)qq.com> > --- > drivers/acpi/sleep.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c > index aff13bf4d947..31c9d0c8ae11 100644 > --- a/drivers/acpi/sleep.c > +++ b/drivers/acpi/sleep.c > @@ -1290,10 +1290,8 @@ static void acpi_sleep_hibernate_setup(void) > return; > > acpi_get_table(ACPI_SIG_FACS, 1, (struct acpi_table_header **)&facs); > - if (facs) { > + if (facs) > s4_hardware_signature = facs->hardware_signature; > - acpi_put_table((struct acpi_table_header *)facs); > - } > } > #else /* !CONFIG_HIBERNATION */ > static inline void acpi_sleep_hibernate_setup(void) {}

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Re: [PATCH openEuler-21.03] net: mdiobus: get rid of a BUG_ON()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 21:27, lcr 写道: > From: Dan Carpenter <dan.carpenter(a)oracle.com> > > stable inclusion > from stable-v5.10.44 > commit be23c4af3d8a1b986fe9b43b8966797653a76ca4 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=341 > CVE: NA > > -------------------------------- > > [ Upstream commit 1dde47a66d4fb181830d6fa000e5ea86907b639e ] > > We spotted a bug recently during a review where a driver was > unregistering a bus that wasn't registered, which would trigger this > BUG_ON(). Let's handle that situation more gracefully, and just print > a warning and return. > > Reported-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> > Reviewed-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Reviewed-by: Andrew Lunn <andrew(a)lunn.ch> > Signed-off-by: David S. Miller <davem(a)davemloft.net> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: wangqing <wangqing(a)uniontech.com> > Reviewed-by: Xie XiuQi <xiexiuqi(a)huawei.com> > Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> > --- > drivers/net/phy/mdio_bus.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c > index 757e950fb745..b848439fa837 100644 > --- a/drivers/net/phy/mdio_bus.c > +++ b/drivers/net/phy/mdio_bus.c > @@ -608,7 +608,8 @@ void mdiobus_unregister(struct mii_bus *bus) > struct mdio_device *mdiodev; > int i; > > - BUG_ON(bus->state != MDIOBUS_REGISTERED); > + if (WARN_ON_ONCE(bus->state != MDIOBUS_REGISTERED)) > + return; > bus->state = MDIOBUS_UNREGISTERED; > > for (i = 0; i < PHY_MAX_ADDR; i++) {

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Re: [PATCH openEuler-21.03] RDMA/mlx4: Do not map the core_clock page to user space unless enabled
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 21:27, gaodawei 写道: > From: Shay Drory <shayd(a)nvidia.com> > > stable inclusion > from stable-v5.10.44 > commit cb1aa1da04882d1860f733e24aeebdbbc85724d7 > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=454 > CVE: NA > > ------------------------------------------------- > > commit 404e5a12691fe797486475fe28cc0b80cb8bef2c upstream. > > Currently when mlx4 maps the hca_core_clock page to the user space there > are read-modifiable registers, one of which is semaphore, on this page as > well as the clock counter. If user reads the wrong offset, it can modify > the semaphore and hang the device. > > Do not map the hca_core_clock page to the user space unless the device has > been put in a backwards compatibility mode to support this feature. > > After this patch, mlx4 core_clock won't be mapped to user space on the > majority of existing devices and the uverbs device time feature in > ibv_query_rt_values_ex() will be disabled. > > Fixes: 52033cfb5aab ("IB/mlx4: Add mmap call to map the hardware clock") > Link: https://lore.kernel.org/r/9632304e0d6790af84b3b706d8c18732bc0d5e27.16227263… > Signed-off-by: Shay Drory <shayd(a)nvidia.com> > Signed-off-by: Leon Romanovsky <leonro(a)nvidia.com> > Signed-off-by: Jason Gunthorpe <jgg(a)nvidia.com> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: gaodawei <810789471(a)qq.com> > --- > drivers/infiniband/hw/mlx4/main.c | 5 +---- > drivers/net/ethernet/mellanox/mlx4/fw.c | 3 +++ > drivers/net/ethernet/mellanox/mlx4/fw.h | 1 + > drivers/net/ethernet/mellanox/mlx4/main.c | 6 ++++++ > include/linux/mlx4/device.h | 1 + > 5 files changed, 12 insertions(+), 4 deletions(-) > > diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c > index cd0fba6b0964..7b11aff8a5ea 100644 > --- a/drivers/infiniband/hw/mlx4/main.c > +++ b/drivers/infiniband/hw/mlx4/main.c > @@ -580,12 +580,9 @@ static int mlx4_ib_query_device(struct ib_device *ibdev, > props->cq_caps.max_cq_moderation_count = MLX4_MAX_CQ_COUNT; > props->cq_caps.max_cq_moderation_period = MLX4_MAX_CQ_PERIOD; > > - if (!mlx4_is_slave(dev->dev)) > - err = mlx4_get_internal_clock_params(dev->dev, &clock_params); > - > if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) { > resp.response_length += sizeof(resp.hca_core_clock_offset); > - if (!err && !mlx4_is_slave(dev->dev)) { > + if (!mlx4_get_internal_clock_params(dev->dev, &clock_params)) { > resp.comp_mask |= MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET; > resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE; > } > diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c > index f6cfec81ccc3..dc4ac1a2b6b6 100644 > --- a/drivers/net/ethernet/mellanox/mlx4/fw.c > +++ b/drivers/net/ethernet/mellanox/mlx4/fw.c > @@ -823,6 +823,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) > #define QUERY_DEV_CAP_MAD_DEMUX_OFFSET 0xb0 > #define QUERY_DEV_CAP_DMFS_HIGH_RATE_QPN_BASE_OFFSET 0xa8 > #define QUERY_DEV_CAP_DMFS_HIGH_RATE_QPN_RANGE_OFFSET 0xac > +#define QUERY_DEV_CAP_MAP_CLOCK_TO_USER 0xc1 > #define QUERY_DEV_CAP_QP_RATE_LIMIT_NUM_OFFSET 0xcc > #define QUERY_DEV_CAP_QP_RATE_LIMIT_MAX_OFFSET 0xd0 > #define QUERY_DEV_CAP_QP_RATE_LIMIT_MIN_OFFSET 0xd2 > @@ -841,6 +842,8 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) > > if (mlx4_is_mfunc(dev)) > disable_unsupported_roce_caps(outbox); > + MLX4_GET(field, outbox, QUERY_DEV_CAP_MAP_CLOCK_TO_USER); > + dev_cap->map_clock_to_user = field & 0x80; > MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_QP_OFFSET); > dev_cap->reserved_qps = 1 << (field & 0xf); > MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_QP_OFFSET); > diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.h b/drivers/net/ethernet/mellanox/mlx4/fw.h > index 8f020f26ebf5..cf64e54eecb0 100644 > --- a/drivers/net/ethernet/mellanox/mlx4/fw.h > +++ b/drivers/net/ethernet/mellanox/mlx4/fw.h > @@ -131,6 +131,7 @@ struct mlx4_dev_cap { > u32 health_buffer_addrs; > struct mlx4_port_cap port_cap[MLX4_MAX_PORTS + 1]; > bool wol_port[MLX4_MAX_PORTS + 1]; > + bool map_clock_to_user; > }; > > struct mlx4_func_cap { > diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c > index c326b434734e..00c84656b2e7 100644 > --- a/drivers/net/ethernet/mellanox/mlx4/main.c > +++ b/drivers/net/ethernet/mellanox/mlx4/main.c > @@ -498,6 +498,7 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) > } > } > > + dev->caps.map_clock_to_user = dev_cap->map_clock_to_user; > dev->caps.uar_page_size = PAGE_SIZE; > dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE; > dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay; > @@ -1948,6 +1949,11 @@ int mlx4_get_internal_clock_params(struct mlx4_dev *dev, > if (mlx4_is_slave(dev)) > return -EOPNOTSUPP; > > + if (!dev->caps.map_clock_to_user) { > + mlx4_dbg(dev, "Map clock to user is not supported.\n"); > + return -EOPNOTSUPP; > + } > + > if (!params) > return -EINVAL; > > diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h > index 06e066e04a4b..eb8169c03d89 100644 > --- a/include/linux/mlx4/device.h > +++ b/include/linux/mlx4/device.h > @@ -631,6 +631,7 @@ struct mlx4_caps { > bool wol_port[MLX4_MAX_PORTS + 1]; > struct mlx4_rate_limit_caps rl_caps; > u32 health_buffer_addrs; > + bool map_clock_to_user; > }; > > struct mlx4_buf_list {

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Re: [PATCH openEuler-21.03] NFSv4: Fix second deadlock in nfs4_evict_inode()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 21:31, smilezhangs 写道: > From: Trond Myklebust <trond.myklebust(a)hammerspace.com> > > stable inclusion > from stable-v5.10.44 > commit d973bd0d6e7f9b4ea976cc619e8d6e0d235b9056 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=462 > CVE: NA > > ------------------------------------------------- > > commit c3aba897c6e67fa464ec02b1f17911577d619713 upstream. > > If the inode is being evicted but has to return a layout first, then > that too can cause a deadlock in the corner case where the server > reboots. > > Signed-off-by: Trond Myklebust <trond.myklebust(a)hammerspace.com> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: Hang <haihangyiyuan(a)163.com> > Reviewed-by: Jian Cheng <cj.chengjian(a)huawei.com> > Signed-off-by: Wang ShaoBo <bobo.shaobowang(a)huawei.com> > --- > fs/nfs/nfs4proc.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c > index c92d6ff0fcea..eedcbe6832fb 100644 > --- a/fs/nfs/nfs4proc.c > +++ b/fs/nfs/nfs4proc.c > @@ -9619,15 +9619,20 @@ int nfs4_proc_layoutreturn(struct nfs4_layoutreturn *lrp, bool sync) > &task_setup_data.rpc_client, &msg); > > dprintk("--> %s\n", __func__); > + lrp->inode = nfs_igrab_and_active(lrp->args.inode); > if (!sync) { > - lrp->inode = nfs_igrab_and_active(lrp->args.inode); > if (!lrp->inode) { > nfs4_layoutreturn_release(lrp); > return -EAGAIN; > } > task_setup_data.flags |= RPC_TASK_ASYNC; > } > - nfs4_init_sequence(&lrp->args.seq_args, &lrp->res.seq_res, 1, 0); > + if (!lrp->inode) > + nfs4_init_sequence(&lrp->args.seq_args, &lrp->res.seq_res, 1, > + 1); > + else > + nfs4_init_sequence(&lrp->args.seq_args, &lrp->res.seq_res, 1, > + 0); > task = rpc_run_task(&task_setup_data); > if (IS_ERR(task)) > return PTR_ERR(task);

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Re: [PATCH openEuler-21.03] scsi: core: Only put parent device if host state differs from SHOST_CREATED
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 21:37, yangshuo 写道: > From: Ming Lei <ming.lei(a)redhat.com> > > stable inclusion > from stable-v5.10.44 > commit 5b537408f2733d510060e72596befa44c3435cb6 > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=403 > CVE: NA > > ------------------------------------------------- > > commit 1e0d4e6225996f05271de1ebcb1a7c9381af0b27 upstream. > > get_device(shost->shost_gendev.parent) is called after host state has > switched to SHOST_RUNNING. scsi_host_dev_release() shouldn't release the > parent device if host state is still SHOST_CREATED. > > Link: https://lore.kernel.org/r/20210602133029.2864069-5-ming.lei@redhat.com > Cc: Bart Van Assche <bvanassche(a)acm.org> > Cc: John Garry <john.garry(a)huawei.com> > Cc: Hannes Reinecke <hare(a)suse.de> > Tested-by: John Garry <john.garry(a)huawei.com> > Reviewed-by: John Garry <john.garry(a)huawei.com> > Signed-off-by: Ming Lei <ming.lei(a)redhat.com> > Signed-off-by: Martin K. Petersen <martin.petersen(a)oracle.com> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: yangshuo <look4polaris(a)163.com> > --- > drivers/scsi/hosts.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/scsi/hosts.c b/drivers/scsi/hosts.c > index 2f162603876f..f1b7061aa0d9 100644 > --- a/drivers/scsi/hosts.c > +++ b/drivers/scsi/hosts.c > @@ -345,7 +345,7 @@ static void scsi_host_dev_release(struct device *dev) > > ida_simple_remove(&host_index_ida, shost->host_no); > > - if (parent) > + if (shost->shost_state != SHOST_CREATED) > put_device(parent); > kfree(shost); > }

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Re: [PATCH openEuler-21.03] dm verity: fix require_signatures module_param permissions
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 22:40, huangzhuoli 写道: > From: John Keeping <john(a)metanate.com> > > stable inclusion > from stable-v5.10.44 > commit 90547d5db50bcb2705709e420e0af51535109113 > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=426 > CVE: NA > > ------------------------------------------------- > > [ Upstream commit 0c1f3193b1cdd21e7182f97dc9bca7d284d18a15 ] > > The third parameter of module_param() is permissions for the sysfs node > but it looks like it is being used as the initial value of the parameter > here. In fact, false here equates to omitting the file from sysfs and > does not affect the value of require_signatures. > > Making the parameter writable is not simple because going from > false->true is fine but it should not be possible to remove the > requirement to verify a signature. But it can be useful to inspect the > value of this parameter from userspace, so change the permissions to > make a read-only file in sysfs. > > Signed-off-by: John Keeping <john(a)metanate.com> > Signed-off-by: Mike Snitzer <snitzer(a)redhat.com> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: huangzhuoli <bioagr_huangzl(a)163.com> > --- > drivers/md/dm-verity-verify-sig.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/md/dm-verity-verify-sig.c b/drivers/md/dm-verity-verify-sig.c > index 614e43db93aa..919154ae4cae 100644 > --- a/drivers/md/dm-verity-verify-sig.c > +++ b/drivers/md/dm-verity-verify-sig.c > @@ -15,7 +15,7 @@ > #define DM_VERITY_VERIFY_ERR(s) DM_VERITY_ROOT_HASH_VERIFICATION " " s > > static bool require_signatures; > -module_param(require_signatures, bool, false); > +module_param(require_signatures, bool, 0444); > MODULE_PARM_DESC(require_signatures, > "Verify the roothash of dm-verity hash tree"); >

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Re: [PATCH openEuler-21.03] dm verity: fix require_signatures module_param permissions
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 22:40, huangzhuoli 写道: > From: John Keeping <john(a)metanate.com> > > stable inclusion > from stable-v5.10.44 > commit 90547d5db50bcb2705709e420e0af51535109113 > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=426 > CVE: NA > > ------------------------------------------------- > > [ Upstream commit 0c1f3193b1cdd21e7182f97dc9bca7d284d18a15 ] > > The third parameter of module_param() is permissions for the sysfs node > but it looks like it is being used as the initial value of the parameter > here. In fact, false here equates to omitting the file from sysfs and > does not affect the value of require_signatures. > > Making the parameter writable is not simple because going from > false->true is fine but it should not be possible to remove the > requirement to verify a signature. But it can be useful to inspect the > value of this parameter from userspace, so change the permissions to > make a read-only file in sysfs. > > Signed-off-by: John Keeping <john(a)metanate.com> > Signed-off-by: Mike Snitzer <snitzer(a)redhat.com> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: huangzhuoli <bioagr_huangzl(a)163.com> > --- > drivers/md/dm-verity-verify-sig.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/md/dm-verity-verify-sig.c b/drivers/md/dm-verity-verify-sig.c > index 614e43db93aa..919154ae4cae 100644 > --- a/drivers/md/dm-verity-verify-sig.c > +++ b/drivers/md/dm-verity-verify-sig.c > @@ -15,7 +15,7 @@ > #define DM_VERITY_VERIFY_ERR(s) DM_VERITY_ROOT_HASH_VERIFICATION " " s > > static bool require_signatures; > -module_param(require_signatures, bool, false); > +module_param(require_signatures, bool, 0444); > MODULE_PARM_DESC(require_signatures, > "Verify the roothash of dm-verity hash tree"); >

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Re: [PATCH openEuler-21.03] ALSA: seq: Fix race of snd_seq_timer_open()
by chengjian (D) 26 Oct '21

26 Oct '21

您好，感谢参与 openEuler kernel 开发您的 signed-off-by 没有加。另外您的邮箱用户名可能不正确：显示为 yourname。在 2021/10/23 23:05, yourname 写道: > From: Takashi Iwai <tiwai(a)suse.de> > > stable inclusion > from stable-v5.10.44 > commit bd7d88b0874f82f7b29d1a53e574cedaf23166ba > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=445 > CVE: NA > > ------------------------------------------------- > > commit 83e197a8414c0ba545e7e3916ce05f836f349273 upstream. > > The timer instance per queue is exclusive, and snd_seq_timer_open() > should have managed the concurrent accesses. It looks as if it's > checking the already existing timer instance at the beginning, but > it's not right, because there is no protection, hence any later > concurrent call of snd_seq_timer_open() may override the timer > instance easily. This may result in UAF, as the leftover timer > instance can keep running while the queue itself gets closed, as > spotted by syzkaller recently. > > For avoiding the race, add a proper check at the assignment of > tmr->timeri again, and return -EBUSY if it's been already registered. > > Reported-by: syzbot+ddc1260a83ed1cbf6fb5(a)syzkaller.appspotmail.com > Cc: <stable(a)vger.kernel.org> > Link: https://lore.kernel.org/r/000000000000dce34f05c42f110c@google.com > Link: https://lore.kernel.org/r/20210610152059.24633-1-tiwai@suse.de > Signed-off-by: Takashi Iwai <tiwai(a)suse.de> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: yourname <625267121(a)qq.com> > --- > sound/core/seq/seq_timer.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/sound/core/seq/seq_timer.c b/sound/core/seq/seq_timer.c > index 1645e4142e30..9863be6fd43e 100644 > --- a/sound/core/seq/seq_timer.c > +++ b/sound/core/seq/seq_timer.c > @@ -297,8 +297,16 @@ int snd_seq_timer_open(struct snd_seq_queue *q) > return err; > } > spin_lock_irq(&tmr->lock); > - tmr->timeri = t; > + if (tmr->timeri) > + err = -EBUSY; > + else > + tmr->timeri = t; > spin_unlock_irq(&tmr->lock); > + if (err < 0) { > + snd_timer_close(t); > + snd_timer_instance_free(t); > + return err; > + } > return 0; > } >

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Re: [PATCH openEuler-21.03] net: mdiobus: get rid of a BUG_ON()
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/23 23:05, yourname 写道: > From: Dan Carpenter <dan.carpenter(a)oracle.com> > > stable inclusion > from stable-v5.10.44 > commit be23c4af3d8a1b986fe9b43b8966797653a76ca4 > bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=341 > CVE: NA > > -------------------------------- > > [ Upstream commit 1dde47a66d4fb181830d6fa000e5ea86907b639e ] > > We spotted a bug recently during a review where a driver was > unregistering a bus that wasn't registered, which would trigger this > BUG_ON(). Let's handle that situation more gracefully, and just print > a warning and return. > > Reported-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> > Reviewed-by: Russell King (Oracle) <rmk+kernel(a)armlinux.org.uk> > Reviewed-by: Andrew Lunn <andrew(a)lunn.ch> > Signed-off-by: David S. Miller <davem(a)davemloft.net> > Signed-off-by: Sasha Levin <sashal(a)kernel.org> > Signed-off-by: wangqing <wangqing(a)uniontech.com> > Reviewed-by: Xie XiuQi <xiexiuqi(a)huawei.com> > Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> 您好，感谢参与 openEuler kernel 开发您的 signed-off-by 没有加。另外您的邮箱用户名可能不正确：显示为 yourname。 > drivers/net/phy/mdio_bus.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c > index 757e950fb745..b848439fa837 100644 > --- a/drivers/net/phy/mdio_bus.c > +++ b/drivers/net/phy/mdio_bus.c > @@ -608,7 +608,8 @@ void mdiobus_unregister(struct mii_bus *bus) > struct mdio_device *mdiodev; > int i; > > - BUG_ON(bus->state != MDIOBUS_REGISTERED); > + if (WARN_ON_ONCE(bus->state != MDIOBUS_REGISTERED)) > + return; > bus->state = MDIOBUS_UNREGISTERED; > > for (i = 0; i < PHY_MAX_ADDR; i++) {

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[PATCH openEuler-21.03] usb: gadget: f_fs: Ensure io_completion_wq is idle during unbind
by liuhao 26 Oct '21

26 Oct '21

From: Wesley Cheng <wcheng(a)codeaurora.org> stable inclusion from stable-v5.10.44 commit 5cead896962d8b25dee8a8efc85b076572732b86 bugzilla: https://bugzilla.openeuler.org/show_bug.cgi?id=406 CVE: NA ------------------------------------------------- commit 6fc1db5e6211e30fbb1cee8d7925d79d4ed2ae14 upstream. During unbind, ffs_func_eps_disable() will be executed, resulting in completion callbacks for any pending USB requests. When using AIO, irrespective of the completion status, io_data work is queued to io_completion_wq to evaluate and handle the completed requests. Since work runs asynchronously to the unbind() routine, there can be a scenario where the work runs after the USB gadget has been fully removed, resulting in accessing of a resource which has been already freed. (i.e. usb_ep_free_request() accessing the USB ep structure) Explicitly drain the io_completion_wq, instead of relying on the destroy_workqueue() (in ffs_data_put()) to make sure no pending completion work items are running. Signed-off-by: Wesley Cheng <wcheng(a)codeaurora.org> Cc: stable <stable(a)vger.kernel.org> Link: https://lore.kernel.org/r/1621644261-1236-1-git-send-email-wcheng@codeauror… Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Signed-off-by: liuhao <qq1107732331(a)qq.com> --- drivers/usb/gadget/function/f_fs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c index ffe67d836b0c..7df180b110af 100644 --- a/drivers/usb/gadget/function/f_fs.c +++ b/drivers/usb/gadget/function/f_fs.c @@ -3566,6 +3566,9 @@ static void ffs_func_unbind(struct usb_configuration *c, ffs->func = NULL; } + /* Drain any pending AIO completions */ + drain_workqueue(ffs->io_completion_wq); + if (!--opts->refcnt) functionfs_unbind(ffs); -- 2.23.0

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Re: [PATCH openEuler-21.03] NFSv4: nfs4_proc_set_acl needs to restore NFS_CAP_UIDGID_NOMAP on error.
by chengjian (D) 26 Oct '21

26 Oct '21

Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> 在 2021/10/24 16:58, wangyongpan 写道: > From: Dai Ngo <dai.ngo(a)oracle.com> > > stable inclusion > from stable-v5.10.44 > commit 6e13b9bc66f0e34238aa7b9486a0575177fb7955 > bugzilla:https://bugzilla.openeuler.org/show_bug.cgi?id=414 > CVE: NA > > ------------------------------------------------- > > commit f8849e206ef52b584cd9227255f4724f0cc900bb upstream. > > Currently if __nfs4_proc_set_acl fails with NFS4ERR_BADOWNER it > re-enables the idmapper by clearing NFS_CAP_UIDGID_NOMAP before > retrying again. The NFS_CAP_UIDGID_NOMAP remains cleared even if > the retry fails. This causes problem for subsequent setattr > requests for v4 server that does not have idmapping configured. > > This patch modifies nfs4_proc_set_acl to detect NFS4ERR_BADOWNER > and NFS4ERR_BADNAME and skips the retry, since the kernel isn't > involved in encoding the ACEs, and return -EINVAL. > > Steps to reproduce the problem: > > # mount -o vers=4.1,sec=sys server:/export/test /tmp/mnt > # touch /tmp/mnt/file1 > # chown 99 /tmp/mnt/file1 > # nfs4_setfacl -a A::unknown.user@xyz.com:wrtncy /tmp/mnt/file1 > Failed setxattr operation: Invalid argument > # chown 99 /tmp/mnt/file1 > chown: changing ownership of ‘/tmp/mnt/file1’: Invalid argument > # umount /tmp/mnt > # mount -o vers=4.1,sec=sys server:/export/test /tmp/mnt > # chown 99 /tmp/mnt/file1 > # > > v2: detect NFS4ERR_BADOWNER and NFS4ERR_BADNAME and skip retry > in nfs4_proc_set_acl. > Signed-off-by: Dai Ngo <dai.ngo(a)oracle.com> > Signed-off-by: Trond Myklebust <trond.myklebust(a)hammerspace.com> > Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> > Signed-off-by: wangyongpan <1071630525(a)qq.com> > --- > fs/nfs/nfs4proc.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c > index eedcbe6832fb..f387b34bc5e5 100644 > --- a/fs/nfs/nfs4proc.c > +++ b/fs/nfs/nfs4proc.c > @@ -5942,6 +5942,14 @@ static int nfs4_proc_set_acl(struct inode *inode, const void *buf, size_t buflen > do { > err = __nfs4_proc_set_acl(inode, buf, buflen); > trace_nfs4_set_acl(inode, err); > + if (err == -NFS4ERR_BADOWNER || err == -NFS4ERR_BADNAME) { > + /* > + * no need to retry since the kernel > + * isn't involved in encoding the ACEs. > + */ > + err = -EINVAL; > + break; > + } > err = nfs4_handle_exception(NFS_SERVER(inode), err, > &exception); > } while (exception.retry);

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[PATCH kernel-5.10] Add a kcpuid tool to show raw CPU features
by zhangyue 26 Oct '21

26 Oct '21

From: Feng Tang <feng.tang(a)intel.com> mainline inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4CMMB?from=project-issue CVE: NA ------------------------------------ End users frequently want to know what features their processor supports, independent of what the kernel supports. /proc/cpuinfo is great. It is omnipresent and since it is provided by the kernel it is always as up to date as the kernel. But, it could be ambiguous about processor features which can be disabled by the kernel at boot-time or compile-time. There are some user space tools showing more raw features, but they are not bound with kernel, and go with distros. Many end users are still using old distros with new kernels (upgraded by themselves), and may not upgrade the distros only to get a newer tool. So here arise the need for a new tool, which * shows raw CPU features read from the CPUID instruction * will be easier to update compared to existing userspace tooling (perhaps distributed like perf) * inherits "modern" kernel development process, in contrast to some of the existing userspace CPUID tools which are still being developed without git and distributed in tarballs from non-https sites. * Can produce output consistent with /proc/cpuinfo to make comparison easier. The CPUID leaf definitions are kept in an .csv file which allows for updating only that file to add support for new feature leafs. This is based on prototype code from Borislav Petkov (http://sr71.net/~dave/intel/stupid-cpuid.c) [ bp: - Massage, add #define _GNU_SOURCE to fix implicit declaration of function ‘strcasestr' warning - remove superfluous newlines - fallback to cpuid.csv in the current dir if none found - fix typos - move comments over the lines instead of sideways. ] Originally-from: Borislav Petkov <bp(a)alien8.de> Suggested-by: Dave Hansen <dave.hansen(a)intel.com> Suggested-by: Borislav Petkov <bp(a)alien8.de> Signed-off-by: Feng Tang <feng.tang(a)intel.com> Signed-off-by: Borislav Petkov <bp(a)suse.de> Signed-off-by: zhangyue <zhangyue1(a)kylinos.cn> --- tools/arch/x86/kcpuid/Makefile | 24 ++ tools/arch/x86/kcpuid/cpuid.csv | 400 +++++++++++++++++++ tools/arch/x86/kcpuid/kcpuid.c | 657 ++++++++++++++++++++++++++++++++ 3 files changed, 1081 insertions(+) create mode 100644 tools/arch/x86/kcpuid/Makefile create mode 100644 tools/arch/x86/kcpuid/cpuid.csv create mode 100644 tools/arch/x86/kcpuid/kcpuid.c diff --git a/tools/arch/x86/kcpuid/Makefile b/tools/arch/x86/kcpuid/Makefile new file mode 100644 index 000000000000..a2f1e855092c --- /dev/null +++ b/tools/arch/x86/kcpuid/Makefile @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0 +# Makefile for x86/kcpuid tool + +kcpuid : kcpuid.c + +CFLAGS = -Wextra + +BINDIR ?= /usr/sbin + +HWDATADIR ?= /usr/share/misc/ + +override CFLAGS += -O2 -Wall -I../../../include + +%: %.c + $(CC) $(CFLAGS) -o $@ $< $(LDFLAGS) + +.PHONY : clean +clean : + @rm -f kcpuid + +install : kcpuid + install -d $(DESTDIR)$(BINDIR) + install -m 755 -p kcpuid $(DESTDIR)$(BINDIR)/kcpuid + install -m 444 -p cpuid.csv $(HWDATADIR)/cpuid.csv diff --git a/tools/arch/x86/kcpuid/cpuid.csv b/tools/arch/x86/kcpuid/cpuid.csv new file mode 100644 index 000000000000..e422fad9a98e --- /dev/null +++ b/tools/arch/x86/kcpuid/cpuid.csv @@ -0,0 +1,400 @@ +# The basic row format is: +# LEAF, SUBLEAF, register_name, bits, short_name, long_description + +# Leaf 00H + 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs + +# Leaf 01H + 1, 0, EAX, 3:0, stepping, Stepping ID + 1, 0, EAX, 7:4, model, Model + 1, 0, EAX, 11:8, family, Family ID + 1, 0, EAX, 13:12, processor, Processor Type + 1, 0, EAX, 19:16, model_ext, Extended Model ID + 1, 0, EAX, 27:20, family_ext, Extended Family ID + + 1, 0, EBX, 7:0, brand, Brand Index + 1, 0, EBX, 15:8, clflush_size, CLFLUSH line size (value * 8) in bytes + 1, 0, EBX, 23:16, max_cpu_id, Maxim number of addressable logic cpu in this package + 1, 0, EBX, 31:24, apic_id, Initial APIC ID + + 1, 0, ECX, 0, sse3, Streaming SIMD Extensions 3(SSE3) + 1, 0, ECX, 1, pclmulqdq, PCLMULQDQ instruction supported + 1, 0, ECX, 2, dtes64, DS area uses 64-bit layout + 1, 0, ECX, 3, mwait, MONITOR/MWAIT supported + 1, 0, ECX, 4, ds_cpl, CPL Qualified Debug Store which allows for branch message storage qualified by CPL + 1, 0, ECX, 5, vmx, Virtual Machine Extensions supported + 1, 0, ECX, 6, smx, Safer Mode Extension supported + 1, 0, ECX, 7, eist, Enhanced Intel SpeedStep Technology + 1, 0, ECX, 8, tm2, Thermal Monitor 2 + 1, 0, ECX, 9, ssse3, Supplemental Streaming SIMD Extensions 3 (SSSE3) + 1, 0, ECX, 10, l1_ctx_id, L1 data cache could be set to either adaptive mode or shared mode (check IA32_MISC_ENABLE bit 24 definition) + 1, 0, ECX, 11, sdbg, IA32_DEBUG_INTERFACE MSR for silicon debug supported + 1, 0, ECX, 12, fma, FMA extensions using YMM state supported + 1, 0, ECX, 13, cmpxchg16b, 'CMPXCHG16B - Compare and Exchange Bytes' supported + 1, 0, ECX, 14, xtpr_update, xTPR Update Control supported + 1, 0, ECX, 15, pdcm, Perfmon and Debug Capability present + 1, 0, ECX, 17, pcid, Process-Context Identifiers feature present + 1, 0, ECX, 18, dca, Prefetching data from a memory mapped device supported + 1, 0, ECX, 19, sse4_1, SSE4.1 feature present + 1, 0, ECX, 20, sse4_2, SSE4.2 feature present + 1, 0, ECX, 21, x2apic, x2APIC supported + 1, 0, ECX, 22, movbe, MOVBE instruction supported + 1, 0, ECX, 23, popcnt, POPCNT instruction supported + 1, 0, ECX, 24, tsc_deadline_timer, LAPIC supports one-shot operation using a TSC deadline value + 1, 0, ECX, 25, aesni, AESNI instruction supported + 1, 0, ECX, 26, xsave, XSAVE/XRSTOR processor extended states (XSETBV/XGETBV/XCR0) + 1, 0, ECX, 27, osxsave, OS has set CR4.OSXSAVE bit to enable XSETBV/XGETBV/XCR0 + 1, 0, ECX, 28, avx, AVX instruction supported + 1, 0, ECX, 29, f16c, 16-bit floating-point conversion instruction supported + 1, 0, ECX, 30, rdrand, RDRAND instruction supported + + 1, 0, EDX, 0, fpu, x87 FPU on chip + 1, 0, EDX, 1, vme, Virtual-8086 Mode Enhancement + 1, 0, EDX, 2, de, Debugging Extensions + 1, 0, EDX, 3, pse, Page Size Extensions + 1, 0, EDX, 4, tsc, Time Stamp Counter + 1, 0, EDX, 5, msr, RDMSR and WRMSR Support + 1, 0, EDX, 6, pae, Physical Address Extensions + 1, 0, EDX, 7, mce, Machine Check Exception + 1, 0, EDX, 8, cx8, CMPXCHG8B instr + 1, 0, EDX, 9, apic, APIC on Chip + 1, 0, EDX, 11, sep, SYSENTER and SYSEXIT instrs + 1, 0, EDX, 12, mtrr, Memory Type Range Registers + 1, 0, EDX, 13, pge, Page Global Bit + 1, 0, EDX, 14, mca, Machine Check Architecture + 1, 0, EDX, 15, cmov, Conditional Move Instrs + 1, 0, EDX, 16, pat, Page Attribute Table + 1, 0, EDX, 17, pse36, 36-Bit Page Size Extension + 1, 0, EDX, 18, psn, Processor Serial Number + 1, 0, EDX, 19, clflush, CLFLUSH instr +# 1, 0, EDX, 20, + 1, 0, EDX, 21, ds, Debug Store + 1, 0, EDX, 22, acpi, Thermal Monitor and Software Controlled Clock Facilities + 1, 0, EDX, 23, mmx, Intel MMX Technology + 1, 0, EDX, 24, fxsr, XSAVE and FXRSTOR Instrs + 1, 0, EDX, 25, sse, SSE + 1, 0, EDX, 26, sse2, SSE2 + 1, 0, EDX, 27, ss, Self Snoop + 1, 0, EDX, 28, hit, Max APIC IDs + 1, 0, EDX, 29, tm, Thermal Monitor +# 1, 0, EDX, 30, + 1, 0, EDX, 31, pbe, Pending Break Enable + +# Leaf 02H +# cache and TLB descriptor info + +# Leaf 03H +# Precessor Serial Number, introduced on Pentium III, not valid for +# latest models + +# Leaf 04H +# thread/core and cache topology + 4, 0, EAX, 4:0, cache_type, Cache type like instr/data or unified + 4, 0, EAX, 7:5, cache_level, Cache Level (starts at 1) + 4, 0, EAX, 8, cache_self_init, Cache Self Initialization + 4, 0, EAX, 9, fully_associate, Fully Associative cache +# 4, 0, EAX, 13:10, resvd, resvd + 4, 0, EAX, 25:14, max_logical_id, Max number of addressable IDs for logical processors sharing the cache + 4, 0, EAX, 31:26, max_phy_id, Max number of addressable IDs for processors in phy package + + 4, 0, EBX, 11:0, cache_linesize, Size of a cache line in bytes + 4, 0, EBX, 21:12, cache_partition, Physical Line partitions + 4, 0, EBX, 31:22, cache_ways, Ways of associativity + 4, 0, ECX, 31:0, cache_sets, Number of Sets - 1 + 4, 0, EDX, 0, c_wbinvd, 1 means WBINVD/INVD is not ganranteed to act upon lower level caches of non-originating threads sharing this cache + 4, 0, EDX, 1, c_incl, Whether cache is inclusive of lower cache level + 4, 0, EDX, 2, c_comp_index, Complex Cache Indexing + +# Leaf 05H +# MONITOR/MWAIT + 5, 0, EAX, 15:0, min_mon_size, Smallest monitor line size in bytes + 5, 0, EBX, 15:0, max_mon_size, Largest monitor line size in bytes + 5, 0, ECX, 0, mwait_ext, Enum of Monitor-Mwait extensions supported + 5, 0, ECX, 1, mwait_irq_break, Largest monitor line size in bytes + 5, 0, EDX, 3:0, c0_sub_stats, Number of C0* sub C-states supported using MWAIT + 5, 0, EDX, 7:4, c1_sub_stats, Number of C1* sub C-states supported using MWAIT + 5, 0, EDX, 11:8, c2_sub_stats, Number of C2* sub C-states supported using MWAIT + 5, 0, EDX, 15:12, c3_sub_stats, Number of C3* sub C-states supported using MWAIT + 5, 0, EDX, 19:16, c4_sub_stats, Number of C4* sub C-states supported using MWAIT + 5, 0, EDX, 23:20, c5_sub_stats, Number of C5* sub C-states supported using MWAIT + 5, 0, EDX, 27:24, c6_sub_stats, Number of C6* sub C-states supported using MWAIT + 5, 0, EDX, 31:28, c7_sub_stats, Number of C7* sub C-states supported using MWAIT + +# Leaf 06H +# Thermal & Power Management + + 6, 0, EAX, 0, dig_temp, Digital temperature sensor supported + 6, 0, EAX, 1, turbo, Intel Turbo Boost + 6, 0, EAX, 2, arat, Always running APIC timer +# 6, 0, EAX, 3, resv, Reserved + 6, 0, EAX, 4, pln, Power limit notifications supported + 6, 0, EAX, 5, ecmd, Clock modulation duty cycle extension supported + 6, 0, EAX, 6, ptm, Package thermal management supported + 6, 0, EAX, 7, hwp, HWP base register + 6, 0, EAX, 8, hwp_notify, HWP notification + 6, 0, EAX, 9, hwp_act_window, HWP activity window + 6, 0, EAX, 10, hwp_energy, HWP energy performance preference + 6, 0, EAX, 11, hwp_pkg_req, HWP package level request +# 6, 0, EAX, 12, resv, Reserved + 6, 0, EAX, 13, hdc, HDC base registers supported + 6, 0, EAX, 14, turbo3, Turbo Boost Max 3.0 + 6, 0, EAX, 15, hwp_cap, Highest Performance change supported + 6, 0, EAX, 16, hwp_peci, HWP PECI override is supported + 6, 0, EAX, 17, hwp_flex, Flexible HWP is supported + 6, 0, EAX, 18, hwp_fast, Fast access mode for the IA32_HWP_REQUEST MSR is supported +# 6, 0, EAX, 19, resv, Reserved + 6, 0, EAX, 20, hwp_ignr, Ignoring Idle Logical Processor HWP request is supported + + 6, 0, EBX, 3:0, therm_irq_thresh, Number of Interrupt Thresholds in Digital Thermal Sensor + 6, 0, ECX, 0, aperfmperf, Presence of IA32_MPERF and IA32_APERF + 6, 0, ECX, 3, energ_bias, Performance-energy bias preference supported + +# Leaf 07H +# ECX == 0 +# AVX512 refers to https://en.wikipedia.org/wiki/AVX-512 +# XXX: Do we really need to enumerate each and every AVX512 sub features + + 7, 0, EBX, 0, fsgsbase, RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE supported + 7, 0, EBX, 1, tsc_adjust, TSC_ADJUST MSR supported + 7, 0, EBX, 2, sgx, Software Guard Extensions + 7, 0, EBX, 3, bmi1, BMI1 + 7, 0, EBX, 4, hle, Hardware Lock Elision + 7, 0, EBX, 5, avx2, AVX2 +# 7, 0, EBX, 6, fdp_excp_only, x87 FPU Data Pointer updated only on x87 exceptions + 7, 0, EBX, 7, smep, Supervisor-Mode Execution Prevention + 7, 0, EBX, 8, bmi2, BMI2 + 7, 0, EBX, 9, rep_movsb, Enhanced REP MOVSB/STOSB + 7, 0, EBX, 10, invpcid, INVPCID instruction + 7, 0, EBX, 11, rtm, Restricted Transactional Memory + 7, 0, EBX, 12, rdt_m, Intel RDT Monitoring capability + 7, 0, EBX, 13, depc_fpu_cs_ds, Deprecates FPU CS and FPU DS + 7, 0, EBX, 14, mpx, Memory Protection Extensions + 7, 0, EBX, 15, rdt_a, Intel RDT Allocation capability + 7, 0, EBX, 16, avx512f, AVX512 Foundation instr + 7, 0, EBX, 17, avx512dq, AVX512 Double and Quadword AVX512 instr + 7, 0, EBX, 18, rdseed, RDSEED instr + 7, 0, EBX, 19, adx, ADX instr + 7, 0, EBX, 20, smap, Supervisor Mode Access Prevention + 7, 0, EBX, 21, avx512ifma, AVX512 Integer Fused Multiply Add +# 7, 0, EBX, 22, resvd, resvd + 7, 0, EBX, 23, clflushopt, CLFLUSHOPT instr + 7, 0, EBX, 24, clwb, CLWB instr + 7, 0, EBX, 25, intel_pt, Intel Processor Trace instr + 7, 0, EBX, 26, avx512pf, Prefetch + 7, 0, EBX, 27, avx512er, AVX512 Exponent Reciproca instr + 7, 0, EBX, 28, avx512cd, AVX512 Conflict Detection instr + 7, 0, EBX, 29, sha, Intel Secure Hash Algorithm Extensions instr + 7, 0, EBX, 26, avx512bw, AVX512 Byte & Word instr + 7, 0, EBX, 28, avx512vl, AVX512 Vector Length Extentions (VL) + 7, 0, ECX, 0, prefetchwt1, X + 7, 0, ECX, 1, avx512vbmi, AVX512 Vector Byte Manipulation Instructions + 7, 0, ECX, 2, umip, User-mode Instruction Prevention + + 7, 0, ECX, 3, pku, Protection Keys for User-mode pages + 7, 0, ECX, 4, ospke, CR4 PKE set to enable protection keys +# 7, 0, ECX, 16:5, resvd, resvd + 7, 0, ECX, 21:17, mawau, The value of MAWAU used by the BNDLDX and BNDSTX instructions in 64-bit mode + 7, 0, ECX, 22, rdpid, RDPID and IA32_TSC_AUX +# 7, 0, ECX, 29:23, resvd, resvd + 7, 0, ECX, 30, sgx_lc, SGX Launch Configuration +# 7, 0, ECX, 31, resvd, resvd + +# Leaf 08H +# + + +# Leaf 09H +# Direct Cache Access (DCA) information + 9, 0, ECX, 31:0, dca_cap, The value of IA32_PLATFORM_DCA_CAP + +# Leaf 0AH +# Architectural Performance Monitoring +# +# Do we really need to print out the PMU related stuff? +# Does normal user really care about it? +# + 0xA, 0, EAX, 7:0, pmu_ver, Performance Monitoring Unit version + 0xA, 0, EAX, 15:8, pmu_gp_cnt_num, Numer of general-purose PMU counters per logical CPU + 0xA, 0, EAX, 23:16, pmu_cnt_bits, Bit wideth of PMU counter + 0xA, 0, EAX, 31:24, pmu_ebx_bits, Length of EBX bit vector to enumerate PMU events + + 0xA, 0, EBX, 0, pmu_no_core_cycle_evt, Core cycle event not available + 0xA, 0, EBX, 1, pmu_no_instr_ret_evt, Instruction retired event not available + 0xA, 0, EBX, 2, pmu_no_ref_cycle_evt, Reference cycles event not available + 0xA, 0, EBX, 3, pmu_no_llc_ref_evt, Last-level cache reference event not available + 0xA, 0, EBX, 4, pmu_no_llc_mis_evt, Last-level cache misses event not available + 0xA, 0, EBX, 5, pmu_no_br_instr_ret_evt, Branch instruction retired event not available + 0xA, 0, EBX, 6, pmu_no_br_mispredict_evt, Branch mispredict retired event not available + + 0xA, 0, ECX, 4:0, pmu_fixed_cnt_num, Performance Monitoring Unit version + 0xA, 0, ECX, 12:5, pmu_fixed_cnt_bits, Numer of PMU counters per logical CPU + +# Leaf 0BH +# Extended Topology Enumeration Leaf +# + + 0xB, 0, EAX, 4:0, id_shift, Number of bits to shift right on x2APIC ID to get a unique topology ID of the next level type + 0xB, 0, EBX, 15:0, cpu_nr, Number of logical processors at this level type + 0xB, 0, ECX, 15:8, lvl_type, 0-Invalid 1-SMT 2-Core + 0xB, 0, EDX, 31:0, x2apic_id, x2APIC ID the current logical processor + + +# Leaf 0DH +# Processor Extended State + + 0xD, 0, EAX, 0, x87, X87 state + 0xD, 0, EAX, 1, sse, SSE state + 0xD, 0, EAX, 2, avx, AVX state + 0xD, 0, EAX, 4:3, mpx, MPX state + 0xD, 0, EAX, 7:5, avx512, AVX-512 state + 0xD, 0, EAX, 9, pkru, PKRU state + + 0xD, 0, EBX, 31:0, max_sz_xcr0, Maximum size (bytes) required by enabled features in XCR0 + 0xD, 0, ECX, 31:0, max_sz_xsave, Maximum size (bytes) of the XSAVE/XRSTOR save area + + 0xD, 1, EAX, 0, xsaveopt, XSAVEOPT available + 0xD, 1, EAX, 1, xsavec, XSAVEC and compacted form supported + 0xD, 1, EAX, 2, xgetbv, XGETBV supported + 0xD, 1, EAX, 3, xsaves, XSAVES/XRSTORS and IA32_XSS supported + + 0xD, 1, EBX, 31:0, max_sz_xcr0, Maximum size (bytes) required by enabled features in XCR0 + 0xD, 1, ECX, 8, pt, PT state + 0xD, 1, ECX, 11, cet_usr, CET user state + 0xD, 1, ECX, 12, cet_supv, CET supervisor state + 0xD, 1, ECX, 13, hdc, HDC state + 0xD, 1, ECX, 16, hwp, HWP state + +# Leaf 0FH +# Intel RDT Monitoring + + 0xF, 0, EBX, 31:0, rmid_range, Maximum range (zero-based) of RMID within this physical processor of all types + 0xF, 0, EDX, 1, l3c_rdt_mon, L3 Cache RDT Monitoring supported + + 0xF, 1, ECX, 31:0, rmid_range, Maximum range (zero-based) of RMID of this types + 0xF, 1, EDX, 0, l3c_ocp_mon, L3 Cache occupancy Monitoring supported + 0xF, 1, EDX, 1, l3c_tbw_mon, L3 Cache Total Bandwidth Monitoring supported + 0xF, 1, EDX, 2, l3c_lbw_mon, L3 Cache Local Bandwidth Monitoring supported + +# Leaf 10H +# Intel RDT Allocation + + 0x10, 0, EBX, 1, l3c_rdt_alloc, L3 Cache Allocation supported + 0x10, 0, EBX, 2, l2c_rdt_alloc, L2 Cache Allocation supported + 0x10, 0, EBX, 3, mem_bw_alloc, Memory Bandwidth Allocation supported + + +# Leaf 12H +# SGX Capability +# +# Some detailed SGX features not added yet + + 0x12, 0, EAX, 0, sgx1, L3 Cache Allocation supported + 0x12, 1, EAX, 0, sgx2, L3 Cache Allocation supported + + +# Leaf 14H +# Intel Processor Tracer +# + +# Leaf 15H +# Time Stamp Counter and Nominal Core Crystal Clock Information + + 0x15, 0, EAX, 31:0, tsc_denominator, The denominator of the TSC/”core crystal clock” ratio + 0x15, 0, EBX, 31:0, tsc_numerator, The numerator of the TSC/”core crystal clock” ratio + 0x15, 0, ECX, 31:0, nom_freq, Nominal frequency of the core crystal clock in Hz + +# Leaf 16H +# Processor Frequency Information + + 0x16, 0, EAX, 15:0, cpu_base_freq, Processor Base Frequency in MHz + 0x16, 0, EBX, 15:0, cpu_max_freq, Maximum Frequency in MHz + 0x16, 0, ECX, 15:0, bus_freq, Bus (Reference) Frequency in MHz + +# Leaf 17H +# System-On-Chip Vendor Attribute + + 0x17, 0, EAX, 31:0, max_socid, Maximum input value of supported sub-leaf + 0x17, 0, EBX, 15:0, soc_vid, SOC Vendor ID + 0x17, 0, EBX, 16, std_vid, SOC Vendor ID is assigned via an industry standard scheme + 0x17, 0, ECX, 31:0, soc_pid, SOC Project ID assigned by vendor + 0x17, 0, EDX, 31:0, soc_sid, SOC Stepping ID + +# Leaf 18H +# Deterministic Address Translation Parameters + + +# Leaf 19H +# Key Locker Leaf + + +# Leaf 1AH +# Hybrid Information + + 0x1A, 0, EAX, 31:24, core_type, 20H-Intel_Atom 40H-Intel_Core + + +# Leaf 1FH +# V2 Extended Topology - A preferred superset to leaf 0BH + + +# According to SDM +# 40000000H - 4FFFFFFFH is invalid range + + +# Leaf 80000001H +# Extended Processor Signature and Feature Bits + +0x80000001, 0, ECX, 0, lahf_lm, LAHF/SAHF available in 64-bit mode +0x80000001, 0, ECX, 5, lzcnt, LZCNT +0x80000001, 0, ECX, 8, prefetchw, PREFETCHW + +0x80000001, 0, EDX, 11, sysret, SYSCALL/SYSRET supported +0x80000001, 0, EDX, 20, exec_dis, Execute Disable Bit available +0x80000001, 0, EDX, 26, 1gb_page, 1GB page supported +0x80000001, 0, EDX, 27, rdtscp, RDTSCP and IA32_TSC_AUX are available +#0x80000001, 0, EDX, 29, 64b, 64b Architecture supported + +# Leaf 80000002H/80000003H/80000004H +# Processor Brand String + +# Leaf 80000005H +# Reserved + +# Leaf 80000006H +# Extended L2 Cache Features + +0x80000006, 0, ECX, 7:0, clsize, Cache Line size in bytes +0x80000006, 0, ECX, 15:12, l2c_assoc, L2 Associativity +0x80000006, 0, ECX, 31:16, csize, Cache size in 1K units + + +# Leaf 80000007H + +0x80000007, 0, EDX, 8, nonstop_tsc, Invariant TSC available + + +# Leaf 80000008H + +0x80000008, 0, EAX, 7:0, phy_adr_bits, Physical Address Bits +0x80000008, 0, EAX, 15:8, lnr_adr_bits, Linear Address Bits +0x80000007, 0, EBX, 9, wbnoinvd, WBNOINVD + +# 0x8000001E +# EAX: Extended APIC ID +0x8000001E, 0, EAX, 31:0, extended_apic_id, Extended APIC ID +# EBX: Core Identifiers +0x8000001E, 0, EBX, 7:0, core_id, Identifies the logical core ID +0x8000001E, 0, EBX, 15:8, threads_per_core, The number of threads per core is threads_per_core + 1 +# ECX: Node Identifiers +0x8000001E, 0, ECX, 7:0, node_id, Node ID +0x8000001E, 0, ECX, 10:8, nodes_per_processor, Nodes per processor { 0: 1 node, else reserved } + +# 8000001F: AMD Secure Encryption +0x8000001F, 0, EAX, 0, sme, Secure Memory Encryption +0x8000001F, 0, EAX, 1, sev, Secure Encrypted Virtualization +0x8000001F, 0, EAX, 2, vmpgflush, VM Page Flush MSR +0x8000001F, 0, EAX, 3, seves, SEV Encrypted State +0x8000001F, 0, EBX, 5:0, c-bit, Page table bit number used to enable memory encryption +0x8000001F, 0, EBX, 11:6, mem_encrypt_physaddr_width, Reduction of physical address space in bits with SME enabled +0x8000001F, 0, ECX, 31:0, num_encrypted_guests, Maximum ASID value that may be used for an SEV-enabled guest +0x8000001F, 0, EDX, 31:0, minimum_sev_asid, Minimum ASID value that must be used for an SEV-enabled, SEV-ES-disabled guest \ No newline at end of file diff --git a/tools/arch/x86/kcpuid/kcpuid.c b/tools/arch/x86/kcpuid/kcpuid.c new file mode 100644 index 000000000000..936a3a2aad04 --- /dev/null +++ b/tools/arch/x86/kcpuid/kcpuid.c @@ -0,0 +1,657 @@ +// SPDX-License-Identifier: GPL-2.0 +#define _GNU_SOURCE + +#include <stdio.h> +#include <stdbool.h> +#include <stdlib.h> +#include <string.h> +#include <getopt.h> + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +typedef unsigned int u32; +typedef unsigned long long u64; + +char *def_csv = "/usr/share/misc/cpuid.csv"; +char *user_csv; + + +/* Cover both single-bit flag and multiple-bits fields */ +struct bits_desc { + /* start and end bits */ + int start, end; + /* 0 or 1 for 1-bit flag */ + int value; + char simp[32]; + char detail[256]; +}; + +/* descriptor info for eax/ebx/ecx/edx */ +struct reg_desc { + /* number of valid entries */ + int nr; + struct bits_desc descs[32]; +}; + +enum { + R_EAX = 0, + R_EBX, + R_ECX, + R_EDX, + NR_REGS +}; + +struct subleaf { + u32 index; + u32 sub; + u32 eax, ebx, ecx, edx; + struct reg_desc info[NR_REGS]; +}; + +/* Represent one leaf (basic or extended) */ +struct cpuid_func { + /* + * Array of subleafs for this func, if there is no subleafs + * then the leafs[0] is the main leaf + */ + struct subleaf *leafs; + int nr; +}; + +struct cpuid_range { + /* array of main leafs */ + struct cpuid_func *funcs; + /* number of valid leafs */ + int nr; + bool is_ext; +}; + +/* + * basic: basic functions range: [0... ] + * ext: extended functions range: [0x80000000... ] + */ +struct cpuid_range *leafs_basic, *leafs_ext; + +static int num_leafs; +static bool is_amd; +static bool show_details; +static bool show_raw; +static bool show_flags_only = true; +static u32 user_index = 0xFFFFFFFF; +static u32 user_sub = 0xFFFFFFFF; +static int flines; + +static inline void cpuid(u32 *eax, u32 *ebx, u32 *ecx, u32 *edx) +{ + /* ecx is often an input as well as an output. */ + asm volatile("cpuid" + : "=a" (*eax), + "=b" (*ebx), + "=c" (*ecx), + "=d" (*edx) + : "0" (*eax), "2" (*ecx)); +} + +static inline bool has_subleafs(u32 f) +{ + if (f == 0x7 || f == 0xd) + return true; + + if (is_amd) { + if (f == 0x8000001d) + return true; + return false; + } + + switch (f) { + case 0x4: + case 0xb: + case 0xf: + case 0x10: + case 0x14: + case 0x18: + case 0x1f: + return true; + default: + return false; + } +} + +static void leaf_print_raw(struct subleaf *leaf) +{ + if (has_subleafs(leaf->index)) { + if (leaf->sub == 0) + printf("0x%08x: subleafs:\n", leaf->index); + + printf(" %2d: EAX=0x%08x, EBX=0x%08x, ECX=0x%08x, EDX=0x%08x\n", + leaf->sub, leaf->eax, leaf->ebx, leaf->ecx, leaf->edx); + } else { + printf("0x%08x: EAX=0x%08x, EBX=0x%08x, ECX=0x%08x, EDX=0x%08x\n", + leaf->index, leaf->eax, leaf->ebx, leaf->ecx, leaf->edx); + } +} + +/* Return true is the input eax/ebx/ecx/edx are all zero */ +static bool cpuid_store(struct cpuid_range *range, u32 f, int subleaf, + u32 a, u32 b, u32 c, u32 d) +{ + struct cpuid_func *func; + struct subleaf *leaf; + int s = 0; + + if (a == 0 && b == 0 && c == 0 && d == 0) + return true; + + /* + * Cut off vendor-prefix from CPUID function as we're using it as an + * index into ->funcs. + */ + func = &range->funcs[f & 0xffff]; + + if (!func->leafs) { + func->leafs = malloc(sizeof(struct subleaf)); + if (!func->leafs) + perror("malloc func leaf"); + + func->nr = 1; + } else { + s = func->nr; + func->leafs = realloc(func->leafs, (s + 1) * sizeof(*leaf)); + if (!func->leafs) + perror("realloc f->leafs"); + + func->nr++; + } + + leaf = &func->leafs[s]; + + leaf->index = f; + leaf->sub = subleaf; + leaf->eax = a; + leaf->ebx = b; + leaf->ecx = c; + leaf->edx = d; + + return false; +} + +static void raw_dump_range(struct cpuid_range *range) +{ + u32 f; + int i; + + printf("%s Leafs :\n", range->is_ext ? "Extended" : "Basic"); + printf("================\n"); + + for (f = 0; (int)f < range->nr; f++) { + struct cpuid_func *func = &range->funcs[f]; + u32 index = f; + + if (range->is_ext) + index += 0x80000000; + + /* Skip leaf without valid items */ + if (!func->nr) + continue; + + /* First item is the main leaf, followed by all subleafs */ + for (i = 0; i < func->nr; i++) + leaf_print_raw(&func->leafs[i]); + } +} + +#define MAX_SUBLEAF_NUM 32 +struct cpuid_range *setup_cpuid_range(u32 input_eax) +{ + u32 max_func, idx_func; + int subleaf; + struct cpuid_range *range; + u32 eax, ebx, ecx, edx; + u32 f = input_eax; + int max_subleaf; + bool allzero; + + eax = input_eax; + ebx = ecx = edx = 0; + + cpuid(&eax, &ebx, &ecx, &edx); + max_func = eax; + idx_func = (max_func & 0xffff) + 1; + + range = malloc(sizeof(struct cpuid_range)); + if (!range) + perror("malloc range"); + + if (input_eax & 0x80000000) + range->is_ext = true; + else + range->is_ext = false; + + range->funcs = malloc(sizeof(struct cpuid_func) * idx_func); + if (!range->funcs) + perror("malloc range->funcs"); + + range->nr = idx_func; + memset(range->funcs, 0, sizeof(struct cpuid_func) * idx_func); + + for (; f <= max_func; f++) { + eax = f; + subleaf = ecx = 0; + + cpuid(&eax, &ebx, &ecx, &edx); + allzero = cpuid_store(range, f, subleaf, eax, ebx, ecx, edx); + if (allzero) + continue; + num_leafs++; + + if (!has_subleafs(f)) + continue; + + max_subleaf = MAX_SUBLEAF_NUM; + + /* + * Some can provide the exact number of subleafs, + * others have to be tried (0xf) + */ + if (f == 0x7 || f == 0x14 || f == 0x17 || f == 0x18) + max_subleaf = (eax & 0xff) + 1; + + if (f == 0xb) + max_subleaf = 2; + + for (subleaf = 1; subleaf < max_subleaf; subleaf++) { + eax = f; + ecx = subleaf; + + cpuid(&eax, &ebx, &ecx, &edx); + allzero = cpuid_store(range, f, subleaf, + eax, ebx, ecx, edx); + if (allzero) + continue; + num_leafs++; + } + + } + + return range; +} + +/* + * The basic row format for cpuid.csv is + * LEAF,SUBLEAF,register_name,bits,short name,long description + * + * like: + * 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs + * 1, 0, ECX, 0, sse3, Streaming SIMD Extensions 3(SSE3) + */ +static int parse_line(char *line) +{ + char *str; + int i; + struct cpuid_range *range; + struct cpuid_func *func; + struct subleaf *leaf; + u32 index; + u32 sub; + char buffer[512]; + char *buf; + /* + * Tokens: + * 1. leaf + * 2. subleaf + * 3. register + * 4. bits + * 5. short name + * 6. long detail + */ + char *tokens[6]; + struct reg_desc *reg; + struct bits_desc *bdesc; + int reg_index; + char *start, *end; + + /* Skip comments and NULL line */ + if (line[0] == '#' || line[0] == '\n') + return 0; + + strncpy(buffer, line, 511); + buffer[511] = 0; + str = buffer; + for (i = 0; i < 5; i++) { + tokens[i] = strtok(str, ","); + if (!tokens[i]) + goto err_exit; + str = NULL; + } + tokens[5] = strtok(str, "\n"); + if (!tokens[5]) + goto err_exit; + + /* index/main-leaf */ + index = strtoull(tokens[0], NULL, 0); + + if (index & 0x80000000) + range = leafs_ext; + else + range = leafs_basic; + + index &= 0x7FFFFFFF; + /* Skip line parsing for non-existing indexes */ + if ((int)index >= range->nr) + return -1; + + func = &range->funcs[index]; + + /* Return if the index has no valid item on this platform */ + if (!func->nr) + return 0; + + /* subleaf */ + sub = strtoul(tokens[1], NULL, 0); + if ((int)sub > func->nr) + return -1; + + leaf = &func->leafs[sub]; + buf = tokens[2]; + + if (strcasestr(buf, "EAX")) + reg_index = R_EAX; + else if (strcasestr(buf, "EBX")) + reg_index = R_EBX; + else if (strcasestr(buf, "ECX")) + reg_index = R_ECX; + else if (strcasestr(buf, "EDX")) + reg_index = R_EDX; + else + goto err_exit; + + reg = &leaf->info[reg_index]; + bdesc = &reg->descs[reg->nr++]; + + /* bit flag or bits field */ + buf = tokens[3]; + + end = strtok(buf, ":"); + bdesc->end = strtoul(end, NULL, 0); + bdesc->start = bdesc->end; + + /* start != NULL means it is bit fields */ + start = strtok(NULL, ":"); + if (start) + bdesc->start = strtoul(start, NULL, 0); + + strcpy(bdesc->simp, tokens[4]); + strcpy(bdesc->detail, tokens[5]); + return 0; + +err_exit: + printf("Warning: wrong line format:\n"); + printf("\tline[%d]: %s\n", flines, line); + return -1; +} + +/* Parse csv file, and construct the array of all leafs and subleafs */ +static void parse_text(void) +{ + FILE *file; + char *filename, *line = NULL; + size_t len = 0; + int ret; + + if (show_raw) + return; + + filename = user_csv ? user_csv : def_csv; + file = fopen(filename, "r"); + if (!file) { + /* Fallback to a csv in the same dir */ + file = fopen("./cpuid.csv", "r"); + } + + if (!file) { + printf("Fail to open '%s'\n", filename); + return; + } + + while (1) { + ret = getline(&line, &len, file); + flines++; + if (ret > 0) + parse_line(line); + + if (feof(file)) + break; + } + + fclose(file); +} + + +/* Decode every eax/ebx/ecx/edx */ +static void decode_bits(u32 value, struct reg_desc *rdesc) +{ + struct bits_desc *bdesc; + int start, end, i; + u32 mask; + + for (i = 0; i < rdesc->nr; i++) { + bdesc = &rdesc->descs[i]; + + start = bdesc->start; + end = bdesc->end; + if (start == end) { + /* single bit flag */ + if (value & (1 << start)) + printf("\t%-20s %s%s\n", + bdesc->simp, + show_details ? "-" : "", + show_details ? bdesc->detail : "" + ); + } else { + /* bit fields */ + if (show_flags_only) + continue; + + mask = ((u64)1 << (end - start + 1)) - 1; + printf("\t%-20s\t: 0x%-8x\t%s%s\n", + bdesc->simp, + (value >> start) & mask, + show_details ? "-" : "", + show_details ? bdesc->detail : "" + ); + } + } +} + +static void show_leaf(struct subleaf *leaf) +{ + if (!leaf) + return; + + if (show_raw) + leaf_print_raw(leaf); + + decode_bits(leaf->eax, &leaf->info[R_EAX]); + decode_bits(leaf->ebx, &leaf->info[R_EBX]); + decode_bits(leaf->ecx, &leaf->info[R_ECX]); + decode_bits(leaf->edx, &leaf->info[R_EDX]); +} + +static void show_func(struct cpuid_func *func) +{ + int i; + + if (!func) + return; + + for (i = 0; i < func->nr; i++) + show_leaf(&func->leafs[i]); +} + +static void show_range(struct cpuid_range *range) +{ + int i; + + for (i = 0; i < range->nr; i++) + show_func(&range->funcs[i]); +} + +static inline struct cpuid_func *index_to_func(u32 index) +{ + struct cpuid_range *range; + + range = (index & 0x80000000) ? leafs_ext : leafs_basic; + index &= 0x7FFFFFFF; + + if (((index & 0xFFFF) + 1) > (u32)range->nr) { + printf("ERR: invalid input index (0x%x)\n", index); + return NULL; + } + return &range->funcs[index]; +} + +static void show_info(void) +{ + struct cpuid_func *func; + + if (show_raw) { + /* Show all of the raw output of 'cpuid' instr */ + raw_dump_range(leafs_basic); + raw_dump_range(leafs_ext); + return; + } + + if (user_index != 0xFFFFFFFF) { + /* Only show specific leaf/subleaf info */ + func = index_to_func(user_index); + if (!func) + return; + + /* Dump the raw data also */ + show_raw = true; + + if (user_sub != 0xFFFFFFFF) { + if (user_sub + 1 <= (u32)func->nr) { + show_leaf(&func->leafs[user_sub]); + return; + } + + printf("ERR: invalid input subleaf (0x%x)\n", user_sub); + } + + show_func(func); + return; + } + + printf("CPU features:\n=============\n\n"); + show_range(leafs_basic); + show_range(leafs_ext); +} + +static void setup_platform_cpuid(void) +{ + u32 eax, ebx, ecx, edx; + + /* Check vendor */ + eax = ebx = ecx = edx = 0; + cpuid(&eax, &ebx, &ecx, &edx); + + /* "htuA" */ + if (ebx == 0x68747541) + is_amd = true; + + /* Setup leafs for the basic and extended range */ + leafs_basic = setup_cpuid_range(0x0); + leafs_ext = setup_cpuid_range(0x80000000); +} + +static void usage(void) +{ + printf("kcpuid [-abdfhr] [-l leaf] [-s subleaf]\n" + "\t-a|--all Show both bit flags and complex bit fields info\n" + "\t-b|--bitflags Show boolean flags only\n" + "\t-d|--detail Show details of the flag/fields (default)\n" + "\t-f|--flags Specify the cpuid csv file\n" + "\t-h|--help Show usage info\n" + "\t-l|--leaf=index Specify the leaf you want to check\n" + "\t-r|--raw Show raw cpuid data\n" + "\t-s|--subleaf=sub Specify the subleaf you want to check\n" + ); +} + +static struct option opts[] = { + { "all", no_argument, NULL, 'a' }, /* show both bit flags and fields */ + { "bitflags", no_argument, NULL, 'b' }, /* only show bit flags, default on */ + { "detail", no_argument, NULL, 'd' }, /* show detail descriptions */ + { "file", required_argument, NULL, 'f' }, /* use user's cpuid file */ + { "help", no_argument, NULL, 'h'}, /* show usage */ + { "leaf", required_argument, NULL, 'l'}, /* only check a specific leaf */ + { "raw", no_argument, NULL, 'r'}, /* show raw CPUID leaf data */ + { "subleaf", required_argument, NULL, 's'}, /* check a specific subleaf */ + { NULL, 0, NULL, 0 } +}; + +static int parse_options(int argc, char *argv[]) +{ + int c; + + while ((c = getopt_long(argc, argv, "abdf:hl:rs:", + opts, NULL)) != -1) + switch (c) { + case 'a': + show_flags_only = false; + break; + case 'b': + show_flags_only = true; + break; + case 'd': + show_details = true; + break; + case 'f': + user_csv = optarg; + break; + case 'h': + usage(); + exit(1); + break; + case 'l': + /* main leaf */ + user_index = strtoul(optarg, NULL, 0); + break; + case 'r': + show_raw = true; + break; + case 's': + /* subleaf */ + user_sub = strtoul(optarg, NULL, 0); + break; + default: + printf("%s: Invalid option '%c'\n", argv[0], optopt); + return -1; + } + + return 0; +} + +/* + * Do 4 things in turn: + * 1. Parse user options + * 2. Parse and store all the CPUID leaf data supported on this platform + * 2. Parse the csv file, while skipping leafs which are not available + * on this platform + * 3. Print leafs info based on user options + */ +int main(int argc, char *argv[]) +{ + if (parse_options(argc, argv)) + return -1; + + /* Setup the cpuid leafs of current platform */ + setup_platform_cpuid(); + + /* Read and parse the 'cpuid.csv' */ + parse_text(); + + show_info(); + return 0; +} \ No newline at end of file -- 2.30.0

1 0

[PATCH kernel-5.10] Add a kcpuid tool to show raw CPU features
by zhangyue 26 Oct '21

26 Oct '21

From: Feng Tang <feng.tang(a)intel.com> mainline inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4CMMB?from=project-issue CVE: NA ------------------------------------ End users frequently want to know what features their processor supports, independent of what the kernel supports. /proc/cpuinfo is great. It is omnipresent and since it is provided by the kernel it is always as up to date as the kernel. But, it could be ambiguous about processor features which can be disabled by the kernel at boot-time or compile-time. There are some user space tools showing more raw features, but they are not bound with kernel, and go with distros. Many end users are still using old distros with new kernels (upgraded by themselves), and may not upgrade the distros only to get a newer tool. So here arise the need for a new tool, which * shows raw CPU features read from the CPUID instruction * will be easier to update compared to existing userspace tooling (perhaps distributed like perf) * inherits "modern" kernel development process, in contrast to some of the existing userspace CPUID tools which are still being developed without git and distributed in tarballs from non-https sites. * Can produce output consistent with /proc/cpuinfo to make comparison easier. The CPUID leaf definitions are kept in an .csv file which allows for updating only that file to add support for new feature leafs. This is based on prototype code from Borislav Petkov (http://sr71.net/~dave/intel/stupid-cpuid.c) [ bp: - Massage, add #define _GNU_SOURCE to fix implicit declaration of function ‘strcasestr' warning - remove superfluous newlines - fallback to cpuid.csv in the current dir if none found - fix typos - move comments over the lines instead of sideways. ] Originally-from: Borislav Petkov <bp(a)alien8.de> Suggested-by: Dave Hansen <dave.hansen(a)intel.com> Suggested-by: Borislav Petkov <bp(a)alien8.de> Signed-off-by: Feng Tang <feng.tang(a)intel.com> Signed-off-by: Borislav Petkov <bp(a)suse.de> Signed-off-by: zhangyue <zhangyue1(a)kylinos.cn> --- tools/arch/x86/kcpuid/Makefile | 24 ++ tools/arch/x86/kcpuid/cpuid.csv | 400 +++++++++++++++++++ tools/arch/x86/kcpuid/kcpuid.c | 657 ++++++++++++++++++++++++++++++++ 3 files changed, 1081 insertions(+) create mode 100644 tools/arch/x86/kcpuid/Makefile create mode 100644 tools/arch/x86/kcpuid/cpuid.csv create mode 100644 tools/arch/x86/kcpuid/kcpuid.c diff --git a/tools/arch/x86/kcpuid/Makefile b/tools/arch/x86/kcpuid/Makefile new file mode 100644 index 000000000000..a2f1e855092c --- /dev/null +++ b/tools/arch/x86/kcpuid/Makefile @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0 +# Makefile for x86/kcpuid tool + +kcpuid : kcpuid.c + +CFLAGS = -Wextra + +BINDIR ?= /usr/sbin + +HWDATADIR ?= /usr/share/misc/ + +override CFLAGS += -O2 -Wall -I../../../include + +%: %.c + $(CC) $(CFLAGS) -o $@ $< $(LDFLAGS) + +.PHONY : clean +clean : + @rm -f kcpuid + +install : kcpuid + install -d $(DESTDIR)$(BINDIR) + install -m 755 -p kcpuid $(DESTDIR)$(BINDIR)/kcpuid + install -m 444 -p cpuid.csv $(HWDATADIR)/cpuid.csv diff --git a/tools/arch/x86/kcpuid/cpuid.csv b/tools/arch/x86/kcpuid/cpuid.csv new file mode 100644 index 000000000000..e422fad9a98e --- /dev/null +++ b/tools/arch/x86/kcpuid/cpuid.csv @@ -0,0 +1,400 @@ +# The basic row format is: +# LEAF, SUBLEAF, register_name, bits, short_name, long_description + +# Leaf 00H + 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs + +# Leaf 01H + 1, 0, EAX, 3:0, stepping, Stepping ID + 1, 0, EAX, 7:4, model, Model + 1, 0, EAX, 11:8, family, Family ID + 1, 0, EAX, 13:12, processor, Processor Type + 1, 0, EAX, 19:16, model_ext, Extended Model ID + 1, 0, EAX, 27:20, family_ext, Extended Family ID + + 1, 0, EBX, 7:0, brand, Brand Index + 1, 0, EBX, 15:8, clflush_size, CLFLUSH line size (value * 8) in bytes + 1, 0, EBX, 23:16, max_cpu_id, Maxim number of addressable logic cpu in this package + 1, 0, EBX, 31:24, apic_id, Initial APIC ID + + 1, 0, ECX, 0, sse3, Streaming SIMD Extensions 3(SSE3) + 1, 0, ECX, 1, pclmulqdq, PCLMULQDQ instruction supported + 1, 0, ECX, 2, dtes64, DS area uses 64-bit layout + 1, 0, ECX, 3, mwait, MONITOR/MWAIT supported + 1, 0, ECX, 4, ds_cpl, CPL Qualified Debug Store which allows for branch message storage qualified by CPL + 1, 0, ECX, 5, vmx, Virtual Machine Extensions supported + 1, 0, ECX, 6, smx, Safer Mode Extension supported + 1, 0, ECX, 7, eist, Enhanced Intel SpeedStep Technology + 1, 0, ECX, 8, tm2, Thermal Monitor 2 + 1, 0, ECX, 9, ssse3, Supplemental Streaming SIMD Extensions 3 (SSSE3) + 1, 0, ECX, 10, l1_ctx_id, L1 data cache could be set to either adaptive mode or shared mode (check IA32_MISC_ENABLE bit 24 definition) + 1, 0, ECX, 11, sdbg, IA32_DEBUG_INTERFACE MSR for silicon debug supported + 1, 0, ECX, 12, fma, FMA extensions using YMM state supported + 1, 0, ECX, 13, cmpxchg16b, 'CMPXCHG16B - Compare and Exchange Bytes' supported + 1, 0, ECX, 14, xtpr_update, xTPR Update Control supported + 1, 0, ECX, 15, pdcm, Perfmon and Debug Capability present + 1, 0, ECX, 17, pcid, Process-Context Identifiers feature present + 1, 0, ECX, 18, dca, Prefetching data from a memory mapped device supported + 1, 0, ECX, 19, sse4_1, SSE4.1 feature present + 1, 0, ECX, 20, sse4_2, SSE4.2 feature present + 1, 0, ECX, 21, x2apic, x2APIC supported + 1, 0, ECX, 22, movbe, MOVBE instruction supported + 1, 0, ECX, 23, popcnt, POPCNT instruction supported + 1, 0, ECX, 24, tsc_deadline_timer, LAPIC supports one-shot operation using a TSC deadline value + 1, 0, ECX, 25, aesni, AESNI instruction supported + 1, 0, ECX, 26, xsave, XSAVE/XRSTOR processor extended states (XSETBV/XGETBV/XCR0) + 1, 0, ECX, 27, osxsave, OS has set CR4.OSXSAVE bit to enable XSETBV/XGETBV/XCR0 + 1, 0, ECX, 28, avx, AVX instruction supported + 1, 0, ECX, 29, f16c, 16-bit floating-point conversion instruction supported + 1, 0, ECX, 30, rdrand, RDRAND instruction supported + + 1, 0, EDX, 0, fpu, x87 FPU on chip + 1, 0, EDX, 1, vme, Virtual-8086 Mode Enhancement + 1, 0, EDX, 2, de, Debugging Extensions + 1, 0, EDX, 3, pse, Page Size Extensions + 1, 0, EDX, 4, tsc, Time Stamp Counter + 1, 0, EDX, 5, msr, RDMSR and WRMSR Support + 1, 0, EDX, 6, pae, Physical Address Extensions + 1, 0, EDX, 7, mce, Machine Check Exception + 1, 0, EDX, 8, cx8, CMPXCHG8B instr + 1, 0, EDX, 9, apic, APIC on Chip + 1, 0, EDX, 11, sep, SYSENTER and SYSEXIT instrs + 1, 0, EDX, 12, mtrr, Memory Type Range Registers + 1, 0, EDX, 13, pge, Page Global Bit + 1, 0, EDX, 14, mca, Machine Check Architecture + 1, 0, EDX, 15, cmov, Conditional Move Instrs + 1, 0, EDX, 16, pat, Page Attribute Table + 1, 0, EDX, 17, pse36, 36-Bit Page Size Extension + 1, 0, EDX, 18, psn, Processor Serial Number + 1, 0, EDX, 19, clflush, CLFLUSH instr +# 1, 0, EDX, 20, + 1, 0, EDX, 21, ds, Debug Store + 1, 0, EDX, 22, acpi, Thermal Monitor and Software Controlled Clock Facilities + 1, 0, EDX, 23, mmx, Intel MMX Technology + 1, 0, EDX, 24, fxsr, XSAVE and FXRSTOR Instrs + 1, 0, EDX, 25, sse, SSE + 1, 0, EDX, 26, sse2, SSE2 + 1, 0, EDX, 27, ss, Self Snoop + 1, 0, EDX, 28, hit, Max APIC IDs + 1, 0, EDX, 29, tm, Thermal Monitor +# 1, 0, EDX, 30, + 1, 0, EDX, 31, pbe, Pending Break Enable + +# Leaf 02H +# cache and TLB descriptor info + +# Leaf 03H +# Precessor Serial Number, introduced on Pentium III, not valid for +# latest models + +# Leaf 04H +# thread/core and cache topology + 4, 0, EAX, 4:0, cache_type, Cache type like instr/data or unified + 4, 0, EAX, 7:5, cache_level, Cache Level (starts at 1) + 4, 0, EAX, 8, cache_self_init, Cache Self Initialization + 4, 0, EAX, 9, fully_associate, Fully Associative cache +# 4, 0, EAX, 13:10, resvd, resvd + 4, 0, EAX, 25:14, max_logical_id, Max number of addressable IDs for logical processors sharing the cache + 4, 0, EAX, 31:26, max_phy_id, Max number of addressable IDs for processors in phy package + + 4, 0, EBX, 11:0, cache_linesize, Size of a cache line in bytes + 4, 0, EBX, 21:12, cache_partition, Physical Line partitions + 4, 0, EBX, 31:22, cache_ways, Ways of associativity + 4, 0, ECX, 31:0, cache_sets, Number of Sets - 1 + 4, 0, EDX, 0, c_wbinvd, 1 means WBINVD/INVD is not ganranteed to act upon lower level caches of non-originating threads sharing this cache + 4, 0, EDX, 1, c_incl, Whether cache is inclusive of lower cache level + 4, 0, EDX, 2, c_comp_index, Complex Cache Indexing + +# Leaf 05H +# MONITOR/MWAIT + 5, 0, EAX, 15:0, min_mon_size, Smallest monitor line size in bytes + 5, 0, EBX, 15:0, max_mon_size, Largest monitor line size in bytes + 5, 0, ECX, 0, mwait_ext, Enum of Monitor-Mwait extensions supported + 5, 0, ECX, 1, mwait_irq_break, Largest monitor line size in bytes + 5, 0, EDX, 3:0, c0_sub_stats, Number of C0* sub C-states supported using MWAIT + 5, 0, EDX, 7:4, c1_sub_stats, Number of C1* sub C-states supported using MWAIT + 5, 0, EDX, 11:8, c2_sub_stats, Number of C2* sub C-states supported using MWAIT + 5, 0, EDX, 15:12, c3_sub_stats, Number of C3* sub C-states supported using MWAIT + 5, 0, EDX, 19:16, c4_sub_stats, Number of C4* sub C-states supported using MWAIT + 5, 0, EDX, 23:20, c5_sub_stats, Number of C5* sub C-states supported using MWAIT + 5, 0, EDX, 27:24, c6_sub_stats, Number of C6* sub C-states supported using MWAIT + 5, 0, EDX, 31:28, c7_sub_stats, Number of C7* sub C-states supported using MWAIT + +# Leaf 06H +# Thermal & Power Management + + 6, 0, EAX, 0, dig_temp, Digital temperature sensor supported + 6, 0, EAX, 1, turbo, Intel Turbo Boost + 6, 0, EAX, 2, arat, Always running APIC timer +# 6, 0, EAX, 3, resv, Reserved + 6, 0, EAX, 4, pln, Power limit notifications supported + 6, 0, EAX, 5, ecmd, Clock modulation duty cycle extension supported + 6, 0, EAX, 6, ptm, Package thermal management supported + 6, 0, EAX, 7, hwp, HWP base register + 6, 0, EAX, 8, hwp_notify, HWP notification + 6, 0, EAX, 9, hwp_act_window, HWP activity window + 6, 0, EAX, 10, hwp_energy, HWP energy performance preference + 6, 0, EAX, 11, hwp_pkg_req, HWP package level request +# 6, 0, EAX, 12, resv, Reserved + 6, 0, EAX, 13, hdc, HDC base registers supported + 6, 0, EAX, 14, turbo3, Turbo Boost Max 3.0 + 6, 0, EAX, 15, hwp_cap, Highest Performance change supported + 6, 0, EAX, 16, hwp_peci, HWP PECI override is supported + 6, 0, EAX, 17, hwp_flex, Flexible HWP is supported + 6, 0, EAX, 18, hwp_fast, Fast access mode for the IA32_HWP_REQUEST MSR is supported +# 6, 0, EAX, 19, resv, Reserved + 6, 0, EAX, 20, hwp_ignr, Ignoring Idle Logical Processor HWP request is supported + + 6, 0, EBX, 3:0, therm_irq_thresh, Number of Interrupt Thresholds in Digital Thermal Sensor + 6, 0, ECX, 0, aperfmperf, Presence of IA32_MPERF and IA32_APERF + 6, 0, ECX, 3, energ_bias, Performance-energy bias preference supported + +# Leaf 07H +# ECX == 0 +# AVX512 refers to https://en.wikipedia.org/wiki/AVX-512 +# XXX: Do we really need to enumerate each and every AVX512 sub features + + 7, 0, EBX, 0, fsgsbase, RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE supported + 7, 0, EBX, 1, tsc_adjust, TSC_ADJUST MSR supported + 7, 0, EBX, 2, sgx, Software Guard Extensions + 7, 0, EBX, 3, bmi1, BMI1 + 7, 0, EBX, 4, hle, Hardware Lock Elision + 7, 0, EBX, 5, avx2, AVX2 +# 7, 0, EBX, 6, fdp_excp_only, x87 FPU Data Pointer updated only on x87 exceptions + 7, 0, EBX, 7, smep, Supervisor-Mode Execution Prevention + 7, 0, EBX, 8, bmi2, BMI2 + 7, 0, EBX, 9, rep_movsb, Enhanced REP MOVSB/STOSB + 7, 0, EBX, 10, invpcid, INVPCID instruction + 7, 0, EBX, 11, rtm, Restricted Transactional Memory + 7, 0, EBX, 12, rdt_m, Intel RDT Monitoring capability + 7, 0, EBX, 13, depc_fpu_cs_ds, Deprecates FPU CS and FPU DS + 7, 0, EBX, 14, mpx, Memory Protection Extensions + 7, 0, EBX, 15, rdt_a, Intel RDT Allocation capability + 7, 0, EBX, 16, avx512f, AVX512 Foundation instr + 7, 0, EBX, 17, avx512dq, AVX512 Double and Quadword AVX512 instr + 7, 0, EBX, 18, rdseed, RDSEED instr + 7, 0, EBX, 19, adx, ADX instr + 7, 0, EBX, 20, smap, Supervisor Mode Access Prevention + 7, 0, EBX, 21, avx512ifma, AVX512 Integer Fused Multiply Add +# 7, 0, EBX, 22, resvd, resvd + 7, 0, EBX, 23, clflushopt, CLFLUSHOPT instr + 7, 0, EBX, 24, clwb, CLWB instr + 7, 0, EBX, 25, intel_pt, Intel Processor Trace instr + 7, 0, EBX, 26, avx512pf, Prefetch + 7, 0, EBX, 27, avx512er, AVX512 Exponent Reciproca instr + 7, 0, EBX, 28, avx512cd, AVX512 Conflict Detection instr + 7, 0, EBX, 29, sha, Intel Secure Hash Algorithm Extensions instr + 7, 0, EBX, 26, avx512bw, AVX512 Byte & Word instr + 7, 0, EBX, 28, avx512vl, AVX512 Vector Length Extentions (VL) + 7, 0, ECX, 0, prefetchwt1, X + 7, 0, ECX, 1, avx512vbmi, AVX512 Vector Byte Manipulation Instructions + 7, 0, ECX, 2, umip, User-mode Instruction Prevention + + 7, 0, ECX, 3, pku, Protection Keys for User-mode pages + 7, 0, ECX, 4, ospke, CR4 PKE set to enable protection keys +# 7, 0, ECX, 16:5, resvd, resvd + 7, 0, ECX, 21:17, mawau, The value of MAWAU used by the BNDLDX and BNDSTX instructions in 64-bit mode + 7, 0, ECX, 22, rdpid, RDPID and IA32_TSC_AUX +# 7, 0, ECX, 29:23, resvd, resvd + 7, 0, ECX, 30, sgx_lc, SGX Launch Configuration +# 7, 0, ECX, 31, resvd, resvd + +# Leaf 08H +# + + +# Leaf 09H +# Direct Cache Access (DCA) information + 9, 0, ECX, 31:0, dca_cap, The value of IA32_PLATFORM_DCA_CAP + +# Leaf 0AH +# Architectural Performance Monitoring +# +# Do we really need to print out the PMU related stuff? +# Does normal user really care about it? +# + 0xA, 0, EAX, 7:0, pmu_ver, Performance Monitoring Unit version + 0xA, 0, EAX, 15:8, pmu_gp_cnt_num, Numer of general-purose PMU counters per logical CPU + 0xA, 0, EAX, 23:16, pmu_cnt_bits, Bit wideth of PMU counter + 0xA, 0, EAX, 31:24, pmu_ebx_bits, Length of EBX bit vector to enumerate PMU events + + 0xA, 0, EBX, 0, pmu_no_core_cycle_evt, Core cycle event not available + 0xA, 0, EBX, 1, pmu_no_instr_ret_evt, Instruction retired event not available + 0xA, 0, EBX, 2, pmu_no_ref_cycle_evt, Reference cycles event not available + 0xA, 0, EBX, 3, pmu_no_llc_ref_evt, Last-level cache reference event not available + 0xA, 0, EBX, 4, pmu_no_llc_mis_evt, Last-level cache misses event not available + 0xA, 0, EBX, 5, pmu_no_br_instr_ret_evt, Branch instruction retired event not available + 0xA, 0, EBX, 6, pmu_no_br_mispredict_evt, Branch mispredict retired event not available + + 0xA, 0, ECX, 4:0, pmu_fixed_cnt_num, Performance Monitoring Unit version + 0xA, 0, ECX, 12:5, pmu_fixed_cnt_bits, Numer of PMU counters per logical CPU + +# Leaf 0BH +# Extended Topology Enumeration Leaf +# + + 0xB, 0, EAX, 4:0, id_shift, Number of bits to shift right on x2APIC ID to get a unique topology ID of the next level type + 0xB, 0, EBX, 15:0, cpu_nr, Number of logical processors at this level type + 0xB, 0, ECX, 15:8, lvl_type, 0-Invalid 1-SMT 2-Core + 0xB, 0, EDX, 31:0, x2apic_id, x2APIC ID the current logical processor + + +# Leaf 0DH +# Processor Extended State + + 0xD, 0, EAX, 0, x87, X87 state + 0xD, 0, EAX, 1, sse, SSE state + 0xD, 0, EAX, 2, avx, AVX state + 0xD, 0, EAX, 4:3, mpx, MPX state + 0xD, 0, EAX, 7:5, avx512, AVX-512 state + 0xD, 0, EAX, 9, pkru, PKRU state + + 0xD, 0, EBX, 31:0, max_sz_xcr0, Maximum size (bytes) required by enabled features in XCR0 + 0xD, 0, ECX, 31:0, max_sz_xsave, Maximum size (bytes) of the XSAVE/XRSTOR save area + + 0xD, 1, EAX, 0, xsaveopt, XSAVEOPT available + 0xD, 1, EAX, 1, xsavec, XSAVEC and compacted form supported + 0xD, 1, EAX, 2, xgetbv, XGETBV supported + 0xD, 1, EAX, 3, xsaves, XSAVES/XRSTORS and IA32_XSS supported + + 0xD, 1, EBX, 31:0, max_sz_xcr0, Maximum size (bytes) required by enabled features in XCR0 + 0xD, 1, ECX, 8, pt, PT state + 0xD, 1, ECX, 11, cet_usr, CET user state + 0xD, 1, ECX, 12, cet_supv, CET supervisor state + 0xD, 1, ECX, 13, hdc, HDC state + 0xD, 1, ECX, 16, hwp, HWP state + +# Leaf 0FH +# Intel RDT Monitoring + + 0xF, 0, EBX, 31:0, rmid_range, Maximum range (zero-based) of RMID within this physical processor of all types + 0xF, 0, EDX, 1, l3c_rdt_mon, L3 Cache RDT Monitoring supported + + 0xF, 1, ECX, 31:0, rmid_range, Maximum range (zero-based) of RMID of this types + 0xF, 1, EDX, 0, l3c_ocp_mon, L3 Cache occupancy Monitoring supported + 0xF, 1, EDX, 1, l3c_tbw_mon, L3 Cache Total Bandwidth Monitoring supported + 0xF, 1, EDX, 2, l3c_lbw_mon, L3 Cache Local Bandwidth Monitoring supported + +# Leaf 10H +# Intel RDT Allocation + + 0x10, 0, EBX, 1, l3c_rdt_alloc, L3 Cache Allocation supported + 0x10, 0, EBX, 2, l2c_rdt_alloc, L2 Cache Allocation supported + 0x10, 0, EBX, 3, mem_bw_alloc, Memory Bandwidth Allocation supported + + +# Leaf 12H +# SGX Capability +# +# Some detailed SGX features not added yet + + 0x12, 0, EAX, 0, sgx1, L3 Cache Allocation supported + 0x12, 1, EAX, 0, sgx2, L3 Cache Allocation supported + + +# Leaf 14H +# Intel Processor Tracer +# + +# Leaf 15H +# Time Stamp Counter and Nominal Core Crystal Clock Information + + 0x15, 0, EAX, 31:0, tsc_denominator, The denominator of the TSC/”core crystal clock” ratio + 0x15, 0, EBX, 31:0, tsc_numerator, The numerator of the TSC/”core crystal clock” ratio + 0x15, 0, ECX, 31:0, nom_freq, Nominal frequency of the core crystal clock in Hz + +# Leaf 16H +# Processor Frequency Information + + 0x16, 0, EAX, 15:0, cpu_base_freq, Processor Base Frequency in MHz + 0x16, 0, EBX, 15:0, cpu_max_freq, Maximum Frequency in MHz + 0x16, 0, ECX, 15:0, bus_freq, Bus (Reference) Frequency in MHz + +# Leaf 17H +# System-On-Chip Vendor Attribute + + 0x17, 0, EAX, 31:0, max_socid, Maximum input value of supported sub-leaf + 0x17, 0, EBX, 15:0, soc_vid, SOC Vendor ID + 0x17, 0, EBX, 16, std_vid, SOC Vendor ID is assigned via an industry standard scheme + 0x17, 0, ECX, 31:0, soc_pid, SOC Project ID assigned by vendor + 0x17, 0, EDX, 31:0, soc_sid, SOC Stepping ID + +# Leaf 18H +# Deterministic Address Translation Parameters + + +# Leaf 19H +# Key Locker Leaf + + +# Leaf 1AH +# Hybrid Information + + 0x1A, 0, EAX, 31:24, core_type, 20H-Intel_Atom 40H-Intel_Core + + +# Leaf 1FH +# V2 Extended Topology - A preferred superset to leaf 0BH + + +# According to SDM +# 40000000H - 4FFFFFFFH is invalid range + + +# Leaf 80000001H +# Extended Processor Signature and Feature Bits + +0x80000001, 0, ECX, 0, lahf_lm, LAHF/SAHF available in 64-bit mode +0x80000001, 0, ECX, 5, lzcnt, LZCNT +0x80000001, 0, ECX, 8, prefetchw, PREFETCHW + +0x80000001, 0, EDX, 11, sysret, SYSCALL/SYSRET supported +0x80000001, 0, EDX, 20, exec_dis, Execute Disable Bit available +0x80000001, 0, EDX, 26, 1gb_page, 1GB page supported +0x80000001, 0, EDX, 27, rdtscp, RDTSCP and IA32_TSC_AUX are available +#0x80000001, 0, EDX, 29, 64b, 64b Architecture supported + +# Leaf 80000002H/80000003H/80000004H +# Processor Brand String + +# Leaf 80000005H +# Reserved + +# Leaf 80000006H +# Extended L2 Cache Features + +0x80000006, 0, ECX, 7:0, clsize, Cache Line size in bytes +0x80000006, 0, ECX, 15:12, l2c_assoc, L2 Associativity +0x80000006, 0, ECX, 31:16, csize, Cache size in 1K units + + +# Leaf 80000007H + +0x80000007, 0, EDX, 8, nonstop_tsc, Invariant TSC available + + +# Leaf 80000008H + +0x80000008, 0, EAX, 7:0, phy_adr_bits, Physical Address Bits +0x80000008, 0, EAX, 15:8, lnr_adr_bits, Linear Address Bits +0x80000007, 0, EBX, 9, wbnoinvd, WBNOINVD + +# 0x8000001E +# EAX: Extended APIC ID +0x8000001E, 0, EAX, 31:0, extended_apic_id, Extended APIC ID +# EBX: Core Identifiers +0x8000001E, 0, EBX, 7:0, core_id, Identifies the logical core ID +0x8000001E, 0, EBX, 15:8, threads_per_core, The number of threads per core is threads_per_core + 1 +# ECX: Node Identifiers +0x8000001E, 0, ECX, 7:0, node_id, Node ID +0x8000001E, 0, ECX, 10:8, nodes_per_processor, Nodes per processor { 0: 1 node, else reserved } + +# 8000001F: AMD Secure Encryption +0x8000001F, 0, EAX, 0, sme, Secure Memory Encryption +0x8000001F, 0, EAX, 1, sev, Secure Encrypted Virtualization +0x8000001F, 0, EAX, 2, vmpgflush, VM Page Flush MSR +0x8000001F, 0, EAX, 3, seves, SEV Encrypted State +0x8000001F, 0, EBX, 5:0, c-bit, Page table bit number used to enable memory encryption +0x8000001F, 0, EBX, 11:6, mem_encrypt_physaddr_width, Reduction of physical address space in bits with SME enabled +0x8000001F, 0, ECX, 31:0, num_encrypted_guests, Maximum ASID value that may be used for an SEV-enabled guest +0x8000001F, 0, EDX, 31:0, minimum_sev_asid, Minimum ASID value that must be used for an SEV-enabled, SEV-ES-disabled guest \ No newline at end of file diff --git a/tools/arch/x86/kcpuid/kcpuid.c b/tools/arch/x86/kcpuid/kcpuid.c new file mode 100644 index 000000000000..936a3a2aad04 --- /dev/null +++ b/tools/arch/x86/kcpuid/kcpuid.c @@ -0,0 +1,657 @@ +// SPDX-License-Identifier: GPL-2.0 +#define _GNU_SOURCE + +#include <stdio.h> +#include <stdbool.h> +#include <stdlib.h> +#include <string.h> +#include <getopt.h> + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +typedef unsigned int u32; +typedef unsigned long long u64; + +char *def_csv = "/usr/share/misc/cpuid.csv"; +char *user_csv; + + +/* Cover both single-bit flag and multiple-bits fields */ +struct bits_desc { + /* start and end bits */ + int start, end; + /* 0 or 1 for 1-bit flag */ + int value; + char simp[32]; + char detail[256]; +}; + +/* descriptor info for eax/ebx/ecx/edx */ +struct reg_desc { + /* number of valid entries */ + int nr; + struct bits_desc descs[32]; +}; + +enum { + R_EAX = 0, + R_EBX, + R_ECX, + R_EDX, + NR_REGS +}; + +struct subleaf { + u32 index; + u32 sub; + u32 eax, ebx, ecx, edx; + struct reg_desc info[NR_REGS]; +}; + +/* Represent one leaf (basic or extended) */ +struct cpuid_func { + /* + * Array of subleafs for this func, if there is no subleafs + * then the leafs[0] is the main leaf + */ + struct subleaf *leafs; + int nr; +}; + +struct cpuid_range { + /* array of main leafs */ + struct cpuid_func *funcs; + /* number of valid leafs */ + int nr; + bool is_ext; +}; + +/* + * basic: basic functions range: [0... ] + * ext: extended functions range: [0x80000000... ] + */ +struct cpuid_range *leafs_basic, *leafs_ext; + +static int num_leafs; +static bool is_amd; +static bool show_details; +static bool show_raw; +static bool show_flags_only = true; +static u32 user_index = 0xFFFFFFFF; +static u32 user_sub = 0xFFFFFFFF; +static int flines; + +static inline void cpuid(u32 *eax, u32 *ebx, u32 *ecx, u32 *edx) +{ + /* ecx is often an input as well as an output. */ + asm volatile("cpuid" + : "=a" (*eax), + "=b" (*ebx), + "=c" (*ecx), + "=d" (*edx) + : "0" (*eax), "2" (*ecx)); +} + +static inline bool has_subleafs(u32 f) +{ + if (f == 0x7 || f == 0xd) + return true; + + if (is_amd) { + if (f == 0x8000001d) + return true; + return false; + } + + switch (f) { + case 0x4: + case 0xb: + case 0xf: + case 0x10: + case 0x14: + case 0x18: + case 0x1f: + return true; + default: + return false; + } +} + +static void leaf_print_raw(struct subleaf *leaf) +{ + if (has_subleafs(leaf->index)) { + if (leaf->sub == 0) + printf("0x%08x: subleafs:\n", leaf->index); + + printf(" %2d: EAX=0x%08x, EBX=0x%08x, ECX=0x%08x, EDX=0x%08x\n", + leaf->sub, leaf->eax, leaf->ebx, leaf->ecx, leaf->edx); + } else { + printf("0x%08x: EAX=0x%08x, EBX=0x%08x, ECX=0x%08x, EDX=0x%08x\n", + leaf->index, leaf->eax, leaf->ebx, leaf->ecx, leaf->edx); + } +} + +/* Return true is the input eax/ebx/ecx/edx are all zero */ +static bool cpuid_store(struct cpuid_range *range, u32 f, int subleaf, + u32 a, u32 b, u32 c, u32 d) +{ + struct cpuid_func *func; + struct subleaf *leaf; + int s = 0; + + if (a == 0 && b == 0 && c == 0 && d == 0) + return true; + + /* + * Cut off vendor-prefix from CPUID function as we're using it as an + * index into ->funcs. + */ + func = &range->funcs[f & 0xffff]; + + if (!func->leafs) { + func->leafs = malloc(sizeof(struct subleaf)); + if (!func->leafs) + perror("malloc func leaf"); + + func->nr = 1; + } else { + s = func->nr; + func->leafs = realloc(func->leafs, (s + 1) * sizeof(*leaf)); + if (!func->leafs) + perror("realloc f->leafs"); + + func->nr++; + } + + leaf = &func->leafs[s]; + + leaf->index = f; + leaf->sub = subleaf; + leaf->eax = a; + leaf->ebx = b; + leaf->ecx = c; + leaf->edx = d; + + return false; +} + +static void raw_dump_range(struct cpuid_range *range) +{ + u32 f; + int i; + + printf("%s Leafs :\n", range->is_ext ? "Extended" : "Basic"); + printf("================\n"); + + for (f = 0; (int)f < range->nr; f++) { + struct cpuid_func *func = &range->funcs[f]; + u32 index = f; + + if (range->is_ext) + index += 0x80000000; + + /* Skip leaf without valid items */ + if (!func->nr) + continue; + + /* First item is the main leaf, followed by all subleafs */ + for (i = 0; i < func->nr; i++) + leaf_print_raw(&func->leafs[i]); + } +} + +#define MAX_SUBLEAF_NUM 32 +struct cpuid_range *setup_cpuid_range(u32 input_eax) +{ + u32 max_func, idx_func; + int subleaf; + struct cpuid_range *range; + u32 eax, ebx, ecx, edx; + u32 f = input_eax; + int max_subleaf; + bool allzero; + + eax = input_eax; + ebx = ecx = edx = 0; + + cpuid(&eax, &ebx, &ecx, &edx); + max_func = eax; + idx_func = (max_func & 0xffff) + 1; + + range = malloc(sizeof(struct cpuid_range)); + if (!range) + perror("malloc range"); + + if (input_eax & 0x80000000) + range->is_ext = true; + else + range->is_ext = false; + + range->funcs = malloc(sizeof(struct cpuid_func) * idx_func); + if (!range->funcs) + perror("malloc range->funcs"); + + range->nr = idx_func; + memset(range->funcs, 0, sizeof(struct cpuid_func) * idx_func); + + for (; f <= max_func; f++) { + eax = f; + subleaf = ecx = 0; + + cpuid(&eax, &ebx, &ecx, &edx); + allzero = cpuid_store(range, f, subleaf, eax, ebx, ecx, edx); + if (allzero) + continue; + num_leafs++; + + if (!has_subleafs(f)) + continue; + + max_subleaf = MAX_SUBLEAF_NUM; + + /* + * Some can provide the exact number of subleafs, + * others have to be tried (0xf) + */ + if (f == 0x7 || f == 0x14 || f == 0x17 || f == 0x18) + max_subleaf = (eax & 0xff) + 1; + + if (f == 0xb) + max_subleaf = 2; + + for (subleaf = 1; subleaf < max_subleaf; subleaf++) { + eax = f; + ecx = subleaf; + + cpuid(&eax, &ebx, &ecx, &edx); + allzero = cpuid_store(range, f, subleaf, + eax, ebx, ecx, edx); + if (allzero) + continue; + num_leafs++; + } + + } + + return range; +} + +/* + * The basic row format for cpuid.csv is + * LEAF,SUBLEAF,register_name,bits,short name,long description + * + * like: + * 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs + * 1, 0, ECX, 0, sse3, Streaming SIMD Extensions 3(SSE3) + */ +static int parse_line(char *line) +{ + char *str; + int i; + struct cpuid_range *range; + struct cpuid_func *func; + struct subleaf *leaf; + u32 index; + u32 sub; + char buffer[512]; + char *buf; + /* + * Tokens: + * 1. leaf + * 2. subleaf + * 3. register + * 4. bits + * 5. short name + * 6. long detail + */ + char *tokens[6]; + struct reg_desc *reg; + struct bits_desc *bdesc; + int reg_index; + char *start, *end; + + /* Skip comments and NULL line */ + if (line[0] == '#' || line[0] == '\n') + return 0; + + strncpy(buffer, line, 511); + buffer[511] = 0; + str = buffer; + for (i = 0; i < 5; i++) { + tokens[i] = strtok(str, ","); + if (!tokens[i]) + goto err_exit; + str = NULL; + } + tokens[5] = strtok(str, "\n"); + if (!tokens[5]) + goto err_exit; + + /* index/main-leaf */ + index = strtoull(tokens[0], NULL, 0); + + if (index & 0x80000000) + range = leafs_ext; + else + range = leafs_basic; + + index &= 0x7FFFFFFF; + /* Skip line parsing for non-existing indexes */ + if ((int)index >= range->nr) + return -1; + + func = &range->funcs[index]; + + /* Return if the index has no valid item on this platform */ + if (!func->nr) + return 0; + + /* subleaf */ + sub = strtoul(tokens[1], NULL, 0); + if ((int)sub > func->nr) + return -1; + + leaf = &func->leafs[sub]; + buf = tokens[2]; + + if (strcasestr(buf, "EAX")) + reg_index = R_EAX; + else if (strcasestr(buf, "EBX")) + reg_index = R_EBX; + else if (strcasestr(buf, "ECX")) + reg_index = R_ECX; + else if (strcasestr(buf, "EDX")) + reg_index = R_EDX; + else + goto err_exit; + + reg = &leaf->info[reg_index]; + bdesc = &reg->descs[reg->nr++]; + + /* bit flag or bits field */ + buf = tokens[3]; + + end = strtok(buf, ":"); + bdesc->end = strtoul(end, NULL, 0); + bdesc->start = bdesc->end; + + /* start != NULL means it is bit fields */ + start = strtok(NULL, ":"); + if (start) + bdesc->start = strtoul(start, NULL, 0); + + strcpy(bdesc->simp, tokens[4]); + strcpy(bdesc->detail, tokens[5]); + return 0; + +err_exit: + printf("Warning: wrong line format:\n"); + printf("\tline[%d]: %s\n", flines, line); + return -1; +} + +/* Parse csv file, and construct the array of all leafs and subleafs */ +static void parse_text(void) +{ + FILE *file; + char *filename, *line = NULL; + size_t len = 0; + int ret; + + if (show_raw) + return; + + filename = user_csv ? user_csv : def_csv; + file = fopen(filename, "r"); + if (!file) { + /* Fallback to a csv in the same dir */ + file = fopen("./cpuid.csv", "r"); + } + + if (!file) { + printf("Fail to open '%s'\n", filename); + return; + } + + while (1) { + ret = getline(&line, &len, file); + flines++; + if (ret > 0) + parse_line(line); + + if (feof(file)) + break; + } + + fclose(file); +} + + +/* Decode every eax/ebx/ecx/edx */ +static void decode_bits(u32 value, struct reg_desc *rdesc) +{ + struct bits_desc *bdesc; + int start, end, i; + u32 mask; + + for (i = 0; i < rdesc->nr; i++) { + bdesc = &rdesc->descs[i]; + + start = bdesc->start; + end = bdesc->end; + if (start == end) { + /* single bit flag */ + if (value & (1 << start)) + printf("\t%-20s %s%s\n", + bdesc->simp, + show_details ? "-" : "", + show_details ? bdesc->detail : "" + ); + } else { + /* bit fields */ + if (show_flags_only) + continue; + + mask = ((u64)1 << (end - start + 1)) - 1; + printf("\t%-20s\t: 0x%-8x\t%s%s\n", + bdesc->simp, + (value >> start) & mask, + show_details ? "-" : "", + show_details ? bdesc->detail : "" + ); + } + } +} + +static void show_leaf(struct subleaf *leaf) +{ + if (!leaf) + return; + + if (show_raw) + leaf_print_raw(leaf); + + decode_bits(leaf->eax, &leaf->info[R_EAX]); + decode_bits(leaf->ebx, &leaf->info[R_EBX]); + decode_bits(leaf->ecx, &leaf->info[R_ECX]); + decode_bits(leaf->edx, &leaf->info[R_EDX]); +} + +static void show_func(struct cpuid_func *func) +{ + int i; + + if (!func) + return; + + for (i = 0; i < func->nr; i++) + show_leaf(&func->leafs[i]); +} + +static void show_range(struct cpuid_range *range) +{ + int i; + + for (i = 0; i < range->nr; i++) + show_func(&range->funcs[i]); +} + +static inline struct cpuid_func *index_to_func(u32 index) +{ + struct cpuid_range *range; + + range = (index & 0x80000000) ? leafs_ext : leafs_basic; + index &= 0x7FFFFFFF; + + if (((index & 0xFFFF) + 1) > (u32)range->nr) { + printf("ERR: invalid input index (0x%x)\n", index); + return NULL; + } + return &range->funcs[index]; +} + +static void show_info(void) +{ + struct cpuid_func *func; + + if (show_raw) { + /* Show all of the raw output of 'cpuid' instr */ + raw_dump_range(leafs_basic); + raw_dump_range(leafs_ext); + return; + } + + if (user_index != 0xFFFFFFFF) { + /* Only show specific leaf/subleaf info */ + func = index_to_func(user_index); + if (!func) + return; + + /* Dump the raw data also */ + show_raw = true; + + if (user_sub != 0xFFFFFFFF) { + if (user_sub + 1 <= (u32)func->nr) { + show_leaf(&func->leafs[user_sub]); + return; + } + + printf("ERR: invalid input subleaf (0x%x)\n", user_sub); + } + + show_func(func); + return; + } + + printf("CPU features:\n=============\n\n"); + show_range(leafs_basic); + show_range(leafs_ext); +} + +static void setup_platform_cpuid(void) +{ + u32 eax, ebx, ecx, edx; + + /* Check vendor */ + eax = ebx = ecx = edx = 0; + cpuid(&eax, &ebx, &ecx, &edx); + + /* "htuA" */ + if (ebx == 0x68747541) + is_amd = true; + + /* Setup leafs for the basic and extended range */ + leafs_basic = setup_cpuid_range(0x0); + leafs_ext = setup_cpuid_range(0x80000000); +} + +static void usage(void) +{ + printf("kcpuid [-abdfhr] [-l leaf] [-s subleaf]\n" + "\t-a|--all Show both bit flags and complex bit fields info\n" + "\t-b|--bitflags Show boolean flags only\n" + "\t-d|--detail Show details of the flag/fields (default)\n" + "\t-f|--flags Specify the cpuid csv file\n" + "\t-h|--help Show usage info\n" + "\t-l|--leaf=index Specify the leaf you want to check\n" + "\t-r|--raw Show raw cpuid data\n" + "\t-s|--subleaf=sub Specify the subleaf you want to check\n" + ); +} + +static struct option opts[] = { + { "all", no_argument, NULL, 'a' }, /* show both bit flags and fields */ + { "bitflags", no_argument, NULL, 'b' }, /* only show bit flags, default on */ + { "detail", no_argument, NULL, 'd' }, /* show detail descriptions */ + { "file", required_argument, NULL, 'f' }, /* use user's cpuid file */ + { "help", no_argument, NULL, 'h'}, /* show usage */ + { "leaf", required_argument, NULL, 'l'}, /* only check a specific leaf */ + { "raw", no_argument, NULL, 'r'}, /* show raw CPUID leaf data */ + { "subleaf", required_argument, NULL, 's'}, /* check a specific subleaf */ + { NULL, 0, NULL, 0 } +}; + +static int parse_options(int argc, char *argv[]) +{ + int c; + + while ((c = getopt_long(argc, argv, "abdf:hl:rs:", + opts, NULL)) != -1) + switch (c) { + case 'a': + show_flags_only = false; + break; + case 'b': + show_flags_only = true; + break; + case 'd': + show_details = true; + break; + case 'f': + user_csv = optarg; + break; + case 'h': + usage(); + exit(1); + break; + case 'l': + /* main leaf */ + user_index = strtoul(optarg, NULL, 0); + break; + case 'r': + show_raw = true; + break; + case 's': + /* subleaf */ + user_sub = strtoul(optarg, NULL, 0); + break; + default: + printf("%s: Invalid option '%c'\n", argv[0], optopt); + return -1; + } + + return 0; +} + +/* + * Do 4 things in turn: + * 1. Parse user options + * 2. Parse and store all the CPUID leaf data supported on this platform + * 2. Parse the csv file, while skipping leafs which are not available + * on this platform + * 3. Print leafs info based on user options + */ +int main(int argc, char *argv[]) +{ + if (parse_options(argc, argv)) + return -1; + + /* Setup the cpuid leafs of current platform */ + setup_platform_cpuid(); + + /* Read and parse the 'cpuid.csv' */ + parse_text(); + + show_info(); + return 0; +} \ No newline at end of file -- 2.30.0

1 0

[PATCH kernel-5.10] Add a kcpuid tool to show raw CPU features
by zhangyue 25 Oct '21

25 Oct '21

From: Feng Tang <feng.tang(a)intel.com> mainline inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4CMMB?from=project-issue CVE: NA ------------------------------------ End users frequently want to know what features their processor supports, independent of what the kernel supports. /proc/cpuinfo is great. It is omnipresent and since it is provided by the kernel it is always as up to date as the kernel. But, it could be ambiguous about processor features which can be disabled by the kernel at boot-time or compile-time. There are some user space tools showing more raw features, but they are not bound with kernel, and go with distros. Many end users are still using old distros with new kernels (upgraded by themselves), and may not upgrade the distros only to get a newer tool. So here arise the need for a new tool, which * shows raw CPU features read from the CPUID instruction * will be easier to update compared to existing userspace tooling (perhaps distributed like perf) * inherits "modern" kernel development process, in contrast to some of the existing userspace CPUID tools which are still being developed without git and distributed in tarballs from non-https sites. * Can produce output consistent with /proc/cpuinfo to make comparison easier. The CPUID leaf definitions are kept in an .csv file which allows for updating only that file to add support for new feature leafs. This is based on prototype code from Borislav Petkov (http://sr71.net/~dave/intel/stupid-cpuid.c) [ bp: - Massage, add #define _GNU_SOURCE to fix implicit declaration of function ‘strcasestr' warning - remove superfluous newlines - fallback to cpuid.csv in the current dir if none found - fix typos - move comments over the lines instead of sideways. ] Originally-from: Borislav Petkov <bp(a)alien8.de> Suggested-by: Dave Hansen <dave.hansen(a)intel.com> Suggested-by: Borislav Petkov <bp(a)alien8.de> Signed-off-by: Feng Tang <feng.tang(a)intel.com> Signed-off-by: Borislav Petkov <bp(a)suse.de> Signed-off-by: zhangyue <zhangyue1(a)kylinos.cn> --- tools/arch/x86/kcpuid/Makefile | 24 ++ tools/arch/x86/kcpuid/cpuid.csv | 400 +++++++++++++++++++ tools/arch/x86/kcpuid/kcpuid.c | 657 ++++++++++++++++++++++++++++++++ 3 files changed, 1081 insertions(+) create mode 100644 tools/arch/x86/kcpuid/Makefile create mode 100644 tools/arch/x86/kcpuid/cpuid.csv create mode 100644 tools/arch/x86/kcpuid/kcpuid.c diff --git a/tools/arch/x86/kcpuid/Makefile b/tools/arch/x86/kcpuid/Makefile new file mode 100644 index 000000000000..a2f1e855092c --- /dev/null +++ b/tools/arch/x86/kcpuid/Makefile @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0 +# Makefile for x86/kcpuid tool + +kcpuid : kcpuid.c + +CFLAGS = -Wextra + +BINDIR ?= /usr/sbin + +HWDATADIR ?= /usr/share/misc/ + +override CFLAGS += -O2 -Wall -I../../../include + +%: %.c + $(CC) $(CFLAGS) -o $@ $< $(LDFLAGS) + +.PHONY : clean +clean : + @rm -f kcpuid + +install : kcpuid + install -d $(DESTDIR)$(BINDIR) + install -m 755 -p kcpuid $(DESTDIR)$(BINDIR)/kcpuid + install -m 444 -p cpuid.csv $(HWDATADIR)/cpuid.csv diff --git a/tools/arch/x86/kcpuid/cpuid.csv b/tools/arch/x86/kcpuid/cpuid.csv new file mode 100644 index 000000000000..e422fad9a98e --- /dev/null +++ b/tools/arch/x86/kcpuid/cpuid.csv @@ -0,0 +1,400 @@ +# The basic row format is: +# LEAF, SUBLEAF, register_name, bits, short_name, long_description + +# Leaf 00H + 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs + +# Leaf 01H + 1, 0, EAX, 3:0, stepping, Stepping ID + 1, 0, EAX, 7:4, model, Model + 1, 0, EAX, 11:8, family, Family ID + 1, 0, EAX, 13:12, processor, Processor Type + 1, 0, EAX, 19:16, model_ext, Extended Model ID + 1, 0, EAX, 27:20, family_ext, Extended Family ID + + 1, 0, EBX, 7:0, brand, Brand Index + 1, 0, EBX, 15:8, clflush_size, CLFLUSH line size (value * 8) in bytes + 1, 0, EBX, 23:16, max_cpu_id, Maxim number of addressable logic cpu in this package + 1, 0, EBX, 31:24, apic_id, Initial APIC ID + + 1, 0, ECX, 0, sse3, Streaming SIMD Extensions 3(SSE3) + 1, 0, ECX, 1, pclmulqdq, PCLMULQDQ instruction supported + 1, 0, ECX, 2, dtes64, DS area uses 64-bit layout + 1, 0, ECX, 3, mwait, MONITOR/MWAIT supported + 1, 0, ECX, 4, ds_cpl, CPL Qualified Debug Store which allows for branch message storage qualified by CPL + 1, 0, ECX, 5, vmx, Virtual Machine Extensions supported + 1, 0, ECX, 6, smx, Safer Mode Extension supported + 1, 0, ECX, 7, eist, Enhanced Intel SpeedStep Technology + 1, 0, ECX, 8, tm2, Thermal Monitor 2 + 1, 0, ECX, 9, ssse3, Supplemental Streaming SIMD Extensions 3 (SSSE3) + 1, 0, ECX, 10, l1_ctx_id, L1 data cache could be set to either adaptive mode or shared mode (check IA32_MISC_ENABLE bit 24 definition) + 1, 0, ECX, 11, sdbg, IA32_DEBUG_INTERFACE MSR for silicon debug supported + 1, 0, ECX, 12, fma, FMA extensions using YMM state supported + 1, 0, ECX, 13, cmpxchg16b, 'CMPXCHG16B - Compare and Exchange Bytes' supported + 1, 0, ECX, 14, xtpr_update, xTPR Update Control supported + 1, 0, ECX, 15, pdcm, Perfmon and Debug Capability present + 1, 0, ECX, 17, pcid, Process-Context Identifiers feature present + 1, 0, ECX, 18, dca, Prefetching data from a memory mapped device supported + 1, 0, ECX, 19, sse4_1, SSE4.1 feature present + 1, 0, ECX, 20, sse4_2, SSE4.2 feature present + 1, 0, ECX, 21, x2apic, x2APIC supported + 1, 0, ECX, 22, movbe, MOVBE instruction supported + 1, 0, ECX, 23, popcnt, POPCNT instruction supported + 1, 0, ECX, 24, tsc_deadline_timer, LAPIC supports one-shot operation using a TSC deadline value + 1, 0, ECX, 25, aesni, AESNI instruction supported + 1, 0, ECX, 26, xsave, XSAVE/XRSTOR processor extended states (XSETBV/XGETBV/XCR0) + 1, 0, ECX, 27, osxsave, OS has set CR4.OSXSAVE bit to enable XSETBV/XGETBV/XCR0 + 1, 0, ECX, 28, avx, AVX instruction supported + 1, 0, ECX, 29, f16c, 16-bit floating-point conversion instruction supported + 1, 0, ECX, 30, rdrand, RDRAND instruction supported + + 1, 0, EDX, 0, fpu, x87 FPU on chip + 1, 0, EDX, 1, vme, Virtual-8086 Mode Enhancement + 1, 0, EDX, 2, de, Debugging Extensions + 1, 0, EDX, 3, pse, Page Size Extensions + 1, 0, EDX, 4, tsc, Time Stamp Counter + 1, 0, EDX, 5, msr, RDMSR and WRMSR Support + 1, 0, EDX, 6, pae, Physical Address Extensions + 1, 0, EDX, 7, mce, Machine Check Exception + 1, 0, EDX, 8, cx8, CMPXCHG8B instr + 1, 0, EDX, 9, apic, APIC on Chip + 1, 0, EDX, 11, sep, SYSENTER and SYSEXIT instrs + 1, 0, EDX, 12, mtrr, Memory Type Range Registers + 1, 0, EDX, 13, pge, Page Global Bit + 1, 0, EDX, 14, mca, Machine Check Architecture + 1, 0, EDX, 15, cmov, Conditional Move Instrs + 1, 0, EDX, 16, pat, Page Attribute Table + 1, 0, EDX, 17, pse36, 36-Bit Page Size Extension + 1, 0, EDX, 18, psn, Processor Serial Number + 1, 0, EDX, 19, clflush, CLFLUSH instr +# 1, 0, EDX, 20, + 1, 0, EDX, 21, ds, Debug Store + 1, 0, EDX, 22, acpi, Thermal Monitor and Software Controlled Clock Facilities + 1, 0, EDX, 23, mmx, Intel MMX Technology + 1, 0, EDX, 24, fxsr, XSAVE and FXRSTOR Instrs + 1, 0, EDX, 25, sse, SSE + 1, 0, EDX, 26, sse2, SSE2 + 1, 0, EDX, 27, ss, Self Snoop + 1, 0, EDX, 28, hit, Max APIC IDs + 1, 0, EDX, 29, tm, Thermal Monitor +# 1, 0, EDX, 30, + 1, 0, EDX, 31, pbe, Pending Break Enable + +# Leaf 02H +# cache and TLB descriptor info + +# Leaf 03H +# Precessor Serial Number, introduced on Pentium III, not valid for +# latest models + +# Leaf 04H +# thread/core and cache topology + 4, 0, EAX, 4:0, cache_type, Cache type like instr/data or unified + 4, 0, EAX, 7:5, cache_level, Cache Level (starts at 1) + 4, 0, EAX, 8, cache_self_init, Cache Self Initialization + 4, 0, EAX, 9, fully_associate, Fully Associative cache +# 4, 0, EAX, 13:10, resvd, resvd + 4, 0, EAX, 25:14, max_logical_id, Max number of addressable IDs for logical processors sharing the cache + 4, 0, EAX, 31:26, max_phy_id, Max number of addressable IDs for processors in phy package + + 4, 0, EBX, 11:0, cache_linesize, Size of a cache line in bytes + 4, 0, EBX, 21:12, cache_partition, Physical Line partitions + 4, 0, EBX, 31:22, cache_ways, Ways of associativity + 4, 0, ECX, 31:0, cache_sets, Number of Sets - 1 + 4, 0, EDX, 0, c_wbinvd, 1 means WBINVD/INVD is not ganranteed to act upon lower level caches of non-originating threads sharing this cache + 4, 0, EDX, 1, c_incl, Whether cache is inclusive of lower cache level + 4, 0, EDX, 2, c_comp_index, Complex Cache Indexing + +# Leaf 05H +# MONITOR/MWAIT + 5, 0, EAX, 15:0, min_mon_size, Smallest monitor line size in bytes + 5, 0, EBX, 15:0, max_mon_size, Largest monitor line size in bytes + 5, 0, ECX, 0, mwait_ext, Enum of Monitor-Mwait extensions supported + 5, 0, ECX, 1, mwait_irq_break, Largest monitor line size in bytes + 5, 0, EDX, 3:0, c0_sub_stats, Number of C0* sub C-states supported using MWAIT + 5, 0, EDX, 7:4, c1_sub_stats, Number of C1* sub C-states supported using MWAIT + 5, 0, EDX, 11:8, c2_sub_stats, Number of C2* sub C-states supported using MWAIT + 5, 0, EDX, 15:12, c3_sub_stats, Number of C3* sub C-states supported using MWAIT + 5, 0, EDX, 19:16, c4_sub_stats, Number of C4* sub C-states supported using MWAIT + 5, 0, EDX, 23:20, c5_sub_stats, Number of C5* sub C-states supported using MWAIT + 5, 0, EDX, 27:24, c6_sub_stats, Number of C6* sub C-states supported using MWAIT + 5, 0, EDX, 31:28, c7_sub_stats, Number of C7* sub C-states supported using MWAIT + +# Leaf 06H +# Thermal & Power Management + + 6, 0, EAX, 0, dig_temp, Digital temperature sensor supported + 6, 0, EAX, 1, turbo, Intel Turbo Boost + 6, 0, EAX, 2, arat, Always running APIC timer +# 6, 0, EAX, 3, resv, Reserved + 6, 0, EAX, 4, pln, Power limit notifications supported + 6, 0, EAX, 5, ecmd, Clock modulation duty cycle extension supported + 6, 0, EAX, 6, ptm, Package thermal management supported + 6, 0, EAX, 7, hwp, HWP base register + 6, 0, EAX, 8, hwp_notify, HWP notification + 6, 0, EAX, 9, hwp_act_window, HWP activity window + 6, 0, EAX, 10, hwp_energy, HWP energy performance preference + 6, 0, EAX, 11, hwp_pkg_req, HWP package level request +# 6, 0, EAX, 12, resv, Reserved + 6, 0, EAX, 13, hdc, HDC base registers supported + 6, 0, EAX, 14, turbo3, Turbo Boost Max 3.0 + 6, 0, EAX, 15, hwp_cap, Highest Performance change supported + 6, 0, EAX, 16, hwp_peci, HWP PECI override is supported + 6, 0, EAX, 17, hwp_flex, Flexible HWP is supported + 6, 0, EAX, 18, hwp_fast, Fast access mode for the IA32_HWP_REQUEST MSR is supported +# 6, 0, EAX, 19, resv, Reserved + 6, 0, EAX, 20, hwp_ignr, Ignoring Idle Logical Processor HWP request is supported + + 6, 0, EBX, 3:0, therm_irq_thresh, Number of Interrupt Thresholds in Digital Thermal Sensor + 6, 0, ECX, 0, aperfmperf, Presence of IA32_MPERF and IA32_APERF + 6, 0, ECX, 3, energ_bias, Performance-energy bias preference supported + +# Leaf 07H +# ECX == 0 +# AVX512 refers to https://en.wikipedia.org/wiki/AVX-512 +# XXX: Do we really need to enumerate each and every AVX512 sub features + + 7, 0, EBX, 0, fsgsbase, RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE supported + 7, 0, EBX, 1, tsc_adjust, TSC_ADJUST MSR supported + 7, 0, EBX, 2, sgx, Software Guard Extensions + 7, 0, EBX, 3, bmi1, BMI1 + 7, 0, EBX, 4, hle, Hardware Lock Elision + 7, 0, EBX, 5, avx2, AVX2 +# 7, 0, EBX, 6, fdp_excp_only, x87 FPU Data Pointer updated only on x87 exceptions + 7, 0, EBX, 7, smep, Supervisor-Mode Execution Prevention + 7, 0, EBX, 8, bmi2, BMI2 + 7, 0, EBX, 9, rep_movsb, Enhanced REP MOVSB/STOSB + 7, 0, EBX, 10, invpcid, INVPCID instruction + 7, 0, EBX, 11, rtm, Restricted Transactional Memory + 7, 0, EBX, 12, rdt_m, Intel RDT Monitoring capability + 7, 0, EBX, 13, depc_fpu_cs_ds, Deprecates FPU CS and FPU DS + 7, 0, EBX, 14, mpx, Memory Protection Extensions + 7, 0, EBX, 15, rdt_a, Intel RDT Allocation capability + 7, 0, EBX, 16, avx512f, AVX512 Foundation instr + 7, 0, EBX, 17, avx512dq, AVX512 Double and Quadword AVX512 instr + 7, 0, EBX, 18, rdseed, RDSEED instr + 7, 0, EBX, 19, adx, ADX instr + 7, 0, EBX, 20, smap, Supervisor Mode Access Prevention + 7, 0, EBX, 21, avx512ifma, AVX512 Integer Fused Multiply Add +# 7, 0, EBX, 22, resvd, resvd + 7, 0, EBX, 23, clflushopt, CLFLUSHOPT instr + 7, 0, EBX, 24, clwb, CLWB instr + 7, 0, EBX, 25, intel_pt, Intel Processor Trace instr + 7, 0, EBX, 26, avx512pf, Prefetch + 7, 0, EBX, 27, avx512er, AVX512 Exponent Reciproca instr + 7, 0, EBX, 28, avx512cd, AVX512 Conflict Detection instr + 7, 0, EBX, 29, sha, Intel Secure Hash Algorithm Extensions instr + 7, 0, EBX, 26, avx512bw, AVX512 Byte & Word instr + 7, 0, EBX, 28, avx512vl, AVX512 Vector Length Extentions (VL) + 7, 0, ECX, 0, prefetchwt1, X + 7, 0, ECX, 1, avx512vbmi, AVX512 Vector Byte Manipulation Instructions + 7, 0, ECX, 2, umip, User-mode Instruction Prevention + + 7, 0, ECX, 3, pku, Protection Keys for User-mode pages + 7, 0, ECX, 4, ospke, CR4 PKE set to enable protection keys +# 7, 0, ECX, 16:5, resvd, resvd + 7, 0, ECX, 21:17, mawau, The value of MAWAU used by the BNDLDX and BNDSTX instructions in 64-bit mode + 7, 0, ECX, 22, rdpid, RDPID and IA32_TSC_AUX +# 7, 0, ECX, 29:23, resvd, resvd + 7, 0, ECX, 30, sgx_lc, SGX Launch Configuration +# 7, 0, ECX, 31, resvd, resvd + +# Leaf 08H +# + + +# Leaf 09H +# Direct Cache Access (DCA) information + 9, 0, ECX, 31:0, dca_cap, The value of IA32_PLATFORM_DCA_CAP + +# Leaf 0AH +# Architectural Performance Monitoring +# +# Do we really need to print out the PMU related stuff? +# Does normal user really care about it? +# + 0xA, 0, EAX, 7:0, pmu_ver, Performance Monitoring Unit version + 0xA, 0, EAX, 15:8, pmu_gp_cnt_num, Numer of general-purose PMU counters per logical CPU + 0xA, 0, EAX, 23:16, pmu_cnt_bits, Bit wideth of PMU counter + 0xA, 0, EAX, 31:24, pmu_ebx_bits, Length of EBX bit vector to enumerate PMU events + + 0xA, 0, EBX, 0, pmu_no_core_cycle_evt, Core cycle event not available + 0xA, 0, EBX, 1, pmu_no_instr_ret_evt, Instruction retired event not available + 0xA, 0, EBX, 2, pmu_no_ref_cycle_evt, Reference cycles event not available + 0xA, 0, EBX, 3, pmu_no_llc_ref_evt, Last-level cache reference event not available + 0xA, 0, EBX, 4, pmu_no_llc_mis_evt, Last-level cache misses event not available + 0xA, 0, EBX, 5, pmu_no_br_instr_ret_evt, Branch instruction retired event not available + 0xA, 0, EBX, 6, pmu_no_br_mispredict_evt, Branch mispredict retired event not available + + 0xA, 0, ECX, 4:0, pmu_fixed_cnt_num, Performance Monitoring Unit version + 0xA, 0, ECX, 12:5, pmu_fixed_cnt_bits, Numer of PMU counters per logical CPU + +# Leaf 0BH +# Extended Topology Enumeration Leaf +# + + 0xB, 0, EAX, 4:0, id_shift, Number of bits to shift right on x2APIC ID to get a unique topology ID of the next level type + 0xB, 0, EBX, 15:0, cpu_nr, Number of logical processors at this level type + 0xB, 0, ECX, 15:8, lvl_type, 0-Invalid 1-SMT 2-Core + 0xB, 0, EDX, 31:0, x2apic_id, x2APIC ID the current logical processor + + +# Leaf 0DH +# Processor Extended State + + 0xD, 0, EAX, 0, x87, X87 state + 0xD, 0, EAX, 1, sse, SSE state + 0xD, 0, EAX, 2, avx, AVX state + 0xD, 0, EAX, 4:3, mpx, MPX state + 0xD, 0, EAX, 7:5, avx512, AVX-512 state + 0xD, 0, EAX, 9, pkru, PKRU state + + 0xD, 0, EBX, 31:0, max_sz_xcr0, Maximum size (bytes) required by enabled features in XCR0 + 0xD, 0, ECX, 31:0, max_sz_xsave, Maximum size (bytes) of the XSAVE/XRSTOR save area + + 0xD, 1, EAX, 0, xsaveopt, XSAVEOPT available + 0xD, 1, EAX, 1, xsavec, XSAVEC and compacted form supported + 0xD, 1, EAX, 2, xgetbv, XGETBV supported + 0xD, 1, EAX, 3, xsaves, XSAVES/XRSTORS and IA32_XSS supported + + 0xD, 1, EBX, 31:0, max_sz_xcr0, Maximum size (bytes) required by enabled features in XCR0 + 0xD, 1, ECX, 8, pt, PT state + 0xD, 1, ECX, 11, cet_usr, CET user state + 0xD, 1, ECX, 12, cet_supv, CET supervisor state + 0xD, 1, ECX, 13, hdc, HDC state + 0xD, 1, ECX, 16, hwp, HWP state + +# Leaf 0FH +# Intel RDT Monitoring + + 0xF, 0, EBX, 31:0, rmid_range, Maximum range (zero-based) of RMID within this physical processor of all types + 0xF, 0, EDX, 1, l3c_rdt_mon, L3 Cache RDT Monitoring supported + + 0xF, 1, ECX, 31:0, rmid_range, Maximum range (zero-based) of RMID of this types + 0xF, 1, EDX, 0, l3c_ocp_mon, L3 Cache occupancy Monitoring supported + 0xF, 1, EDX, 1, l3c_tbw_mon, L3 Cache Total Bandwidth Monitoring supported + 0xF, 1, EDX, 2, l3c_lbw_mon, L3 Cache Local Bandwidth Monitoring supported + +# Leaf 10H +# Intel RDT Allocation + + 0x10, 0, EBX, 1, l3c_rdt_alloc, L3 Cache Allocation supported + 0x10, 0, EBX, 2, l2c_rdt_alloc, L2 Cache Allocation supported + 0x10, 0, EBX, 3, mem_bw_alloc, Memory Bandwidth Allocation supported + + +# Leaf 12H +# SGX Capability +# +# Some detailed SGX features not added yet + + 0x12, 0, EAX, 0, sgx1, L3 Cache Allocation supported + 0x12, 1, EAX, 0, sgx2, L3 Cache Allocation supported + + +# Leaf 14H +# Intel Processor Tracer +# + +# Leaf 15H +# Time Stamp Counter and Nominal Core Crystal Clock Information + + 0x15, 0, EAX, 31:0, tsc_denominator, The denominator of the TSC/”core crystal clock” ratio + 0x15, 0, EBX, 31:0, tsc_numerator, The numerator of the TSC/”core crystal clock” ratio + 0x15, 0, ECX, 31:0, nom_freq, Nominal frequency of the core crystal clock in Hz + +# Leaf 16H +# Processor Frequency Information + + 0x16, 0, EAX, 15:0, cpu_base_freq, Processor Base Frequency in MHz + 0x16, 0, EBX, 15:0, cpu_max_freq, Maximum Frequency in MHz + 0x16, 0, ECX, 15:0, bus_freq, Bus (Reference) Frequency in MHz + +# Leaf 17H +# System-On-Chip Vendor Attribute + + 0x17, 0, EAX, 31:0, max_socid, Maximum input value of supported sub-leaf + 0x17, 0, EBX, 15:0, soc_vid, SOC Vendor ID + 0x17, 0, EBX, 16, std_vid, SOC Vendor ID is assigned via an industry standard scheme + 0x17, 0, ECX, 31:0, soc_pid, SOC Project ID assigned by vendor + 0x17, 0, EDX, 31:0, soc_sid, SOC Stepping ID + +# Leaf 18H +# Deterministic Address Translation Parameters + + +# Leaf 19H +# Key Locker Leaf + + +# Leaf 1AH +# Hybrid Information + + 0x1A, 0, EAX, 31:24, core_type, 20H-Intel_Atom 40H-Intel_Core + + +# Leaf 1FH +# V2 Extended Topology - A preferred superset to leaf 0BH + + +# According to SDM +# 40000000H - 4FFFFFFFH is invalid range + + +# Leaf 80000001H +# Extended Processor Signature and Feature Bits + +0x80000001, 0, ECX, 0, lahf_lm, LAHF/SAHF available in 64-bit mode +0x80000001, 0, ECX, 5, lzcnt, LZCNT +0x80000001, 0, ECX, 8, prefetchw, PREFETCHW + +0x80000001, 0, EDX, 11, sysret, SYSCALL/SYSRET supported +0x80000001, 0, EDX, 20, exec_dis, Execute Disable Bit available +0x80000001, 0, EDX, 26, 1gb_page, 1GB page supported +0x80000001, 0, EDX, 27, rdtscp, RDTSCP and IA32_TSC_AUX are available +#0x80000001, 0, EDX, 29, 64b, 64b Architecture supported + +# Leaf 80000002H/80000003H/80000004H +# Processor Brand String + +# Leaf 80000005H +# Reserved + +# Leaf 80000006H +# Extended L2 Cache Features + +0x80000006, 0, ECX, 7:0, clsize, Cache Line size in bytes +0x80000006, 0, ECX, 15:12, l2c_assoc, L2 Associativity +0x80000006, 0, ECX, 31:16, csize, Cache size in 1K units + + +# Leaf 80000007H + +0x80000007, 0, EDX, 8, nonstop_tsc, Invariant TSC available + + +# Leaf 80000008H + +0x80000008, 0, EAX, 7:0, phy_adr_bits, Physical Address Bits +0x80000008, 0, EAX, 15:8, lnr_adr_bits, Linear Address Bits +0x80000007, 0, EBX, 9, wbnoinvd, WBNOINVD + +# 0x8000001E +# EAX: Extended APIC ID +0x8000001E, 0, EAX, 31:0, extended_apic_id, Extended APIC ID +# EBX: Core Identifiers +0x8000001E, 0, EBX, 7:0, core_id, Identifies the logical core ID +0x8000001E, 0, EBX, 15:8, threads_per_core, The number of threads per core is threads_per_core + 1 +# ECX: Node Identifiers +0x8000001E, 0, ECX, 7:0, node_id, Node ID +0x8000001E, 0, ECX, 10:8, nodes_per_processor, Nodes per processor { 0: 1 node, else reserved } + +# 8000001F: AMD Secure Encryption +0x8000001F, 0, EAX, 0, sme, Secure Memory Encryption +0x8000001F, 0, EAX, 1, sev, Secure Encrypted Virtualization +0x8000001F, 0, EAX, 2, vmpgflush, VM Page Flush MSR +0x8000001F, 0, EAX, 3, seves, SEV Encrypted State +0x8000001F, 0, EBX, 5:0, c-bit, Page table bit number used to enable memory encryption +0x8000001F, 0, EBX, 11:6, mem_encrypt_physaddr_width, Reduction of physical address space in bits with SME enabled +0x8000001F, 0, ECX, 31:0, num_encrypted_guests, Maximum ASID value that may be used for an SEV-enabled guest +0x8000001F, 0, EDX, 31:0, minimum_sev_asid, Minimum ASID value that must be used for an SEV-enabled, SEV-ES-disabled guest \ No newline at end of file diff --git a/tools/arch/x86/kcpuid/kcpuid.c b/tools/arch/x86/kcpuid/kcpuid.c new file mode 100644 index 000000000000..936a3a2aad04 --- /dev/null +++ b/tools/arch/x86/kcpuid/kcpuid.c @@ -0,0 +1,657 @@ +// SPDX-License-Identifier: GPL-2.0 +#define _GNU_SOURCE + +#include <stdio.h> +#include <stdbool.h> +#include <stdlib.h> +#include <string.h> +#include <getopt.h> + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +typedef unsigned int u32; +typedef unsigned long long u64; + +char *def_csv = "/usr/share/misc/cpuid.csv"; +char *user_csv; + + +/* Cover both single-bit flag and multiple-bits fields */ +struct bits_desc { + /* start and end bits */ + int start, end; + /* 0 or 1 for 1-bit flag */ + int value; + char simp[32]; + char detail[256]; +}; + +/* descriptor info for eax/ebx/ecx/edx */ +struct reg_desc { + /* number of valid entries */ + int nr; + struct bits_desc descs[32]; +}; + +enum { + R_EAX = 0, + R_EBX, + R_ECX, + R_EDX, + NR_REGS +}; + +struct subleaf { + u32 index; + u32 sub; + u32 eax, ebx, ecx, edx; + struct reg_desc info[NR_REGS]; +}; + +/* Represent one leaf (basic or extended) */ +struct cpuid_func { + /* + * Array of subleafs for this func, if there is no subleafs + * then the leafs[0] is the main leaf + */ + struct subleaf *leafs; + int nr; +}; + +struct cpuid_range { + /* array of main leafs */ + struct cpuid_func *funcs; + /* number of valid leafs */ + int nr; + bool is_ext; +}; + +/* + * basic: basic functions range: [0... ] + * ext: extended functions range: [0x80000000... ] + */ +struct cpuid_range *leafs_basic, *leafs_ext; + +static int num_leafs; +static bool is_amd; +static bool show_details; +static bool show_raw; +static bool show_flags_only = true; +static u32 user_index = 0xFFFFFFFF; +static u32 user_sub = 0xFFFFFFFF; +static int flines; + +static inline void cpuid(u32 *eax, u32 *ebx, u32 *ecx, u32 *edx) +{ + /* ecx is often an input as well as an output. */ + asm volatile("cpuid" + : "=a" (*eax), + "=b" (*ebx), + "=c" (*ecx), + "=d" (*edx) + : "0" (*eax), "2" (*ecx)); +} + +static inline bool has_subleafs(u32 f) +{ + if (f == 0x7 || f == 0xd) + return true; + + if (is_amd) { + if (f == 0x8000001d) + return true; + return false; + } + + switch (f) { + case 0x4: + case 0xb: + case 0xf: + case 0x10: + case 0x14: + case 0x18: + case 0x1f: + return true; + default: + return false; + } +} + +static void leaf_print_raw(struct subleaf *leaf) +{ + if (has_subleafs(leaf->index)) { + if (leaf->sub == 0) + printf("0x%08x: subleafs:\n", leaf->index); + + printf(" %2d: EAX=0x%08x, EBX=0x%08x, ECX=0x%08x, EDX=0x%08x\n", + leaf->sub, leaf->eax, leaf->ebx, leaf->ecx, leaf->edx); + } else { + printf("0x%08x: EAX=0x%08x, EBX=0x%08x, ECX=0x%08x, EDX=0x%08x\n", + leaf->index, leaf->eax, leaf->ebx, leaf->ecx, leaf->edx); + } +} + +/* Return true is the input eax/ebx/ecx/edx are all zero */ +static bool cpuid_store(struct cpuid_range *range, u32 f, int subleaf, + u32 a, u32 b, u32 c, u32 d) +{ + struct cpuid_func *func; + struct subleaf *leaf; + int s = 0; + + if (a == 0 && b == 0 && c == 0 && d == 0) + return true; + + /* + * Cut off vendor-prefix from CPUID function as we're using it as an + * index into ->funcs. + */ + func = &range->funcs[f & 0xffff]; + + if (!func->leafs) { + func->leafs = malloc(sizeof(struct subleaf)); + if (!func->leafs) + perror("malloc func leaf"); + + func->nr = 1; + } else { + s = func->nr; + func->leafs = realloc(func->leafs, (s + 1) * sizeof(*leaf)); + if (!func->leafs) + perror("realloc f->leafs"); + + func->nr++; + } + + leaf = &func->leafs[s]; + + leaf->index = f; + leaf->sub = subleaf; + leaf->eax = a; + leaf->ebx = b; + leaf->ecx = c; + leaf->edx = d; + + return false; +} + +static void raw_dump_range(struct cpuid_range *range) +{ + u32 f; + int i; + + printf("%s Leafs :\n", range->is_ext ? "Extended" : "Basic"); + printf("================\n"); + + for (f = 0; (int)f < range->nr; f++) { + struct cpuid_func *func = &range->funcs[f]; + u32 index = f; + + if (range->is_ext) + index += 0x80000000; + + /* Skip leaf without valid items */ + if (!func->nr) + continue; + + /* First item is the main leaf, followed by all subleafs */ + for (i = 0; i < func->nr; i++) + leaf_print_raw(&func->leafs[i]); + } +} + +#define MAX_SUBLEAF_NUM 32 +struct cpuid_range *setup_cpuid_range(u32 input_eax) +{ + u32 max_func, idx_func; + int subleaf; + struct cpuid_range *range; + u32 eax, ebx, ecx, edx; + u32 f = input_eax; + int max_subleaf; + bool allzero; + + eax = input_eax; + ebx = ecx = edx = 0; + + cpuid(&eax, &ebx, &ecx, &edx); + max_func = eax; + idx_func = (max_func & 0xffff) + 1; + + range = malloc(sizeof(struct cpuid_range)); + if (!range) + perror("malloc range"); + + if (input_eax & 0x80000000) + range->is_ext = true; + else + range->is_ext = false; + + range->funcs = malloc(sizeof(struct cpuid_func) * idx_func); + if (!range->funcs) + perror("malloc range->funcs"); + + range->nr = idx_func; + memset(range->funcs, 0, sizeof(struct cpuid_func) * idx_func); + + for (; f <= max_func; f++) { + eax = f; + subleaf = ecx = 0; + + cpuid(&eax, &ebx, &ecx, &edx); + allzero = cpuid_store(range, f, subleaf, eax, ebx, ecx, edx); + if (allzero) + continue; + num_leafs++; + + if (!has_subleafs(f)) + continue; + + max_subleaf = MAX_SUBLEAF_NUM; + + /* + * Some can provide the exact number of subleafs, + * others have to be tried (0xf) + */ + if (f == 0x7 || f == 0x14 || f == 0x17 || f == 0x18) + max_subleaf = (eax & 0xff) + 1; + + if (f == 0xb) + max_subleaf = 2; + + for (subleaf = 1; subleaf < max_subleaf; subleaf++) { + eax = f; + ecx = subleaf; + + cpuid(&eax, &ebx, &ecx, &edx); + allzero = cpuid_store(range, f, subleaf, + eax, ebx, ecx, edx); + if (allzero) + continue; + num_leafs++; + } + + } + + return range; +} + +/* + * The basic row format for cpuid.csv is + * LEAF,SUBLEAF,register_name,bits,short name,long description + * + * like: + * 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs + * 1, 0, ECX, 0, sse3, Streaming SIMD Extensions 3(SSE3) + */ +static int parse_line(char *line) +{ + char *str; + int i; + struct cpuid_range *range; + struct cpuid_func *func; + struct subleaf *leaf; + u32 index; + u32 sub; + char buffer[512]; + char *buf; + /* + * Tokens: + * 1. leaf + * 2. subleaf + * 3. register + * 4. bits + * 5. short name + * 6. long detail + */ + char *tokens[6]; + struct reg_desc *reg; + struct bits_desc *bdesc; + int reg_index; + char *start, *end; + + /* Skip comments and NULL line */ + if (line[0] == '#' || line[0] == '\n') + return 0; + + strncpy(buffer, line, 511); + buffer[511] = 0; + str = buffer; + for (i = 0; i < 5; i++) { + tokens[i] = strtok(str, ","); + if (!tokens[i]) + goto err_exit; + str = NULL; + } + tokens[5] = strtok(str, "\n"); + if (!tokens[5]) + goto err_exit; + + /* index/main-leaf */ + index = strtoull(tokens[0], NULL, 0); + + if (index & 0x80000000) + range = leafs_ext; + else + range = leafs_basic; + + index &= 0x7FFFFFFF; + /* Skip line parsing for non-existing indexes */ + if ((int)index >= range->nr) + return -1; + + func = &range->funcs[index]; + + /* Return if the index has no valid item on this platform */ + if (!func->nr) + return 0; + + /* subleaf */ + sub = strtoul(tokens[1], NULL, 0); + if ((int)sub > func->nr) + return -1; + + leaf = &func->leafs[sub]; + buf = tokens[2]; + + if (strcasestr(buf, "EAX")) + reg_index = R_EAX; + else if (strcasestr(buf, "EBX")) + reg_index = R_EBX; + else if (strcasestr(buf, "ECX")) + reg_index = R_ECX; + else if (strcasestr(buf, "EDX")) + reg_index = R_EDX; + else + goto err_exit; + + reg = &leaf->info[reg_index]; + bdesc = &reg->descs[reg->nr++]; + + /* bit flag or bits field */ + buf = tokens[3]; + + end = strtok(buf, ":"); + bdesc->end = strtoul(end, NULL, 0); + bdesc->start = bdesc->end; + + /* start != NULL means it is bit fields */ + start = strtok(NULL, ":"); + if (start) + bdesc->start = strtoul(start, NULL, 0); + + strcpy(bdesc->simp, tokens[4]); + strcpy(bdesc->detail, tokens[5]); + return 0; + +err_exit: + printf("Warning: wrong line format:\n"); + printf("\tline[%d]: %s\n", flines, line); + return -1; +} + +/* Parse csv file, and construct the array of all leafs and subleafs */ +static void parse_text(void) +{ + FILE *file; + char *filename, *line = NULL; + size_t len = 0; + int ret; + + if (show_raw) + return; + + filename = user_csv ? user_csv : def_csv; + file = fopen(filename, "r"); + if (!file) { + /* Fallback to a csv in the same dir */ + file = fopen("./cpuid.csv", "r"); + } + + if (!file) { + printf("Fail to open '%s'\n", filename); + return; + } + + while (1) { + ret = getline(&line, &len, file); + flines++; + if (ret > 0) + parse_line(line); + + if (feof(file)) + break; + } + + fclose(file); +} + + +/* Decode every eax/ebx/ecx/edx */ +static void decode_bits(u32 value, struct reg_desc *rdesc) +{ + struct bits_desc *bdesc; + int start, end, i; + u32 mask; + + for (i = 0; i < rdesc->nr; i++) { + bdesc = &rdesc->descs[i]; + + start = bdesc->start; + end = bdesc->end; + if (start == end) { + /* single bit flag */ + if (value & (1 << start)) + printf("\t%-20s %s%s\n", + bdesc->simp, + show_details ? "-" : "", + show_details ? bdesc->detail : "" + ); + } else { + /* bit fields */ + if (show_flags_only) + continue; + + mask = ((u64)1 << (end - start + 1)) - 1; + printf("\t%-20s\t: 0x%-8x\t%s%s\n", + bdesc->simp, + (value >> start) & mask, + show_details ? "-" : "", + show_details ? bdesc->detail : "" + ); + } + } +} + +static void show_leaf(struct subleaf *leaf) +{ + if (!leaf) + return; + + if (show_raw) + leaf_print_raw(leaf); + + decode_bits(leaf->eax, &leaf->info[R_EAX]); + decode_bits(leaf->ebx, &leaf->info[R_EBX]); + decode_bits(leaf->ecx, &leaf->info[R_ECX]); + decode_bits(leaf->edx, &leaf->info[R_EDX]); +} + +static void show_func(struct cpuid_func *func) +{ + int i; + + if (!func) + return; + + for (i = 0; i < func->nr; i++) + show_leaf(&func->leafs[i]); +} + +static void show_range(struct cpuid_range *range) +{ + int i; + + for (i = 0; i < range->nr; i++) + show_func(&range->funcs[i]); +} + +static inline struct cpuid_func *index_to_func(u32 index) +{ + struct cpuid_range *range; + + range = (index & 0x80000000) ? leafs_ext : leafs_basic; + index &= 0x7FFFFFFF; + + if (((index & 0xFFFF) + 1) > (u32)range->nr) { + printf("ERR: invalid input index (0x%x)\n", index); + return NULL; + } + return &range->funcs[index]; +} + +static void show_info(void) +{ + struct cpuid_func *func; + + if (show_raw) { + /* Show all of the raw output of 'cpuid' instr */ + raw_dump_range(leafs_basic); + raw_dump_range(leafs_ext); + return; + } + + if (user_index != 0xFFFFFFFF) { + /* Only show specific leaf/subleaf info */ + func = index_to_func(user_index); + if (!func) + return; + + /* Dump the raw data also */ + show_raw = true; + + if (user_sub != 0xFFFFFFFF) { + if (user_sub + 1 <= (u32)func->nr) { + show_leaf(&func->leafs[user_sub]); + return; + } + + printf("ERR: invalid input subleaf (0x%x)\n", user_sub); + } + + show_func(func); + return; + } + + printf("CPU features:\n=============\n\n"); + show_range(leafs_basic); + show_range(leafs_ext); +} + +static void setup_platform_cpuid(void) +{ + u32 eax, ebx, ecx, edx; + + /* Check vendor */ + eax = ebx = ecx = edx = 0; + cpuid(&eax, &ebx, &ecx, &edx); + + /* "htuA" */ + if (ebx == 0x68747541) + is_amd = true; + + /* Setup leafs for the basic and extended range */ + leafs_basic = setup_cpuid_range(0x0); + leafs_ext = setup_cpuid_range(0x80000000); +} + +static void usage(void) +{ + printf("kcpuid [-abdfhr] [-l leaf] [-s subleaf]\n" + "\t-a|--all Show both bit flags and complex bit fields info\n" + "\t-b|--bitflags Show boolean flags only\n" + "\t-d|--detail Show details of the flag/fields (default)\n" + "\t-f|--flags Specify the cpuid csv file\n" + "\t-h|--help Show usage info\n" + "\t-l|--leaf=index Specify the leaf you want to check\n" + "\t-r|--raw Show raw cpuid data\n" + "\t-s|--subleaf=sub Specify the subleaf you want to check\n" + ); +} + +static struct option opts[] = { + { "all", no_argument, NULL, 'a' }, /* show both bit flags and fields */ + { "bitflags", no_argument, NULL, 'b' }, /* only show bit flags, default on */ + { "detail", no_argument, NULL, 'd' }, /* show detail descriptions */ + { "file", required_argument, NULL, 'f' }, /* use user's cpuid file */ + { "help", no_argument, NULL, 'h'}, /* show usage */ + { "leaf", required_argument, NULL, 'l'}, /* only check a specific leaf */ + { "raw", no_argument, NULL, 'r'}, /* show raw CPUID leaf data */ + { "subleaf", required_argument, NULL, 's'}, /* check a specific subleaf */ + { NULL, 0, NULL, 0 } +}; + +static int parse_options(int argc, char *argv[]) +{ + int c; + + while ((c = getopt_long(argc, argv, "abdf:hl:rs:", + opts, NULL)) != -1) + switch (c) { + case 'a': + show_flags_only = false; + break; + case 'b': + show_flags_only = true; + break; + case 'd': + show_details = true; + break; + case 'f': + user_csv = optarg; + break; + case 'h': + usage(); + exit(1); + break; + case 'l': + /* main leaf */ + user_index = strtoul(optarg, NULL, 0); + break; + case 'r': + show_raw = true; + break; + case 's': + /* subleaf */ + user_sub = strtoul(optarg, NULL, 0); + break; + default: + printf("%s: Invalid option '%c'\n", argv[0], optopt); + return -1; + } + + return 0; +} + +/* + * Do 4 things in turn: + * 1. Parse user options + * 2. Parse and store all the CPUID leaf data supported on this platform + * 2. Parse the csv file, while skipping leafs which are not available + * on this platform + * 3. Print leafs info based on user options + */ +int main(int argc, char *argv[]) +{ + if (parse_options(argc, argv)) + return -1; + + /* Setup the cpuid leafs of current platform */ + setup_platform_cpuid(); + + /* Read and parse the 'cpuid.csv' */ + parse_text(); + + show_info(); + return 0; +} \ No newline at end of file -- 2.30.0

1 0

[PATCH] Add a kcpuid tool to show raw CPU features
by zhangyue 25 Oct '21

25 Oct '21

From: Feng Tang <feng.tang(a)intel.com> mainline inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4CMMB?from=project-issue CVE: NA ------------------------------------ End users frequently want to know what features their processor supports, independent of what the kernel supports. /proc/cpuinfo is great. It is omnipresent and since it is provided by the kernel it is always as up to date as the kernel. But, it could be ambiguous about processor features which can be disabled by the kernel at boot-time or compile-time. There are some user space tools showing more raw features, but they are not bound with kernel, and go with distros. Many end users are still using old distros with new kernels (upgraded by themselves), and may not upgrade the distros only to get a newer tool. So here arise the need for a new tool, which * shows raw CPU features read from the CPUID instruction * will be easier to update compared to existing userspace tooling (perhaps distributed like perf) * inherits "modern" kernel development process, in contrast to some of the existing userspace CPUID tools which are still being developed without git and distributed in tarballs from non-https sites. * Can produce output consistent with /proc/cpuinfo to make comparison easier. The CPUID leaf definitions are kept in an .csv file which allows for updating only that file to add support for new feature leafs. This is based on prototype code from Borislav Petkov (http://sr71.net/~dave/intel/stupid-cpuid.c) [ bp: - Massage, add #define _GNU_SOURCE to fix implicit declaration of function ‘strcasestr' warning - remove superfluous newlines - fallback to cpuid.csv in the current dir if none found - fix typos - move comments over the lines instead of sideways. ] Originally-from: Borislav Petkov <bp(a)alien8.de> Suggested-by: Dave Hansen <dave.hansen(a)intel.com> Suggested-by: Borislav Petkov <bp(a)alien8.de> Signed-off-by: Feng Tang <feng.tang(a)intel.com> Signed-off-by: Borislav Petkov <bp(a)suse.de> Signed-off-by: zhangyue <zhangyue1(a)kylinos.cn> --- tools/arch/x86/kcpuid/Makefile | 24 ++ tools/arch/x86/kcpuid/cpuid.csv | 400 +++++++++++++++++++ tools/arch/x86/kcpuid/kcpuid.c | 657 ++++++++++++++++++++++++++++++++ 3 files changed, 1081 insertions(+) create mode 100644 tools/arch/x86/kcpuid/Makefile create mode 100644 tools/arch/x86/kcpuid/cpuid.csv create mode 100644 tools/arch/x86/kcpuid/kcpuid.c diff --git a/tools/arch/x86/kcpuid/Makefile b/tools/arch/x86/kcpuid/Makefile new file mode 100644 index 000000000000..a2f1e855092c --- /dev/null +++ b/tools/arch/x86/kcpuid/Makefile @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0 +# Makefile for x86/kcpuid tool + +kcpuid : kcpuid.c + +CFLAGS = -Wextra + +BINDIR ?= /usr/sbin + +HWDATADIR ?= /usr/share/misc/ + +override CFLAGS += -O2 -Wall -I../../../include + +%: %.c + $(CC) $(CFLAGS) -o $@ $< $(LDFLAGS) + +.PHONY : clean +clean : + @rm -f kcpuid + +install : kcpuid + install -d $(DESTDIR)$(BINDIR) + install -m 755 -p kcpuid $(DESTDIR)$(BINDIR)/kcpuid + install -m 444 -p cpuid.csv $(HWDATADIR)/cpuid.csv diff --git a/tools/arch/x86/kcpuid/cpuid.csv b/tools/arch/x86/kcpuid/cpuid.csv new file mode 100644 index 000000000000..e422fad9a98e --- /dev/null +++ b/tools/arch/x86/kcpuid/cpuid.csv @@ -0,0 +1,400 @@ +# The basic row format is: +# LEAF, SUBLEAF, register_name, bits, short_name, long_description + +# Leaf 00H + 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs + +# Leaf 01H + 1, 0, EAX, 3:0, stepping, Stepping ID + 1, 0, EAX, 7:4, model, Model + 1, 0, EAX, 11:8, family, Family ID + 1, 0, EAX, 13:12, processor, Processor Type + 1, 0, EAX, 19:16, model_ext, Extended Model ID + 1, 0, EAX, 27:20, family_ext, Extended Family ID + + 1, 0, EBX, 7:0, brand, Brand Index + 1, 0, EBX, 15:8, clflush_size, CLFLUSH line size (value * 8) in bytes + 1, 0, EBX, 23:16, max_cpu_id, Maxim number of addressable logic cpu in this package + 1, 0, EBX, 31:24, apic_id, Initial APIC ID + + 1, 0, ECX, 0, sse3, Streaming SIMD Extensions 3(SSE3) + 1, 0, ECX, 1, pclmulqdq, PCLMULQDQ instruction supported + 1, 0, ECX, 2, dtes64, DS area uses 64-bit layout + 1, 0, ECX, 3, mwait, MONITOR/MWAIT supported + 1, 0, ECX, 4, ds_cpl, CPL Qualified Debug Store which allows for branch message storage qualified by CPL + 1, 0, ECX, 5, vmx, Virtual Machine Extensions supported + 1, 0, ECX, 6, smx, Safer Mode Extension supported + 1, 0, ECX, 7, eist, Enhanced Intel SpeedStep Technology + 1, 0, ECX, 8, tm2, Thermal Monitor 2 + 1, 0, ECX, 9, ssse3, Supplemental Streaming SIMD Extensions 3 (SSSE3) + 1, 0, ECX, 10, l1_ctx_id, L1 data cache could be set to either adaptive mode or shared mode (check IA32_MISC_ENABLE bit 24 definition) + 1, 0, ECX, 11, sdbg, IA32_DEBUG_INTERFACE MSR for silicon debug supported + 1, 0, ECX, 12, fma, FMA extensions using YMM state supported + 1, 0, ECX, 13, cmpxchg16b, 'CMPXCHG16B - Compare and Exchange Bytes' supported + 1, 0, ECX, 14, xtpr_update, xTPR Update Control supported + 1, 0, ECX, 15, pdcm, Perfmon and Debug Capability present + 1, 0, ECX, 17, pcid, Process-Context Identifiers feature present + 1, 0, ECX, 18, dca, Prefetching data from a memory mapped device supported + 1, 0, ECX, 19, sse4_1, SSE4.1 feature present + 1, 0, ECX, 20, sse4_2, SSE4.2 feature present + 1, 0, ECX, 21, x2apic, x2APIC supported + 1, 0, ECX, 22, movbe, MOVBE instruction supported + 1, 0, ECX, 23, popcnt, POPCNT instruction supported + 1, 0, ECX, 24, tsc_deadline_timer, LAPIC supports one-shot operation using a TSC deadline value + 1, 0, ECX, 25, aesni, AESNI instruction supported + 1, 0, ECX, 26, xsave, XSAVE/XRSTOR processor extended states (XSETBV/XGETBV/XCR0) + 1, 0, ECX, 27, osxsave, OS has set CR4.OSXSAVE bit to enable XSETBV/XGETBV/XCR0 + 1, 0, ECX, 28, avx, AVX instruction supported + 1, 0, ECX, 29, f16c, 16-bit floating-point conversion instruction supported + 1, 0, ECX, 30, rdrand, RDRAND instruction supported + + 1, 0, EDX, 0, fpu, x87 FPU on chip + 1, 0, EDX, 1, vme, Virtual-8086 Mode Enhancement + 1, 0, EDX, 2, de, Debugging Extensions + 1, 0, EDX, 3, pse, Page Size Extensions + 1, 0, EDX, 4, tsc, Time Stamp Counter + 1, 0, EDX, 5, msr, RDMSR and WRMSR Support + 1, 0, EDX, 6, pae, Physical Address Extensions + 1, 0, EDX, 7, mce, Machine Check Exception + 1, 0, EDX, 8, cx8, CMPXCHG8B instr + 1, 0, EDX, 9, apic, APIC on Chip + 1, 0, EDX, 11, sep, SYSENTER and SYSEXIT instrs + 1, 0, EDX, 12, mtrr, Memory Type Range Registers + 1, 0, EDX, 13, pge, Page Global Bit + 1, 0, EDX, 14, mca, Machine Check Architecture + 1, 0, EDX, 15, cmov, Conditional Move Instrs + 1, 0, EDX, 16, pat, Page Attribute Table + 1, 0, EDX, 17, pse36, 36-Bit Page Size Extension + 1, 0, EDX, 18, psn, Processor Serial Number + 1, 0, EDX, 19, clflush, CLFLUSH instr +# 1, 0, EDX, 20, + 1, 0, EDX, 21, ds, Debug Store + 1, 0, EDX, 22, acpi, Thermal Monitor and Software Controlled Clock Facilities + 1, 0, EDX, 23, mmx, Intel MMX Technology + 1, 0, EDX, 24, fxsr, XSAVE and FXRSTOR Instrs + 1, 0, EDX, 25, sse, SSE + 1, 0, EDX, 26, sse2, SSE2 + 1, 0, EDX, 27, ss, Self Snoop + 1, 0, EDX, 28, hit, Max APIC IDs + 1, 0, EDX, 29, tm, Thermal Monitor +# 1, 0, EDX, 30, + 1, 0, EDX, 31, pbe, Pending Break Enable + +# Leaf 02H +# cache and TLB descriptor info + +# Leaf 03H +# Precessor Serial Number, introduced on Pentium III, not valid for +# latest models + +# Leaf 04H +# thread/core and cache topology + 4, 0, EAX, 4:0, cache_type, Cache type like instr/data or unified + 4, 0, EAX, 7:5, cache_level, Cache Level (starts at 1) + 4, 0, EAX, 8, cache_self_init, Cache Self Initialization + 4, 0, EAX, 9, fully_associate, Fully Associative cache +# 4, 0, EAX, 13:10, resvd, resvd + 4, 0, EAX, 25:14, max_logical_id, Max number of addressable IDs for logical processors sharing the cache + 4, 0, EAX, 31:26, max_phy_id, Max number of addressable IDs for processors in phy package + + 4, 0, EBX, 11:0, cache_linesize, Size of a cache line in bytes + 4, 0, EBX, 21:12, cache_partition, Physical Line partitions + 4, 0, EBX, 31:22, cache_ways, Ways of associativity + 4, 0, ECX, 31:0, cache_sets, Number of Sets - 1 + 4, 0, EDX, 0, c_wbinvd, 1 means WBINVD/INVD is not ganranteed to act upon lower level caches of non-originating threads sharing this cache + 4, 0, EDX, 1, c_incl, Whether cache is inclusive of lower cache level + 4, 0, EDX, 2, c_comp_index, Complex Cache Indexing + +# Leaf 05H +# MONITOR/MWAIT + 5, 0, EAX, 15:0, min_mon_size, Smallest monitor line size in bytes + 5, 0, EBX, 15:0, max_mon_size, Largest monitor line size in bytes + 5, 0, ECX, 0, mwait_ext, Enum of Monitor-Mwait extensions supported + 5, 0, ECX, 1, mwait_irq_break, Largest monitor line size in bytes + 5, 0, EDX, 3:0, c0_sub_stats, Number of C0* sub C-states supported using MWAIT + 5, 0, EDX, 7:4, c1_sub_stats, Number of C1* sub C-states supported using MWAIT + 5, 0, EDX, 11:8, c2_sub_stats, Number of C2* sub C-states supported using MWAIT + 5, 0, EDX, 15:12, c3_sub_stats, Number of C3* sub C-states supported using MWAIT + 5, 0, EDX, 19:16, c4_sub_stats, Number of C4* sub C-states supported using MWAIT + 5, 0, EDX, 23:20, c5_sub_stats, Number of C5* sub C-states supported using MWAIT + 5, 0, EDX, 27:24, c6_sub_stats, Number of C6* sub C-states supported using MWAIT + 5, 0, EDX, 31:28, c7_sub_stats, Number of C7* sub C-states supported using MWAIT + +# Leaf 06H +# Thermal & Power Management + + 6, 0, EAX, 0, dig_temp, Digital temperature sensor supported + 6, 0, EAX, 1, turbo, Intel Turbo Boost + 6, 0, EAX, 2, arat, Always running APIC timer +# 6, 0, EAX, 3, resv, Reserved + 6, 0, EAX, 4, pln, Power limit notifications supported + 6, 0, EAX, 5, ecmd, Clock modulation duty cycle extension supported + 6, 0, EAX, 6, ptm, Package thermal management supported + 6, 0, EAX, 7, hwp, HWP base register + 6, 0, EAX, 8, hwp_notify, HWP notification + 6, 0, EAX, 9, hwp_act_window, HWP activity window + 6, 0, EAX, 10, hwp_energy, HWP energy performance preference + 6, 0, EAX, 11, hwp_pkg_req, HWP package level request +# 6, 0, EAX, 12, resv, Reserved + 6, 0, EAX, 13, hdc, HDC base registers supported + 6, 0, EAX, 14, turbo3, Turbo Boost Max 3.0 + 6, 0, EAX, 15, hwp_cap, Highest Performance change supported + 6, 0, EAX, 16, hwp_peci, HWP PECI override is supported + 6, 0, EAX, 17, hwp_flex, Flexible HWP is supported + 6, 0, EAX, 18, hwp_fast, Fast access mode for the IA32_HWP_REQUEST MSR is supported +# 6, 0, EAX, 19, resv, Reserved + 6, 0, EAX, 20, hwp_ignr, Ignoring Idle Logical Processor HWP request is supported + + 6, 0, EBX, 3:0, therm_irq_thresh, Number of Interrupt Thresholds in Digital Thermal Sensor + 6, 0, ECX, 0, aperfmperf, Presence of IA32_MPERF and IA32_APERF + 6, 0, ECX, 3, energ_bias, Performance-energy bias preference supported + +# Leaf 07H +# ECX == 0 +# AVX512 refers to https://en.wikipedia.org/wiki/AVX-512 +# XXX: Do we really need to enumerate each and every AVX512 sub features + + 7, 0, EBX, 0, fsgsbase, RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE supported + 7, 0, EBX, 1, tsc_adjust, TSC_ADJUST MSR supported + 7, 0, EBX, 2, sgx, Software Guard Extensions + 7, 0, EBX, 3, bmi1, BMI1 + 7, 0, EBX, 4, hle, Hardware Lock Elision + 7, 0, EBX, 5, avx2, AVX2 +# 7, 0, EBX, 6, fdp_excp_only, x87 FPU Data Pointer updated only on x87 exceptions + 7, 0, EBX, 7, smep, Supervisor-Mode Execution Prevention + 7, 0, EBX, 8, bmi2, BMI2 + 7, 0, EBX, 9, rep_movsb, Enhanced REP MOVSB/STOSB + 7, 0, EBX, 10, invpcid, INVPCID instruction + 7, 0, EBX, 11, rtm, Restricted Transactional Memory + 7, 0, EBX, 12, rdt_m, Intel RDT Monitoring capability + 7, 0, EBX, 13, depc_fpu_cs_ds, Deprecates FPU CS and FPU DS + 7, 0, EBX, 14, mpx, Memory Protection Extensions + 7, 0, EBX, 15, rdt_a, Intel RDT Allocation capability + 7, 0, EBX, 16, avx512f, AVX512 Foundation instr + 7, 0, EBX, 17, avx512dq, AVX512 Double and Quadword AVX512 instr + 7, 0, EBX, 18, rdseed, RDSEED instr + 7, 0, EBX, 19, adx, ADX instr + 7, 0, EBX, 20, smap, Supervisor Mode Access Prevention + 7, 0, EBX, 21, avx512ifma, AVX512 Integer Fused Multiply Add +# 7, 0, EBX, 22, resvd, resvd + 7, 0, EBX, 23, clflushopt, CLFLUSHOPT instr + 7, 0, EBX, 24, clwb, CLWB instr + 7, 0, EBX, 25, intel_pt, Intel Processor Trace instr + 7, 0, EBX, 26, avx512pf, Prefetch + 7, 0, EBX, 27, avx512er, AVX512 Exponent Reciproca instr + 7, 0, EBX, 28, avx512cd, AVX512 Conflict Detection instr + 7, 0, EBX, 29, sha, Intel Secure Hash Algorithm Extensions instr + 7, 0, EBX, 26, avx512bw, AVX512 Byte & Word instr + 7, 0, EBX, 28, avx512vl, AVX512 Vector Length Extentions (VL) + 7, 0, ECX, 0, prefetchwt1, X + 7, 0, ECX, 1, avx512vbmi, AVX512 Vector Byte Manipulation Instructions + 7, 0, ECX, 2, umip, User-mode Instruction Prevention + + 7, 0, ECX, 3, pku, Protection Keys for User-mode pages + 7, 0, ECX, 4, ospke, CR4 PKE set to enable protection keys +# 7, 0, ECX, 16:5, resvd, resvd + 7, 0, ECX, 21:17, mawau, The value of MAWAU used by the BNDLDX and BNDSTX instructions in 64-bit mode + 7, 0, ECX, 22, rdpid, RDPID and IA32_TSC_AUX +# 7, 0, ECX, 29:23, resvd, resvd + 7, 0, ECX, 30, sgx_lc, SGX Launch Configuration +# 7, 0, ECX, 31, resvd, resvd + +# Leaf 08H +# + + +# Leaf 09H +# Direct Cache Access (DCA) information + 9, 0, ECX, 31:0, dca_cap, The value of IA32_PLATFORM_DCA_CAP + +# Leaf 0AH +# Architectural Performance Monitoring +# +# Do we really need to print out the PMU related stuff? +# Does normal user really care about it? +# + 0xA, 0, EAX, 7:0, pmu_ver, Performance Monitoring Unit version + 0xA, 0, EAX, 15:8, pmu_gp_cnt_num, Numer of general-purose PMU counters per logical CPU + 0xA, 0, EAX, 23:16, pmu_cnt_bits, Bit wideth of PMU counter + 0xA, 0, EAX, 31:24, pmu_ebx_bits, Length of EBX bit vector to enumerate PMU events + + 0xA, 0, EBX, 0, pmu_no_core_cycle_evt, Core cycle event not available + 0xA, 0, EBX, 1, pmu_no_instr_ret_evt, Instruction retired event not available + 0xA, 0, EBX, 2, pmu_no_ref_cycle_evt, Reference cycles event not available + 0xA, 0, EBX, 3, pmu_no_llc_ref_evt, Last-level cache reference event not available + 0xA, 0, EBX, 4, pmu_no_llc_mis_evt, Last-level cache misses event not available + 0xA, 0, EBX, 5, pmu_no_br_instr_ret_evt, Branch instruction retired event not available + 0xA, 0, EBX, 6, pmu_no_br_mispredict_evt, Branch mispredict retired event not available + + 0xA, 0, ECX, 4:0, pmu_fixed_cnt_num, Performance Monitoring Unit version + 0xA, 0, ECX, 12:5, pmu_fixed_cnt_bits, Numer of PMU counters per logical CPU + +# Leaf 0BH +# Extended Topology Enumeration Leaf +# + + 0xB, 0, EAX, 4:0, id_shift, Number of bits to shift right on x2APIC ID to get a unique topology ID of the next level type + 0xB, 0, EBX, 15:0, cpu_nr, Number of logical processors at this level type + 0xB, 0, ECX, 15:8, lvl_type, 0-Invalid 1-SMT 2-Core + 0xB, 0, EDX, 31:0, x2apic_id, x2APIC ID the current logical processor + + +# Leaf 0DH +# Processor Extended State + + 0xD, 0, EAX, 0, x87, X87 state + 0xD, 0, EAX, 1, sse, SSE state + 0xD, 0, EAX, 2, avx, AVX state + 0xD, 0, EAX, 4:3, mpx, MPX state + 0xD, 0, EAX, 7:5, avx512, AVX-512 state + 0xD, 0, EAX, 9, pkru, PKRU state + + 0xD, 0, EBX, 31:0, max_sz_xcr0, Maximum size (bytes) required by enabled features in XCR0 + 0xD, 0, ECX, 31:0, max_sz_xsave, Maximum size (bytes) of the XSAVE/XRSTOR save area + + 0xD, 1, EAX, 0, xsaveopt, XSAVEOPT available + 0xD, 1, EAX, 1, xsavec, XSAVEC and compacted form supported + 0xD, 1, EAX, 2, xgetbv, XGETBV supported + 0xD, 1, EAX, 3, xsaves, XSAVES/XRSTORS and IA32_XSS supported + + 0xD, 1, EBX, 31:0, max_sz_xcr0, Maximum size (bytes) required by enabled features in XCR0 + 0xD, 1, ECX, 8, pt, PT state + 0xD, 1, ECX, 11, cet_usr, CET user state + 0xD, 1, ECX, 12, cet_supv, CET supervisor state + 0xD, 1, ECX, 13, hdc, HDC state + 0xD, 1, ECX, 16, hwp, HWP state + +# Leaf 0FH +# Intel RDT Monitoring + + 0xF, 0, EBX, 31:0, rmid_range, Maximum range (zero-based) of RMID within this physical processor of all types + 0xF, 0, EDX, 1, l3c_rdt_mon, L3 Cache RDT Monitoring supported + + 0xF, 1, ECX, 31:0, rmid_range, Maximum range (zero-based) of RMID of this types + 0xF, 1, EDX, 0, l3c_ocp_mon, L3 Cache occupancy Monitoring supported + 0xF, 1, EDX, 1, l3c_tbw_mon, L3 Cache Total Bandwidth Monitoring supported + 0xF, 1, EDX, 2, l3c_lbw_mon, L3 Cache Local Bandwidth Monitoring supported + +# Leaf 10H +# Intel RDT Allocation + + 0x10, 0, EBX, 1, l3c_rdt_alloc, L3 Cache Allocation supported + 0x10, 0, EBX, 2, l2c_rdt_alloc, L2 Cache Allocation supported + 0x10, 0, EBX, 3, mem_bw_alloc, Memory Bandwidth Allocation supported + + +# Leaf 12H +# SGX Capability +# +# Some detailed SGX features not added yet + + 0x12, 0, EAX, 0, sgx1, L3 Cache Allocation supported + 0x12, 1, EAX, 0, sgx2, L3 Cache Allocation supported + + +# Leaf 14H +# Intel Processor Tracer +# + +# Leaf 15H +# Time Stamp Counter and Nominal Core Crystal Clock Information + + 0x15, 0, EAX, 31:0, tsc_denominator, The denominator of the TSC/”core crystal clock” ratio + 0x15, 0, EBX, 31:0, tsc_numerator, The numerator of the TSC/”core crystal clock” ratio + 0x15, 0, ECX, 31:0, nom_freq, Nominal frequency of the core crystal clock in Hz + +# Leaf 16H +# Processor Frequency Information + + 0x16, 0, EAX, 15:0, cpu_base_freq, Processor Base Frequency in MHz + 0x16, 0, EBX, 15:0, cpu_max_freq, Maximum Frequency in MHz + 0x16, 0, ECX, 15:0, bus_freq, Bus (Reference) Frequency in MHz + +# Leaf 17H +# System-On-Chip Vendor Attribute + + 0x17, 0, EAX, 31:0, max_socid, Maximum input value of supported sub-leaf + 0x17, 0, EBX, 15:0, soc_vid, SOC Vendor ID + 0x17, 0, EBX, 16, std_vid, SOC Vendor ID is assigned via an industry standard scheme + 0x17, 0, ECX, 31:0, soc_pid, SOC Project ID assigned by vendor + 0x17, 0, EDX, 31:0, soc_sid, SOC Stepping ID + +# Leaf 18H +# Deterministic Address Translation Parameters + + +# Leaf 19H +# Key Locker Leaf + + +# Leaf 1AH +# Hybrid Information + + 0x1A, 0, EAX, 31:24, core_type, 20H-Intel_Atom 40H-Intel_Core + + +# Leaf 1FH +# V2 Extended Topology - A preferred superset to leaf 0BH + + +# According to SDM +# 40000000H - 4FFFFFFFH is invalid range + + +# Leaf 80000001H +# Extended Processor Signature and Feature Bits + +0x80000001, 0, ECX, 0, lahf_lm, LAHF/SAHF available in 64-bit mode +0x80000001, 0, ECX, 5, lzcnt, LZCNT +0x80000001, 0, ECX, 8, prefetchw, PREFETCHW + +0x80000001, 0, EDX, 11, sysret, SYSCALL/SYSRET supported +0x80000001, 0, EDX, 20, exec_dis, Execute Disable Bit available +0x80000001, 0, EDX, 26, 1gb_page, 1GB page supported +0x80000001, 0, EDX, 27, rdtscp, RDTSCP and IA32_TSC_AUX are available +#0x80000001, 0, EDX, 29, 64b, 64b Architecture supported + +# Leaf 80000002H/80000003H/80000004H +# Processor Brand String + +# Leaf 80000005H +# Reserved + +# Leaf 80000006H +# Extended L2 Cache Features + +0x80000006, 0, ECX, 7:0, clsize, Cache Line size in bytes +0x80000006, 0, ECX, 15:12, l2c_assoc, L2 Associativity +0x80000006, 0, ECX, 31:16, csize, Cache size in 1K units + + +# Leaf 80000007H + +0x80000007, 0, EDX, 8, nonstop_tsc, Invariant TSC available + + +# Leaf 80000008H + +0x80000008, 0, EAX, 7:0, phy_adr_bits, Physical Address Bits +0x80000008, 0, EAX, 15:8, lnr_adr_bits, Linear Address Bits +0x80000007, 0, EBX, 9, wbnoinvd, WBNOINVD + +# 0x8000001E +# EAX: Extended APIC ID +0x8000001E, 0, EAX, 31:0, extended_apic_id, Extended APIC ID +# EBX: Core Identifiers +0x8000001E, 0, EBX, 7:0, core_id, Identifies the logical core ID +0x8000001E, 0, EBX, 15:8, threads_per_core, The number of threads per core is threads_per_core + 1 +# ECX: Node Identifiers +0x8000001E, 0, ECX, 7:0, node_id, Node ID +0x8000001E, 0, ECX, 10:8, nodes_per_processor, Nodes per processor { 0: 1 node, else reserved } + +# 8000001F: AMD Secure Encryption +0x8000001F, 0, EAX, 0, sme, Secure Memory Encryption +0x8000001F, 0, EAX, 1, sev, Secure Encrypted Virtualization +0x8000001F, 0, EAX, 2, vmpgflush, VM Page Flush MSR +0x8000001F, 0, EAX, 3, seves, SEV Encrypted State +0x8000001F, 0, EBX, 5:0, c-bit, Page table bit number used to enable memory encryption +0x8000001F, 0, EBX, 11:6, mem_encrypt_physaddr_width, Reduction of physical address space in bits with SME enabled +0x8000001F, 0, ECX, 31:0, num_encrypted_guests, Maximum ASID value that may be used for an SEV-enabled guest +0x8000001F, 0, EDX, 31:0, minimum_sev_asid, Minimum ASID value that must be used for an SEV-enabled, SEV-ES-disabled guest \ No newline at end of file diff --git a/tools/arch/x86/kcpuid/kcpuid.c b/tools/arch/x86/kcpuid/kcpuid.c new file mode 100644 index 000000000000..936a3a2aad04 --- /dev/null +++ b/tools/arch/x86/kcpuid/kcpuid.c @@ -0,0 +1,657 @@ +// SPDX-License-Identifier: GPL-2.0 +#define _GNU_SOURCE + +#include <stdio.h> +#include <stdbool.h> +#include <stdlib.h> +#include <string.h> +#include <getopt.h> + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +typedef unsigned int u32; +typedef unsigned long long u64; + +char *def_csv = "/usr/share/misc/cpuid.csv"; +char *user_csv; + + +/* Cover both single-bit flag and multiple-bits fields */ +struct bits_desc { + /* start and end bits */ + int start, end; + /* 0 or 1 for 1-bit flag */ + int value; + char simp[32]; + char detail[256]; +}; + +/* descriptor info for eax/ebx/ecx/edx */ +struct reg_desc { + /* number of valid entries */ + int nr; + struct bits_desc descs[32]; +}; + +enum { + R_EAX = 0, + R_EBX, + R_ECX, + R_EDX, + NR_REGS +}; + +struct subleaf { + u32 index; + u32 sub; + u32 eax, ebx, ecx, edx; + struct reg_desc info[NR_REGS]; +}; + +/* Represent one leaf (basic or extended) */ +struct cpuid_func { + /* + * Array of subleafs for this func, if there is no subleafs + * then the leafs[0] is the main leaf + */ + struct subleaf *leafs; + int nr; +}; + +struct cpuid_range { + /* array of main leafs */ + struct cpuid_func *funcs; + /* number of valid leafs */ + int nr; + bool is_ext; +}; + +/* + * basic: basic functions range: [0... ] + * ext: extended functions range: [0x80000000... ] + */ +struct cpuid_range *leafs_basic, *leafs_ext; + +static int num_leafs; +static bool is_amd; +static bool show_details; +static bool show_raw; +static bool show_flags_only = true; +static u32 user_index = 0xFFFFFFFF; +static u32 user_sub = 0xFFFFFFFF; +static int flines; + +static inline void cpuid(u32 *eax, u32 *ebx, u32 *ecx, u32 *edx) +{ + /* ecx is often an input as well as an output. */ + asm volatile("cpuid" + : "=a" (*eax), + "=b" (*ebx), + "=c" (*ecx), + "=d" (*edx) + : "0" (*eax), "2" (*ecx)); +} + +static inline bool has_subleafs(u32 f) +{ + if (f == 0x7 || f == 0xd) + return true; + + if (is_amd) { + if (f == 0x8000001d) + return true; + return false; + } + + switch (f) { + case 0x4: + case 0xb: + case 0xf: + case 0x10: + case 0x14: + case 0x18: + case 0x1f: + return true; + default: + return false; + } +} + +static void leaf_print_raw(struct subleaf *leaf) +{ + if (has_subleafs(leaf->index)) { + if (leaf->sub == 0) + printf("0x%08x: subleafs:\n", leaf->index); + + printf(" %2d: EAX=0x%08x, EBX=0x%08x, ECX=0x%08x, EDX=0x%08x\n", + leaf->sub, leaf->eax, leaf->ebx, leaf->ecx, leaf->edx); + } else { + printf("0x%08x: EAX=0x%08x, EBX=0x%08x, ECX=0x%08x, EDX=0x%08x\n", + leaf->index, leaf->eax, leaf->ebx, leaf->ecx, leaf->edx); + } +} + +/* Return true is the input eax/ebx/ecx/edx are all zero */ +static bool cpuid_store(struct cpuid_range *range, u32 f, int subleaf, + u32 a, u32 b, u32 c, u32 d) +{ + struct cpuid_func *func; + struct subleaf *leaf; + int s = 0; + + if (a == 0 && b == 0 && c == 0 && d == 0) + return true; + + /* + * Cut off vendor-prefix from CPUID function as we're using it as an + * index into ->funcs. + */ + func = &range->funcs[f & 0xffff]; + + if (!func->leafs) { + func->leafs = malloc(sizeof(struct subleaf)); + if (!func->leafs) + perror("malloc func leaf"); + + func->nr = 1; + } else { + s = func->nr; + func->leafs = realloc(func->leafs, (s + 1) * sizeof(*leaf)); + if (!func->leafs) + perror("realloc f->leafs"); + + func->nr++; + } + + leaf = &func->leafs[s]; + + leaf->index = f; + leaf->sub = subleaf; + leaf->eax = a; + leaf->ebx = b; + leaf->ecx = c; + leaf->edx = d; + + return false; +} + +static void raw_dump_range(struct cpuid_range *range) +{ + u32 f; + int i; + + printf("%s Leafs :\n", range->is_ext ? "Extended" : "Basic"); + printf("================\n"); + + for (f = 0; (int)f < range->nr; f++) { + struct cpuid_func *func = &range->funcs[f]; + u32 index = f; + + if (range->is_ext) + index += 0x80000000; + + /* Skip leaf without valid items */ + if (!func->nr) + continue; + + /* First item is the main leaf, followed by all subleafs */ + for (i = 0; i < func->nr; i++) + leaf_print_raw(&func->leafs[i]); + } +} + +#define MAX_SUBLEAF_NUM 32 +struct cpuid_range *setup_cpuid_range(u32 input_eax) +{ + u32 max_func, idx_func; + int subleaf; + struct cpuid_range *range; + u32 eax, ebx, ecx, edx; + u32 f = input_eax; + int max_subleaf; + bool allzero; + + eax = input_eax; + ebx = ecx = edx = 0; + + cpuid(&eax, &ebx, &ecx, &edx); + max_func = eax; + idx_func = (max_func & 0xffff) + 1; + + range = malloc(sizeof(struct cpuid_range)); + if (!range) + perror("malloc range"); + + if (input_eax & 0x80000000) + range->is_ext = true; + else + range->is_ext = false; + + range->funcs = malloc(sizeof(struct cpuid_func) * idx_func); + if (!range->funcs) + perror("malloc range->funcs"); + + range->nr = idx_func; + memset(range->funcs, 0, sizeof(struct cpuid_func) * idx_func); + + for (; f <= max_func; f++) { + eax = f; + subleaf = ecx = 0; + + cpuid(&eax, &ebx, &ecx, &edx); + allzero = cpuid_store(range, f, subleaf, eax, ebx, ecx, edx); + if (allzero) + continue; + num_leafs++; + + if (!has_subleafs(f)) + continue; + + max_subleaf = MAX_SUBLEAF_NUM; + + /* + * Some can provide the exact number of subleafs, + * others have to be tried (0xf) + */ + if (f == 0x7 || f == 0x14 || f == 0x17 || f == 0x18) + max_subleaf = (eax & 0xff) + 1; + + if (f == 0xb) + max_subleaf = 2; + + for (subleaf = 1; subleaf < max_subleaf; subleaf++) { + eax = f; + ecx = subleaf; + + cpuid(&eax, &ebx, &ecx, &edx); + allzero = cpuid_store(range, f, subleaf, + eax, ebx, ecx, edx); + if (allzero) + continue; + num_leafs++; + } + + } + + return range; +} + +/* + * The basic row format for cpuid.csv is + * LEAF,SUBLEAF,register_name,bits,short name,long description + * + * like: + * 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs + * 1, 0, ECX, 0, sse3, Streaming SIMD Extensions 3(SSE3) + */ +static int parse_line(char *line) +{ + char *str; + int i; + struct cpuid_range *range; + struct cpuid_func *func; + struct subleaf *leaf; + u32 index; + u32 sub; + char buffer[512]; + char *buf; + /* + * Tokens: + * 1. leaf + * 2. subleaf + * 3. register + * 4. bits + * 5. short name + * 6. long detail + */ + char *tokens[6]; + struct reg_desc *reg; + struct bits_desc *bdesc; + int reg_index; + char *start, *end; + + /* Skip comments and NULL line */ + if (line[0] == '#' || line[0] == '\n') + return 0; + + strncpy(buffer, line, 511); + buffer[511] = 0; + str = buffer; + for (i = 0; i < 5; i++) { + tokens[i] = strtok(str, ","); + if (!tokens[i]) + goto err_exit; + str = NULL; + } + tokens[5] = strtok(str, "\n"); + if (!tokens[5]) + goto err_exit; + + /* index/main-leaf */ + index = strtoull(tokens[0], NULL, 0); + + if (index & 0x80000000) + range = leafs_ext; + else + range = leafs_basic; + + index &= 0x7FFFFFFF; + /* Skip line parsing for non-existing indexes */ + if ((int)index >= range->nr) + return -1; + + func = &range->funcs[index]; + + /* Return if the index has no valid item on this platform */ + if (!func->nr) + return 0; + + /* subleaf */ + sub = strtoul(tokens[1], NULL, 0); + if ((int)sub > func->nr) + return -1; + + leaf = &func->leafs[sub]; + buf = tokens[2]; + + if (strcasestr(buf, "EAX")) + reg_index = R_EAX; + else if (strcasestr(buf, "EBX")) + reg_index = R_EBX; + else if (strcasestr(buf, "ECX")) + reg_index = R_ECX; + else if (strcasestr(buf, "EDX")) + reg_index = R_EDX; + else + goto err_exit; + + reg = &leaf->info[reg_index]; + bdesc = &reg->descs[reg->nr++]; + + /* bit flag or bits field */ + buf = tokens[3]; + + end = strtok(buf, ":"); + bdesc->end = strtoul(end, NULL, 0); + bdesc->start = bdesc->end; + + /* start != NULL means it is bit fields */ + start = strtok(NULL, ":"); + if (start) + bdesc->start = strtoul(start, NULL, 0); + + strcpy(bdesc->simp, tokens[4]); + strcpy(bdesc->detail, tokens[5]); + return 0; + +err_exit: + printf("Warning: wrong line format:\n"); + printf("\tline[%d]: %s\n", flines, line); + return -1; +} + +/* Parse csv file, and construct the array of all leafs and subleafs */ +static void parse_text(void) +{ + FILE *file; + char *filename, *line = NULL; + size_t len = 0; + int ret; + + if (show_raw) + return; + + filename = user_csv ? user_csv : def_csv; + file = fopen(filename, "r"); + if (!file) { + /* Fallback to a csv in the same dir */ + file = fopen("./cpuid.csv", "r"); + } + + if (!file) { + printf("Fail to open '%s'\n", filename); + return; + } + + while (1) { + ret = getline(&line, &len, file); + flines++; + if (ret > 0) + parse_line(line); + + if (feof(file)) + break; + } + + fclose(file); +} + + +/* Decode every eax/ebx/ecx/edx */ +static void decode_bits(u32 value, struct reg_desc *rdesc) +{ + struct bits_desc *bdesc; + int start, end, i; + u32 mask; + + for (i = 0; i < rdesc->nr; i++) { + bdesc = &rdesc->descs[i]; + + start = bdesc->start; + end = bdesc->end; + if (start == end) { + /* single bit flag */ + if (value & (1 << start)) + printf("\t%-20s %s%s\n", + bdesc->simp, + show_details ? "-" : "", + show_details ? bdesc->detail : "" + ); + } else { + /* bit fields */ + if (show_flags_only) + continue; + + mask = ((u64)1 << (end - start + 1)) - 1; + printf("\t%-20s\t: 0x%-8x\t%s%s\n", + bdesc->simp, + (value >> start) & mask, + show_details ? "-" : "", + show_details ? bdesc->detail : "" + ); + } + } +} + +static void show_leaf(struct subleaf *leaf) +{ + if (!leaf) + return; + + if (show_raw) + leaf_print_raw(leaf); + + decode_bits(leaf->eax, &leaf->info[R_EAX]); + decode_bits(leaf->ebx, &leaf->info[R_EBX]); + decode_bits(leaf->ecx, &leaf->info[R_ECX]); + decode_bits(leaf->edx, &leaf->info[R_EDX]); +} + +static void show_func(struct cpuid_func *func) +{ + int i; + + if (!func) + return; + + for (i = 0; i < func->nr; i++) + show_leaf(&func->leafs[i]); +} + +static void show_range(struct cpuid_range *range) +{ + int i; + + for (i = 0; i < range->nr; i++) + show_func(&range->funcs[i]); +} + +static inline struct cpuid_func *index_to_func(u32 index) +{ + struct cpuid_range *range; + + range = (index & 0x80000000) ? leafs_ext : leafs_basic; + index &= 0x7FFFFFFF; + + if (((index & 0xFFFF) + 1) > (u32)range->nr) { + printf("ERR: invalid input index (0x%x)\n", index); + return NULL; + } + return &range->funcs[index]; +} + +static void show_info(void) +{ + struct cpuid_func *func; + + if (show_raw) { + /* Show all of the raw output of 'cpuid' instr */ + raw_dump_range(leafs_basic); + raw_dump_range(leafs_ext); + return; + } + + if (user_index != 0xFFFFFFFF) { + /* Only show specific leaf/subleaf info */ + func = index_to_func(user_index); + if (!func) + return; + + /* Dump the raw data also */ + show_raw = true; + + if (user_sub != 0xFFFFFFFF) { + if (user_sub + 1 <= (u32)func->nr) { + show_leaf(&func->leafs[user_sub]); + return; + } + + printf("ERR: invalid input subleaf (0x%x)\n", user_sub); + } + + show_func(func); + return; + } + + printf("CPU features:\n=============\n\n"); + show_range(leafs_basic); + show_range(leafs_ext); +} + +static void setup_platform_cpuid(void) +{ + u32 eax, ebx, ecx, edx; + + /* Check vendor */ + eax = ebx = ecx = edx = 0; + cpuid(&eax, &ebx, &ecx, &edx); + + /* "htuA" */ + if (ebx == 0x68747541) + is_amd = true; + + /* Setup leafs for the basic and extended range */ + leafs_basic = setup_cpuid_range(0x0); + leafs_ext = setup_cpuid_range(0x80000000); +} + +static void usage(void) +{ + printf("kcpuid [-abdfhr] [-l leaf] [-s subleaf]\n" + "\t-a|--all Show both bit flags and complex bit fields info\n" + "\t-b|--bitflags Show boolean flags only\n" + "\t-d|--detail Show details of the flag/fields (default)\n" + "\t-f|--flags Specify the cpuid csv file\n" + "\t-h|--help Show usage info\n" + "\t-l|--leaf=index Specify the leaf you want to check\n" + "\t-r|--raw Show raw cpuid data\n" + "\t-s|--subleaf=sub Specify the subleaf you want to check\n" + ); +} + +static struct option opts[] = { + { "all", no_argument, NULL, 'a' }, /* show both bit flags and fields */ + { "bitflags", no_argument, NULL, 'b' }, /* only show bit flags, default on */ + { "detail", no_argument, NULL, 'd' }, /* show detail descriptions */ + { "file", required_argument, NULL, 'f' }, /* use user's cpuid file */ + { "help", no_argument, NULL, 'h'}, /* show usage */ + { "leaf", required_argument, NULL, 'l'}, /* only check a specific leaf */ + { "raw", no_argument, NULL, 'r'}, /* show raw CPUID leaf data */ + { "subleaf", required_argument, NULL, 's'}, /* check a specific subleaf */ + { NULL, 0, NULL, 0 } +}; + +static int parse_options(int argc, char *argv[]) +{ + int c; + + while ((c = getopt_long(argc, argv, "abdf:hl:rs:", + opts, NULL)) != -1) + switch (c) { + case 'a': + show_flags_only = false; + break; + case 'b': + show_flags_only = true; + break; + case 'd': + show_details = true; + break; + case 'f': + user_csv = optarg; + break; + case 'h': + usage(); + exit(1); + break; + case 'l': + /* main leaf */ + user_index = strtoul(optarg, NULL, 0); + break; + case 'r': + show_raw = true; + break; + case 's': + /* subleaf */ + user_sub = strtoul(optarg, NULL, 0); + break; + default: + printf("%s: Invalid option '%c'\n", argv[0], optopt); + return -1; + } + + return 0; +} + +/* + * Do 4 things in turn: + * 1. Parse user options + * 2. Parse and store all the CPUID leaf data supported on this platform + * 2. Parse the csv file, while skipping leafs which are not available + * on this platform + * 3. Print leafs info based on user options + */ +int main(int argc, char *argv[]) +{ + if (parse_options(argc, argv)) + return -1; + + /* Setup the cpuid leafs of current platform */ + setup_platform_cpuid(); + + /* Read and parse the 'cpuid.csv' */ + parse_text(); + + show_info(); + return 0; +} \ No newline at end of file -- 2.30.0

1 0

[PATCH kernel-4.19 1/3] net: hns3: use ae_dev->ops->reset_event to do reset.
by Yang Yingliang 25 Oct '21

25 Oct '21

From: Yonglong Liu <liuyonglong(a)huawei.com> driver inclusion category: bugfix bugzilla: NA CVE: NA ---------------------------- IT products want to know whether a reset is happened, so need to use ae_dev->ops->reset_event to notify them. Signed-off-by: Yonglong Liu <liuyonglong(a)huawei.com> Reviewed-by: li yongxin <liyongxin1(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 98a1d3d2870a9..8507eb60450fe 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -3933,6 +3933,7 @@ static void hclge_set_def_reset_request(struct hnae3_ae_dev *ae_dev, static void hclge_reset_timer(struct timer_list *t) { struct hclge_dev *hdev = from_timer(hdev, t, reset_timer); + struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev); /* if default_reset_request has no value, it means that this reset * request has already be handled, so just return here @@ -3942,7 +3943,9 @@ static void hclge_reset_timer(struct timer_list *t) dev_info(&hdev->pdev->dev, "triggering reset in reset timer\n"); - hclge_reset_event(hdev->pdev, NULL); + + if (ae_dev->ops->reset_event) + ae_dev->ops->reset_event(hdev->pdev, NULL); } static bool hclge_reset_end(struct hnae3_handle *handle, bool done) -- 2.25.1

1 2

[PATCH kernel-4.19] media: firewire: firedtv-avc: fix a buffer overflow in avc_ca_pmt()
by Yang Yingliang 25 Oct '21

25 Oct '21

From: Dan Carpenter <dan.carpenter(a)oracle.com> mainline inclusion from mainline-v5.16 commit 35d2969ea3c7d32aee78066b1f3cf61a0d935a4e category: bugfix bugzilla: NA CVE: CVE-2021-42739 ------------------------------------------------- The bounds checking in avc_ca_pmt() is not strict enough. It should be checking "read_pos + 4" because it's reading 5 bytes. If the "es_info_length" is non-zero then it reads a 6th byte so there needs to be an additional check for that. I also added checks for the "write_pos". I don't think these are required because "read_pos" and "write_pos" are tied together so checking one ought to be enough. But they make the code easier to understand for me. The check on write_pos is: if (write_pos + 4 >= sizeof(c->operand) - 4) { The first "+ 4" is because we're writing 5 bytes and the last " - 4" is to leave space for the CRC. The other problem is that "length" can be invalid. It comes from "data_length" in fdtv_ca_pmt(). Cc: stable(a)vger.kernel.org Reported-by: Luo Likang <luolikang(a)nsfocus.com> Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> Signed-off-by: Hans Verkuil <hverkuil-cisco(a)xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei(a)kernel.org> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> Reviewed-by: Xiu Jianfeng <xiujianfeng(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/media/firewire/firedtv-avc.c | 14 +++++++++++--- drivers/media/firewire/firedtv-ci.c | 2 ++ 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/media/firewire/firedtv-avc.c b/drivers/media/firewire/firedtv-avc.c index 3ef5df1648d77..8c31cf90c5907 100644 --- a/drivers/media/firewire/firedtv-avc.c +++ b/drivers/media/firewire/firedtv-avc.c @@ -1169,7 +1169,11 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length) read_pos += program_info_length; write_pos += program_info_length; } - while (read_pos < length) { + while (read_pos + 4 < length) { + if (write_pos + 4 >= sizeof(c->operand) - 4) { + ret = -EINVAL; + goto out; + } c->operand[write_pos++] = msg[read_pos++]; c->operand[write_pos++] = msg[read_pos++]; c->operand[write_pos++] = msg[read_pos++]; @@ -1181,13 +1185,17 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length) c->operand[write_pos++] = es_info_length >> 8; c->operand[write_pos++] = es_info_length & 0xff; if (es_info_length > 0) { + if (read_pos >= length) { + ret = -EINVAL; + goto out; + } pmt_cmd_id = msg[read_pos++]; if (pmt_cmd_id != 1 && pmt_cmd_id != 4) dev_err(fdtv->device, "invalid pmt_cmd_id %d at stream level\n", pmt_cmd_id); - if (es_info_length > sizeof(c->operand) - 4 - - write_pos) { + if (es_info_length > sizeof(c->operand) - 4 - write_pos || + es_info_length > length - read_pos) { ret = -EINVAL; goto out; } diff --git a/drivers/media/firewire/firedtv-ci.c b/drivers/media/firewire/firedtv-ci.c index 8dc5a7495abee..14f779812d250 100644 --- a/drivers/media/firewire/firedtv-ci.c +++ b/drivers/media/firewire/firedtv-ci.c @@ -138,6 +138,8 @@ static int fdtv_ca_pmt(struct firedtv *fdtv, void *arg) } else { data_length = msg->msg[3]; } + if (data_length > sizeof(msg->msg) - data_pos) + return -EINVAL; return avc_ca_pmt(fdtv, &msg->msg[data_pos], data_length); } -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS] GPIO : support ascend gpio driver
by Yang Yingliang 25 Oct '21

25 Oct '21

From: wuhuaye <wuhuaye(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4DLVR CVE: NA ------------------------------------------------- Hi everyone， This patch add some special gpio register configuration. It is necessary to configure some gpio register when gpio-dwapb function is enable in Ascend platform. Signed-off-by: wuhuaye <wuhuaye(a)huawei.com> Reviewed-by: Ding Tianhong <dingtianhong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- arch/arm64/mm/init.c | 17 ++++++++++ drivers/gpio/gpio-dwapb.c | 66 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 82 insertions(+), 1 deletion(-) diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 5449ae2d26bee..55fc6a0206796 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -941,6 +941,12 @@ __setup("keepinitrd", keepinitrd_setup); void ascend_enable_all_features(void) { +#ifdef CONFIG_GPIO_DWAPB + extern bool enable_ascend_gpio_dwapb; + + enable_ascend_gpio_dwapb = true; +#endif + if (IS_ENABLED(CONFIG_ASCEND_DVPP_MMAP)) enable_mmap_dvpp = 1; @@ -974,6 +980,17 @@ static int __init ascend_enable_setup(char *__unused) } early_param("ascend_enable_all", ascend_enable_setup); + +static int __init ascend_mini_enable_setup(char *s) +{ +#ifdef CONFIG_GPIO_DWAPB + extern bool enable_ascend_mini_gpio_dwapb; + + enable_ascend_mini_gpio_dwapb = true; +#endif + return 1; +} +__setup("ascend_mini_enable", ascend_mini_enable_setup); #endif diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index 044888fd96a1f..2cdbb4a11075f 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c @@ -50,6 +50,9 @@ #define GPIO_EXT_PORTB 0x54 #define GPIO_EXT_PORTC 0x58 #define GPIO_EXT_PORTD 0x5c +#define GPIO_INTCOMB_MASK 0xffc +#define GPIO_INT_MASK_REG 0x3804 +#define MEM_PERI_SUBCTRL_IOBASE 0x1 #define DWAPB_MAX_PORTS 4 #define GPIO_EXT_PORT_STRIDE 0x04 /* register stride 32 bits */ @@ -64,6 +67,8 @@ #define GPIO_INTSTATUS_V2 0x3c #define GPIO_PORTA_EOI_V2 0x40 +bool enable_ascend_mini_gpio_dwapb; +bool enable_ascend_gpio_dwapb; struct dwapb_gpio; #ifdef CONFIG_PM_SLEEP @@ -77,10 +82,11 @@ struct dwapb_context { u32 int_type; u32 int_pol; u32 int_deb; + u32 int_comb_mask; u32 wake_en; }; #endif - +static void __iomem *peri_subctrl_base_addr; struct dwapb_gpio_port { struct gpio_chip gc; bool is_registered; @@ -232,6 +238,11 @@ static void dwapb_irq_enable(struct irq_data *d) val = dwapb_read(gpio, GPIO_INTEN); val |= BIT(d->hwirq); dwapb_write(gpio, GPIO_INTEN, val); + if (enable_ascend_gpio_dwapb) { + val = dwapb_read(gpio, GPIO_INTMASK); + val &= ~BIT(d->hwirq); + dwapb_write(gpio, GPIO_INTMASK, val); + } spin_unlock_irqrestore(&gc->bgpio_lock, flags); } @@ -244,6 +255,11 @@ static void dwapb_irq_disable(struct irq_data *d) u32 val; spin_lock_irqsave(&gc->bgpio_lock, flags); + if (enable_ascend_gpio_dwapb) { + val = dwapb_read(gpio, GPIO_INTMASK); + val |= BIT(d->hwirq); + dwapb_write(gpio, GPIO_INTMASK, val); + } val = dwapb_read(gpio, GPIO_INTEN); val &= ~BIT(d->hwirq); dwapb_write(gpio, GPIO_INTEN, val); @@ -393,6 +409,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, unsigned int hwirq, ngpio = gc->ngpio; struct irq_chip_type *ct; int err, i; + u32 val; gpio->domain = irq_domain_create_linear(fwnode, ngpio, &irq_generic_chip_ops, gpio); @@ -470,6 +487,12 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, irq_create_mapping(gpio->domain, hwirq); port->gc.to_irq = dwapb_gpio_to_irq; + + if (enable_ascend_gpio_dwapb) { + val = dwapb_read(gpio, GPIO_INTCOMB_MASK); + val |= BIT(0); + dwapb_write(gpio, GPIO_INTCOMB_MASK, val); + } } static void dwapb_irq_teardown(struct dwapb_gpio *gpio) @@ -478,6 +501,7 @@ static void dwapb_irq_teardown(struct dwapb_gpio *gpio) struct gpio_chip *gc = &port->gc; unsigned int ngpio = gc->ngpio; irq_hw_number_t hwirq; + u32 val; if (!gpio->domain) return; @@ -487,6 +511,12 @@ static void dwapb_irq_teardown(struct dwapb_gpio *gpio) irq_domain_remove(gpio->domain); gpio->domain = NULL; + + if (enable_ascend_gpio_dwapb) { + val = dwapb_read(gpio, GPIO_INTCOMB_MASK); + val &= ~BIT(0); + dwapb_write(gpio, GPIO_INTCOMB_MASK, val); + } } static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, @@ -660,6 +690,22 @@ static int dwapb_gpio_probe(struct platform_device *pdev) int err; struct device *dev = &pdev->dev; struct dwapb_platform_data *pdata = dev_get_platdata(dev); + struct device_node *np = dev->of_node; + unsigned int value; + + if (enable_ascend_mini_gpio_dwapb && enable_ascend_gpio_dwapb) { + peri_subctrl_base_addr = of_iomap(np, MEM_PERI_SUBCTRL_IOBASE); + if (!peri_subctrl_base_addr) { + dev_err(&pdev->dev, "sysctrl iomap not find!\n"); + } else { + dev_dbg(&pdev->dev, "sysctrl iomap find!\n"); + value = readl(peri_subctrl_base_addr + + GPIO_INT_MASK_REG); + value &= ~1UL; + writel(value, peri_subctrl_base_addr + + GPIO_INT_MASK_REG); + } + } if (!pdata) { pdata = dwapb_gpio_get_pdata(dev); @@ -742,6 +788,10 @@ static int dwapb_gpio_remove(struct platform_device *pdev) reset_control_assert(gpio->rst); clk_disable_unprepare(gpio->clk); + if ((peri_subctrl_base_addr != NULL) && enable_ascend_mini_gpio_dwapb && + enable_ascend_gpio_dwapb) + iounmap(peri_subctrl_base_addr); + return 0; } @@ -778,6 +828,9 @@ static int dwapb_gpio_suspend(struct device *dev) ctx->int_pol = dwapb_read(gpio, GPIO_INT_POLARITY); ctx->int_type = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); ctx->int_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); + if (enable_ascend_gpio_dwapb) + ctx->int_comb_mask = + dwapb_read(gpio, GPIO_INTCOMB_MASK); /* Mask out interrupts */ dwapb_write(gpio, GPIO_INTMASK, @@ -798,6 +851,7 @@ static int dwapb_gpio_resume(struct device *dev) struct gpio_chip *gc = &gpio->ports[0].gc; unsigned long flags; int i; + unsigned int value; if (!IS_ERR(gpio->clk)) clk_prepare_enable(gpio->clk); @@ -826,6 +880,9 @@ static int dwapb_gpio_resume(struct device *dev) dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, ctx->int_deb); dwapb_write(gpio, GPIO_INTEN, ctx->int_en); dwapb_write(gpio, GPIO_INTMASK, ctx->int_mask); + if (enable_ascend_gpio_dwapb) + dwapb_write(gpio, + GPIO_INTCOMB_MASK, ctx->int_comb_mask); /* Clear out spurious interrupts */ dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); @@ -833,6 +890,13 @@ static int dwapb_gpio_resume(struct device *dev) } spin_unlock_irqrestore(&gc->bgpio_lock, flags); + if ((peri_subctrl_base_addr != NULL) && enable_ascend_mini_gpio_dwapb && + enable_ascend_gpio_dwapb) { + value = readl(peri_subctrl_base_addr + GPIO_INT_MASK_REG); + value &= ~1UL; + writel(value, peri_subctrl_base_addr + GPIO_INT_MASK_REG); + } + return 0; } #endif -- 2.25.1

1 0

[PATCH kernel-4.19] GPIO : support ascend gpio driver
by Yang Yingliang 25 Oct '21

25 Oct '21

From: wuhuaye <wuhuaye(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4DLVR CVE: NA ------------------------------------------------- Hi everyone， This patch add some special gpio register configuration. It is necessary to configure some gpio register when gpio-dwapb function is enable in Ascend platform. Signed-off-by: wuhuaye <wuhuaye(a)huawei.com> Reviewed-by: Ding Tianhong <dingtianhong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- arch/arm64/mm/init.c | 17 ++++++++++ drivers/gpio/gpio-dwapb.c | 66 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 82 insertions(+), 1 deletion(-) diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 2399a257eaf33..8cdf92626c2c6 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -944,6 +944,12 @@ __setup("keepinitrd", keepinitrd_setup); void ascend_enable_all_features(void) { +#ifdef CONFIG_GPIO_DWAPB + extern bool enable_ascend_gpio_dwapb; + + enable_ascend_gpio_dwapb = true; +#endif + if (IS_ENABLED(CONFIG_ASCEND_DVPP_MMAP)) enable_mmap_dvpp = 1; @@ -981,6 +987,17 @@ static int __init ascend_enable_setup(char *__unused) } early_param("ascend_enable_all", ascend_enable_setup); + +static int __init ascend_mini_enable_setup(char *s) +{ +#ifdef CONFIG_GPIO_DWAPB + extern bool enable_ascend_mini_gpio_dwapb; + + enable_ascend_mini_gpio_dwapb = true; +#endif + return 1; +} +__setup("ascend_mini_enable", ascend_mini_enable_setup); #endif diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index 2a56efced7988..4c332f0ed8524 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c @@ -50,6 +50,9 @@ #define GPIO_EXT_PORTB 0x54 #define GPIO_EXT_PORTC 0x58 #define GPIO_EXT_PORTD 0x5c +#define GPIO_INTCOMB_MASK 0xffc +#define GPIO_INT_MASK_REG 0x3804 +#define MEM_PERI_SUBCTRL_IOBASE 0x1 #define DWAPB_DRIVER_NAME "gpio-dwapb" #define DWAPB_MAX_PORTS 4 @@ -66,6 +69,8 @@ #define GPIO_INTSTATUS_V2 0x3c #define GPIO_PORTA_EOI_V2 0x40 +bool enable_ascend_mini_gpio_dwapb; +bool enable_ascend_gpio_dwapb; struct dwapb_gpio; #ifdef CONFIG_PM_SLEEP @@ -79,10 +84,11 @@ struct dwapb_context { u32 int_type; u32 int_pol; u32 int_deb; + u32 int_comb_mask; u32 wake_en; }; #endif - +static void __iomem *peri_subctrl_base_addr; struct dwapb_gpio_port { struct gpio_chip gc; bool is_registered; @@ -234,6 +240,11 @@ static void dwapb_irq_enable(struct irq_data *d) val = dwapb_read(gpio, GPIO_INTEN); val |= BIT(d->hwirq); dwapb_write(gpio, GPIO_INTEN, val); + if (enable_ascend_gpio_dwapb) { + val = dwapb_read(gpio, GPIO_INTMASK); + val &= ~BIT(d->hwirq); + dwapb_write(gpio, GPIO_INTMASK, val); + } spin_unlock_irqrestore(&gc->bgpio_lock, flags); } @@ -246,6 +257,11 @@ static void dwapb_irq_disable(struct irq_data *d) u32 val; spin_lock_irqsave(&gc->bgpio_lock, flags); + if (enable_ascend_gpio_dwapb) { + val = dwapb_read(gpio, GPIO_INTMASK); + val |= BIT(d->hwirq); + dwapb_write(gpio, GPIO_INTMASK, val); + } val = dwapb_read(gpio, GPIO_INTEN); val &= ~BIT(d->hwirq); dwapb_write(gpio, GPIO_INTEN, val); @@ -395,6 +411,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, unsigned int hwirq, ngpio = gc->ngpio; struct irq_chip_type *ct; int err, i; + u32 val; gpio->domain = irq_domain_create_linear(fwnode, ngpio, &irq_generic_chip_ops, gpio); @@ -472,6 +489,12 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, irq_create_mapping(gpio->domain, hwirq); port->gc.to_irq = dwapb_gpio_to_irq; + + if (enable_ascend_gpio_dwapb) { + val = dwapb_read(gpio, GPIO_INTCOMB_MASK); + val |= BIT(0); + dwapb_write(gpio, GPIO_INTCOMB_MASK, val); + } } static void dwapb_irq_teardown(struct dwapb_gpio *gpio) @@ -480,6 +503,7 @@ static void dwapb_irq_teardown(struct dwapb_gpio *gpio) struct gpio_chip *gc = &port->gc; unsigned int ngpio = gc->ngpio; irq_hw_number_t hwirq; + u32 val; if (!gpio->domain) return; @@ -489,6 +513,12 @@ static void dwapb_irq_teardown(struct dwapb_gpio *gpio) irq_domain_remove(gpio->domain); gpio->domain = NULL; + + if (enable_ascend_gpio_dwapb) { + val = dwapb_read(gpio, GPIO_INTCOMB_MASK); + val &= ~BIT(0); + dwapb_write(gpio, GPIO_INTCOMB_MASK, val); + } } static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, @@ -669,6 +699,22 @@ static int dwapb_gpio_probe(struct platform_device *pdev) int err; struct device *dev = &pdev->dev; struct dwapb_platform_data *pdata = dev_get_platdata(dev); + struct device_node *np = dev->of_node; + unsigned int value; + + if (enable_ascend_mini_gpio_dwapb && enable_ascend_gpio_dwapb) { + peri_subctrl_base_addr = of_iomap(np, MEM_PERI_SUBCTRL_IOBASE); + if (!peri_subctrl_base_addr) { + dev_err(&pdev->dev, "sysctrl iomap not find!\n"); + } else { + dev_dbg(&pdev->dev, "sysctrl iomap find!\n"); + value = readl(peri_subctrl_base_addr + + GPIO_INT_MASK_REG); + value &= ~1UL; + writel(value, peri_subctrl_base_addr + + GPIO_INT_MASK_REG); + } + } if (!pdata) { pdata = dwapb_gpio_get_pdata(dev); @@ -751,6 +797,10 @@ static int dwapb_gpio_remove(struct platform_device *pdev) reset_control_assert(gpio->rst); clk_disable_unprepare(gpio->clk); + if ((peri_subctrl_base_addr != NULL) && enable_ascend_mini_gpio_dwapb && + enable_ascend_gpio_dwapb) + iounmap(peri_subctrl_base_addr); + return 0; } @@ -787,6 +837,9 @@ static int dwapb_gpio_suspend(struct device *dev) ctx->int_pol = dwapb_read(gpio, GPIO_INT_POLARITY); ctx->int_type = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); ctx->int_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE); + if (enable_ascend_gpio_dwapb) + ctx->int_comb_mask = + dwapb_read(gpio, GPIO_INTCOMB_MASK); /* Mask out interrupts */ dwapb_write(gpio, GPIO_INTMASK, @@ -807,6 +860,7 @@ static int dwapb_gpio_resume(struct device *dev) struct gpio_chip *gc = &gpio->ports[0].gc; unsigned long flags; int i; + unsigned int value; if (!IS_ERR(gpio->clk)) clk_prepare_enable(gpio->clk); @@ -835,6 +889,9 @@ static int dwapb_gpio_resume(struct device *dev) dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, ctx->int_deb); dwapb_write(gpio, GPIO_INTEN, ctx->int_en); dwapb_write(gpio, GPIO_INTMASK, ctx->int_mask); + if (enable_ascend_gpio_dwapb) + dwapb_write(gpio, + GPIO_INTCOMB_MASK, ctx->int_comb_mask); /* Clear out spurious interrupts */ dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); @@ -842,6 +899,13 @@ static int dwapb_gpio_resume(struct device *dev) } spin_unlock_irqrestore(&gc->bgpio_lock, flags); + if ((peri_subctrl_base_addr != NULL) && enable_ascend_mini_gpio_dwapb && + enable_ascend_gpio_dwapb) { + value = readl(peri_subctrl_base_addr + GPIO_INT_MASK_REG); + value &= ~1UL; + writel(value, peri_subctrl_base_addr + GPIO_INT_MASK_REG); + } + return 0; } #endif -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS 1/9] iommu/arm-smmu-v3: Add support to configure mpam in STE/CD context
by Yang Yingliang 25 Oct '21

25 Oct '21

From: Xingang Wang <wangxingang5(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I49RB2 CVE: NA ------------------------------------------------- To support limiting qos of device, the partid and pmg need to be set into the SMMU STE/CD context. This introduce support of SMMU mpam feature and add interface to set mpam configuration in STE/CD. Signed-off-by: Xingang Wang <wangxingang5(a)huawei.com> Signed-off-by: Rui Zhu <zhurui3(a)huawei.com> Reviewed-by: Yingtai Xie <xieyingtai(a)huawei.com> Reviewed-by: Zhen Lei <thunder.leizhen(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/iommu/arm-smmu-v3-context.c | 25 +++++ drivers/iommu/arm-smmu-v3.c | 151 ++++++++++++++++++++++++++++ include/linux/ascend_smmu.h | 9 ++ 3 files changed, 185 insertions(+) create mode 100644 include/linux/ascend_smmu.h diff --git a/drivers/iommu/arm-smmu-v3-context.c b/drivers/iommu/arm-smmu-v3-context.c index 2351de86d31f1..b30a93e076608 100644 --- a/drivers/iommu/arm-smmu-v3-context.c +++ b/drivers/iommu/arm-smmu-v3-context.c @@ -66,6 +66,9 @@ #define CTXDESC_CD_1_TTB0_MASK GENMASK_ULL(51, 4) +#define CTXDESC_CD_5_PARTID_MASK GENMASK_ULL(47, 32) +#define CTXDESC_CD_5_PMG_MASK GENMASK_ULL(55, 48) + /* Convert between AArch64 (CPU) TCR format and SMMU CD format */ #define ARM_SMMU_TCR2CD(tcr, fld) FIELD_PREP(CTXDESC_CD_0_TCR_##fld, \ FIELD_GET(ARM64_TCR_##fld, tcr)) @@ -563,6 +566,28 @@ static int arm_smmu_set_cd(struct iommu_pasid_table_ops *ops, int pasid, return arm_smmu_write_ctx_desc(tbl, pasid, cd); } +int arm_smmu_set_cd_mpam(struct iommu_pasid_table_ops *ops, + int ssid, int partid, int pmg) +{ + struct arm_smmu_cd_tables *tbl = pasid_ops_to_tables(ops); + u64 val; + __le64 *cdptr = arm_smmu_get_cd_ptr(tbl, ssid); + + if (!cdptr) + return -ENOMEM; + + val = le64_to_cpu(cdptr[5]); + val &= ~CTXDESC_CD_5_PARTID_MASK; + val |= FIELD_PREP(CTXDESC_CD_5_PARTID_MASK, partid); + val &= ~CTXDESC_CD_5_PMG_MASK; + val |= FIELD_PREP(CTXDESC_CD_5_PMG_MASK, pmg); + WRITE_ONCE(cdptr[5], cpu_to_le64(val)); + + iommu_pasid_flush(&tbl->pasid, ssid, true); + + return 0; +} + static void arm_smmu_clear_cd(struct iommu_pasid_table_ops *ops, int pasid, struct iommu_pasid_entry *entry) { diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 6731b47558f4d..c282fc129222f 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -88,6 +88,10 @@ #define IDR1_SSIDSIZE GENMASK(10, 6) #define IDR1_SIDSIZE GENMASK(5, 0) +#define ARM_SMMU_IDR3 0xc +#define IDR3_MPAM (1 << 7) +#define ARM_SMMU_IDR3_CFG 0x140C + #define ARM_SMMU_IDR5 0x14 #define IDR5_STALL_MAX GENMASK(31, 16) #define IDR5_GRAN64K (1 << 6) @@ -186,6 +190,10 @@ #define ARM_SMMU_PRIQ_IRQ_CFG1 0xd8 #define ARM_SMMU_PRIQ_IRQ_CFG2 0xdc +#define ARM_SMMU_MPAMIDR 0x130 +#define MPAMIDR_PMG_MAX GENMASK(23, 16) +#define MPAMIDR_PARTID_MAX GENMASK(15, 0) + /* Common MSI config fields */ #define MSI_CFG0_ADDR_MASK GENMASK_ULL(51, 2) #define MSI_CFG2_SH GENMASK(5, 4) @@ -250,6 +258,7 @@ #define STRTAB_STE_1_S1COR GENMASK_ULL(5, 4) #define STRTAB_STE_1_S1CSH GENMASK_ULL(7, 6) +#define STRTAB_STE_1_S1MPAM (1UL << 26) #define STRTAB_STE_1_S1STALLD (1UL << 27) #define STRTAB_STE_1_EATS GENMASK_ULL(29, 28) @@ -273,6 +282,11 @@ #define STRTAB_STE_3_S2TTB_MASK GENMASK_ULL(51, 4) +#define STRTAB_STE_4_PARTID_MASK GENMASK_ULL(31, 16) + +#define STRTAB_STE_5_MPAM_NS (1UL << 8) +#define STRTAB_STE_5_PMG_MASK GENMASK_ULL(7, 0) + /* Command queue */ #define CMDQ_ENT_SZ_SHIFT 4 #define CMDQ_ENT_DWORDS ((1 << CMDQ_ENT_SZ_SHIFT) >> 3) @@ -634,6 +648,7 @@ struct arm_smmu_device { #define ARM_SMMU_FEAT_SVA (1 << 17) #define ARM_SMMU_FEAT_HA (1 << 18) #define ARM_SMMU_FEAT_HD (1 << 19) +#define ARM_SMMU_FEAT_MPAM (1 << 20) u32 features; #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) @@ -672,6 +687,9 @@ struct arm_smmu_device { struct mutex streams_mutex; struct iopf_queue *iopf_queue; + + unsigned int mpam_partid_max; + unsigned int mpam_pmg_max; }; struct arm_smmu_stream { @@ -3977,6 +3995,25 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) if (smmu->sid_bits <= STRTAB_SPLIT) smmu->features &= ~ARM_SMMU_FEAT_2_LVL_STRTAB; + /* IDR3 */ + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3); + + if (!(reg & IDR3_MPAM)) { + reg |= FIELD_PREP(IDR3_MPAM, 1); + writel(reg, smmu->base + ARM_SMMU_IDR3_CFG); + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3); + if (!(reg & IDR3_MPAM)) + dev_warn(smmu->dev, "enable smmu mpam failed\n"); + } + + if (reg & IDR3_MPAM) { + reg = readl_relaxed(smmu->base + ARM_SMMU_MPAMIDR); + smmu->mpam_partid_max = FIELD_GET(MPAMIDR_PARTID_MAX, reg); + smmu->mpam_pmg_max = FIELD_GET(MPAMIDR_PMG_MAX, reg); + if (smmu->mpam_partid_max || smmu->mpam_pmg_max) + smmu->features |= ARM_SMMU_FEAT_MPAM; + } + /* IDR5 */ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5); @@ -4124,6 +4161,120 @@ static unsigned long arm_smmu_resource_size(struct arm_smmu_device *smmu) return SZ_128K; } +static int arm_smmu_set_ste_mpam(struct arm_smmu_device *smmu, + int sid, int partid, int pmg, int s1mpam) +{ + u64 val; + __le64 *ste; + + if (!arm_smmu_sid_in_range(smmu, sid)) + return -ERANGE; + + /* get ste ptr */ + ste = arm_smmu_get_step_for_sid(smmu, sid); + + /* write s1mpam to ste */ + val = le64_to_cpu(ste[1]); + val &= ~STRTAB_STE_1_S1MPAM; + val |= FIELD_PREP(STRTAB_STE_1_S1MPAM, s1mpam); + WRITE_ONCE(ste[1], cpu_to_le64(val)); + + val = le64_to_cpu(ste[4]); + val &= ~STRTAB_STE_4_PARTID_MASK; + val |= FIELD_PREP(STRTAB_STE_4_PARTID_MASK, partid); + WRITE_ONCE(ste[4], cpu_to_le64(val)); + + val = le64_to_cpu(ste[5]); + val &= ~STRTAB_STE_5_PMG_MASK; + val |= FIELD_PREP(STRTAB_STE_5_PMG_MASK, pmg); + WRITE_ONCE(ste[5], cpu_to_le64(val)); + + arm_smmu_sync_ste_for_sid(smmu, sid); + + return 0; +} + +int arm_smmu_set_cd_mpam(struct iommu_pasid_table_ops *ops, + int ssid, int partid, int pmg); + +static int arm_smmu_set_mpam(struct arm_smmu_device *smmu, + int sid, int ssid, int partid, int pmg, int s1mpam) +{ + struct arm_smmu_master_data *master = arm_smmu_find_master(smmu, sid); + struct arm_smmu_s1_cfg *cfg = master ? master->ste.s1_cfg : NULL; + struct arm_smmu_domain *domain = master ? master->domain : NULL; + int ret; + + struct arm_smmu_cmdq_ent prefetch_cmd = { + .opcode = CMDQ_OP_PREFETCH_CFG, + .prefetch = { + .sid = sid, + }, + }; + + if (!(smmu->features & ARM_SMMU_FEAT_MPAM)) + return -ENODEV; + + if (WARN_ON(!domain)) + return -EINVAL; + + if (WARN_ON(!cfg)) + return -EINVAL; + + if (WARN_ON(ssid >= (1 << master->ssid_bits))) + return -E2BIG; + + if (partid > smmu->mpam_partid_max || pmg > smmu->mpam_pmg_max) { + dev_err(smmu->dev, + "mpam rmid out of range: partid[0, %d] pmg[0, %d]\n", + smmu->mpam_partid_max, smmu->mpam_pmg_max); + return -ERANGE; + } + + ret = arm_smmu_set_ste_mpam(smmu, sid, partid, pmg, s1mpam); + if (ret < 0) { + dev_err(smmu->dev, "set ste mpam configuration error %d\n", + ret); + return ret; + } + + /* do not modify cd table which owned by guest */ + if (domain->stage == ARM_SMMU_DOMAIN_NESTED) { + dev_err(smmu->dev, + "mpam: smmu cd is owned by guest, not modified\n"); + return 0; + } + + ret = arm_smmu_set_cd_mpam(cfg->ops, ssid, partid, pmg); + if (s1mpam && ret < 0) { + dev_err(smmu->dev, "set cd mpam configuration error %d\n", + ret); + return ret; + } + + /* It's likely that we'll want to use the new STE soon */ + if (!(smmu->options & ARM_SMMU_OPT_SKIP_PREFETCH)) + arm_smmu_cmdq_issue_cmd(smmu, &prefetch_cmd); + + dev_info(smmu->dev, "partid %d, pmg %d\n", partid, pmg); + + return 0; +} + +/** + * arm_smmu_set_dev_mpam() - Set mpam configuration to SMMU STE/CD + */ +int arm_smmu_set_dev_mpam(struct device *dev, int ssid, int partid, int pmg, + int s1mpam) +{ + struct arm_smmu_master_data *master = dev->iommu_fwspec->iommu_priv; + struct arm_smmu_device *smmu = master->domain->smmu; + int sid = master->streams->id; + + return arm_smmu_set_mpam(smmu, sid, ssid, partid, pmg, s1mpam); +} +EXPORT_SYMBOL(arm_smmu_set_dev_mpam); + static int arm_smmu_device_probe(struct platform_device *pdev) { int irq, ret; diff --git a/include/linux/ascend_smmu.h b/include/linux/ascend_smmu.h new file mode 100644 index 0000000000000..bd0edd25057e1 --- /dev/null +++ b/include/linux/ascend_smmu.h @@ -0,0 +1,9 @@ +#ifndef __LINUX_ASCEND_SMMU_H +#define __LINUX_ASCEND_SMMU_H + +#include <linux/device.h> + +extern int arm_smmu_set_dev_mpam(struct device *dev, int ssid, int partid, + int pmg, int s1mpam); + +#endif /* __LINUX_ASCEND_SMMU_H */ -- 2.25.1

1 8

[PATCH kernel-4.19 1/9] iommu/arm-smmu-v3: Add support to configure mpam in STE/CD context
by Yang Yingliang 25 Oct '21

25 Oct '21

From: Xingang Wang <wangxingang5(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I49RB2 CVE: NA ------------------------------------------------- To support limiting qos of device, the partid and pmg need to be set into the SMMU STE/CD context. This introduce support of SMMU mpam feature and add interface to set mpam configuration in STE/CD. Signed-off-by: Xingang Wang <wangxingang5(a)huawei.com> Signed-off-by: Rui Zhu <zhurui3(a)huawei.com> Reviewed-by: Yingtai Xie <xieyingtai(a)huawei.com> Reviewed-by: Zhen Lei <thunder.leizhen(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/iommu/arm-smmu-v3-context.c | 25 +++++ drivers/iommu/arm-smmu-v3.c | 151 ++++++++++++++++++++++++++++ include/linux/ascend_smmu.h | 9 ++ 3 files changed, 185 insertions(+) create mode 100644 include/linux/ascend_smmu.h diff --git a/drivers/iommu/arm-smmu-v3-context.c b/drivers/iommu/arm-smmu-v3-context.c index 2351de86d31f1..b30a93e076608 100644 --- a/drivers/iommu/arm-smmu-v3-context.c +++ b/drivers/iommu/arm-smmu-v3-context.c @@ -66,6 +66,9 @@ #define CTXDESC_CD_1_TTB0_MASK GENMASK_ULL(51, 4) +#define CTXDESC_CD_5_PARTID_MASK GENMASK_ULL(47, 32) +#define CTXDESC_CD_5_PMG_MASK GENMASK_ULL(55, 48) + /* Convert between AArch64 (CPU) TCR format and SMMU CD format */ #define ARM_SMMU_TCR2CD(tcr, fld) FIELD_PREP(CTXDESC_CD_0_TCR_##fld, \ FIELD_GET(ARM64_TCR_##fld, tcr)) @@ -563,6 +566,28 @@ static int arm_smmu_set_cd(struct iommu_pasid_table_ops *ops, int pasid, return arm_smmu_write_ctx_desc(tbl, pasid, cd); } +int arm_smmu_set_cd_mpam(struct iommu_pasid_table_ops *ops, + int ssid, int partid, int pmg) +{ + struct arm_smmu_cd_tables *tbl = pasid_ops_to_tables(ops); + u64 val; + __le64 *cdptr = arm_smmu_get_cd_ptr(tbl, ssid); + + if (!cdptr) + return -ENOMEM; + + val = le64_to_cpu(cdptr[5]); + val &= ~CTXDESC_CD_5_PARTID_MASK; + val |= FIELD_PREP(CTXDESC_CD_5_PARTID_MASK, partid); + val &= ~CTXDESC_CD_5_PMG_MASK; + val |= FIELD_PREP(CTXDESC_CD_5_PMG_MASK, pmg); + WRITE_ONCE(cdptr[5], cpu_to_le64(val)); + + iommu_pasid_flush(&tbl->pasid, ssid, true); + + return 0; +} + static void arm_smmu_clear_cd(struct iommu_pasid_table_ops *ops, int pasid, struct iommu_pasid_entry *entry) { diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 8b5083c3e0a16..6634d596f7efc 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -88,6 +88,10 @@ #define IDR1_SSIDSIZE GENMASK(10, 6) #define IDR1_SIDSIZE GENMASK(5, 0) +#define ARM_SMMU_IDR3 0xc +#define IDR3_MPAM (1 << 7) +#define ARM_SMMU_IDR3_CFG 0x140C + #define ARM_SMMU_IDR5 0x14 #define IDR5_STALL_MAX GENMASK(31, 16) #define IDR5_GRAN64K (1 << 6) @@ -186,6 +190,10 @@ #define ARM_SMMU_PRIQ_IRQ_CFG1 0xd8 #define ARM_SMMU_PRIQ_IRQ_CFG2 0xdc +#define ARM_SMMU_MPAMIDR 0x130 +#define MPAMIDR_PMG_MAX GENMASK(23, 16) +#define MPAMIDR_PARTID_MAX GENMASK(15, 0) + /* Common MSI config fields */ #define MSI_CFG0_ADDR_MASK GENMASK_ULL(51, 2) #define MSI_CFG2_SH GENMASK(5, 4) @@ -250,6 +258,7 @@ #define STRTAB_STE_1_S1COR GENMASK_ULL(5, 4) #define STRTAB_STE_1_S1CSH GENMASK_ULL(7, 6) +#define STRTAB_STE_1_S1MPAM (1UL << 26) #define STRTAB_STE_1_S1STALLD (1UL << 27) #define STRTAB_STE_1_EATS GENMASK_ULL(29, 28) @@ -273,6 +282,11 @@ #define STRTAB_STE_3_S2TTB_MASK GENMASK_ULL(51, 4) +#define STRTAB_STE_4_PARTID_MASK GENMASK_ULL(31, 16) + +#define STRTAB_STE_5_MPAM_NS (1UL << 8) +#define STRTAB_STE_5_PMG_MASK GENMASK_ULL(7, 0) + /* Command queue */ #define CMDQ_ENT_SZ_SHIFT 4 #define CMDQ_ENT_DWORDS ((1 << CMDQ_ENT_SZ_SHIFT) >> 3) @@ -634,6 +648,7 @@ struct arm_smmu_device { #define ARM_SMMU_FEAT_SVA (1 << 17) #define ARM_SMMU_FEAT_HA (1 << 18) #define ARM_SMMU_FEAT_HD (1 << 19) +#define ARM_SMMU_FEAT_MPAM (1 << 20) u32 features; #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) @@ -672,6 +687,9 @@ struct arm_smmu_device { struct mutex streams_mutex; struct iopf_queue *iopf_queue; + + unsigned int mpam_partid_max; + unsigned int mpam_pmg_max; }; struct arm_smmu_stream { @@ -3980,6 +3998,25 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) if (smmu->sid_bits <= STRTAB_SPLIT) smmu->features &= ~ARM_SMMU_FEAT_2_LVL_STRTAB; + /* IDR3 */ + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3); + + if (!(reg & IDR3_MPAM)) { + reg |= FIELD_PREP(IDR3_MPAM, 1); + writel(reg, smmu->base + ARM_SMMU_IDR3_CFG); + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3); + if (!(reg & IDR3_MPAM)) + dev_warn(smmu->dev, "enable smmu mpam failed\n"); + } + + if (reg & IDR3_MPAM) { + reg = readl_relaxed(smmu->base + ARM_SMMU_MPAMIDR); + smmu->mpam_partid_max = FIELD_GET(MPAMIDR_PARTID_MAX, reg); + smmu->mpam_pmg_max = FIELD_GET(MPAMIDR_PMG_MAX, reg); + if (smmu->mpam_partid_max || smmu->mpam_pmg_max) + smmu->features |= ARM_SMMU_FEAT_MPAM; + } + /* IDR5 */ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5); @@ -4127,6 +4164,120 @@ static unsigned long arm_smmu_resource_size(struct arm_smmu_device *smmu) return SZ_128K; } +static int arm_smmu_set_ste_mpam(struct arm_smmu_device *smmu, + int sid, int partid, int pmg, int s1mpam) +{ + u64 val; + __le64 *ste; + + if (!arm_smmu_sid_in_range(smmu, sid)) + return -ERANGE; + + /* get ste ptr */ + ste = arm_smmu_get_step_for_sid(smmu, sid); + + /* write s1mpam to ste */ + val = le64_to_cpu(ste[1]); + val &= ~STRTAB_STE_1_S1MPAM; + val |= FIELD_PREP(STRTAB_STE_1_S1MPAM, s1mpam); + WRITE_ONCE(ste[1], cpu_to_le64(val)); + + val = le64_to_cpu(ste[4]); + val &= ~STRTAB_STE_4_PARTID_MASK; + val |= FIELD_PREP(STRTAB_STE_4_PARTID_MASK, partid); + WRITE_ONCE(ste[4], cpu_to_le64(val)); + + val = le64_to_cpu(ste[5]); + val &= ~STRTAB_STE_5_PMG_MASK; + val |= FIELD_PREP(STRTAB_STE_5_PMG_MASK, pmg); + WRITE_ONCE(ste[5], cpu_to_le64(val)); + + arm_smmu_sync_ste_for_sid(smmu, sid); + + return 0; +} + +int arm_smmu_set_cd_mpam(struct iommu_pasid_table_ops *ops, + int ssid, int partid, int pmg); + +static int arm_smmu_set_mpam(struct arm_smmu_device *smmu, + int sid, int ssid, int partid, int pmg, int s1mpam) +{ + struct arm_smmu_master_data *master = arm_smmu_find_master(smmu, sid); + struct arm_smmu_s1_cfg *cfg = master ? master->ste.s1_cfg : NULL; + struct arm_smmu_domain *domain = master ? master->domain : NULL; + int ret; + + struct arm_smmu_cmdq_ent prefetch_cmd = { + .opcode = CMDQ_OP_PREFETCH_CFG, + .prefetch = { + .sid = sid, + }, + }; + + if (!(smmu->features & ARM_SMMU_FEAT_MPAM)) + return -ENODEV; + + if (WARN_ON(!domain)) + return -EINVAL; + + if (WARN_ON(!cfg)) + return -EINVAL; + + if (WARN_ON(ssid >= (1 << master->ssid_bits))) + return -E2BIG; + + if (partid > smmu->mpam_partid_max || pmg > smmu->mpam_pmg_max) { + dev_err(smmu->dev, + "mpam rmid out of range: partid[0, %d] pmg[0, %d]\n", + smmu->mpam_partid_max, smmu->mpam_pmg_max); + return -ERANGE; + } + + ret = arm_smmu_set_ste_mpam(smmu, sid, partid, pmg, s1mpam); + if (ret < 0) { + dev_err(smmu->dev, "set ste mpam configuration error %d\n", + ret); + return ret; + } + + /* do not modify cd table which owned by guest */ + if (domain->stage == ARM_SMMU_DOMAIN_NESTED) { + dev_err(smmu->dev, + "mpam: smmu cd is owned by guest, not modified\n"); + return 0; + } + + ret = arm_smmu_set_cd_mpam(cfg->ops, ssid, partid, pmg); + if (s1mpam && ret < 0) { + dev_err(smmu->dev, "set cd mpam configuration error %d\n", + ret); + return ret; + } + + /* It's likely that we'll want to use the new STE soon */ + if (!(smmu->options & ARM_SMMU_OPT_SKIP_PREFETCH)) + arm_smmu_cmdq_issue_cmd(smmu, &prefetch_cmd); + + dev_info(smmu->dev, "partid %d, pmg %d\n", partid, pmg); + + return 0; +} + +/** + * arm_smmu_set_dev_mpam() - Set mpam configuration to SMMU STE/CD + */ +int arm_smmu_set_dev_mpam(struct device *dev, int ssid, int partid, int pmg, + int s1mpam) +{ + struct arm_smmu_master_data *master = dev->iommu_fwspec->iommu_priv; + struct arm_smmu_device *smmu = master->domain->smmu; + int sid = master->streams->id; + + return arm_smmu_set_mpam(smmu, sid, ssid, partid, pmg, s1mpam); +} +EXPORT_SYMBOL(arm_smmu_set_dev_mpam); + static int arm_smmu_device_probe(struct platform_device *pdev) { int irq, ret; diff --git a/include/linux/ascend_smmu.h b/include/linux/ascend_smmu.h new file mode 100644 index 0000000000000..bd0edd25057e1 --- /dev/null +++ b/include/linux/ascend_smmu.h @@ -0,0 +1,9 @@ +#ifndef __LINUX_ASCEND_SMMU_H +#define __LINUX_ASCEND_SMMU_H + +#include <linux/device.h> + +extern int arm_smmu_set_dev_mpam(struct device *dev, int ssid, int partid, + int pmg, int s1mpam); + +#endif /* __LINUX_ASCEND_SMMU_H */ -- 2.25.1

1 8

[PATCH openEuler-1.0-LTS 0/6] Fix the problem that the number of tcp timeout retransmissions is lost
by jiazhenyuan 25 Oct '21

25 Oct '21

From: Jiazhenyuan <jiazhenyuan(a)uniontech.com> issue: https://gitee.com/openeuler/kernel/issues/I4AFRJ?from=project-issue jiazhenyuan (6): tcp: switch tcp and sch_fq to new earliest departure time net_sched: sch_fq: ensure maxrate fq parameter applies to EDT flows From 9efdda4e3abed13f0903b7b6e4d4c2102019440a Mon Sep 17 00:00:00 2001 From: Eric Dumazet <edumazet(a)google.com> Date: Sat, 24 Nov 2018 09:12:24 -0800 Subject: [PATCH] tcp: address problems caused by EDT misshaps From 7ae189759cc48cf8b54beebff566e9fd2d4e7d7c Mon Sep 17 00:00:00 2001 From: Yuchung Cheng <ycheng(a)google.com> Date: Wed, 16 Jan 2019 15:05:30 -0800 Subject: [PATCH] tcp: always set retrans_stamp on recovery From 01a523b071618abbc634d1958229fe3bd2dfa5fa Mon Sep 17 00:00:00 2001 From: Yuchung Cheng <ycheng(a)google.com> Date: Wed, 16 Jan 2019 15:05:32 -0800 Subject: [PATCH] tcp: create a helper to model exponential backoff From 3256a2d6ab1f71f9a1bd2d7f6f18eb8108c48d17 Mon Sep 17 00:00:00 2001 From: Eric Dumazet <edumazet(a)google.com> Date: Mon, 30 Sep 2019 15:44:44 -0700 Subject: [PATCH] tcp: adjust rto_base in retransmits_timed_out() net/ipv4/tcp_bbr.c | 7 +++-- net/ipv4/tcp_input.c | 17 +++++++----- net/ipv4/tcp_output.c | 29 ++++++++++++++------ net/ipv4/tcp_timer.c | 64 ++++++++++++++++++++----------------------- net/sched/sch_fq.c | 46 ++++++++++++++++++------------- 5 files changed, 92 insertions(+), 71 deletions(-) -- 2.27.0

2 7

[PATCH openEuler-1.0-LTS] nvme-rdma: destroy cm id before destroy qp to avoid use after free
by Yang Yingliang 25 Oct '21

25 Oct '21

From: Ruozhu Li <liruozhu(a)huawei.com> mainline inclusion from mainline-v5.15-rc2 commit 9817d763dbe15327b9b3ff4404fa6f27f927e744 category: bugfix bugzilla: NA CVE: NA Link: https://gitee.com/openeuler/kernel/issues/I1WGZE We got a panic when host received a rej cm event soon after a connect error cm event. When host get connect error cm event, it will destroy qp immediately. But cm_id is still valid then.Another cm event rise here, try to access the qp which was destroyed.Then we got a kernel panic blow: [87816.777089] [20473] ib_cm:cm_rep_handler:2343: cm_rep_handler: Stale connection. local_comm_id -154357094, remote_comm_id -1133609861 [87816.777223] [20473] ib_cm:cm_init_qp_rtr_attr:4162: cm_init_qp_rtr_attr: local_id -1150387077, cm_id_priv->id.state: 13 [87816.777225] [20473] rdma_cm:cma_rep_recv:1871: RDMA CM: CONNECT_ERROR: failed to handle reply. status -22 [87816.777395] [20473] ib_cm:ib_send_cm_rej:2781: ib_send_cm_rej: local_id -1150387077, cm_id->state: 13 [87816.777398] [20473] nvme_rdma:nvme_rdma_cm_handler:1718: nvme nvme278: connect error (6): status -22 id 00000000c3809aff [87816.801155] [20473] nvme_rdma:nvme_rdma_cm_handler:1742: nvme nvme278: CM error event 6 [87816.801160] [20473] rdma_cm:cma_ib_handler:1947: RDMA CM: REJECTED: consumer defined [87816.801163] nvme nvme278: rdma connection establishment failed (-104) [87816.801168] BUG: unable to handle kernel NULL pointer dereference at 0000000000000370 [87816.801201] RIP: 0010:_ib_modify_qp+0x6e/0x3a0 [ib_core] [87816.801215] Call Trace: [87816.801223] cma_modify_qp_err+0x52/0x80 [rdma_cm] [87816.801228] ? __dynamic_pr_debug+0x8a/0xb0 [87816.801232] cma_ib_handler+0x25a/0x2f0 [rdma_cm] [87816.801235] cm_process_work+0x60/0xe0 [ib_cm] [87816.801238] cm_work_handler+0x13b/0x1b97 [ib_cm] [87816.801243] ? __switch_to_asm+0x35/0x70 [87816.801244] ? __switch_to_asm+0x41/0x70 [87816.801246] ? __switch_to_asm+0x35/0x70 [87816.801248] ? __switch_to_asm+0x41/0x70 [87816.801252] ? __switch_to+0x8c/0x480 [87816.801254] ? __switch_to_asm+0x41/0x70 [87816.801256] ? __switch_to_asm+0x35/0x70 [87816.801259] process_one_work+0x1a7/0x3b0 [87816.801263] worker_thread+0x30/0x390 [87816.801266] ? create_worker+0x1a0/0x1a0 [87816.801268] kthread+0x112/0x130 [87816.801270] ? kthread_flush_work_fn+0x10/0x10 [87816.801272] ret_from_fork+0x35/0x40 ------------------------------------------------- We should always destroy cm_id before destroy qp to avoid to get cma event after qp was destroyed, which may lead to use after free. In RDMA connection establishment error flow, don't destroy qp in cm event handler.Just report cm_error to upper level, qp will be destroy in nvme_rdma_alloc_queue() after destroy cm id. Signed-off-by: Ruozhu Li <liruozhu(a)huawei.com> Reviewed-by: Max Gurtovoy <mgurtovoy(a)nvidia.com> Signed-off-by: Christoph Hellwig <hch(a)lst.de> Conflicts: drivers/nvme/host/rdma.c [lrz: adjust context] Reviewed-by: Jason Yan <yanaijie(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/nvme/host/rdma.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/drivers/nvme/host/rdma.c b/drivers/nvme/host/rdma.c index b8e0d637ddcfc..049edb9ed1858 100644 --- a/drivers/nvme/host/rdma.c +++ b/drivers/nvme/host/rdma.c @@ -575,8 +575,8 @@ static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) return; - nvme_rdma_destroy_queue_ib(queue); rdma_destroy_id(queue->cm_id); + nvme_rdma_destroy_queue_ib(queue); mutex_destroy(&queue->queue_lock); } @@ -1509,14 +1509,10 @@ static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) for (i = 0; i < queue->queue_size; i++) { ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); if (ret) - goto out_destroy_queue_ib; + return ret; } return 0; - -out_destroy_queue_ib: - nvme_rdma_destroy_queue_ib(queue); - return ret; } static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, @@ -1608,14 +1604,10 @@ static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) if (ret) { dev_err(ctrl->ctrl.device, "rdma_connect failed (%d).\n", ret); - goto out_destroy_queue_ib; + return ret; } return 0; - -out_destroy_queue_ib: - nvme_rdma_destroy_queue_ib(queue); - return ret; } static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, @@ -1646,8 +1638,6 @@ static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, case RDMA_CM_EVENT_ROUTE_ERROR: case RDMA_CM_EVENT_CONNECT_ERROR: case RDMA_CM_EVENT_UNREACHABLE: - nvme_rdma_destroy_queue_ib(queue); - /* fall through */ case RDMA_CM_EVENT_ADDR_ERROR: dev_dbg(queue->ctrl->ctrl.device, "CM error event %d\n", ev->event); -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS] arm64: Errata: fix kabi changed by cpu_errata
by Yang Yingliang 25 Oct '21

25 Oct '21

From: Weilong Chen <chenweilong(a)huawei.com> ascend inclusion category: feature bugzilla: 46922 CVE: NA ------------------------------------- Patch "cache: Workaround HiSilicon Taishan DC CVAU" breaks the kabi symbols: cpu_hwcaps cpu_hwcap_keys Fix by using CONFIG_HISILICON_ERRATUM_1980005 to protect it. Signed-off-by: Weilong Chen <chenweilong(a)huawei.com> Reviewed-by: Cheng Jian <cj.chengjian(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- arch/arm64/include/asm/cpucaps.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h index d6c863d2cf984..69515f9077e34 100644 --- a/arch/arm64/include/asm/cpucaps.h +++ b/arch/arm64/include/asm/cpucaps.h @@ -56,8 +56,12 @@ #define ARM64_WORKAROUND_1463225 35 #define ARM64_HAS_CRC32 36 #define ARM64_SSBS 37 +#ifdef CONFIG_HISILICON_ERRATUM_1980005 #define ARM64_WORKAROUND_HISILICON_1980005 38 #define ARM64_NCAPS 39 +#else +#define ARM64_NCAPS 38 +#endif #endif /* __ASM_CPUCAPS_H */ -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS 01/45] af_unix: fix garbage collect vs MSG_PEEK
by Yang Yingliang 25 Oct '21

25 Oct '21

From: Miklos Szeredi <mszeredi(a)redhat.com> stable inclusion from linux-4.19.200 commit 1dabafa9f61118b1377fde424d9a94bf8dbf2813 -------------------------------- commit cbcf01128d0a92e131bd09f1688fe032480b65ca upstream. unix_gc() assumes that candidate sockets can never gain an external reference (i.e. be installed into an fd) while the unix_gc_lock is held. Except for MSG_PEEK this is guaranteed by modifying inflight count under the unix_gc_lock. MSG_PEEK does not touch any variable protected by unix_gc_lock (file count is not), yet it needs to be serialized with garbage collection. Do this by locking/unlocking unix_gc_lock: 1) increment file count 2) lock/unlock barrier to make sure incremented file count is visible to garbage collection 3) install file into fd This is a lock barrier (unlike smp_mb()) that ensures that garbage collection is run completely before or completely after the barrier. Cc: <stable(a)vger.kernel.org> Signed-off-by: Miklos Szeredi <mszeredi(a)redhat.com> Signed-off-by: Linus Torvalds <torvalds(a)linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- net/unix/af_unix.c | 51 ++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 49 insertions(+), 2 deletions(-) diff --git a/net/unix/af_unix.c b/net/unix/af_unix.c index 337c4797ab167..98c253afa0db2 100644 --- a/net/unix/af_unix.c +++ b/net/unix/af_unix.c @@ -1517,6 +1517,53 @@ static int unix_getname(struct socket *sock, struct sockaddr *uaddr, int peer) return err; } +static void unix_peek_fds(struct scm_cookie *scm, struct sk_buff *skb) +{ + scm->fp = scm_fp_dup(UNIXCB(skb).fp); + + /* + * Garbage collection of unix sockets starts by selecting a set of + * candidate sockets which have reference only from being in flight + * (total_refs == inflight_refs). This condition is checked once during + * the candidate collection phase, and candidates are marked as such, so + * that non-candidates can later be ignored. While inflight_refs is + * protected by unix_gc_lock, total_refs (file count) is not, hence this + * is an instantaneous decision. + * + * Once a candidate, however, the socket must not be reinstalled into a + * file descriptor while the garbage collection is in progress. + * + * If the above conditions are met, then the directed graph of + * candidates (*) does not change while unix_gc_lock is held. + * + * Any operations that changes the file count through file descriptors + * (dup, close, sendmsg) does not change the graph since candidates are + * not installed in fds. + * + * Dequeing a candidate via recvmsg would install it into an fd, but + * that takes unix_gc_lock to decrement the inflight count, so it's + * serialized with garbage collection. + * + * MSG_PEEK is special in that it does not change the inflight count, + * yet does install the socket into an fd. The following lock/unlock + * pair is to ensure serialization with garbage collection. It must be + * done between incrementing the file count and installing the file into + * an fd. + * + * If garbage collection starts after the barrier provided by the + * lock/unlock, then it will see the elevated refcount and not mark this + * as a candidate. If a garbage collection is already in progress + * before the file count was incremented, then the lock/unlock pair will + * ensure that garbage collection is finished before progressing to + * installing the fd. + * + * (*) A -> B where B is on the queue of A or B is on the queue of C + * which is on the queue of listening socket A. + */ + spin_lock(&unix_gc_lock); + spin_unlock(&unix_gc_lock); +} + static int unix_scm_to_skb(struct scm_cookie *scm, struct sk_buff *skb, bool send_fds) { int err = 0; @@ -2142,7 +2189,7 @@ static int unix_dgram_recvmsg(struct socket *sock, struct msghdr *msg, sk_peek_offset_fwd(sk, size); if (UNIXCB(skb).fp) - scm.fp = scm_fp_dup(UNIXCB(skb).fp); + unix_peek_fds(&scm, skb); } err = (flags & MSG_TRUNC) ? skb->len - skip : size; @@ -2383,7 +2430,7 @@ static int unix_stream_read_generic(struct unix_stream_read_state *state, /* It is questionable, see note in unix_dgram_recvmsg. */ if (UNIXCB(skb).fp) - scm.fp = scm_fp_dup(UNIXCB(skb).fp); + unix_peek_fds(&scm, skb); sk_peek_offset_fwd(sk, chunk); -- 2.25.1

1 44

[PATCH kernel-4.19 1/9] iommu/arm-smmu-v3: Add support to configure mpam in STE/CD context
by Yang Yingliang 22 Oct '21

22 Oct '21

From: Xingang Wang <wangxingang5(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I49RB2 CVE: NA ------------------------------------------------- To support limiting qos of device, the partid and pmg need to be set into the SMMU STE/CD context. This introduce support of SMMU mpam feature and add interface to set mpam configuration in STE/CD. Signed-off-by: Xingang Wang <wangxingang5(a)huawei.com> Signed-off-by: Rui Zhu <zhurui3(a)huawei.com> Reviewed-by: Yingtai Xie <xieyingtai(a)huawei.com> Reviewed-by: Zhen Lei <thunder.leizhen(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/iommu/arm-smmu-v3-context.c | 25 +++++ drivers/iommu/arm-smmu-v3.c | 151 ++++++++++++++++++++++++++++ include/linux/ascend_smmu.h | 9 ++ 3 files changed, 185 insertions(+) create mode 100644 include/linux/ascend_smmu.h diff --git a/drivers/iommu/arm-smmu-v3-context.c b/drivers/iommu/arm-smmu-v3-context.c index 2351de86d31f1..b30a93e076608 100644 --- a/drivers/iommu/arm-smmu-v3-context.c +++ b/drivers/iommu/arm-smmu-v3-context.c @@ -66,6 +66,9 @@ #define CTXDESC_CD_1_TTB0_MASK GENMASK_ULL(51, 4) +#define CTXDESC_CD_5_PARTID_MASK GENMASK_ULL(47, 32) +#define CTXDESC_CD_5_PMG_MASK GENMASK_ULL(55, 48) + /* Convert between AArch64 (CPU) TCR format and SMMU CD format */ #define ARM_SMMU_TCR2CD(tcr, fld) FIELD_PREP(CTXDESC_CD_0_TCR_##fld, \ FIELD_GET(ARM64_TCR_##fld, tcr)) @@ -563,6 +566,28 @@ static int arm_smmu_set_cd(struct iommu_pasid_table_ops *ops, int pasid, return arm_smmu_write_ctx_desc(tbl, pasid, cd); } +int arm_smmu_set_cd_mpam(struct iommu_pasid_table_ops *ops, + int ssid, int partid, int pmg) +{ + struct arm_smmu_cd_tables *tbl = pasid_ops_to_tables(ops); + u64 val; + __le64 *cdptr = arm_smmu_get_cd_ptr(tbl, ssid); + + if (!cdptr) + return -ENOMEM; + + val = le64_to_cpu(cdptr[5]); + val &= ~CTXDESC_CD_5_PARTID_MASK; + val |= FIELD_PREP(CTXDESC_CD_5_PARTID_MASK, partid); + val &= ~CTXDESC_CD_5_PMG_MASK; + val |= FIELD_PREP(CTXDESC_CD_5_PMG_MASK, pmg); + WRITE_ONCE(cdptr[5], cpu_to_le64(val)); + + iommu_pasid_flush(&tbl->pasid, ssid, true); + + return 0; +} + static void arm_smmu_clear_cd(struct iommu_pasid_table_ops *ops, int pasid, struct iommu_pasid_entry *entry) { diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 8b5083c3e0a16..6634d596f7efc 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -88,6 +88,10 @@ #define IDR1_SSIDSIZE GENMASK(10, 6) #define IDR1_SIDSIZE GENMASK(5, 0) +#define ARM_SMMU_IDR3 0xc +#define IDR3_MPAM (1 << 7) +#define ARM_SMMU_IDR3_CFG 0x140C + #define ARM_SMMU_IDR5 0x14 #define IDR5_STALL_MAX GENMASK(31, 16) #define IDR5_GRAN64K (1 << 6) @@ -186,6 +190,10 @@ #define ARM_SMMU_PRIQ_IRQ_CFG1 0xd8 #define ARM_SMMU_PRIQ_IRQ_CFG2 0xdc +#define ARM_SMMU_MPAMIDR 0x130 +#define MPAMIDR_PMG_MAX GENMASK(23, 16) +#define MPAMIDR_PARTID_MAX GENMASK(15, 0) + /* Common MSI config fields */ #define MSI_CFG0_ADDR_MASK GENMASK_ULL(51, 2) #define MSI_CFG2_SH GENMASK(5, 4) @@ -250,6 +258,7 @@ #define STRTAB_STE_1_S1COR GENMASK_ULL(5, 4) #define STRTAB_STE_1_S1CSH GENMASK_ULL(7, 6) +#define STRTAB_STE_1_S1MPAM (1UL << 26) #define STRTAB_STE_1_S1STALLD (1UL << 27) #define STRTAB_STE_1_EATS GENMASK_ULL(29, 28) @@ -273,6 +282,11 @@ #define STRTAB_STE_3_S2TTB_MASK GENMASK_ULL(51, 4) +#define STRTAB_STE_4_PARTID_MASK GENMASK_ULL(31, 16) + +#define STRTAB_STE_5_MPAM_NS (1UL << 8) +#define STRTAB_STE_5_PMG_MASK GENMASK_ULL(7, 0) + /* Command queue */ #define CMDQ_ENT_SZ_SHIFT 4 #define CMDQ_ENT_DWORDS ((1 << CMDQ_ENT_SZ_SHIFT) >> 3) @@ -634,6 +648,7 @@ struct arm_smmu_device { #define ARM_SMMU_FEAT_SVA (1 << 17) #define ARM_SMMU_FEAT_HA (1 << 18) #define ARM_SMMU_FEAT_HD (1 << 19) +#define ARM_SMMU_FEAT_MPAM (1 << 20) u32 features; #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) @@ -672,6 +687,9 @@ struct arm_smmu_device { struct mutex streams_mutex; struct iopf_queue *iopf_queue; + + unsigned int mpam_partid_max; + unsigned int mpam_pmg_max; }; struct arm_smmu_stream { @@ -3980,6 +3998,25 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) if (smmu->sid_bits <= STRTAB_SPLIT) smmu->features &= ~ARM_SMMU_FEAT_2_LVL_STRTAB; + /* IDR3 */ + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3); + + if (!(reg & IDR3_MPAM)) { + reg |= FIELD_PREP(IDR3_MPAM, 1); + writel(reg, smmu->base + ARM_SMMU_IDR3_CFG); + reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3); + if (!(reg & IDR3_MPAM)) + dev_warn(smmu->dev, "enable smmu mpam failed\n"); + } + + if (reg & IDR3_MPAM) { + reg = readl_relaxed(smmu->base + ARM_SMMU_MPAMIDR); + smmu->mpam_partid_max = FIELD_GET(MPAMIDR_PARTID_MAX, reg); + smmu->mpam_pmg_max = FIELD_GET(MPAMIDR_PMG_MAX, reg); + if (smmu->mpam_partid_max || smmu->mpam_pmg_max) + smmu->features |= ARM_SMMU_FEAT_MPAM; + } + /* IDR5 */ reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5); @@ -4127,6 +4164,120 @@ static unsigned long arm_smmu_resource_size(struct arm_smmu_device *smmu) return SZ_128K; } +static int arm_smmu_set_ste_mpam(struct arm_smmu_device *smmu, + int sid, int partid, int pmg, int s1mpam) +{ + u64 val; + __le64 *ste; + + if (!arm_smmu_sid_in_range(smmu, sid)) + return -ERANGE; + + /* get ste ptr */ + ste = arm_smmu_get_step_for_sid(smmu, sid); + + /* write s1mpam to ste */ + val = le64_to_cpu(ste[1]); + val &= ~STRTAB_STE_1_S1MPAM; + val |= FIELD_PREP(STRTAB_STE_1_S1MPAM, s1mpam); + WRITE_ONCE(ste[1], cpu_to_le64(val)); + + val = le64_to_cpu(ste[4]); + val &= ~STRTAB_STE_4_PARTID_MASK; + val |= FIELD_PREP(STRTAB_STE_4_PARTID_MASK, partid); + WRITE_ONCE(ste[4], cpu_to_le64(val)); + + val = le64_to_cpu(ste[5]); + val &= ~STRTAB_STE_5_PMG_MASK; + val |= FIELD_PREP(STRTAB_STE_5_PMG_MASK, pmg); + WRITE_ONCE(ste[5], cpu_to_le64(val)); + + arm_smmu_sync_ste_for_sid(smmu, sid); + + return 0; +} + +int arm_smmu_set_cd_mpam(struct iommu_pasid_table_ops *ops, + int ssid, int partid, int pmg); + +static int arm_smmu_set_mpam(struct arm_smmu_device *smmu, + int sid, int ssid, int partid, int pmg, int s1mpam) +{ + struct arm_smmu_master_data *master = arm_smmu_find_master(smmu, sid); + struct arm_smmu_s1_cfg *cfg = master ? master->ste.s1_cfg : NULL; + struct arm_smmu_domain *domain = master ? master->domain : NULL; + int ret; + + struct arm_smmu_cmdq_ent prefetch_cmd = { + .opcode = CMDQ_OP_PREFETCH_CFG, + .prefetch = { + .sid = sid, + }, + }; + + if (!(smmu->features & ARM_SMMU_FEAT_MPAM)) + return -ENODEV; + + if (WARN_ON(!domain)) + return -EINVAL; + + if (WARN_ON(!cfg)) + return -EINVAL; + + if (WARN_ON(ssid >= (1 << master->ssid_bits))) + return -E2BIG; + + if (partid > smmu->mpam_partid_max || pmg > smmu->mpam_pmg_max) { + dev_err(smmu->dev, + "mpam rmid out of range: partid[0, %d] pmg[0, %d]\n", + smmu->mpam_partid_max, smmu->mpam_pmg_max); + return -ERANGE; + } + + ret = arm_smmu_set_ste_mpam(smmu, sid, partid, pmg, s1mpam); + if (ret < 0) { + dev_err(smmu->dev, "set ste mpam configuration error %d\n", + ret); + return ret; + } + + /* do not modify cd table which owned by guest */ + if (domain->stage == ARM_SMMU_DOMAIN_NESTED) { + dev_err(smmu->dev, + "mpam: smmu cd is owned by guest, not modified\n"); + return 0; + } + + ret = arm_smmu_set_cd_mpam(cfg->ops, ssid, partid, pmg); + if (s1mpam && ret < 0) { + dev_err(smmu->dev, "set cd mpam configuration error %d\n", + ret); + return ret; + } + + /* It's likely that we'll want to use the new STE soon */ + if (!(smmu->options & ARM_SMMU_OPT_SKIP_PREFETCH)) + arm_smmu_cmdq_issue_cmd(smmu, &prefetch_cmd); + + dev_info(smmu->dev, "partid %d, pmg %d\n", partid, pmg); + + return 0; +} + +/** + * arm_smmu_set_dev_mpam() - Set mpam configuration to SMMU STE/CD + */ +int arm_smmu_set_dev_mpam(struct device *dev, int ssid, int partid, int pmg, + int s1mpam) +{ + struct arm_smmu_master_data *master = dev->iommu_fwspec->iommu_priv; + struct arm_smmu_device *smmu = master->domain->smmu; + int sid = master->streams->id; + + return arm_smmu_set_mpam(smmu, sid, ssid, partid, pmg, s1mpam); +} +EXPORT_SYMBOL(arm_smmu_set_dev_mpam); + static int arm_smmu_device_probe(struct platform_device *pdev) { int irq, ret; diff --git a/include/linux/ascend_smmu.h b/include/linux/ascend_smmu.h new file mode 100644 index 0000000000000..bd0edd25057e1 --- /dev/null +++ b/include/linux/ascend_smmu.h @@ -0,0 +1,9 @@ +#ifndef __LINUX_ASCEND_SMMU_H +#define __LINUX_ASCEND_SMMU_H + +#include <linux/device.h> + +extern int arm_smmu_set_dev_mpam(struct device *dev, int ssid, int partid, + int pmg, int s1mpam); + +#endif /* __LINUX_ASCEND_SMMU_H */ -- 2.25.1

1 8

[PATCH kernel-4.19] efi: Change down_interruptible() in virt_efi_reset_system() to down_trylock()
by Yang Yingliang 22 Oct '21

22 Oct '21

From: Zhang Jianhua <chris.zjh(a)huawei.com> hulk inclusion category: bugfix bugzilla: 182892, https://gitee.com/openeuler/kernel/issues/I4F04R -------- While reboot the system by sysrq, the following bug will be occur. BUG: sleeping function called from invalid context at kernel/locking/semaphore.c:90 in_atomic(): 0, irqs_disabled(): 128, non_block: 0, pid: 10052, name: rc.shutdown CPU: 3 PID: 10052 Comm: rc.shutdown Tainted: G W O 5.10.0 #1 Call trace: dump_backtrace+0x0/0x1c8 show_stack+0x18/0x28 dump_stack+0xd0/0x110 ___might_sleep+0x14c/0x160 __might_sleep+0x74/0x88 down_interruptible+0x40/0x118 virt_efi_reset_system+0x3c/0xd0 efi_reboot+0xd4/0x11c machine_restart+0x60/0x9c emergency_restart+0x1c/0x2c sysrq_handle_reboot+0x1c/0x2c __handle_sysrq+0xd0/0x194 write_sysrq_trigger+0xbc/0xe4 proc_reg_write+0xd4/0xf0 vfs_write+0xa8/0x148 ksys_write+0x6c/0xd8 __arm64_sys_write+0x18/0x28 el0_svc_common.constprop.3+0xe4/0x16c do_el0_svc+0x1c/0x2c el0_svc+0x20/0x30 el0_sync_handler+0x80/0x17c el0_sync+0x158/0x180 The reason for this problem is that irq has been disabled in machine_restart() and then it calls down_interruptible() in virt_efi_reset_system(), which would occur sleep in irq context, it is dangerous! Commit 99409b935c9a("locking/semaphore: Add might_sleep() to down_*() family") add might_sleep() in down_interruptible(), so the bug info is here. down_trylock() can solve this problem, cause there is no might_sleep. Signed-off-by: Zhang Jianhua <chris.zjh(a)huawei.com> Reviewed-by: Chen Lifu <chenlifu(a)huawei.com> Reviewed-by: Jason Yan <yanaijie(a)huawei.com> Reviewed-by: Liao Chang <liaochang1(a)huawei.com> Reviewed-by: He Ying <heying24(a)huawei.com> Signed-off-by: Chen Jun <chenjun102(a)huawei.com> Reviewed-by: Yihang Xu <xuyihang(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/firmware/efi/runtime-wrappers.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/firmware/efi/runtime-wrappers.c b/drivers/firmware/efi/runtime-wrappers.c index 04288719721fc..ecee810f7a6fa 100644 --- a/drivers/firmware/efi/runtime-wrappers.c +++ b/drivers/firmware/efi/runtime-wrappers.c @@ -408,7 +408,7 @@ static void virt_efi_reset_system(int reset_type, unsigned long data_size, efi_char16_t *data) { - if (down_interruptible(&efi_runtime_lock)) { + if (down_trylock(&efi_runtime_lock)) { pr_warn("failed to invoke the reset_system() runtime service:\n" "could not get exclusive access to the firmware\n"); return; -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS] svm: Use vma->vm_pgoff for the nid
by Yang Yingliang 22 Oct '21

22 Oct '21

From: Lijun Fang <fanglijun3(a)huawei.com> ascend inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4DZYE CVE: NA --------------------------- svm_mmap use the pgoff flag for the security requirement nid, which used as cdm node. Signed-off-by: Lijun Fang <fanglijun3(a)huawei.com> Reviewed-by: Weilong Chen <chenweilong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/char/svm.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/char/svm.c b/drivers/char/svm.c index f312b7e02263c..62092fbaa0104 100644 --- a/drivers/char/svm.c +++ b/drivers/char/svm.c @@ -1820,9 +1820,17 @@ static int svm_mmap(struct file *file, struct vm_area_struct *vma) if ((vma->vm_end < vma->vm_start) || (vm_size > MMAP_PHY32_MAX)) return -EINVAL; - page = alloc_pages(GFP_KERNEL | GFP_DMA32, get_order(vm_size)); + /* vma->vm_pgoff transfer the nid */ + if (vma->vm_pgoff == 0) + page = alloc_pages(GFP_KERNEL | GFP_DMA32, + get_order(vm_size)); + else + page = alloc_pages_node((int)vma->vm_pgoff, + GFP_KERNEL | __GFP_THISNODE, + get_order(vm_size)); if (!page) { - dev_err(sdev->dev, "fail to alloc page\n"); + dev_err(sdev->dev, "fail to alloc page on node 0x%lx\n", + vma->vm_pgoff); return -ENOMEM; } -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS] Ascend/hugetlb:support alloc normal and buddy hugepage
by Yang Yingliang 22 Oct '21

22 Oct '21

From: Zhou Guanghui <zhouguanghui1(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4D63I CVE: NA ---------------------------------------------------- The current function hugetlb_alloc_hugepage implements the allocation from static hugepages first. When the static hugepage is used up, it attempts to apply for hugepages from buddy system. Two additional modes are supported: static hugepages only and buddy hugepages only. Signed-off-by: Zhou Guanghui <zhouguanghui1(a)huawei.com> Signed-off-by: Guo Mengqi <guomengqi3(a)huawei.com> Reviewed-by: Weilong Chen <chenweilong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- include/linux/hugetlb.h | 11 +++++++++-- mm/hugetlb.c | 35 +++++++++++++++++++++++++++++++++-- 2 files changed, 42 insertions(+), 4 deletions(-) diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h index 830c41a5ca70e..de6cdfa51694c 100644 --- a/include/linux/hugetlb.h +++ b/include/linux/hugetlb.h @@ -374,8 +374,15 @@ int huge_add_to_page_cache(struct page *page, struct address_space *mapping, pgoff_t idx); #ifdef CONFIG_ASCEND_FEATURES +#define HUGETLB_ALLOC_NONE 0x00 +#define HUGETLB_ALLOC_NORMAL 0x01 /* normal hugepage */ +#define HUGETLB_ALLOC_BUDDY 0x02 /* buddy hugepage */ +#define HUGETLB_ALLOC_MASK (HUGETLB_ALLOC_NONE | \ + HUGETLB_ALLOC_NORMAL | \ + HUGETLB_ALLOC_BUDDY) + const struct hstate *hugetlb_get_hstate(void); -struct page *hugetlb_alloc_hugepage(int nid); +struct page *hugetlb_alloc_hugepage(int nid, int flag); int hugetlb_insert_hugepage_pte(struct mm_struct *mm, unsigned long addr, pgprot_t prot, struct page *hpage); #else @@ -384,7 +391,7 @@ static inline const struct hstate *hugetlb_get_hstate(void) return NULL; } -static inline struct page *hugetlb_alloc_hugepage(int nid) +static inline struct page *hugetlb_alloc_hugepage(int nid, int flag) { return NULL; } diff --git a/mm/hugetlb.c b/mm/hugetlb.c index 3091c61bb63e3..907b1351b0f5f 100644 --- a/mm/hugetlb.c +++ b/mm/hugetlb.c @@ -5233,17 +5233,48 @@ const struct hstate *hugetlb_get_hstate(void) } EXPORT_SYMBOL_GPL(hugetlb_get_hstate); +static struct page *hugetlb_alloc_hugepage_normal(struct hstate *h, + gfp_t gfp_mask, int nid) +{ + struct page *page = NULL; + + spin_lock(&hugetlb_lock); + if (h->free_huge_pages - h->resv_huge_pages > 0) + page = dequeue_huge_page_nodemask(h, gfp_mask, nid, NULL, NULL); + spin_unlock(&hugetlb_lock); + + return page; +} + /* * Allocate hugepage without reserve */ -struct page *hugetlb_alloc_hugepage(int nid) +struct page *hugetlb_alloc_hugepage(int nid, int flag) { + struct hstate *h = &default_hstate; + gfp_t gfp_mask = htlb_alloc_mask(h); + struct page *page = NULL; + VM_WARN_ON(nid < 0 || nid >= MAX_NUMNODES); + if (flag & ~HUGETLB_ALLOC_MASK) + return NULL; + if (nid == NUMA_NO_NODE) nid = numa_mem_id(); - return alloc_huge_page_node(&default_hstate, nid); + gfp_mask |= __GFP_THISNODE; + + if (flag & HUGETLB_ALLOC_NORMAL) + page = hugetlb_alloc_hugepage_normal(h, gfp_mask, nid); + else if (flag & HUGETLB_ALLOC_BUDDY) { + if (enable_charge_mighp) + gfp_mask |= __GFP_ACCOUNT; + page = alloc_migrate_huge_page(h, gfp_mask, nid, NULL); + } else + page = alloc_huge_page_node(h, nid); + + return page; } EXPORT_SYMBOL_GPL(hugetlb_alloc_hugepage); -- 2.25.1

1 0

[PATCH openEuler-1.0-LTS] Ascend/memcg: Use CONFIG_ASCEND_FEATURES for customized interfaces
by Yang Yingliang 22 Oct '21

22 Oct '21

From: Zhou Guanghui <zhouguanghui1(a)huawei.com> ascend inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4D63I CVE: NA ------------------------------------------------------------- The following functions are used only in the ascend scenario: hugetlb_get_hstate, hugetlb_alloc_hugepage, hugetlb_insert_hugepage_pte, hugetlb_insert_hugepage_pte_by_pa Remove unused interface hugetlb_insert_hugepage Signed-off-by: Zhou Guanghui <zhouguanghui1(a)huawei.com> Signed-off-by: Guo Mengqi <guomengqi3(a)huawei.com> Reviewed-by: Weilong Chen <chenweilong(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- include/linux/hugetlb.h | 33 ++++++++++++++++++++++++++------- mm/hugetlb.c | 2 +- 2 files changed, 27 insertions(+), 8 deletions(-) diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h index 6831b24defd64..830c41a5ca70e 100644 --- a/include/linux/hugetlb.h +++ b/include/linux/hugetlb.h @@ -373,11 +373,27 @@ struct page *alloc_huge_page_vma(struct hstate *h, struct vm_area_struct *vma, int huge_add_to_page_cache(struct page *page, struct address_space *mapping, pgoff_t idx); -#ifdef CONFIG_ARM64 +#ifdef CONFIG_ASCEND_FEATURES const struct hstate *hugetlb_get_hstate(void); struct page *hugetlb_alloc_hugepage(int nid); int hugetlb_insert_hugepage_pte(struct mm_struct *mm, unsigned long addr, pgprot_t prot, struct page *hpage); +#else +static inline const struct hstate *hugetlb_get_hstate(void) +{ + return NULL; +} + +static inline struct page *hugetlb_alloc_hugepage(int nid) +{ + return NULL; +} + +static inline int hugetlb_insert_hugepage_pte(struct mm_struct *mm, + unsigned long addr, pgprot_t prot, struct page *hpage) +{ + return -EPERM; +} #endif /* arch callback */ @@ -614,12 +630,6 @@ static inline void set_huge_swap_pte_at(struct mm_struct *mm, unsigned long addr { } -static inline int hugetlb_insert_hugepage_pte_by_pa(struct mm_struct *mm, - unsigned long vir_addr, - pgprot_t prot, unsigned long phy_addr) -{ - return 0; -} #endif /* CONFIG_HUGETLB_PAGE */ static inline spinlock_t *huge_pte_lock(struct hstate *h, @@ -632,4 +642,13 @@ static inline spinlock_t *huge_pte_lock(struct hstate *h, return ptl; } +#ifndef CONFIG_ASCEND_FEATURES +static inline int hugetlb_insert__hugepage_pte_by_pa(struct mm_struct *mm, + unsigned long vir_addr, + pgprot_t prot, unsigned long phy_addr) +{ + return -EPERM; +} +#endif + #endif /* _LINUX_HUGETLB_H */ diff --git a/mm/hugetlb.c b/mm/hugetlb.c index 5132fefb60c86..3091c61bb63e3 100644 --- a/mm/hugetlb.c +++ b/mm/hugetlb.c @@ -5226,7 +5226,7 @@ void move_hugetlb_state(struct page *oldpage, struct page *newpage, int reason) } } -#ifdef CONFIG_ARM64 +#ifdef CONFIG_ASCEND_FEATURES const struct hstate *hugetlb_get_hstate(void) { return &default_hstate; -- 2.25.1

1 0

[PATCH kernel-4.19 1/2] fuse: truncate pagecache on atomic_o_trunc
by Yang Yingliang 22 Oct '21

22 Oct '21

From: Miklos Szeredi <mszeredi(a)redhat.com> mainline inclusion from mainline-5.14 commit 76224355db7570cbe6b6f75c8929a1558828dd55 category: bugfix bugzilla: 181107 CVE: NA --------------------------- fuse_finish_open() will be called with FUSE_NOWRITE in case of atomic O_TRUNC. This can deadlock with fuse_wait_on_page_writeback() in fuse_launder_page() triggered by invalidate_inode_pages2(). Fix by replacing invalidate_inode_pages2() in fuse_finish_open() with a truncate_pagecache() call. This makes sense regardless of FOPEN_KEEP_CACHE or fc->writeback cache, so do it unconditionally. Reported-by: Xie Yongji <xieyongji(a)bytedance.com> Reported-and-tested-by: syzbot+bea44a5189836d956894(a)syzkaller.appspotmail.com Fixes: e4648309b85a ("fuse: truncate pending writes on O_TRUNC") Cc: <stable(a)vger.kernel.org> Signed-off-by: Miklos Szeredi <mszeredi(a)redhat.com> Conflict: fs/fuse/file.c Signed-off-by: Yu Kuai <yukuai3(a)huawei.com> Reviewed-by: Zhang Yi <yi.zhang(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- fs/fuse/file.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/fs/fuse/file.c b/fs/fuse/file.c index 41e2a7b567d7f..5ecabacabd477 100644 --- a/fs/fuse/file.c +++ b/fs/fuse/file.c @@ -178,8 +178,6 @@ void fuse_finish_open(struct inode *inode, struct file *file) if (ff->open_flags & FOPEN_DIRECT_IO) file->f_op = &fuse_direct_io_file_operations; - if (!(ff->open_flags & FOPEN_KEEP_CACHE)) - invalidate_inode_pages2(inode->i_mapping); if (ff->open_flags & FOPEN_STREAM) stream_open(inode, file); else if (ff->open_flags & FOPEN_NONSEEKABLE) @@ -191,10 +189,13 @@ void fuse_finish_open(struct inode *inode, struct file *file) fi->attr_version = ++fc->attr_version; i_size_write(inode, 0); spin_unlock(&fc->lock); + truncate_pagecache(inode, 0); fuse_invalidate_attr(inode); if (fc->writeback_cache) file_update_time(file); - } + } else if (!(ff->open_flags & FOPEN_KEEP_CACHE)) + invalidate_inode_pages2(inode->i_mapping); + if ((file->f_mode & FMODE_WRITE) && fc->writeback_cache) fuse_link_write_file(file); } -- 2.25.1

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22 Oct '21

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[PATCH kernel-4.19 1/4] ext4: check and update i_disksize properly
by Yang Yingliang 22 Oct '21

22 Oct '21

From: Zhang Yi <yi.zhang(a)huawei.com> mainline inclusion from mainline-5.15-rc4 commit 4df031ff5876d94b48dd9ee486ba5522382a06b2 category: perf bugzilla: NA CVE: NA --------------------------- After commit 3da40c7b0898 ("ext4: only call ext4_truncate when size <= isize"), i_disksize could always be updated to i_size in ext4_setattr(), and we could sure that i_disksize <= i_size since holding inode lock and if i_disksize < i_size there are delalloc writes pending in the range upto i_size. If the end of the current write is <= i_size, there's no need to touch i_disksize since writeback will push i_disksize upto i_size eventually. So we can switch to check i_size instead of i_disksize in ext4_da_write_end() when write to the end of the file. we also could remove ext4_mark_inode_dirty() together because we defer inode dirtying to generic_write_end() or ext4_da_write_inline_data_end(). Signed-off-by: Zhang Yi <yi.zhang(a)huawei.com> Reviewed-by: Jan Kara <jack(a)suse.cz> Signed-off-by: Theodore Ts'o <tytso(a)mit.edu> Link: https://lore.kernel.org/r/20210716122024.1105856-2-yi.zhang@huawei.com Conflicts: fs/ext4/inode.c Reviewed-by: Yang Erkun <yangerkun(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- fs/ext4/inode.c | 34 ++++++++++++++++++---------------- 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c index b1bede3c489e7..9bb38c936e020 100644 --- a/fs/ext4/inode.c +++ b/fs/ext4/inode.c @@ -3190,35 +3190,37 @@ static int ext4_da_write_end(struct file *file, end = start + copied - 1; /* - * generic_write_end() will run mark_inode_dirty() if i_size - * changes. So let's piggyback the i_disksize mark_inode_dirty - * into that. + * Since we are holding inode lock, we are sure i_disksize <= + * i_size. We also know that if i_disksize < i_size, there are + * delalloc writes pending in the range upto i_size. If the end of + * the current write is <= i_size, there's no need to touch + * i_disksize since writeback will push i_disksize upto i_size + * eventually. If the end of the current write is > i_size and + * inside an allocated block (ext4_da_should_update_i_disksize() + * check), we need to update i_disksize here as neither + * ext4_writepage() nor certain ext4_writepages() paths not + * allocating blocks update i_disksize. + * + * Note that we defer inode dirtying to generic_write_end() / + * ext4_da_write_inline_data_end(). */ new_i_size = pos + copied; - if (copied && new_i_size > EXT4_I(inode)->i_disksize) { + if (copied && new_i_size > inode->i_size) { if (ext4_has_inline_data(inode) || - ext4_da_should_update_i_disksize(page, end)) { + ext4_da_should_update_i_disksize(page, end)) ext4_update_i_disksize(inode, new_i_size); - /* We need to mark inode dirty even if - * new_i_size is less that inode->i_size - * bu greater than i_disksize.(hint delalloc) - */ - ext4_mark_inode_dirty(handle, inode); - } } if (write_mode != CONVERT_INLINE_DATA && ext4_test_inode_state(inode, EXT4_STATE_MAY_INLINE_DATA) && ext4_has_inline_data(inode)) - ret2 = ext4_da_write_inline_data_end(inode, pos, len, copied, + ret = ext4_da_write_inline_data_end(inode, pos, len, copied, page); else - ret2 = generic_write_end(file, mapping, pos, len, copied, + ret = generic_write_end(file, mapping, pos, len, copied, page, fsdata); - copied = ret2; - if (ret2 < 0) - ret = ret2; + copied = ret; ret2 = ext4_journal_stop(handle); if (!ret) ret = ret2; -- 2.25.1

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[PATCH v3 openEuler-1.0-LTS 0/2] drm/hisilicon: Fix hibmc did not get edid
by Gou Hao 22 Oct '21

22 Oct '21

From: gouhao <gouhao(a)uniontech.com> Fix hibmc did not get edid. issue: https://gitee.com/openeuler/kernel/issues/I469VQ gouhao (2): drm/hisilicon: Support i2c driver algorithms for bit-shift adapters drm/hisilicon: Features to support reading resolutions from EDID drivers/gpu/drm/hisilicon/hibmc/Makefile | 3 +- .../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 25 +++++ .../gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c | 98 +++++++++++++++++++ .../gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 54 ++++++---- 4 files changed, 162 insertions(+), 18 deletions(-) create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c -- 2.20.1

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[PATCH kernel-4.19 openEuler-1.0-LTS] sched/topology: Fix sched_domain_topology_level alloc in sched_init_numa()
by Cheng Jian 21 Oct '21

21 Oct '21

From: Dietmar Eggemann <dietmar.eggemann(a)arm.com> mainline inclusion from mainline-v5.12-rc1 commit 71e5f6644fb2f3304fcb310145ded234a37e7cc1 category: bugfix bugzilla: 182847,https://gitee.com/openeuler/kernel/issues/I4EVBL CVE: NA ---------------------------------------------------------- Commit "sched/topology: Make sched_init_numa() use a set for the deduplicating sort" allocates 'i + nr_levels (level)' instead of 'i + nr_levels + 1' sched_domain_topology_level. This led to an Oops (on Arm64 juno with CONFIG_SCHED_DEBUG): sched_init_domains build_sched_domains() __free_domain_allocs() __sdt_free() { ... for_each_sd_topology(tl) ... sd = *per_cpu_ptr(sdd->sd, j); <-- ... } Signed-off-by: Dietmar Eggemann <dietmar.eggemann(a)arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz(a)infradead.org> Signed-off-by: Ingo Molnar <mingo(a)kernel.org> Tested-by: Vincent Guittot <vincent.guittot(a)linaro.org> Tested-by: Barry Song <song.bao.hua(a)hisilicon.com> Link: https://lkml.kernel.org/r/6000e39e-7d28-c360-9cd6-8798fd22a9bf@arm.com Fixes: 620a6dc40754 ("sched/topology: Make sched_init_numa() use a set for the deduplicating sort") Signed-off-by: Jialin Zhang <zhangjialin11(a)huawei.com> --- kernel/sched/topology.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c index 23f0a69b2ed4..ad5591520c99 100644 --- a/kernel/sched/topology.c +++ b/kernel/sched/topology.c @@ -1548,7 +1548,7 @@ void sched_init_numa(void) /* Compute default topology size */ for (i = 0; sched_domain_topology[i].mask; i++); - tl = kzalloc((i + nr_levels) * + tl = kzalloc((i + nr_levels + 1) * sizeof(struct sched_domain_topology_level), GFP_KERNEL); if (!tl) return; -- 2.25.1

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[PATCH openEuler-5.10 000/118] Backport LTS 5.10.68
by Zheng Zengkai 21 Oct '21

21 Oct '21

Backport LTS 5.10.68 patches from upstream. Adrian Bunk (1): bnx2x: Fix enabling network interfaces without VFs Alex Elder (1): net: ipa: initialize all filter table slots Alexander Egorenkov (1): s390/sclp: fix Secure-IPL facility detection Anand Jain (1): btrfs: fix upper limit for max_inline for page size 64K Andrea Claudi (1): selftest: net: fix typo in altname test Andy Shevchenko (2): PCI: Sync __pci_register_driver() stub for CONFIG_PCI=n mfd: lpc_sch: Partially revert "Add support for Intel Quark X1000" Anshuman Khandual (1): KVM: arm64: Restrict IPA size to maximum 48 bits on 4K and 16K page size Arnaldo Carvalho de Melo (1): perf bench inject-buildid: Handle writen() errors Arnd Bergmann (1): drm/rockchip: cdn-dp-core: Make cdn_dp_core_resume __maybe_unused Aya Levin (1): udp_tunnel: Fix udp_tunnel_nic work-queue type Baptiste Lepers (1): events: Reuse value read using READ_ONCE instead of re-reading it Benjamin Hesmans (1): netfilter: socket: icmp6: fix use-after-scope Christophe JAILLET (4): PCI: tegra: Fix OF node reference leak mtd: rawnand: cafe: Fix a resource leak in the error handling path of 'cafe_nand_probe()' gpio: mpc8xxx: Fix a resources leak in the error handling path of 'mpc8xxx_probe()' gpio: mpc8xxx: Use 'devm_gpiochip_add_data()' to simplify the code and avoid a leak Dan Carpenter (1): PCI: Fix pci_dev_str_match_path() alloc while atomic bug Daniele Palmas (1): net: usb: cdc_mbim: avoid altsetting toggling for Telit LN920 David Heidelberg (1): dt-bindings: arm: Fix Toradex compatible typo David Hildenbrand (1): mm/memory_hotplug: use "unsigned long" for PFN in zone_for_pfn_range() Dinghao Liu (2): PCI: rcar: Fix runtime PM imbalance in rcar_pcie_ep_probe() qlcnic: Remove redundant unlock in qlcnic_pinit_from_rom Edwin Peer (3): bnxt_en: make bnxt_free_skbs() safe to call after bnxt_free_mem() bnxt_en: fix stored FW_PSID version masks bnxt_en: log firmware debug notifications Eli Cohen (1): net/{mlx5|nfp|bnxt}: Remove unnecessary RTNL lock assert Eric Dumazet (3): net-caif: avoid user-triggerable WARN_ON(1) net/af_unix: fix a data-race in unix_dgram_poll fq_codel: reject silly quantum parameters Ernst Sjöstrand (1): drm/amd/amdgpu: Increase HWIP_MAX_INSTANCE to 10 Evan Quan (1): PCI: Add AMD GPU multi-function power dependencies Florian Fainelli (2): r6040: Restore MDIO clock frequency after MAC reset net: dsa: bcm_sf2: Fix array overrun in bcm_sf2_num_active_ports() George Cherian (1): PCI: Add ACS quirks for Cavium multi-function devices Gustavo A. R. Silva (1): netfilter: Fix fall-through warnings for Clang Hans de Goede (1): mfd: axp20x: Update AXP288 volatile ranges Hoang Le (1): tipc: increase timeout in tipc_sk_enqueue() Ilya Leoshkevich (3): s390/bpf: Fix optimizing out zero-extensions s390/bpf: Fix 64-bit subtraction of the -0x80000000 constant s390/bpf: Fix branch shortening during codegen pass Jan Kiszka (1): watchdog: Start watchdog in watchdog_set_last_hw_keepalive only if appropriate Jeff Moyer (1): x86/pat: Pass valid address to sanitize_phys() Juergen Gross (2): xen: reset legacy rtc flag for PV domU PM: base: power: don't try to use non-existing RTC for storing data Keith Busch (1): nvme-tcp: fix io_work priority inversion Kishon Vijay Abraham I (3): PCI: cadence: Use bitfield for *quirk_retrain_flag* instead of bool PCI: j721e: Add PCIe support for J7200 PCI: j721e: Add PCIe support for AM64 Kortan (1): gen_compile_commands: fix missing 'sys' package Li Huafei (1): perf unwind: Do not overwrite FEATURE_CHECK_LDFLAGS-libunwind-{x86,aarch64} Lin, Zhenpeng (1): dccp: don't duplicate ccid when cloning dccp sock Linus Walleij (3): mfd: db8500-prcmu: Adjust map to reality backlight: ktd253: Stabilize backlight net: dsa: tag_rtl4_a: Fix egress tags Lucas Stach (8): drm/etnaviv: return context from etnaviv_iommu_context_get drm/etnaviv: put submit prev MMU context when it exists drm/etnaviv: stop abusing mmu_context as FE running marker drm/etnaviv: keep MMU context across runtime suspend/resume drm/etnaviv: exec and MMU state is lost when resetting the GPU drm/etnaviv: fix MMU context leak on GPU reset drm/etnaviv: reference MMU context when setting up hardware state drm/etnaviv: add missing MMU context put when reaping MMU mapping Maor Gottlieb (1): net/mlx5: Fix potential sleeping in atomic context Marc Zyngier (1): mfd: Don't use irq_create_mapping() to resolve a mapping Mark Brown (1): arm64/sve: Use correct size when reinitialising SVE state Masami Hiramatsu (2): tracing/probes: Reject events which have the same name of existing one tracing/boot: Fix a hist trigger dependency for boot time tracing Matthias Schiffer (1): mfd: tqmx86: Clear GPIO IRQ resource when no IRQ is set Matthieu Baerts (1): selftests: mptcp: clean tmp files in simult_flows Michael Chan (6): bnxt_en: Fix asic.rev in devlink dev info command bnxt_en: Consolidate firmware reset event logging. bnxt_en: Convert to use netif_level() helpers. bnxt_en: Improve logging of error recovery settings information. bnxt_en: Fix possible unintended driver initiated error recovery bnxt_en: Fix error recovery regression Michael Petlan (1): perf machine: Initialize srcline string member in add_location struct Mike Rapoport (1): x86/mm: Fix kern_addr_valid() to cope with existing but not present entries Miklos Szeredi (1): fuse: fix use after free in fuse_read_interrupt() Miquel Raynal (1): dt-bindings: mtd: gpmc: Fix the ECC bytes vs. OOB bytes equation Nadeem Athani (1): PCI: cadence: Add quirk flag to set minimum delay in LTSSM Detect.Quiet state Nicholas Piggin (1): KVM: PPC: Book3S HV: Tolerate treclaim. in fake-suspend mode changing registers Oliver Upton (2): KVM: arm64: Fix read-side race on updates to vcpu reset state KVM: arm64: Handle PSCI resets before userspace touches vCPU state Om Prakash Singh (2): PCI: tegra194: Fix handling BME_CHGED event PCI: tegra194: Fix MSI-X programming Paolo Abeni (1): vhost_net: fix OoB on sendmsg() failure. Paolo Valente (1): block, bfq: honor already-setup queue merges Pavel Skripkin (1): netfilter: nft_ct: protect nft_ct_pcpu_template_refcnt with mutex Rafał Miłecki (3): net: dsa: b53: Fix calculating number of switch ports net: dsa: b53: Set correct number of ports in the DSA struct net: dsa: b53: Fix IMP port setup on BCM5301x Randy Dunlap (3): ptp: dp83640: don't define PAGE0 ARC: export clear_user_page() for modules mfd: lpc_sch: Rename GPIOBASE to prevent build error Rob Herring (2): PCI: of: Don't fail devm_pci_alloc_host_bridge() on missing 'ranges' PCI: iproc: Fix BCMA probe resource handling Robert Foss (1): drm/bridge: lt9611: Fix handling of 4k panels Ryoga Saito (1): Set fc_nlinfo in nh_create_ipv4, nh_create_ipv6 Saeed Mahameed (2): ethtool: Fix rxnfc copy to user buffer overflow net/mlx5: FWTrace, cancel work on alloc pd error flow Shai Malin (1): qed: Handle management FW error Smadar Fuks (1): octeontx2-af: Add additional register check to rvu_poll_reg() Sukadev Bhattiprolu (1): ibmvnic: check failover_pending in login response Tony Luck (1): x86/mce: Avoid infinite loop for copy from user recovery Vishal Aslot (1): PCI: ibmphp: Fix double unmap of io_mem Vladimir Oltean (1): net: dsa: destroy the phylink instance on any error in dsa_slave_phy_setup Wasim Khan (1): PCI: Add ACS quirks for NXP LX2xx0 and LX2xx2 platforms Will Deacon (1): x86/uaccess: Fix 32-bit __get_user_asm_u64() when CC_HAS_ASM_GOTO_OUTPUT=y Willem de Bruijn (1): ip_gre: validate csum_start only on pull Xin Long (1): tipc: fix an use-after-free issue in tipc_recvmsg Xiyu Yang (1): net/l2tp: Fix reference count leak in l2tp_udp_recv_core Yang Li (3): ethtool: Fix an error code in cxgb2.c NTB: Fix an error code in ntb_msit_probe() NTB: perf: Fix an error code in perf_setup_inbuf() Yoshihiro Shimoda (1): net: renesas: sh_eth: Fix freeing wrong tx descriptor Ziyang Xuan (1): net: hso: add failure handler for add_net_device zhenggy (1): tcp: fix tp->undo_retrans accounting in tcp_sacktag_one() .../devicetree/bindings/arm/tegra.yaml | 2 +- .../devicetree/bindings/mtd/gpmc-nand.txt | 2 +- arch/arc/mm/cache.c | 2 +- arch/arm64/kernel/fpsimd.c | 2 +- arch/arm64/kvm/arm.c | 8 ++ arch/arm64/kvm/reset.c | 24 ++++-- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 36 ++++++++- arch/s390/net/bpf_jit_comp.c | 70 ++++++++-------- arch/x86/include/asm/uaccess.h | 4 +- arch/x86/kernel/cpu/mce/core.c | 43 +++++++--- arch/x86/mm/init_64.c | 6 +- arch/x86/mm/pat/memtype.c | 7 +- arch/x86/xen/enlighten_pv.c | 7 ++ block/bfq-iosched.c | 16 +++- drivers/base/power/trace.c | 10 +++ drivers/gpio/gpio-mpc8xxx.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +- drivers/gpu/drm/bridge/lontium-lt9611.c | 8 +- drivers/gpu/drm/etnaviv/etnaviv_buffer.c | 3 +- drivers/gpu/drm/etnaviv/etnaviv_gem.c | 3 +- drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 3 +- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 43 +++++----- drivers/gpu/drm/etnaviv/etnaviv_gpu.h | 1 + drivers/gpu/drm/etnaviv/etnaviv_iommu.c | 4 + drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c | 8 ++ drivers/gpu/drm/etnaviv/etnaviv_mmu.c | 1 + drivers/gpu/drm/etnaviv/etnaviv_mmu.h | 4 +- drivers/gpu/drm/rockchip/cdn-dp-core.c | 4 +- drivers/mfd/ab8500-core.c | 2 +- drivers/mfd/axp20x.c | 3 +- drivers/mfd/db8500-prcmu.c | 14 ++-- drivers/mfd/lpc_sch.c | 36 ++------- drivers/mfd/stmpe.c | 4 +- drivers/mfd/tc3589x.c | 2 +- drivers/mfd/tqmx86.c | 2 + drivers/mfd/wm8994-irq.c | 2 +- drivers/mtd/nand/raw/cafe_nand.c | 4 +- drivers/net/dsa/b53/b53_common.c | 33 ++++++-- drivers/net/dsa/b53/b53_priv.h | 1 + drivers/net/dsa/bcm_sf2.c | 2 +- .../net/ethernet/broadcom/bnx2x/bnx2x_sriov.c | 2 +- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 80 +++++++++++++------ .../net/ethernet/broadcom/bnxt/bnxt_devlink.c | 6 +- drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c | 3 - drivers/net/ethernet/chelsio/cxgb/cxgb2.c | 1 + drivers/net/ethernet/ibm/ibmvnic.c | 8 ++ .../net/ethernet/marvell/octeontx2/af/rvu.c | 12 ++- .../mellanox/mlx5/core/diag/fw_tracer.c | 3 +- .../ethernet/mellanox/mlx5/core/en/rep/tc.c | 3 - .../net/ethernet/mellanox/mlx5/core/fs_core.c | 5 +- .../ethernet/netronome/nfp/flower/offload.c | 3 - drivers/net/ethernet/qlogic/qed/qed_mcp.c | 6 +- .../net/ethernet/qlogic/qlcnic/qlcnic_init.c | 1 - drivers/net/ethernet/rdc/r6040.c | 9 ++- drivers/net/ethernet/renesas/sh_eth.c | 1 + drivers/net/ipa/ipa_table.c | 3 +- drivers/net/phy/dp83640_reg.h | 2 +- drivers/net/usb/cdc_mbim.c | 5 ++ drivers/net/usb/hso.c | 11 ++- drivers/ntb/test/ntb_msi_test.c | 4 +- drivers/ntb/test/ntb_perf.c | 1 + drivers/nvme/host/tcp.c | 20 ++--- drivers/pci/controller/cadence/pci-j721e.c | 61 ++++++++++++-- .../pci/controller/cadence/pcie-cadence-ep.c | 4 + .../controller/cadence/pcie-cadence-host.c | 3 + drivers/pci/controller/cadence/pcie-cadence.c | 16 ++++ drivers/pci/controller/cadence/pcie-cadence.h | 17 +++- drivers/pci/controller/dwc/pcie-tegra194.c | 32 ++++---- drivers/pci/controller/pci-tegra.c | 13 +-- drivers/pci/controller/pcie-iproc-bcma.c | 16 ++-- drivers/pci/controller/pcie-rcar-ep.c | 4 +- drivers/pci/hotplug/TODO | 3 - drivers/pci/hotplug/ibmphp_ebda.c | 5 +- drivers/pci/of.c | 2 +- drivers/pci/pci.c | 2 +- drivers/pci/quirks.c | 58 +++++++++++++- drivers/s390/char/sclp_early.c | 3 +- drivers/vhost/net.c | 11 ++- drivers/video/backlight/ktd253-backlight.c | 75 ++++++++++++----- drivers/watchdog/watchdog_dev.c | 5 +- fs/btrfs/disk-io.c | 45 ++++++----- fs/fuse/dev.c | 4 +- include/linux/memory_hotplug.h | 4 +- include/linux/pci.h | 5 +- include/linux/pci_ids.h | 3 +- include/linux/sched.h | 1 + include/linux/skbuff.h | 2 +- include/uapi/linux/pkt_sched.h | 2 + kernel/events/core.c | 2 +- kernel/trace/trace_boot.c | 15 ++-- kernel/trace/trace_kprobe.c | 6 +- kernel/trace/trace_probe.c | 25 ++++++ kernel/trace/trace_probe.h | 1 + kernel/trace/trace_uprobe.c | 6 +- mm/memory_hotplug.c | 4 +- net/caif/chnl_net.c | 19 +---- net/dccp/minisocks.c | 2 + net/dsa/slave.c | 12 ++- net/dsa/tag_rtl4_a.c | 7 +- net/ethtool/ioctl.c | 2 +- net/ipv4/ip_gre.c | 9 ++- net/ipv4/nexthop.c | 2 + net/ipv4/tcp_input.c | 2 +- net/ipv4/udp_tunnel_nic.c | 2 +- net/ipv6/netfilter/nf_socket_ipv6.c | 4 +- net/l2tp/l2tp_core.c | 4 +- net/netfilter/nf_conntrack_proto_dccp.c | 1 + net/netfilter/nf_tables_api.c | 1 + net/netfilter/nft_ct.c | 10 ++- net/sched/sch_fq_codel.c | 12 ++- net/tipc/socket.c | 10 ++- net/unix/af_unix.c | 2 +- scripts/clang-tools/gen_compile_commands.py | 1 + tools/perf/Makefile.config | 8 +- tools/perf/bench/inject-buildid.c | 52 +++++++----- tools/perf/util/machine.c | 1 + tools/testing/selftests/net/altnames.sh | 2 +- .../selftests/net/mptcp/simult_flows.sh | 4 +- 118 files changed, 853 insertions(+), 393 deletions(-) -- 2.20.1

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[PATCH openEuler-21.03 00/20] openEuler kernel 21.03创新版本
by Wang ShaoBo 21 Oct '21

21 Oct '21

openEuler kernel 21.03创新版本补丁 Alexander Kuznetsov (1): cgroup1: don't allow '\n' in renaming Andy Shevchenko (1): usb: typec: intel_pmc_mux: Put fwnode in error case during ->probe() Anna Schumaker (1): NFS: Fix use-after-free in nfs4_init_client() Desmond Cheong Zhi Xi (1): drm: Fix use-after-free read in drm_getunique() Eric Farman (2): vfio-ccw: Reset FSM state to IDLE inside FSM vfio-ccw: Serialize FSM IDLE state with I/O completion Jeremy Szu (1): ALSA: hda/realtek: fix mute/micmute LEDs for HP EliteBook 840 Aero G8 Jerome Brunet (1): ASoC: meson: gx-card: fix sound-dai dt schema Johannes Berg (1): netlink: disable IRQs for netlink_lock_table() Li Jun (1): usb: typec: tcpm: cancel vdm and state machine hrtimer when unregister tcpm port Linus Walleij (1): drm/mcde: Fix off by 10^3 in calculation Maciej Żenczykowski (1): usb: f_ncm: only first packet of aggregate needs to start timer Saravana Kannan (1): spi: Fix spi device unregister flow Tiezhu Yang (1): MIPS: Fix kernel hang under FUNCTION_GRAPH_TRACER and PREEMPT_TRACER Trond Myklebust (1): NFSv4: Fix second deadlock in nfs4_evict_inode() Vincent Guittot (1): sched/fair: Keep load_avg and load_sum synced Wesley Cheng (1): usb: dwc3: gadget: Disable gadget IRQ during pullup disable Wolfram Sang (1): mmc: renesas_sdhi: abort tuning when timeout detected Zhen Lei (1): tools/bootconfig: Fix error return code in apply_xbc() Zou Wei (1): ASoC: sti-sas: add missing MODULE_DEVICE_TABLE .../bindings/sound/amlogic,gx-sound-card.yaml | 4 ++-- arch/mips/lib/mips-atomic.c | 12 ++++++------ drivers/gpu/drm/drm_ioctl.c | 9 +++++---- drivers/gpu/drm/mcde/mcde_dsi.c | 2 +- drivers/mmc/host/renesas_sdhi_core.c | 7 ++++++- drivers/s390/cio/vfio_ccw_drv.c | 12 ++++++++++-- drivers/s390/cio/vfio_ccw_fsm.c | 1 + drivers/s390/cio/vfio_ccw_ops.c | 2 -- drivers/spi/spi.c | 18 ++++++++++++------ drivers/usb/dwc3/gadget.c | 11 +++++------ drivers/usb/gadget/function/f_ncm.c | 8 ++++---- drivers/usb/typec/mux/intel_pmc_mux.c | 4 +++- drivers/usb/typec/tcpm/tcpm.c | 3 +++ fs/nfs/nfs4client.c | 2 +- fs/nfs/nfs4proc.c | 9 +++++++-- kernel/cgroup/cgroup-v1.c | 4 ++++ kernel/sched/fair.c | 11 +++++------ net/netlink/af_netlink.c | 6 ++++-- sound/pci/hda/patch_realtek.c | 1 + sound/soc/codecs/sti-sas.c | 1 + tools/bootconfig/main.c | 1 + 21 files changed, 82 insertions(+), 46 deletions(-) -- 2.25.1

2 21

[openEuler-5.10 000/303] Backport LTS 5.10.67
by Zheng Zengkai 21 Oct '21

21 Oct '21

Backport LTS 5.10.67 patches from upstream. Ahmad Fatoum (1): clk: imx8m: fix clock tree update of TF-A managed clocks Alexey Kardashevskiy (1): KVM: PPC: Fix clearing never mapped TCEs in realmode Alim Akhtar (1): scsi: ufs: ufs-exynos: Fix static checker warning Alyssa Rosenzweig (3): drm/panfrost: Simplify lock_region calculation drm/panfrost: Use u64 for size in lock_region drm/panfrost: Clamp lock region to Bifrost minimum Amir Goldstein (1): fanotify: limit number of event merge attempts Andreas Obergschwandtner (1): ARM: tegra: tamonten: Fix UART pad setting Andrey Grodzovsky (1): drm/amdgpu: Fix BUG_ON assert Andy Shevchenko (1): ata: sata_dwc_460ex: No need to call phy_exit() befre phy_init() AngeloGioacchino Del Regno (2): arm64: dts: qcom: sdm630: Rewrite memory map arm64: dts: qcom: sdm630: Fix TLMM node and pinctrl configuration Ani Sinha (1): x86/hyperv: fix for unwanted manipulation of sched_clock when TSC marked unstable Anirudh Rayabharam (1): usbip: give back URBs for unsent unlink requests during cleanup Anna Schumaker (1): sunrpc: Fix return value of get_srcport() Anson Jacob (1): drm/amd/amdgpu: Update debugfs link_settings output link_rate field in hex Anthony Iliopoulos (1): dma-debug: fix debugfs initialization order Arnd Bergmann (2): ethtool: improve compat ioctl handling m68knommu: only set CONFIG_ISA_DMA_API for ColdFire sub-arch Arne Welzel (1): dm crypt: Avoid percpu_counter spinlock contention in crypt_page_alloc() Aurabindo Pillai (1): drm/amd/display: Update number of DCN3 clock states Bart Van Assche (1): scsi: ufs: Fix memory corruption by ufshcd_read_desc_param() Bob Peterson (2): gfs2: Fix glock recursion in freeze_go_xmote_bh gfs2: Don't call dlm after protocol is unmounted Boris Brezillon (1): drm/panfrost: Make sure MMU context lifetime is not bound to panfrost_priv Brandon Wyman (1): hwmon: (pmbus/ibm-cffps) Fix write bits for LED control Brijesh Singh (1): crypto: ccp - shutdown SEV firmware on kexec Cezary Rojewski (1): ASoC: Intel: Skylake: Fix module configuration for KPB and MIXER Chao Yu (5): f2fs: fix to do sanity check for sb/cp fields correctly f2fs: quota: fix potential deadlock f2fs: fix to account missing .skipped_gc_rwsem f2fs: fix unexpected ENOENT comes from f2fs_map_blocks() f2fs: fix to unmap pages from userspace process in punch_hole() Chengfeng Ye (1): selftests/bpf: Fix potential unreleased lock Chin-Yen Lee (2): rtw88: use read_poll_timeout instead of fixed sleep rtw88: wow: fix size access error of probe request Chris Chiu (1): rtl8xxxu: Fix the handling of TX A-MPDU aggregation Christoph Hellwig (1): scsi: bsg: Remove support for SCSI_IOCTL_SEND_COMMAND Christophe JAILLET (1): staging: ks7010: Fix the initialization of the 'sleep_status' structure Codrin Ciubotariu (1): clk: at91: clk-generated: Limit the requested rate to our range Colin Ian King (3): ceph: fix dereference of null pointer cf scsi: BusLogic: Use %X for u32 sized integer rather than %lX parport: remove non-zero check on count Damien Le Moal (1): block: bfq: fix bfq_set_next_ioprio_data() Dan Carpenter (3): scsi: smartpqi: Fix an error code in pqi_get_raid_map() scsi: qedi: Fix error codes in qedi_alloc_global_queues() scsi: qedf: Fix error codes in qedf_alloc_global_queues() Darrick J. Wong (1): iomap: pass writeback errors to the mapping David Heidelberg (4): ARM: 9105/1: atags_to_fdt: don't warn about stack size ARM: dts: qcom: apq8064: correct clock names drm/msm: mdp4: drop vblank get/put from prepare/complete_commit drm/msi/mdp4: populate priv->kms in mdp4_kms_init David Howells (1): fscache: Fix cookie key hashing David Laight (1): fs/io_uring Don't use the return value from import_iovec(). Desmond Cheong Zhi Xi (8): btrfs: reset replace target device to allocation state on close drm: avoid blocking in drm_clients_info's rcu section drm: serialize drm_file.master with a new spinlock drm: protect drm_master pointers in drm_lease.c Bluetooth: skip invalid hci_sync_conn_complete_evt drm/vmwgfx: fix potential UAF in vmwgfx_surface.c Bluetooth: schedule SCO timeouts with delayed_work Bluetooth: avoid circular locks in sco_sock_connect Ding Hui (1): cifs: fix wrong release in sess_alloc_buffer() failed path Dinghao Liu (1): media: atomisp: Fix runtime PM imbalance in atomisp_pci_probe Dinh Nguyen (3): clk: socfpga: agilex: fix the parents of the psi_ref_clk clk: socfpga: agilex: fix up s2f_user0_clk representation clk: socfpga: agilex: add the bypass register for s2f_usr0 clock Dmitry Osipenko (2): rtc: tps65910: Correct driver module alias ARM: tegra: acer-a500: Remove bogus USB VBUS regulators Dmitry Torokhov (1): HID: input: do not report stylus battery state as "full" Dom Cobley (1): drm/vc4: hdmi: Set HD_CTL_WHOLSMP and HD_CTL_CHALIGN_SET Eli Cohen (1): net: Fix offloading indirect devices dependency on qdisc order creation Eran Ben Elisha (1): net/mlx5: Fix variable type to match 64bit Evan Wang (1): PCI: aardvark: Fix checking for PIO status Evgeny Novikov (3): USB: EHCI: ehci-mv: improve error handling in mv_ehci_enable() media: platform: stm32: unprepare clocks at handling errors in probe media: tegra-cec: Handle errors of clk_prepare_enable() Ezequiel Garcia (1): media: hantro: vp8: Move noisy WARN_ON to vpu_debug Fabiano Rosas (1): KVM: PPC: Book3S HV: Fix copy_tofrom_guest routines Gautham R. Shenoy (1): cpuidle: pseries: Fixup CEDE0 latency only for POWER10 onwards Geert Uytterhoeven (2): staging: board: Fix uninitialized spinlock when attaching genpd drm/bridge: nwl-dsi: Avoid potential multiplication overflow on 32-bit Georgi Djakov (1): arm64: dts: qcom: sm8250: Fix epss_l3 unit address Greg Kroah-Hartman (1): serial: 8250_pci: make setup_port() parameters explicitly unsigned Gustavo A. R. Silva (2): ipv4: ip_output.c: Fix out-of-bounds warning in ip_copy_addrs() flow_dissector: Fix out-of-bounds warnings Gustaw Lewandowski (1): ASoC: Intel: Skylake: Fix passing loadable flag for module Haimin Zhang (1): fix array-index-out-of-bounds in taprio_change Halil Pasic (1): s390/pv: fix the forcing of the swiotlb Hans Verkuil (1): media: v4l2-dv-timings.c: fix wrong condition in two for-loops Hans de Goede (3): libata: add ATA_HORKAGE_NO_NCQ_TRIM for Samsung 860 and 870 SSDs platform/x86: dell-smbios-wmi: Add missing kfree in error-exit from run_smbios_call ASoC: Intel: bytcr_rt5640: Move "Platform Clock" routes to the maps for the matching in-/output Harshvardhan Jha (1): 9p/xen: Fix end of loop tests for list_for_each_entry Heiko Carstens (1): s390/jump_label: print real address in a case of a jump label bug Hyun Kwon (1): PCI: xilinx-nwl: Enable the clock through CCF Ilan Peer (1): iwlwifi: mvm: Fix scan channel flags settings Iwona Winiarska (2): soc: aspeed: lpc-ctrl: Fix boundary check for mmap soc: aspeed: p2a-ctrl: Fix boundary check for mmap J. Bruce Fields (3): rpc: fix gss_svc_init cleanup on failure lockd: lockd server-side shouldn't set fl_ops nfsd: fix crash on LOCKT on reexported NFSv3 Jack Pham (1): usb: gadget: composite: Allow bMaxPower=0 if self-powered Jaegeuk Kim (2): f2fs: deallocate compressed pages when error happens f2fs: should put a page beyond EOF when preparing a write Jaehyoung Choi (1): pinctrl: samsung: Fix pinctrl bank pin count Jan Hoffmann (1): net: dsa: lantiq_gswip: fix maximum frame length Jason Gunthorpe (1): vfio: Use config not menuconfig for VFIO_NOIOMMU Jens Axboe (1): io-wq: fix wakeup race when adding new work Jernej Skrabec (1): arm64: dts: allwinner: h6: tanix-tx6: Fix regulator node names Jerry (Fangzhi) Zuo (1): drm/amd/display: Update bounding box states (v2) Jianjun Wang (1): PCI: Export pci_pio_to_address() for module use Jim Broadus (1): HID: i2c-hid: Fix Elan touchpad regression Jiri Slaby (2): xtensa: ISS: don't panic in rs_init hvsi: don't panic on tty_register_driver failure Joel Stanley (1): powerpc/config: Renable MTD_PHYSMAP_OF Johan Almbladh (3): bpf/tests: Fix copy-and-paste error in double word test bpf/tests: Do not PASS tests without actually testing the result mac80211: Fix monitor MTU limit so that A-MSDUs get through Johannes Berg (4): iwlwifi: pcie: free RBs during configure iwlwifi: mvm: avoid static queue number aliasing iwlwifi: mvm: fix access to BSS elements iwlwifi: fw: correctly limit to monitor dump Jonathan Cameron (1): iio: dac: ad5624r: Fix incorrect handling of an optional regulator. Josef Bacik (1): btrfs: wake up async_delalloc_pages waiters after submit Joseph Gates (1): wcn36xx: Ensure finish scan is not requested before start scan Juergen Gross (1): xen: fix setting of max_pfn in shared_info Juhee Kang (1): samples: bpf: Fix tracex7 error raised on the missing argument Julian Wiedmann (2): s390/qdio: fix roll-back after timeout on ESTABLISH ccw s390/qdio: cancel the ESTABLISH ccw after timeout Jussi Maki (1): selftests/bpf: Fix xdp_tx.c prog section name Kajol Jain (1): powerpc/perf/hv-gpci: Fix counter value parsing Kees Cook (2): staging: rts5208: Fix get_ms_information() heap buffer size lib/test_stackinit: Fix static initializer test Kelly Devilliv (2): usb: host: fotg210: fix the endpoint's transactional opportunities calculation usb: host: fotg210: fix the actual_length of an iso packet Konrad Dybcio (1): drm/msm/dsi: Fix DSI and DSI PHY regulator config from SDM660 Krzysztof Hałasa (1): media: TDA1997x: fix tda1997x_query_dv_timings() return value Krzysztof Kozlowski (1): power: supply: max17042: handle fails of reading status register Krzysztof Wilczyński (1): PCI: Return ~0 data on pciconfig_read() CAP_SYS_ADMIN failure Kuogee Hsieh (1): drm/msm/dp: return correct edid checksum after corrupted edid checksum read Laurent Dufour (1): powerpc/numa: Consider the max NUMA node for migratable LPAR Laurent Pinchart (1): media: imx258: Rectify mismatch of VTS value Laurentiu Tudor (1): bus: fsl-mc: fix mmio base address for child DPRCs Leon Romanovsky (4): RDMA/iwcm: Release resources if iw_cm module initialization fails docs: Fix infiniband uverbs minor number RDMA/efa: Remove double QP type assignment RDMA/mlx5: Delete not-available udata check Li Jun (1): usb: chipidea: host: fix port index underflow and UBSAN complains Li Zhijian (2): selftests/bpf: Enlarge select() timeout for test_maps mm/hmm: bypass devmap pte when all pfn requested flags are fulfilled Liu Zixian (1): mm/hugetlb: initialize hugetlb_usage in mm_init Loic Poulain (1): wcn36xx: Fix missing frame timestamp for beacon/probe-resp Lu Baolu (1): iommu/vt-d: Update the virtual command related registers Luben Tuikov (1): drm/amdgpu: Fix amdgpu_ras_eeprom_init() Luiz Augusto von Dentz (1): Bluetooth: Fix handling of LE Enhanced Connection Complete Luke Hsiao (1): tcp: enable data-less, empty-cookie SYN with TFO_SERVER_COOKIE_NOT_REQD Maciej W. Rozycki (2): serial: 8250: Define RX trigger levels for OxSemi 950 devices scsi: BusLogic: Fix missing pr_cont() use Maciej Żenczykowski (1): usb: gadget: u_ether: fix a potential null pointer dereference Manish Narani (2): mmc: sdhci-of-arasan: Modified SD default speed to 19MHz for ZynqMP mmc: sdhci-of-arasan: Check return value of non-void funtions Manivannan Sadhasivam (1): soc: qcom: aoss: Fix the out of bound usage of cooling_devs Marc Zyngier (2): pinctrl: stmfx: Fix hazardous u8[] to unsigned long cast of: Don't allow __of_attached_node_sysfs() without CONFIG_SYSFS Marcos Paulo de Souza (1): btrfs: tree-log: check btrfs_lookup_data_extent return value Marek Behún (2): PCI: Restrict ASMedia ASM1062 SATA Max Payload Size Supported pinctrl: armada-37xx: Correct PWM pins definitions Marek Marczykowski-Górecki (1): PCI/MSI: Skip masking MSI-X on Xen PV Marek Vasut (4): net: phy: Fix data type in DP83822 dp8382x_disable_wol() ARM: dts: stm32: Set {bitclock,frame}-master phandles on DHCOM SoM ARM: dts: stm32: Set {bitclock,frame}-master phandles on ST DKx ARM: dts: stm32: Update AV96 adv7513 node per dtbs_check Mark Brown (2): kselftest/arm64: mte: Fix misleading output when skipping tests kselftest/arm64: pac: Fix skipping of tests on systems without PAC Mark Rutland (1): arm64: head: avoid over-mapping in map_memory Martynas Pumputis (2): libbpf: Fix reuse of pinned map on older kernel libbpf: Fix race when pinning maps in parallel Masahiro Yamada (1): kbuild: Fix 'no symbols' warning when CONFIG_TRIM_UNUSD_KSYMS=y Mathias Nyman (1): Revert "USB: xhci: fix U1/U2 handling for hardware with XHCI_INTEL_HOST quirk set" Mauro Carvalho Chehab (2): media: uvc: don't do DMA on stack media: dib8000: rewrite the init prbs logic Miaoqing Pan (1): ath9k: fix sleeping in atomic context Michal Suchanek (1): powerpc/stacktrace: Include linux/delay.h Mike Kravetz (1): hugetlb: fix hugetlb cgroup refcounting during vma split Mike Marciniszyn (1): IB/hfi1: Adjust pkey entry in index 0 Mikulas Patocka (1): parisc: fix crash with signals and alloca Nadav Amit (1): userfaultfd: prevent concurrent API initialization Nadezda Lutovinova (1): usb: musb: musb_dsps: request_irq() after initializing musb Nathan Chancellor (3): cpuidle: pseries: Mark pseries_idle_proble() as __init net: ethernet: stmmac: Do not use unreachable() in ipq806x_gmac_probe() drm/exynos: Always initialize mapping in exynos_drm_register_dma() Nicholas Piggin (1): KVM: PPC: Book3S HV Nested: Reflect guest PMU in-use to L0 when guest SPRs are live Nicolas Ferre (1): ARM: dts: at91: use the right property for shutdown controller Niklas Cassel (2): blk-zoned: allow zone management send operations without CAP_SYS_ADMIN blk-zoned: allow BLKREPORTZONE without CAP_SYS_ADMIN Niklas Schnelle (1): s390: make PCI mio support a machine flag Niklas Söderlund (1): nfp: fix return statement in nfp_net_parse_meta() Nishad Kamdar (1): mmc: core: Return correct emmc response in case of ioctl error Nuno Sá (1): iio: ltc2983: fix device probe Oak Zeng (1): drm/amdgpu: Fix a printing message Oleksij Rempel (1): MIPS: Malta: fix alignment of the devicetree buffer Olga Kornievskaia (1): SUNRPC query transport's source port Oliver Logush (1): drm/amd/display: Fix timer_per_pixel unit error Pali Rohár (2): PCI: aardvark: Configure PCIe resources from 'ranges' DT property PCI: aardvark: Fix masking and unmasking legacy INTx interrupts Patryk Duda (1): platform/chrome: cros_ec_proto: Send command again when timeout occurs Paul Cercueil (1): pinctrl: ingenic: Fix incorrect pull up/down info Pavel Begunkov (5): io_uring: limit fixed table size by RLIMIT_NOFILE io_uring: place fixed tables under memcg limits io_uring: add ->splice_fd_in checks io_uring: fail links of cancelled timeouts io_uring: remove duplicated io_size from rw Peter Geis (1): clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types Pierre-Louis Bossart (2): ASoC: Intel: update sof_pcm512x quirks soundwire: intel: fix potential race condition during power down Ping-Ke Shih (1): rtw88: wow: build wow function only if CONFIG_PM is on Pratik R. Sampat (1): cpufreq: powernv: Fix init_chip_info initialization in numa=off Quanyang Wang (2): drm: xlnx: zynqmp_dpsub: Call pm_runtime_get_sync before setting pixel clock drm: xlnx: zynqmp: release reset to DP controller before accessing DP registers Raag Jadav (1): arm64: dts: ls1046a: fix eeprom entries Rafael J. Wysocki (1): PCI: Use pci_update_current_state() in pci_enable_device_flags() Rajendra Nayak (2): nvmem: qfprom: Fix up qfprom_disable_fuse_blowing() ordering opp: Don't print an error if required-opps is missing Rajkumar Subbiah (1): drm/dp_mst: Fix return code on sideband message failure Randy Dunlap (2): openrisc: don't printk() unconditionally ASoC: atmel: ATMEL drivers don't need HAS_DMA Rik van Riel (1): mm,vmscan: fix divide by zero in get_scan_count Robin Gong (2): Revert "dmaengine: imx-sdma: refine to load context only once" dmaengine: imx-sdma: remove duplicated sdma_load_context Rolf Eike Beer (1): tools/thermal/tmon: Add cross compiling support Roy Chan (2): drm/amd/display: fix missing writeback disablement if plane is removed drm/amd/display: fix incorrect CM/TF programming sequence in dwb Sagi Grimberg (2): nvme-tcp: don't check blk_mq_tag_to_rq when receiving pdu data nvme: code command_id with a genctr for use-after-free validation Sanjay R Mehta (1): thunderbolt: Fix port linking by checking all adapters Sasha Neftin (1): igc: Check if num of q_vectors is smaller than max before array access Saurav Kashyap (2): scsi: qla2xxx: Changes to support kdump kernel scsi: qla2xxx: Sync queue idx with queue_pair_map idx Sean Anderson (1): crypto: mxs-dcp - Use sg_mapping_iter to copy data Sean Keely (1): drm/amdkfd: Account for SH/SE count when setting up cu masks. Sean Young (1): media: rc-loopback: return number of emitters rather than error Sebastian Reichel (1): ARM: dts: imx53-ppd: Fix ACHC entry Shuah Khan (2): selftests: firmware: Fix ignored return val of asprintf() warn usbip:vhci_hcd USB port can get stuck in the disabled state Srikar Dronamraju (1): powerpc/smp: Update cpu_core_map on all PowerPc systems Stefan Assmann (2): iavf: do not override the adapter state in the watchdog task iavf: fix locking of critical sections Steven Rostedt (VMware) (1): selftests/ftrace: Fix requirement check of README file Stuart Hayes (1): PCI/portdrv: Enable Bandwidth Notification only if port supports it Subbaraya Sundeep (1): octeontx2-pf: Fix NIX1_RX interface backpressure Sugar Zhang (1): ASoC: rockchip: i2s: Fix regmap_ops hang Thierry Reding (1): arm64: tegra: Fix compatible string for Tegra132 CPUs Thomas Hebb (1): mmc: rtsx_pci: Fix long reads when clock is prescaled Thomas Zimmermann (1): drm/mgag200: Select clock in PLL update functions Tianjia Zhang (1): Smack: Fix wrong semantics in smk_access_entry() Tony Lindgren (1): serial: 8250_omap: Handle optional overrun-throttle-ms property Trond Myklebust (5): NFSv4/pNFS: Fix a layoutget livelock loop NFSv4/pNFS: Always allow update of a zero valued layout barrier NFSv4/pnfs: The layout barrier indicate a minimal value for the seqid SUNRPC: Fix potential memory corruption SUNRPC/xprtrdma: Fix reconnection locking Tuo Li (2): gpu: drm: amd: amdgpu: amdgpu_i2c: fix possible uninitialized-variable access in amdgpu_i2c_router_select_ddc_port() drm/display: fix possible null-pointer dereference in dcn10_set_clock() Ulrich Hecht (1): serial: sh-sci: fix break handling for sysrq Umang Jain (1): media: imx258: Limit the max analogue gain to 480 Vidya Sagar (1): arm64: tegra: Fix Tegra194 PCIe EP compatible string Vinod Koul (6): arm64: dts: qcom: ipq8074: fix pci node reg property arm64: dts: qcom: sdm660: use reg value for memory node arm64: dts: qcom: ipq6018: drop '0x' from unit address arm64: dts: qcom: sdm630: don't use underscore in node name arm64: dts: qcom: msm8994: don't use underscore in node name arm64: dts: qcom: msm8996: don't use underscore in node name Wang Hai (1): VMCI: fix NULL pointer dereference when unmapping queue pair Wei Li (1): scsi: fdomain: Fix error return code in fdomain_probe() Wenpeng Liang (1): RDMA/hns: Fix QP's resp incomplete assignment Wentao_Liang (1): net/mlx5: DR, fix a potential use-after-free bug Will Deacon (1): arm64: mm: Fix TLBI vs ASID rollover Xiaotan Luo (1): ASoC: rockchip: i2s: Fixup config for DAIFMT_DSP_A/B Xin Long (1): tipc: keep the skb in rcv queue until the whole data is read Yajun Deng (1): netlink: Deal with ESRCH error in nlmsg_notify() Yang Yingliang (2): media: atomisp: pci: fix error return code in atomisp_pci_probe() net: w5100: check return value after calling platform_get_resource() Yangtao Li (1): f2fs: reduce the scope of setting fsck tag when de->name_len is zero Yevgeny Kliteynik (1): net/mlx5: DR, Enable QP retransmission Yonghong Song (1): selftests/bpf: Fix flaky send_signal test Yongqiang Niu (1): soc: mediatek: cmdq: add address shift in jump Yufeng Mo (1): bonding: 3ad: fix the concurrency between __bond_release_one() and bond_3ad_state_machine_handler() Zekun Shen (1): ath9k: fix OOB read ar9300_eeprom_restore_internal Zhang Qilong (1): iwlwifi: mvm: fix a memory leak in iwl_mvm_mac_ctxt_beacon_changed Zhaoyu Liu (1): pinctrl: remove empty lines in pinctrl subsystem Zhen Lei (2): pinctrl: single: Fix error return code in pcs_parse_bits_in_pinctrl_entry() workqueue: Fix possible memory leaks in wq_numa_init() Zheyu Ma (5): video: fbdev: kyro: fix a DoS bug by restricting user input tty: serial: jsm: hold port lock when reporting modem line changes video: fbdev: asiliantfb: Error out if 'pixclock' equals zero video: fbdev: kyro: Error out if 'pixclock' equals zero video: fbdev: riva: Error out if 'pixclock' equals zero Zhouyi Zhou (1): rcu: Fix macro name CONFIG_TASKS_RCU_TRACE chenying (1): ovl: fix BUG_ON() in may_delete() when called from ovl_cleanup() sumiyawang (1): libnvdimm/pmem: Fix crash triggered when I/O in-flight during unbind zhenwei pi (1): crypto: public_key: fix overflow during implicit conversion 王贇 (1): net: fix NULL pointer reference in cipso_v4_doi_free Documentation/admin-guide/devices.txt | 6 +- .../pinctrl/marvell,armada-37xx-pinctrl.txt | 8 +- arch/arm/boot/compressed/Makefile | 2 + arch/arm/boot/dts/at91-kizbox3_common.dtsi | 2 +- arch/arm/boot/dts/at91-sam9x60ek.dts | 2 +- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 2 +- arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts | 2 +- arch/arm/boot/dts/at91-sama5d2_icp.dts | 2 +- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 2 +- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 2 +- arch/arm/boot/dts/imx53-ppd.dts | 23 +- arch/arm/boot/dts/qcom-apq8064.dtsi | 6 +- arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi | 8 +- .../boot/dts/stm32mp15xx-dhcor-avenger96.dtsi | 6 +- arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 8 +- .../boot/dts/tegra20-acer-a500-picasso.dts | 25 +- arch/arm/boot/dts/tegra20-tamonten.dtsi | 14 +- .../dts/allwinner/sun50i-h6-tanix-tx6.dts | 4 +- .../boot/dts/freescale/fsl-ls1046a-frwy.dts | 8 +- .../boot/dts/freescale/fsl-ls1046a-rdb.dts | 7 +- arch/arm64/boot/dts/nvidia/tegra132.dtsi | 4 +- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 6 +- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 2 +- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 16 +- arch/arm64/boot/dts/qcom/msm8994.dtsi | 6 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 257 ++++++++++------- arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- arch/arm64/include/asm/kernel-pgtable.h | 4 +- arch/arm64/include/asm/mmu.h | 29 +- arch/arm64/include/asm/tlbflush.h | 11 +- arch/arm64/kernel/head.S | 11 +- arch/m68k/Kconfig.bus | 2 +- arch/mips/mti-malta/malta-dtshim.c | 2 +- arch/openrisc/kernel/entry.S | 2 + arch/parisc/kernel/signal.c | 6 + arch/powerpc/configs/mpc885_ads_defconfig | 1 + arch/powerpc/include/asm/pmc.h | 7 + arch/powerpc/kernel/smp.c | 11 +- arch/powerpc/kernel/stacktrace.c | 1 + arch/powerpc/kvm/book3s_64_mmu_radix.c | 6 +- arch/powerpc/kvm/book3s_64_vio_hv.c | 9 +- arch/powerpc/kvm/book3s_hv.c | 20 ++ arch/powerpc/mm/numa.c | 13 +- arch/powerpc/perf/hv-gpci.c | 2 +- arch/s390/include/asm/setup.h | 2 + arch/s390/kernel/early.c | 4 + arch/s390/kernel/jump_label.c | 2 +- arch/s390/mm/init.c | 2 +- arch/s390/pci/pci.c | 5 +- arch/x86/kernel/cpu/mshyperv.c | 9 +- arch/x86/xen/p2m.c | 4 +- arch/xtensa/platforms/iss/console.c | 17 +- block/bfq-iosched.c | 2 +- block/blk-zoned.c | 6 - block/bsg.c | 5 +- drivers/ata/libata-core.c | 4 + drivers/ata/sata_dwc_460ex.c | 12 +- drivers/bus/fsl-mc/fsl-mc-bus.c | 24 +- drivers/clk/at91/clk-generated.c | 6 + drivers/clk/imx/clk-composite-8m.c | 3 +- drivers/clk/imx/clk-imx8mm.c | 7 +- drivers/clk/imx/clk-imx8mn.c | 7 +- drivers/clk/imx/clk-imx8mq.c | 7 +- drivers/clk/imx/clk.h | 16 +- drivers/clk/rockchip/clk-pll.c | 2 +- drivers/clk/socfpga/clk-agilex.c | 19 +- drivers/cpufreq/powernv-cpufreq.c | 16 +- drivers/cpuidle/cpuidle-pseries.c | 18 +- drivers/crypto/ccp/sev-dev.c | 49 ++-- drivers/crypto/ccp/sp-pci.c | 12 + drivers/crypto/mxs-dcp.c | 36 +-- drivers/dma/imx-sdma.c | 13 +- drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +- .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 2 +- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 2 +- drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c | 84 ++++-- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h | 1 + .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 16 +- .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 11 +- .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 14 +- .../drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +- .../drm/amd/display/dc/dcn30/dcn30_dwb_cm.c | 90 ++++-- .../drm/amd/display/dc/dcn30/dcn30_hwseq.c | 12 +- .../drm/amd/display/dc/dcn30/dcn30_resource.c | 42 ++- drivers/gpu/drm/bridge/nwl-dsi.c | 2 +- drivers/gpu/drm/drm_auth.c | 42 ++- drivers/gpu/drm/drm_debugfs.c | 3 +- drivers/gpu/drm/drm_dp_mst_topology.c | 10 +- drivers/gpu/drm/drm_file.c | 1 + drivers/gpu/drm/drm_lease.c | 81 ++++-- drivers/gpu/drm/exynos/exynos_drm_dma.c | 2 + drivers/gpu/drm/mgag200/mgag200_drv.h | 16 ++ drivers/gpu/drm/mgag200/mgag200_mode.c | 20 +- drivers/gpu/drm/mgag200/mgag200_reg.h | 9 +- drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 17 +- drivers/gpu/drm/msm/dp/dp_panel.c | 9 +- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 1 - drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 2 +- drivers/gpu/drm/panfrost/panfrost_device.h | 8 +- drivers/gpu/drm/panfrost/panfrost_drv.c | 50 +--- drivers/gpu/drm/panfrost/panfrost_gem.c | 20 +- drivers/gpu/drm/panfrost/panfrost_job.c | 4 +- drivers/gpu/drm/panfrost/panfrost_mmu.c | 191 ++++++++----- drivers/gpu/drm/panfrost/panfrost_mmu.h | 5 +- drivers/gpu/drm/panfrost/panfrost_regs.h | 2 + drivers/gpu/drm/vc4/vc4_hdmi.c | 4 +- drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 4 +- drivers/gpu/drm/xlnx/zynqmp_disp.c | 3 +- drivers/gpu/drm/xlnx/zynqmp_dp.c | 22 +- drivers/hid/hid-input.c | 2 - drivers/hid/i2c-hid/i2c-hid-core.c | 5 +- drivers/hwmon/pmbus/ibm-cffps.c | 6 +- drivers/iio/dac/ad5624r_spi.c | 18 +- drivers/iio/temperature/ltc2983.c | 30 +- drivers/infiniband/core/iwcm.c | 19 +- drivers/infiniband/hw/efa/efa_verbs.c | 1 - drivers/infiniband/hw/hfi1/init.c | 7 +- drivers/infiniband/hw/hns/hns_roce_qp.c | 3 +- drivers/infiniband/hw/mlx5/qp.c | 3 - drivers/iommu/intel/pasid.h | 10 +- drivers/mailbox/mtk-cmdq-mailbox.c | 3 +- drivers/md/dm-crypt.c | 7 +- drivers/media/cec/platform/stm32/stm32-cec.c | 26 +- drivers/media/cec/platform/tegra/tegra_cec.c | 10 +- drivers/media/dvb-frontends/dib8000.c | 58 ++-- drivers/media/i2c/imx258.c | 4 +- drivers/media/i2c/tda1997x.c | 5 +- drivers/media/rc/rc-loopback.c | 2 +- drivers/media/usb/uvc/uvc_v4l2.c | 34 ++- drivers/media/v4l2-core/v4l2-dv-timings.c | 4 +- drivers/misc/vmw_vmci/vmci_queue_pair.c | 6 +- drivers/mmc/core/block.c | 3 +- drivers/mmc/host/rtsx_pci_sdmmc.c | 36 ++- drivers/mmc/host/sdhci-of-arasan.c | 36 ++- drivers/net/bonding/bond_main.c | 3 +- drivers/net/dsa/lantiq_gswip.c | 3 +- drivers/net/ethernet/intel/iavf/iavf_main.c | 58 +++- drivers/net/ethernet/intel/igc/igc_main.c | 9 +- .../marvell/octeontx2/nic/otx2_common.c | 15 + drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 8 +- .../mellanox/mlx5/core/steering/dr_rule.c | 2 +- .../mellanox/mlx5/core/steering/dr_send.c | 1 + .../ethernet/netronome/nfp/nfp_net_common.c | 2 +- .../ethernet/stmicro/stmmac/dwmac-ipq806x.c | 18 +- drivers/net/ethernet/wiznet/w5100.c | 2 + drivers/net/phy/dp83822.c | 8 +- .../net/wireless/ath/ath9k/ar9003_eeprom.c | 3 +- drivers/net/wireless/ath/ath9k/hw.c | 12 +- drivers/net/wireless/ath/wcn36xx/main.c | 5 +- drivers/net/wireless/ath/wcn36xx/txrx.c | 4 + drivers/net/wireless/ath/wcn36xx/wcn36xx.h | 1 + drivers/net/wireless/intel/iwlwifi/fw/dbg.c | 2 +- .../net/wireless/intel/iwlwifi/mvm/mac-ctxt.c | 4 +- .../net/wireless/intel/iwlwifi/mvm/mac80211.c | 8 +- drivers/net/wireless/intel/iwlwifi/mvm/ops.c | 24 +- drivers/net/wireless/intel/iwlwifi/mvm/scan.c | 2 +- drivers/net/wireless/intel/iwlwifi/mvm/sta.c | 30 +- drivers/net/wireless/intel/iwlwifi/pcie/rx.c | 5 +- .../net/wireless/intel/iwlwifi/pcie/trans.c | 3 + .../net/wireless/realtek/rtl8xxxu/rtl8xxxu.h | 2 + .../wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 33 ++- drivers/net/wireless/realtek/rtw88/Makefile | 2 +- drivers/net/wireless/realtek/rtw88/fw.c | 8 +- drivers/net/wireless/realtek/rtw88/fw.h | 1 + drivers/net/wireless/realtek/rtw88/wow.c | 21 +- drivers/nvdimm/pmem.c | 4 +- drivers/nvme/host/core.c | 3 +- drivers/nvme/host/nvme.h | 47 +++- drivers/nvme/host/pci.c | 2 +- drivers/nvme/host/rdma.c | 4 +- drivers/nvme/host/tcp.c | 38 +-- drivers/nvme/target/loop.c | 4 +- drivers/nvmem/qfprom.c | 6 +- drivers/of/kobj.c | 2 +- drivers/opp/of.c | 12 +- drivers/parport/ieee1284_ops.c | 2 +- drivers/pci/controller/pci-aardvark.c | 266 +++++++++++++++++- drivers/pci/controller/pcie-xilinx-nwl.c | 12 + drivers/pci/msi.c | 3 + drivers/pci/pci.c | 7 +- drivers/pci/pcie/portdrv_core.c | 9 +- drivers/pci/quirks.c | 1 + drivers/pci/syscall.c | 4 +- drivers/pinctrl/actions/pinctrl-owl.c | 1 - drivers/pinctrl/core.c | 1 - drivers/pinctrl/freescale/pinctrl-imx1-core.c | 1 - drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 17 +- drivers/pinctrl/pinctrl-at91.c | 1 - drivers/pinctrl/pinctrl-ingenic.c | 6 +- drivers/pinctrl/pinctrl-single.c | 1 + drivers/pinctrl/pinctrl-st.c | 1 - drivers/pinctrl/pinctrl-stmfx.c | 6 +- drivers/pinctrl/pinctrl-sx150x.c | 1 - drivers/pinctrl/qcom/pinctrl-sdm845.c | 1 - drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c | 1 - drivers/pinctrl/renesas/pfc-r8a77950.c | 1 - drivers/pinctrl/renesas/pfc-r8a77951.c | 1 - drivers/pinctrl/renesas/pfc-r8a7796.c | 1 - drivers/pinctrl/renesas/pfc-r8a77965.c | 1 - drivers/pinctrl/samsung/pinctrl-samsung.c | 2 +- drivers/platform/chrome/cros_ec_proto.c | 9 + drivers/platform/x86/dell-smbios-wmi.c | 1 + drivers/power/supply/max17042_battery.c | 6 +- drivers/rtc/rtc-tps65910.c | 2 +- drivers/s390/cio/qdio_main.c | 82 +++--- drivers/scsi/BusLogic.c | 6 +- drivers/scsi/pcmcia/fdomain_cs.c | 4 +- drivers/scsi/qedf/qedf_main.c | 10 +- drivers/scsi/qedi/qedi_main.c | 14 +- drivers/scsi/qla2xxx/qla_nvme.c | 5 +- drivers/scsi/qla2xxx/qla_os.c | 6 + drivers/scsi/smartpqi/smartpqi_init.c | 1 + drivers/scsi/ufs/ufs-exynos.c | 4 +- drivers/scsi/ufs/ufs-exynos.h | 2 +- drivers/scsi/ufs/ufshcd.c | 8 +- drivers/soc/aspeed/aspeed-lpc-ctrl.c | 2 +- drivers/soc/aspeed/aspeed-p2a-ctrl.c | 2 +- drivers/soc/qcom/qcom_aoss.c | 8 +- drivers/soundwire/intel.c | 23 +- drivers/staging/board/board.c | 7 +- drivers/staging/ks7010/ks7010_sdio.c | 2 +- .../staging/media/atomisp/pci/atomisp_v4l2.c | 4 +- .../staging/media/hantro/hantro_g1_vp8_dec.c | 13 +- .../media/hantro/rk3399_vpu_hw_vp8_dec.c | 13 +- drivers/staging/rts5208/rtsx_scsi.c | 10 +- drivers/thunderbolt/switch.c | 2 +- drivers/tty/hvc/hvsi.c | 19 +- drivers/tty/serial/8250/8250_omap.c | 25 +- drivers/tty/serial/8250/8250_pci.c | 2 +- drivers/tty/serial/8250/8250_port.c | 3 +- drivers/tty/serial/jsm/jsm_neo.c | 2 + drivers/tty/serial/jsm/jsm_tty.c | 3 + drivers/tty/serial/sh-sci.c | 7 +- drivers/usb/chipidea/host.c | 14 +- drivers/usb/gadget/composite.c | 8 +- drivers/usb/gadget/function/u_ether.c | 5 +- drivers/usb/host/ehci-mv.c | 23 +- drivers/usb/host/fotg210-hcd.c | 41 ++- drivers/usb/host/fotg210.h | 5 - drivers/usb/host/xhci.c | 24 +- drivers/usb/musb/musb_dsps.c | 13 +- drivers/usb/usbip/vhci_hcd.c | 32 ++- drivers/vfio/Kconfig | 2 +- drivers/video/fbdev/asiliantfb.c | 3 + drivers/video/fbdev/kyro/fbdev.c | 8 + drivers/video/fbdev/riva/fbdev.c | 3 + fs/btrfs/inode.c | 10 +- fs/btrfs/tree-log.c | 4 +- fs/btrfs/volumes.c | 3 + fs/ceph/caps.c | 3 + fs/cifs/sess.c | 2 +- fs/f2fs/compress.c | 12 +- fs/f2fs/data.c | 16 ++ fs/f2fs/dir.c | 14 +- fs/f2fs/file.c | 4 +- fs/f2fs/gc.c | 4 +- fs/f2fs/super.c | 106 ++++--- fs/fscache/cookie.c | 14 +- fs/fscache/internal.h | 2 + fs/fscache/main.c | 39 +++ fs/gfs2/glops.c | 17 +- fs/gfs2/lock_dlm.c | 5 + fs/io-wq.c | 8 +- fs/io_uring.c | 70 +++-- fs/iomap/buffered-io.c | 2 +- fs/lockd/svclock.c | 30 +- fs/nfs/pnfs.c | 16 +- fs/nfsd/nfs4state.c | 5 +- fs/notify/fanotify/fanotify.c | 6 + fs/overlayfs/dir.c | 6 +- fs/userfaultfd.c | 91 +++--- include/crypto/public_key.h | 4 +- include/drm/drm_auth.h | 1 + include/drm/drm_file.h | 18 +- include/linux/ethtool.h | 4 - include/linux/hugetlb.h | 9 + include/linux/hugetlb_cgroup.h | 12 + include/linux/intel-iommu.h | 6 +- include/linux/rcupdate.h | 2 +- include/linux/sunrpc/xprt.h | 1 + include/linux/sunrpc/xprtsock.h | 1 + include/net/flow_offload.h | 1 + include/uapi/linux/serial_reg.h | 1 + kernel/dma/debug.c | 7 +- kernel/fork.c | 1 + kernel/rcu/tree_plugin.h | 8 +- kernel/workqueue.c | 12 +- lib/test_bpf.c | 13 +- lib/test_stackinit.c | 20 +- mm/hmm.c | 5 +- mm/hugetlb.c | 4 +- mm/vmscan.c | 2 +- net/9p/trans_xen.c | 4 +- net/bluetooth/hci_event.c | 108 +++++-- net/bluetooth/sco.c | 74 +++-- net/core/flow_dissector.c | 12 +- net/core/flow_offload.c | 89 +++++- net/ethtool/ioctl.c | 136 +++++++-- net/ipv4/ip_output.c | 5 +- net/ipv4/tcp_fastopen.c | 3 +- net/mac80211/iface.c | 11 +- net/netfilter/nf_flow_table_offload.c | 1 + net/netfilter/nf_tables_offload.c | 1 + net/netlabel/netlabel_cipso_v4.c | 4 +- net/netlink/af_netlink.c | 4 +- net/sched/cls_api.c | 1 + net/sched/sch_taprio.c | 4 +- net/socket.c | 125 +------- net/sunrpc/auth_gss/svcauth_gss.c | 2 +- net/sunrpc/xprt.c | 8 +- net/sunrpc/xprtrdma/transport.c | 11 +- net/sunrpc/xprtsock.c | 7 + net/tipc/socket.c | 36 ++- samples/bpf/test_override_return.sh | 1 + samples/bpf/tracex7_user.c | 5 + scripts/gen_ksymdeps.sh | 8 +- security/smack/smack_access.c | 17 +- sound/soc/atmel/Kconfig | 1 - sound/soc/intel/boards/bytcr_rt5640.c | 9 +- sound/soc/intel/boards/sof_pcm512x.c | 13 +- sound/soc/intel/skylake/skl-messages.c | 11 +- sound/soc/intel/skylake/skl-pcm.c | 25 +- sound/soc/rockchip/rockchip_i2s.c | 35 ++- tools/lib/bpf/libbpf.c | 63 ++++- .../selftests/arm64/mte/mte_common_util.c | 2 +- tools/testing/selftests/arm64/pauth/pac.c | 10 +- .../selftests/bpf/prog_tests/send_signal.c | 16 ++ .../bpf/prog_tests/sockopt_inherit.c | 4 +- tools/testing/selftests/bpf/progs/xdp_tx.c | 2 +- tools/testing/selftests/bpf/test_maps.c | 2 +- tools/testing/selftests/bpf/test_xdp_veth.sh | 2 +- .../testing/selftests/firmware/fw_namespace.c | 3 +- .../testing/selftests/ftrace/test.d/functions | 2 +- tools/thermal/tmon/Makefile | 2 +- 340 files changed, 3158 insertions(+), 1635 deletions(-) -- 2.20.1

1 303

[openEuler-5.10 00/15] bugfix for mm/fs
by Zheng Zengkai 21 Oct '21

21 Oct '21

Backport bugfix patches for mm/fs from upstream. Ard Biesheuvel (1): arm64: mm: account for hotplug memory when randomizing the linear region Dan Carpenter (1): crypto: ccp - fix resource leaks in ccp_run_aes_gcm_cmd() Florian Fainelli (1): ARM: Qualify enabling of swiotlb_init() Guo Xuenan (3): Revert "compiler: remove CONFIG_OPTIMIZE_INLINING entirely" disable OPTIMIZE_INLINING by default make OPTIMIZE_INLINING config editable Johannes Weiner (1): mm: vmscan: fix missing psi annotation for node_reclaim() John Garry (1): blk-mq-sched: Fix blk_mq_sched_alloc_tags() error handling Lu Baolu (1): iommu/vt-d: Fix clearing real DMA device's scalable-mode context entries Piotr Krysiuk (1): bpf, mips: Validate conditional branch offsets Rafael Aquini (1): ipc: replace costly bailout check in sysvipc_find_ipc() Sanjay Kumar (1): iommu/vt-d: Global devTLB flush when present context entry changed Vlastimil Babka (1): mm: slub: fix slub_debug disabling for list of slabs Xu Kuohai (1): bpf: Fix integer overflow in prealloc_elems_and_freelist() yangerkun (1): ext4: flush s_error_work before journal destroy in ext4_fill_super arch/arm/mm/init.c | 6 +- arch/arm64/kvm/sys_regs.h | 5 ++ arch/arm64/mm/init.c | 13 +++-- arch/mips/net/bpf_jit.c | 57 ++++++++++++++----- arch/x86/configs/i386_defconfig | 1 + arch/x86/configs/x86_64_defconfig | 1 + block/blk-mq-sched.c | 19 ++----- drivers/crypto/ccp/ccp-ops.c | 14 +++-- .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 5 ++ .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h | 5 +- drivers/iommu/intel/iommu.c | 34 +++++++---- .../pci/hive_isp_css_include/print_support.h | 4 ++ fs/ext4/super.c | 5 +- include/linux/compiler_types.h | 8 +++ ipc/util.c | 16 ++---- kernel/bpf/stackmap.c | 3 +- kernel/configs/tiny.config | 1 + lib/Kconfig.debug | 13 +++++ mm/slub.c | 13 +++-- mm/vmscan.c | 3 + 20 files changed, 154 insertions(+), 72 deletions(-) -- 2.20.1

1 15

[PATCH openEuler-5.10 00/46] Series of kfence
by Zheng Zengkai 21 Oct '21

21 Oct '21

Backport kfence feature from mainline. Alexander Potapenko (10): mm: add Kernel Electric-Fence infrastructure x86, kfence: enable KFENCE for x86 mm, kfence: insert KFENCE hooks for SLAB mm, kfence: insert KFENCE hooks for SLUB kfence, kasan: make KFENCE compatible with KASAN tracing: add error_report_end trace point kfence: use error_report_end tracepoint kasan: use error_report_end tracepoint kfence: move the size check to the beginning of __kfence_alloc() kfence: skip all GFP_ZONEMASK allocations Christophe Leroy (2): powerpc/32s: Always map kernel text and rodata with BATs powerpc: Enable KFENCE for PPC32 Hyeonggon Yoo (1): mm, slub: change run-time assertion in kmalloc_index() to compile-time Jisheng Zhang (1): arm64: mm: don't use CON and BLK mapping if KFENCE is enabled Kefeng Wang (3): ARM: mm: Provide set_memory_valid() ARM: mm: Provide is_write_fault() ARM: Support KFENCE for ARM Marco Elver (22): arm64, kfence: enable KFENCE for ARM64 kfence: use pt_regs to generate stack trace on faults kfence, Documentation: add KFENCE documentation kfence: add test suite MAINTAINERS: add entry for KFENCE kfence: report sensitive information based on no_hash_pointers kfence: fix printk format for ptrdiff_t kfence, slab: fix cache_alloc_debugcheck_after() for bulk allocations kfence: fix reports if constant function prefixes exist kfence: make compatible with kmemleak kfence, x86: fix preemptible warning on KPTI-enabled systems kfence: zero guard page after out-of-bounds access kfence: await for allocation using wait_event kfence: maximize allocation wait timeout duration kfence: use power-efficient work queue to run delayed work kfence: use TASK_IDLE when awaiting allocation kfence: unconditionally use unbound work queue kfence: fix is_kfence_address() for addresses below KFENCE_POOL_SIZE kfence, x86: only define helpers if !MODULE lib/vsprintf: do not show no_hash_pointers message multiple times kfence: test: fail fast if disabled at boot kfence: show cpu and timestamp in alloc/free info Stephen Boyd (1): slub: force on no_hash_pointers when slub_debug is enabled Sven Schnelle (1): kfence: add function to mask address bits Timur Tabi (3): lib: use KSTM_MODULE_GLOBALS macro in kselftest drivers kselftest: add support for skipped tests lib/vsprintf: no_hash_pointers prints all addresses as unhashed Vlastimil Babka (1): printk: clarify the documentation for plain pointer printing Weizhao Ouyang (1): kfence: defer kfence_test_init to ensure that kunit debugfs is created .../admin-guide/kernel-parameters.txt | 15 + Documentation/core-api/printk-formats.rst | 26 +- Documentation/dev-tools/index.rst | 1 + Documentation/dev-tools/kfence.rst | 306 ++++++ MAINTAINERS | 12 + arch/arm/Kconfig | 1 + arch/arm/include/asm/kfence.h | 53 ++ arch/arm/include/asm/set_memory.h | 5 + arch/arm/mm/fault.c | 16 +- arch/arm/mm/pageattr.c | 41 +- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/kfence.h | 22 + arch/arm64/mm/fault.c | 4 + arch/arm64/mm/mmu.c | 11 +- arch/powerpc/Kconfig | 13 +- arch/powerpc/include/asm/kfence.h | 33 + arch/powerpc/kernel/head_book3s_32.S | 4 +- arch/powerpc/mm/book3s32/mmu.c | 8 +- arch/powerpc/mm/fault.c | 7 +- arch/powerpc/mm/init_32.c | 3 + arch/powerpc/mm/mmu_decl.h | 5 + arch/powerpc/mm/nohash/8xx.c | 4 +- arch/x86/Kconfig | 1 + arch/x86/include/asm/kfence.h | 73 ++ arch/x86/mm/fault.c | 6 + include/linux/kernel.h | 2 + include/linux/kfence.h | 223 +++++ include/linux/slab.h | 17 +- include/linux/slab_def.h | 3 + include/linux/slub_def.h | 3 + include/trace/events/error_report.h | 74 ++ init/main.c | 3 + kernel/trace/Makefile | 1 + kernel/trace/error_report-traces.c | 11 + lib/Kconfig.debug | 1 + lib/Kconfig.kfence | 83 ++ lib/test_bitmap.c | 3 +- lib/test_printf.c | 12 +- lib/vsprintf.c | 46 +- mm/Makefile | 1 + mm/kasan/common.c | 18 + mm/kasan/generic.c | 3 +- mm/kasan/report.c | 8 +- mm/kfence/Makefile | 6 + mm/kfence/core.c | 891 ++++++++++++++++++ mm/kfence/kfence.h | 108 +++ mm/kfence/kfence_test.c | 873 +++++++++++++++++ mm/kfence/report.c | 274 ++++++ mm/kmemleak.c | 3 +- mm/slab.c | 41 +- mm/slab_common.c | 12 +- mm/slub.c | 80 +- tools/testing/selftests/kselftest_module.h | 18 +- 53 files changed, 3405 insertions(+), 84 deletions(-) create mode 100644 Documentation/dev-tools/kfence.rst create mode 100644 arch/arm/include/asm/kfence.h create mode 100644 arch/arm64/include/asm/kfence.h create mode 100644 arch/powerpc/include/asm/kfence.h create mode 100644 arch/x86/include/asm/kfence.h create mode 100644 include/linux/kfence.h create mode 100644 include/trace/events/error_report.h create mode 100644 kernel/trace/error_report-traces.c create mode 100644 lib/Kconfig.kfence create mode 100644 mm/kfence/Makefile create mode 100644 mm/kfence/core.c create mode 100644 mm/kfence/kfence.h create mode 100644 mm/kfence/kfence_test.c create mode 100644 mm/kfence/report.c -- 2.20.1

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[PATCH v3 openEuler-1.0-LTS 2/2] drm/hisilicon: Features to support reading resolutions from EDID
by Gou Hao 21 Oct '21

21 Oct '21

From: Tian Tao <tiantao6(a)hisilicon.com> mainline inclusion from mainline-v5.14.0-rc7 commit a0d078d06e516184e2f575f3803935697b5e3ac6 category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I469VQ CVE: NA Refactoring hibmc_vdac_init, hibmc_connector_init method. --------------------------------------- Use drm_get_edid to get the resolution, if that fails, set it to a fixed resolution. Rewrite the desrtoy callback function to release resources. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> Reviewed-by: Thomas Zimmermann <tzimmermann(a)suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/1600778670-60370-3-git-send-e… Signed-off-by: gouhao <gouhao(a)uniontech.com> --- .../gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 54 +++++++++++++------ 1 file changed, 37 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c index 90319a902..aeef73037 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c @@ -59,11 +59,23 @@ static int hibmc_valid_mode(int w, int h) static int hibmc_connector_get_modes(struct drm_connector *connector) { int count; + void *edid; + struct hibmc_connector *hibmc_connector = to_hibmc_connector(connector); + + edid = drm_get_edid(connector, &hibmc_connector->adapter); + if (edid) { + drm_connector_update_edid_property(connector, edid); + count = drm_add_edid_modes(connector, edid); + if (count) + goto out; + } drm_connector_update_edid_property(connector, NULL); count = drm_add_modes_noedid(connector, 1920, 1200); drm_set_preferred_mode(connector, 1024, 768); +out: + kfree(edid); return count; } @@ -93,39 +105,41 @@ static const struct drm_connector_helper_funcs .best_encoder = hibmc_connector_best_encoder, }; +static void hibmc_connector_destroy(struct drm_connector *connector) +{ + struct hibmc_connector *hibmc_connector = to_hibmc_connector(connector); + + i2c_del_adapter(&hibmc_connector->adapter); + drm_connector_cleanup(connector); +} + static const struct drm_connector_funcs hibmc_connector_funcs = { .fill_modes = drm_helper_probe_single_connector_modes, - .destroy = drm_connector_cleanup, + .destroy = hibmc_connector_destroy, .reset = drm_atomic_helper_connector_reset, .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, }; -static struct drm_connector * +static int hibmc_connector_init(struct hibmc_drm_private *priv) { struct drm_device *dev = priv->dev; - struct drm_connector *connector; + struct drm_connector *connector = &priv->connector.base; int ret; - connector = devm_kzalloc(dev->dev, sizeof(*connector), GFP_KERNEL); - if (!connector) { - DRM_ERROR("failed to alloc memory when init connector\n"); - return ERR_PTR(-ENOMEM); - } - ret = drm_connector_init(dev, connector, &hibmc_connector_funcs, DRM_MODE_CONNECTOR_VGA); if (ret) { DRM_ERROR("failed to init connector: %d\n", ret); - return ERR_PTR(ret); + return ret; } drm_connector_helper_add(connector, &hibmc_connector_helper_funcs); drm_connector_register(connector); - return connector; + return 0; } static void hibmc_encoder_mode_set(struct drm_encoder *encoder, @@ -155,15 +169,21 @@ static const struct drm_encoder_funcs hibmc_encoder_funcs = { int hibmc_vdac_init(struct hibmc_drm_private *priv) { struct drm_device *dev = priv->dev; + struct hibmc_connector *hibmc_connector = &priv->connector; struct drm_encoder *encoder; - struct drm_connector *connector; + struct drm_connector *connector = &hibmc_connector->base; int ret; - connector = hibmc_connector_init(priv); - if (IS_ERR(connector)) { - DRM_ERROR("failed to create connector: %ld\n", - PTR_ERR(connector)); - return PTR_ERR(connector); + ret = hibmc_connector_init(priv); + if (ret) { + DRM_ERROR("failed to init connector: %d\n", ret); + return ret; + } + + ret = hibmc_ddc_create(dev, hibmc_connector); + if (ret) { + DRM_ERROR("failed to create ddc: %d\n", ret); + return ret; } encoder = devm_kzalloc(dev->dev, sizeof(*encoder), GFP_KERNEL); -- 2.20.1

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[PATCH v3 openEuler-1.0-LTS 1/2] drm/hisilicon: Support i2c driver algorithms for bit-shift adapters
by Gou Hao 21 Oct '21

21 Oct '21

From: Tian Tao <tiantao6(a)hisilicon.com> mainline inclusion from mainline-v5.14.0-rc7 commit 4eb4d99dfe3018d86f4529112aa7082f43b6996a category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I469VQ CVE: NA Remove #include <drm/drm_probe_helper.h> in hibmc_drm_i2c.c. ----------------------------- Adding driver implementation to support i2c driver algorithms for bit-shift adapters, so hibmc will using the interface provided by drm to read edid. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> Reviewed-by: Thomas Zimmermann <tzimmermann(a)suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/1600778670-60370-2-git-send-e… Signed-off-by: gouhao <gouhao(a)uniontech.com> --- drivers/gpu/drm/hisilicon/hibmc/Makefile | 3 +- .../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 25 +++++ .../gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c | 98 +++++++++++++++++++ 3 files changed, 125 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c diff --git a/drivers/gpu/drm/hisilicon/hibmc/Makefile b/drivers/gpu/drm/hisilicon/hibmc/Makefile index 3df726696..71c248f4c 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/Makefile +++ b/drivers/gpu/drm/hisilicon/hibmc/Makefile @@ -1,3 +1,4 @@ -hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o hibmc_drm_fbdev.o hibmc_ttm.o +hibmc-drm-y := hibmc_drm_drv.o hibmc_drm_de.o hibmc_drm_vdac.o \ + hibmc_drm_fbdev.o hibmc_ttm.o hibmc_drm_i2c.o obj-$(CONFIG_DRM_HISI_HIBMC) += hibmc-drm.o diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h index 4395dc667..c246151b2 100644 --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h @@ -19,12 +19,18 @@ #ifndef HIBMC_DRM_DRV_H #define HIBMC_DRM_DRV_H +#include <linux/gpio/consumer.h> +#include <linux/i2c-algo-bit.h> +#include <linux/i2c.h> + +#include <drm/drm_edid.h> #include <drm/drmP.h> #include <drm/drm_atomic.h> #include <drm/drm_fb_helper.h> #include <drm/drm_gem.h> #include <drm/ttm/ttm_bo_driver.h> + struct hibmc_framebuffer { struct drm_framebuffer fb; struct drm_gem_object *obj; @@ -36,6 +42,13 @@ struct hibmc_fbdev { int size; }; +struct hibmc_connector { + struct drm_connector base; + + struct i2c_adapter adapter; + struct i2c_algo_bit_data bit_data; +}; + struct hibmc_drm_private { /* hw */ void __iomem *mmio; @@ -46,6 +59,7 @@ struct hibmc_drm_private { /* drm */ struct drm_device *dev; + struct hibmc_connector connector; bool mode_config_initialized; struct drm_atomic_state *suspend_state; @@ -60,6 +74,16 @@ struct hibmc_drm_private { bool mm_inited; }; +static inline struct hibmc_connector *to_hibmc_connector(struct drm_connector *connector) +{ + return container_of(connector, struct hibmc_connector, base); +} + +static inline struct hibmc_drm_private *to_hibmc_drm_private(struct drm_device *dev) +{ + return dev->dev_private; +} + #define to_hibmc_framebuffer(x) container_of(x, struct hibmc_framebuffer, fb) struct hibmc_bo { @@ -110,6 +134,7 @@ int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev, int hibmc_dumb_mmap_offset(struct drm_file *file, struct drm_device *dev, u32 handle, u64 *offset); int hibmc_mmap(struct file *filp, struct vm_area_struct *vma); +int hibmc_ddc_create(struct drm_device *drm_dev, struct hibmc_connector *connector); extern const struct drm_mode_config_funcs hibmc_mode_funcs; diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c new file mode 100644 index 000000000..ffd7c7bf4 --- /dev/null +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* Hisilicon Hibmc SoC drm driver + * + * Based on the bochs drm driver. + * + * Copyright (c) 2016 Huawei Limited. + * + * Author: + * Tian Tao <tiantao6(a)hisilicon.com> + */ + +#include <linux/delay.h> +#include <linux/pci.h> + +#include <drm/drm_atomic_helper.h> + +#include "hibmc_drm_drv.h" + +#define GPIO_DATA 0x0802A0 +#define GPIO_DATA_DIRECTION 0x0802A4 + +#define I2C_SCL_MASK BIT(0) +#define I2C_SDA_MASK BIT(1) + +static void hibmc_set_i2c_signal(void *data, u32 mask, int value) +{ + struct hibmc_connector *hibmc_connector = data; + struct hibmc_drm_private *priv = to_hibmc_drm_private(hibmc_connector->base.dev); + u32 tmp_dir = readl(priv->mmio + GPIO_DATA_DIRECTION); + + if (value) { + tmp_dir &= ~mask; + writel(tmp_dir, priv->mmio + GPIO_DATA_DIRECTION); + } else { + u32 tmp_data = readl(priv->mmio + GPIO_DATA); + + tmp_data &= ~mask; + writel(tmp_data, priv->mmio + GPIO_DATA); + + tmp_dir |= mask; + writel(tmp_dir, priv->mmio + GPIO_DATA_DIRECTION); + } +} + +static int hibmc_get_i2c_signal(void *data, u32 mask) +{ + struct hibmc_connector *hibmc_connector = data; + struct hibmc_drm_private *priv = to_hibmc_drm_private(hibmc_connector->base.dev); + u32 tmp_dir = readl(priv->mmio + GPIO_DATA_DIRECTION); + + if ((tmp_dir & mask) != mask) { + tmp_dir &= ~mask; + writel(tmp_dir, priv->mmio + GPIO_DATA_DIRECTION); + } + + return (readl(priv->mmio + GPIO_DATA) & mask) ? 1 : 0; +} + +static void hibmc_ddc_setsda(void *data, int state) +{ + hibmc_set_i2c_signal(data, I2C_SDA_MASK, state); +} + +static void hibmc_ddc_setscl(void *data, int state) +{ + hibmc_set_i2c_signal(data, I2C_SCL_MASK, state); +} + +static int hibmc_ddc_getsda(void *data) +{ + return hibmc_get_i2c_signal(data, I2C_SDA_MASK); +} + +static int hibmc_ddc_getscl(void *data) +{ + return hibmc_get_i2c_signal(data, I2C_SCL_MASK); +} + +int hibmc_ddc_create(struct drm_device *drm_dev, + struct hibmc_connector *connector) +{ + connector->adapter.owner = THIS_MODULE; + connector->adapter.class = I2C_CLASS_DDC; + snprintf(connector->adapter.name, I2C_NAME_SIZE, "HIS i2c bit bus"); + connector->adapter.dev.parent = &drm_dev->pdev->dev; + i2c_set_adapdata(&connector->adapter, connector); + connector->adapter.algo_data = &connector->bit_data; + + connector->bit_data.udelay = 20; + connector->bit_data.timeout = usecs_to_jiffies(2000); + connector->bit_data.data = connector; + connector->bit_data.setsda = hibmc_ddc_setsda; + connector->bit_data.setscl = hibmc_ddc_setscl; + connector->bit_data.getsda = hibmc_ddc_getsda; + connector->bit_data.getscl = hibmc_ddc_getscl; + + return i2c_bit_add_bus(&connector->adapter); +} -- 2.20.1

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[PATCH v3 openEuler-1.0-LTS 0/2] drm/hisilicon: Fix hibmc did not get edid
by Gou Hao 21 Oct '21

21 Oct '21

From: gouhao <gouhao(a)uniontech.com> Fix hibmc did not get edid. issue: https://gitee.com/openeuler/kernel/issues/I469VQ gouhao (2): drm/hisilicon: Support i2c driver algorithms for bit-shift adapters drm/hisilicon: Features to support reading resolutions from EDID drivers/gpu/drm/hisilicon/hibmc/Makefile | 3 +- .../gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 25 +++++ .../gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c | 98 +++++++++++++++++++ .../gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 54 ++++++---- 4 files changed, 162 insertions(+), 18 deletions(-) create mode 100644 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_i2c.c -- 2.20.1

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[PATCH openEuler-21.03] etmem: corret ept page walk under 4 level page table
by Kemeng Shi 21 Oct '21

21 Oct '21

euleros inclusion category: feature feature: etmem bugzilla: 48246 ------------------------------------------------- Function ept_pgd_range does not work for vm has 4 level page table. Call ept_p4d_range instead to fix this. Signed-off-by: Kemeng Shi <shikemeng(a)huawei.com> --- fs/proc/etmem_scan.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/fs/proc/etmem_scan.c b/fs/proc/etmem_scan.c index cdc8f341af67..b4655c85f8c5 100644 --- a/fs/proc/etmem_scan.c +++ b/fs/proc/etmem_scan.c @@ -557,9 +557,8 @@ static int ept_page_range(struct page_idle_ctrl *pic, ept_root = __va(mmu->root_hpa); - // walk start at p4d when host enable 5 level table pages but - // vm only get 4 level table pages - if (mmu->shadow_root_level == 4 + (!!pgtable_l5_enabled())) + // Walk start at p4d when vm get 4 level table pages + if (mmu->shadow_root_level != 4) err = ept_pgd_range(pic, (pgd_t *)ept_root, addr, end, walk); else err = ept_p4d_range(pic, (p4d_t *)ept_root, addr, end, walk); -- 2.30.0

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Re:[v1,openEuler-1.0-LTS,1/4] tcp: address problems caused by EDT misshaps
by QiuLaibin 21 Oct '21

21 Oct '21

hi zhenyuan: 非常感谢您的提交；但是在您提交的附1补丁集中，我们发现tcp: address problems caused by EDT misshaps中修复的前向补丁Fixes: ab408b6dc744 ("tcp: switch tcp and sch_fq to new earliest departure time model") 在版本中并未合入，请再确认一下。 best regard附1： issue: https://gitee.com/openeuler/kernel/issues/I4AFRJ?from=project-issue jiazhenyuan (4): tcp: address problems caused by EDT misshaps ^^^^^^^ tcp: always set retrans_stamp on recovery tcp: create a helper to model exponential backoff tcp: adjust rto_base in retransmits_timed_out() net/ipv4/tcp_input.c | 16 +++++++---- net/ipv4/tcp_output.c | 9 +++--- net/ipv4/tcp_timer.c | 65 ++++++++++++++++++++----------------------- 3 files changed, 44 insertions(+), 46 deletions(-): *附2：* [v1,openEuler-1.0-LTS,1/4] tcp: address problems caused by EDT misshaps From: Eric Dumazet <edumazet(a)google.com> mainline inclusion from mainline-v5.3.0 commit 9efdda4e3abed13f0903b7b6e4d4c2102019440a category: bugfix bugzilla:https://gitee.com/openeuler/kernel/issues/I4AFRJ?from=project-issue CVE: NA ------------------------------------------------------------ When a qdisc setup including pacing FQ is dismantled and recreated, some TCP packets are sent earlier than instructed by TCP stack. TCP can be fooled when ACK comes back, because the following operation can return a negative value. tcp_time_stamp(tp) - tp->rx_opt.rcv_tsecr; Some paths in TCP stack were not dealing properly with this, this patch addresses four of them. Fixes: ab408b6dc744 ("tcp: switch tcp and sch_fq to new earliest departure time model") ^^^^^^^^^^^^^^^ <= 当前版本未合入该patch Signed-off-by: Eric Dumazet <edumazet(a)google.com> Signed-off-by: David S. Miller <davem(a)davemloft.net> Signed-off-by: Jiazhenyuan <jiazhenyuan(a)uniontech.com> --- net/ipv4/tcp_input.c | 16 ++++++++++------ net/ipv4/tcp_timer.c | 10 ++++++---- 2 files changed, 16 insertions(+), 10 deletions(-)

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[PATCH kernel-4.19] net:fix tcp timeout retransmits are always missing 2 times
by Yang Yingliang 21 Oct '21

21 Oct '21

From: jiazhenyuan <jiazhenyuan(a)uniontech.com> mainline inclusion from mainline-v5.4-rc2 commit 3256a2d6ab1f71f9a1bd2d7f6f18eb8108c48d17 category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4AFRJ?from=project-issue CVE: NA --------------------------------------------------------------- tcp: adjust rto_base in retransmits_timed_out() The cited commit exposed an old retransmits_timed_out() bug which assumed it could call tcp_model_timeout() with TCP_RTO_MIN as rto_base for all states. But flows in SYN_SENT or SYN_RECV state uses a different RTO base (1 sec instead of 200 ms, unless BPF choses another value) This caused a reduction of SYN retransmits from 6 to 4 with the default /proc/sys/net/ipv4/tcp_syn_retries value. Fixes: a41e8a8 ("tcp: better handle TCP_USER_TIMEOUT in SYN_SENT state") Signed-off-by: Eric Dumazet <edumazet(a)google.com> Cc: Yuchung Cheng <ycheng(a)google.com> Cc: Marek Majkowski <marek(a)cloudflare.com> Signed-off-by: David S. Miller <davem(a)davemloft.net> Signed-off-by: jiazhenyuan <jiazhenyuan(a)uniontech.com> # openEuler_contributor Reviewed-by: Wei Yongjun <weiyongjun1(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- net/ipv4/tcp_timer.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/net/ipv4/tcp_timer.c b/net/ipv4/tcp_timer.c index 681882a409686..81a47e87c35d4 100644 --- a/net/ipv4/tcp_timer.c +++ b/net/ipv4/tcp_timer.c @@ -190,7 +190,7 @@ static bool retransmits_timed_out(struct sock *sk, unsigned int boundary, unsigned int timeout) { - const unsigned int rto_base = TCP_RTO_MIN; + unsigned int rto_base = TCP_RTO_MIN; unsigned int linear_backoff_thresh, start_ts; if (!inet_csk(sk)->icsk_retransmits) @@ -201,6 +201,9 @@ static bool retransmits_timed_out(struct sock *sk, return false; if (likely(timeout == 0)) { + if ((1 << sk->sk_state) & (TCPF_SYN_SENT | TCPF_SYN_RECV)) + rto_base = tcp_timeout_init(sk); + linear_backoff_thresh = ilog2(TCP_RTO_MAX/rto_base); if (boundary <= linear_backoff_thresh) -- 2.25.1

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