From: wangzijian970910 <wangzijian22@huawei.com> kunpeng inclusion category: bugfix bugzilla: https://atomgit.com/src-openeuler/kernel/issues/14439 CVE: NA ----------------------------------------------------------------- When writing the CQ head pointer for SDMA, the passed-in val should be written to the register.However, the code currently hardcodes the CQ head pointer to 1.This bug causes the CQ head and tail pointers to never match during driver unloading, resulting in an infinite loop. Fixes: 42aacec658a8 ("drivers:misc:sdma-dae: optimize kernel code") Signed-off-by: wangzijian970910 <wangzijian22@huawei.com> --- drivers/misc/sdma-dae/sdma_hal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/misc/sdma-dae/sdma_hal.h b/drivers/misc/sdma-dae/sdma_hal.h index 437fb755bca3c..8924ad0c5f103 100644 --- a/drivers/misc/sdma-dae/sdma_hal.h +++ b/drivers/misc/sdma-dae/sdma_hal.h @@ -270,7 +270,7 @@ static inline void sdma_channel_set_cq_head(struct hisi_sdma_channel *pchan, u32 u32 reg_val = readl(pchan->io_base + HISI_SDMA_CH_CQHDBR_REG); reg_val &= ~HISI_SDMA_U32_MSK; - reg_val |= FIELD_PREP(HISI_SDMA_U32_MSK, 1); + reg_val |= FIELD_PREP(HISI_SDMA_U32_MSK, val); writel(reg_val, pchan->io_base + HISI_SDMA_CH_CQHDBR_REG); } -- 2.43.0