From: "Rob Herring (Arm)" <robh@kernel.org> mainline inclusion from mainline-v6.13-rc1 commit 0bbff9ed81654d5f06bfca484681756ee407f924 category: feature bugzilla: https://atomgit.com/openeuler/kernel/issues/9066 Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i... ----------------------------------------------- Armv8.9/9.4 PMUv3.9 adds per counter EL0 access controls. Per counter access is enabled with the UEN bit in PMUSERENR_EL1 register. Individual counters are enabled/disabled in the PMUACR_EL1 register. When UEN is set, the CR/ER bits control EL0 write access and must be set to disable write access. With the access controls, the clearing of unused counters can be skipped. KVM also configures PMUSERENR_EL1 in order to trap to EL2. UEN does not need to be set for it since only PMUv3.5 is exposed to guests. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20241002184326.1105499-1-robh@kernel.org Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Yushan Wang <wangyushan12@huawei.com> Conflicts: include/linux/perf/arm_pmuv3.h drivers/perf/arm_pmuv3.c arch/arm/include/asm/arm_pmuv3.h arch/arm64/include/asm/arm_pmuv3.h arch/arm64/tools/sysreg [resolved due to PMUv3.9 support depending on local perf and sysreg backport context] Signed-off-by: Ying Jiang <jiangying44@h-partners.com> --- arch/arm64/tools/sysreg | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 4ed1100ee583..6574d3aedd62 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -1287,6 +1287,7 @@ UnsignedEnum 11:8 PMUVer 0b0110 V3P5 0b0111 V3P7 0b1000 V3P8 + 0b1001 V3P9 0b1111 IMP_DEF EndEnum UnsignedEnum 7:4 TraceVer -- 2.33.0