If this config is enabled, block mapping is not used. The linear address page
table is mapped to 4 KB. As a result, the TLB miss rate is high, affecting
performance.
This additional enhancement can be turned on with rodata=full if this option
is set to 'n'.
Signed-off-by: Chao Liu <liuchao173(a)huawei.com>
---
arch/arm64/configs/openeuler_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/configs/openeuler_defconfig b/arch/arm64/configs/openeuler_defconfig
index b476b105ee10..8ded00ca3364 100644
--- a/arch/arm64/configs/openeuler_defconfig
+++ b/arch/arm64/configs/openeuler_defconfig
@@ -433,7 +433,7 @@ CONFIG_ARM64_CPU_PARK=y
# CONFIG_XEN is not set
CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_UNMAP_KERNEL_AT_EL0=y
-CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
+# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set
CONFIG_ARM64_PMEM_RESERVE=y
CONFIG_ARM64_PMEM_LEGACY=m
# CONFIG_ARM64_SW_TTBR0_PAN is not set
--
2.23.0