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[PATCH OLK-6.6 0/6] CVE-2024-46698
by dinglongwei 18 Nov '24

18 Nov '24

CVE-2024-46698 Alex Deucher (1): video/aperture: optionally match the device in sysfb_disable() Dan Carpenter (1): firmware/sysfb: fix an error code in sysfb_init() Javier Martinez Canillas (1): of/platform: Disable sysfb if a simple-framebuffer node is found Thomas Zimmermann (3): firmware/sysfb: Set firmware-framebuffer parent device firmware/sysfb: Create firmware device only for enabled PCI devices firmware: sysfb: Fix reference count of sysfb parent device drivers/firmware/sysfb.c | 74 ++++++++++++++++++++++++++++--- drivers/firmware/sysfb_simplefb.c | 5 ++- drivers/of/platform.c | 18 +++++++- drivers/video/aperture.c | 11 ++--- include/linux/sysfb.h | 10 +++-- 5 files changed, 96 insertions(+), 22 deletions(-) -- 2.17.1

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[openeuler:OLK-6.6 1474/1474] arch/x86/kernel/zhaoxin_kh40000.c:155:26: sparse: sparse: symbol 'kh40000_dma_direct_ops' was not declared. Should it be static?
by kernel test robot 18 Nov '24

18 Nov '24

tree: https://gitee.com/openeuler/kernel.git OLK-6.6 head: 7c547c6bbe6b6a9cedf63d7cdadb2529404df633 commit: 11557c1ae4529f133483879b7ee00b7d8c653be7 [1474/1474] x86/cpu/zhaoxin: Encapsulate access to kh40000_dma_direct_ops within function config: x86_64-randconfig-123-20241118 (https://download.01.org/0day-ci/archive/20241118/202411180946.SYMUTUAQ-lkp@…) compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241118/202411180946.SYMUTUAQ-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202411180946.SYMUTUAQ-lkp@intel.com/ sparse warnings: (new ones prefixed by >>) arch/x86/kernel/zhaoxin_kh40000.c:33:15: sparse: sparse: symbol 'zhaoxin_patch_code' was not declared. Should it be static? >> arch/x86/kernel/zhaoxin_kh40000.c:155:26: sparse: sparse: symbol 'kh40000_dma_direct_ops' was not declared. Should it be static? arch/x86/kernel/zhaoxin_kh40000.c:325:26: sparse: sparse: symbol 'kh40000_dma_iommu_ops' was not declared. Should it be static? vim +/kh40000_dma_direct_ops +155 arch/x86/kernel/zhaoxin_kh40000.c 4332dbb0718135 leoliu-oc 2024-05-13 154 4332dbb0718135 leoliu-oc 2024-05-13 @155 const struct dma_map_ops kh40000_dma_direct_ops = { 4332dbb0718135 leoliu-oc 2024-05-13 156 .flags = DMA_F_PCI_P2PDMA_SUPPORTED, 4332dbb0718135 leoliu-oc 2024-05-13 157 .alloc = kh40000_dma_direct_alloc, 4332dbb0718135 leoliu-oc 2024-05-13 158 .sync_sg_for_cpu = kh40000_dma_direct_sync_sg_for_cpu, 4332dbb0718135 leoliu-oc 2024-05-13 159 .unmap_page = kh40000_dma_direct_unmap_page, 4332dbb0718135 leoliu-oc 2024-05-13 160 .sync_single_for_cpu = kh40000_dma_direct_sync_single_for_cpu, 4332dbb0718135 leoliu-oc 2024-05-13 161 .unmap_sg = kh40000_dma_direct_unmap_sg, 4332dbb0718135 leoliu-oc 2024-05-13 162 .unmap_resource = kh40000_dma_direct_unmap_resource, 4332dbb0718135 leoliu-oc 2024-05-13 163 .dma_supported = dma_direct_supported, 4332dbb0718135 leoliu-oc 2024-05-13 164 .free = dma_direct_free, 4332dbb0718135 leoliu-oc 2024-05-13 165 .alloc_pages = dma_direct_alloc_pages, 4332dbb0718135 leoliu-oc 2024-05-13 166 .free_pages = dma_direct_free_pages, 4332dbb0718135 leoliu-oc 2024-05-13 167 .sync_single_for_device = dma_direct_sync_single_for_device, 4332dbb0718135 leoliu-oc 2024-05-13 168 .sync_sg_for_device = dma_direct_sync_sg_for_device, 4332dbb0718135 leoliu-oc 2024-05-13 169 .get_required_mask = dma_direct_get_required_mask, 4332dbb0718135 leoliu-oc 2024-05-13 170 .max_mapping_size = dma_direct_max_mapping_size, 4332dbb0718135 leoliu-oc 2024-05-13 171 .mmap = dma_direct_mmap, 4332dbb0718135 leoliu-oc 2024-05-13 172 .get_sgtable = dma_direct_get_sgtable, 4332dbb0718135 leoliu-oc 2024-05-13 173 .map_page = dma_direct_map_page, 4332dbb0718135 leoliu-oc 2024-05-13 174 .map_sg = dma_direct_map_sg, 4332dbb0718135 leoliu-oc 2024-05-13 175 .map_resource = dma_direct_map_resource, 4332dbb0718135 leoliu-oc 2024-05-13 176 }; ef20808db09987 leoliu-oc 2024-03-22 177 :::::: The code at line 155 was first introduced by commit :::::: 4332dbb07181359cccca3ba757ef54e434fb1296 Add kh40000_direct_dma_ops for KH-40000 platform :::::: TO: leoliu-oc <leoliu-oc(a)zhaoxin.com> :::::: CC: leoliu-oc <leoliu-oc(a)zhaoxin.com> -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[openeuler:OLK-6.6 1474/1474] mm/page_alloc.c:4110:9: error: call to undeclared function 'dynamic_pool_should_alloc'; ISO C99 and later do not support implicit function declarations
by kernel test robot 18 Nov '24

18 Nov '24

Hi Liu, FYI, the error/warning still remains. tree: https://gitee.com/openeuler/kernel.git OLK-6.6 head: 7c547c6bbe6b6a9cedf63d7cdadb2529404df633 commit: fd855715f24e3eeadaa56de5fde21c55a14aeea0 [1474/1474] mm/mem_reliable: Fallback to dpool if reliable memory is not enough config: arm64-randconfig-003-20241117 (https://download.01.org/0day-ci/archive/20241118/202411180822.NY0ZU27i-lkp@…) compiler: clang version 15.0.7 (https://github.com/llvm/llvm-project 8dfdcc7b7bf66834a761bd8de445840ef68e4d1a) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241118/202411180822.NY0ZU27i-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202411180822.NY0ZU27i-lkp@intel.com/ All errors (new ones prefixed by >>): >> mm/page_alloc.c:4110:9: error: call to undeclared function 'dynamic_pool_should_alloc'; ISO C99 and later do not support implicit function declarations [-Werror,-Wimplicit-function-declaration] return dynamic_pool_should_alloc(gfp_mask & ~GFP_RELIABLE, order); ^ 1 error generated. vim +/dynamic_pool_should_alloc +4110 mm/page_alloc.c 4101 4102 static inline bool mem_reliable_fallback_dpool(gfp_t gfp_mask, unsigned int order) 4103 { 4104 if (!reliable_allow_fb_enabled()) 4105 return false; 4106 4107 if (!(gfp_mask & GFP_RELIABLE)) 4108 return false; 4109 > 4110 return dynamic_pool_should_alloc(gfp_mask & ~GFP_RELIABLE, order); 4111 } 4112 #else 4113 static inline struct zone *mem_reliable_fallback_zone(gfp_t gfp_mask, 4114 struct alloc_context *ac) 4115 { 4116 return NULL; 4117 } 4118 static inline void mem_reliable_fallback_slowpath(gfp_t gfp_mask, 4119 struct alloc_context *ac) {} 4120 static inline bool mem_reliable_fallback_dpool(gfp_t gfp_mask, unsigned int order) 4121 { 4122 return false; 4123 } 4124 #endif 4125 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[openeuler:OLK-6.6 1474/1474] arch/x86/events/zhaoxin/uncore.c:255:1: sparse: sparse: symbol '__pcpu_scope_zx_package_id' was not declared. Should it be static?
by kernel test robot 18 Nov '24

18 Nov '24

tree: https://gitee.com/openeuler/kernel.git OLK-6.6 head: 7c547c6bbe6b6a9cedf63d7cdadb2529404df633 commit: 5cbf647edcff3d5cda5cb172c6bf0e4c1b6e8ec6 [1474/1474] x86/perf: Add uncore performance events support for Zhaoxin CPU config: x86_64-randconfig-123-20241118 (https://download.01.org/0day-ci/archive/20241118/202411180830.hUwnz6AZ-lkp@…) compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241118/202411180830.hUwnz6AZ-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202411180830.hUwnz6AZ-lkp@intel.com/ sparse warnings: (new ones prefixed by >>) >> arch/x86/events/zhaoxin/uncore.c:255:1: sparse: sparse: symbol '__pcpu_scope_zx_package_id' was not declared. Should it be static? >> arch/x86/events/zhaoxin/uncore.c:256:1: sparse: sparse: symbol '__pcpu_scope_zx_subnode_id' was not declared. Should it be static? >> arch/x86/events/zhaoxin/uncore.c:257:1: sparse: sparse: symbol '__pcpu_scope_zx_cluster_id' was not declared. Should it be static? >> arch/x86/events/zhaoxin/uncore.c:312:1: sparse: sparse: symbol '__pcpu_scope_zx_cluster_core_bits' was not declared. Should it be static? >> arch/x86/events/zhaoxin/uncore.c:313:1: sparse: sparse: symbol '__pcpu_scope_zx_subnode_core_bits' was not declared. Should it be static? arch/x86/events/zhaoxin/uncore.c:1788:28: sparse: sparse: symbol 'uncore_msr_cluster_uncores' was not declared. Should it be static? arch/x86/events/zhaoxin/uncore.c:1793:28: sparse: sparse: symbol 'uncore_msr_subnode_uncores' was not declared. Should it be static? arch/x86/events/zhaoxin/uncore.c:1799:28: sparse: sparse: symbol 'uncore_pci_subnode_uncores' was not declared. Should it be static? arch/x86/events/zhaoxin/uncore.c: note: in included file (through arch/x86/include/asm/cpuid.h, arch/x86/include/asm/processor.h, arch/x86/include/asm/cpu_device_id.h): >> arch/x86/include/asm/paravirt.h:229:9: sparse: sparse: cast truncates bits from constant value (10000000f becomes f) vim +/__pcpu_scope_zx_package_id +255 arch/x86/events/zhaoxin/uncore.c 254 > 255 DEFINE_PER_CPU(int, zx_package_id); > 256 DEFINE_PER_CPU(int, zx_subnode_id); > 257 DEFINE_PER_CPU(int, zx_cluster_id); 258 259 static void get_topology_info(void) 260 { 261 int cpu; 262 int cluster_id; 263 int socket_id; 264 int die_id; 265 int subnode_id; 266 267 int die_info; 268 int subnode_info; 269 int cluster_info; 270 271 u64 config; 272 273 for_each_present_cpu(cpu) { 274 smp_call_function_single(cpu, get_global_status_msr, &config, 1); 275 socket_id = (int)((config >> 3) & 0x1); 276 per_cpu(zx_package_id, cpu) = socket_id; 277 278 /* only yongfeng needs cluster and subnode info */ 279 if (boot_cpu_data.x86_model != ZHAOXIN_FAM7_YONGFENG) 280 continue; 281 282 smp_call_function_single(cpu, get_hdw_config_msr, &config, 1); 283 284 die_info = (int)((config >> 21) & 0x3); 285 die_id = socket_id * dies_per_socket + die_info; 286 287 subnode_info = (int)((config >> 20) & 0x1); 288 subnode_id = die_id * subnodes_per_die + subnode_info; 289 per_cpu(zx_subnode_id, cpu) = subnode_id; 290 291 cluster_info = (int)((config >> 18) & 0x3); 292 cluster_id = subnode_id * clusters_per_subnode + cluster_info; 293 per_cpu(zx_cluster_id, cpu) = cluster_id; 294 } 295 } 296 297 static int zx_topology_cluster_id(int cpu) 298 { 299 return per_cpu(zx_cluster_id, cpu); 300 } 301 302 static int zx_topology_subnode_id(int cpu) 303 { 304 return per_cpu(zx_subnode_id, cpu); 305 } 306 307 static int zx_topology_package_id(int cpu) 308 { 309 return per_cpu(zx_package_id, cpu); 310 } 311 > 312 DEFINE_PER_CPU(cpumask_t, zx_cluster_core_bits); > 313 DEFINE_PER_CPU(cpumask_t, zx_subnode_core_bits); 314 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[openeuler:openEuler-1.0-LTS 1297/1297] sound/core/seq/seq_queue.o: warning: objtool: missing symbol for section .text
by kernel test robot 18 Nov '24

18 Nov '24

Hi Takashi, FYI, the error/warning was bisected to this commit, please ignore it if it's irrelevant. tree: https://gitee.com/openeuler/kernel.git openEuler-1.0-LTS head: 4c37b6449701a1fcb16050d4e517fa6d505673e1 commit: 00976ad5271999ba06d24319fd1031b178aff832 [1297/1297] ALSA: seq: Fix leftovers at probe error path config: x86_64-buildonly-randconfig-004-20241117 (https://download.01.org/0day-ci/archive/20241118/202411180702.Swqtnm4B-lkp@…) compiler: gcc-12 (Debian 12.2.0-14) 12.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241118/202411180702.Swqtnm4B-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202411180702.Swqtnm4B-lkp@intel.com/ All warnings (new ones prefixed by >>): >> sound/core/seq/seq_queue.o: warning: objtool: missing symbol for section .text -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[openeuler:openEuler-1.0-LTS 1297/1297] drivers/gpio/gpio-phytium-pci.c:52:23: sparse: sparse: incompatible types for operation (<):
by kernel test robot 18 Nov '24

18 Nov '24

tree: https://gitee.com/openeuler/kernel.git openEuler-1.0-LTS head: 4c37b6449701a1fcb16050d4e517fa6d505673e1 commit: 00711bad7e372a30c4975ba43811ffa666aff0e1 [1297/1297] gpio: add phytium gpio driver config: x86_64-randconfig-r121-20241117 (https://download.01.org/0day-ci/archive/20241118/202411180247.fYG6VoE2-lkp@…) compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241118/202411180247.fYG6VoE2-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202411180247.fYG6VoE2-lkp@intel.com/ sparse warnings: (new ones prefixed by >>) drivers/gpio/gpio-phytium-pci.c: note: in included file (through include/linux/kernel.h, include/linux/interrupt.h): /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: Expected ) in function call /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: got < /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:43: sparse: sparse: not a function <noident> /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:22: sparse: sparse: bad constant expression type drivers/gpio/gpio-phytium-pci.c: note: in included file (through include/linux/printk.h, include/linux/kernel.h, include/linux/interrupt.h): /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: Expected ) in function call /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: got < /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:43: sparse: sparse: not a function <noident> /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:22: sparse: sparse: bad constant expression type drivers/gpio/gpio-phytium-pci.c: note: in included file (through include/linux/string.h, include/linux/bitmap.h, include/linux/cpumask.h, ...): /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: Expected ) in function call /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: got < /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:43: sparse: sparse: not a function <noident> /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:22: sparse: sparse: bad constant expression type >> drivers/gpio/gpio-phytium-pci.c:52:23: sparse: sparse: incompatible types for operation (<): drivers/gpio/gpio-phytium-pci.c:52:23: sparse: int * drivers/gpio/gpio-phytium-pci.c:52:23: sparse: int vim +52 drivers/gpio/gpio-phytium-pci.c 15 16 static int phytium_gpio_pci_probe(struct pci_dev *pdev, 17 const struct pci_device_id *id) 18 { 19 struct device *dev = &pdev->dev; 20 struct phytium_gpio *gpio; 21 struct gpio_irq_chip *girq; 22 int err; 23 24 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); 25 if (!gpio) 26 return -ENOMEM; 27 28 err = pcim_enable_device(pdev); 29 if (err) { 30 dev_err(dev, "Failed to enable PCI device: err %d\n", err); 31 goto out; 32 } 33 34 err = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev)); 35 if (err) { 36 dev_err(dev, "Failed to iomap PCI device: err %d\n", err); 37 goto out; 38 } 39 40 gpio->regs = pcim_iomap_table(pdev)[0]; 41 if (!gpio->regs) { 42 dev_err(dev, "Cannot map PCI resource\n"); 43 err = -ENOMEM; 44 goto out; 45 } 46 47 err = pci_enable_msi(pdev); 48 if (err < 0) 49 goto out; 50 51 gpio->irq[0] = pdev->irq; > 52 if (gpio->irq < 0) 53 dev_warn(dev, "no irq is found.\n"); 54 55 /* There is only one group of Pins at the moment. */ 56 gpio->ngpio[0] = NGPIO_MAX; 57 58 /* irq_chip support */ 59 gpio->irq_chip.name = dev_name(dev); 60 gpio->irq_chip.irq_ack = phytium_gpio_irq_ack; 61 gpio->irq_chip.irq_mask = phytium_gpio_irq_mask; 62 gpio->irq_chip.irq_unmask = phytium_gpio_irq_unmask; 63 gpio->irq_chip.irq_set_type = phytium_gpio_irq_set_type; 64 gpio->irq_chip.irq_enable = phytium_gpio_irq_enable; 65 gpio->irq_chip.irq_disable = phytium_gpio_irq_disable; 66 67 raw_spin_lock_init(&gpio->lock); 68 69 gpio->gc.base = -1; 70 gpio->gc.get_direction = phytium_gpio_get_direction; 71 gpio->gc.direction_input = phytium_gpio_direction_input; 72 gpio->gc.direction_output = phytium_gpio_direction_output; 73 gpio->gc.get = phytium_gpio_get; 74 gpio->gc.set = phytium_gpio_set; 75 gpio->gc.ngpio = gpio->ngpio[0] + gpio->ngpio[1]; 76 gpio->gc.label = dev_name(dev); 77 gpio->gc.parent = dev; 78 gpio->gc.owner = THIS_MODULE; 79 80 girq = &gpio->gc.irq; 81 girq->handler = handle_bad_irq; 82 girq->default_type = IRQ_TYPE_NONE; 83 84 girq->num_parents = 1; 85 girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents, 86 sizeof(*girq->parents), GFP_KERNEL); 87 if (!girq->parents) 88 return -ENOMEM; 89 girq->parents[0] = gpio->irq[0]; 90 girq->parent_handler = phytium_gpio_irq_handler; 91 92 girq->chip = &gpio->irq_chip; 93 94 err = devm_gpiochip_add_data(dev, &gpio->gc, gpio); 95 if (err) 96 goto out; 97 98 dev_info(dev, "Phytium PCI GPIO controller @%pa registered\n", 99 &gpio->regs); 100 101 pci_set_drvdata(pdev, gpio); 102 103 out: 104 return err; 105 } 106 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[openeuler:OLK-6.6 1474/1474] drivers/char/ipmi/ipmi_bt_sm.c:194:11: error: call to undeclared function 'acpi_evaluate_integer'; ISO C99 and later do not support implicit function declarations
by kernel test robot 18 Nov '24

18 Nov '24

tree: https://gitee.com/openeuler/kernel.git OLK-6.6 head: 7c547c6bbe6b6a9cedf63d7cdadb2529404df633 commit: 6449ff7a5a2b148bc0a60efb3f0d723aaeceaae6 [1474/1474] ipmi: Errata workaround to prevent SMS message processing timeout config: arm64-randconfig-003-20241117 (https://download.01.org/0day-ci/archive/20241118/202411180216.cVGR9zgK-lkp@…) compiler: clang version 15.0.7 (https://github.com/llvm/llvm-project 8dfdcc7b7bf66834a761bd8de445840ef68e4d1a) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241118/202411180216.cVGR9zgK-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202411180216.cVGR9zgK-lkp@intel.com/ All errors (new ones prefixed by >>): >> drivers/char/ipmi/ipmi_bt_sm.c:194:11: error: call to undeclared function 'acpi_evaluate_integer'; ISO C99 and later do not support implicit function declarations [-Werror,-Wimplicit-function-declaration] status = acpi_evaluate_integer(handle, "SATN", NULL, &tmp); ^ drivers/char/ipmi/ipmi_bt_sm.c:194:11: note: did you mean 'acpi_evaluate_object'? include/acpi/acpixf.h:550:8: note: 'acpi_evaluate_object' declared here acpi_evaluate_object(acpi_handle object, ^ include/acpi/platform/aclinux.h:93:21: note: expanded from macro 'ACPI_EXTERNAL_RETURN_STATUS' static ACPI_INLINE prototype {return(AE_NOT_CONFIGURED);} ^ 1 error generated. vim +/acpi_evaluate_integer +194 drivers/char/ipmi/ipmi_bt_sm.c 177 178 #ifdef CONFIG_HISILICON_ERRATUM_162102203 179 /* 180 * To confirm whether the SMS_ATN flag needs to be stored and get 181 * quirk through the method reported by the BIOS. Because in special 182 * cases SMS_ATN flag bits may be lost before being processed. 183 */ 184 static bool get_sms_atn_quirk(struct si_sm_io *io) 185 { 186 acpi_handle handle; 187 acpi_status status; 188 unsigned long long tmp; 189 190 handle = ACPI_HANDLE(io->dev); 191 if (!handle) 192 return false; 193 > 194 status = acpi_evaluate_integer(handle, "SATN", NULL, &tmp); 195 if (ACPI_FAILURE(status)) 196 return false; 197 else if (tmp != 1) 198 return false; 199 200 return true; 201 } 202 #endif 203 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[openeuler:openEuler-1.0-LTS 1297/1297] mm/debug.c:174:3: warning: format specifies type 'void *' but the argument has type 'int'
by kernel test robot 18 Nov '24

18 Nov '24

Hi Ding, FYI, the error/warning still remains. tree: https://gitee.com/openeuler/kernel.git openEuler-1.0-LTS head: 4c37b6449701a1fcb16050d4e517fa6d505673e1 commit: 2d2fe6b40444bd8f84f674930ac5f98a6314702e [1297/1297] ascend: mm: add an owner for mm_struct config: x86_64-randconfig-r121-20241117 (https://download.01.org/0day-ci/archive/20241118/202411180058.QxW4RRZo-lkp@…) compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241118/202411180058.QxW4RRZo-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202411180058.QxW4RRZo-lkp@intel.com/ All warnings (new ones prefixed by >>): mm/debug.c: note: in included file (through include/linux/kernel.h): /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: Expected ) in function call /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: got < /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:43: sparse: sparse: not a function <noident> /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:22: sparse: sparse: bad constant expression type mm/debug.c: note: in included file (through include/linux/printk.h, include/linux/kernel.h): /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: Expected ) in function call /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: got < /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:43: sparse: sparse: not a function <noident> /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:22: sparse: sparse: bad constant expression type mm/debug.c: note: in included file (through include/linux/string.h, include/linux/bitmap.h, include/linux/cpumask.h, ...): /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: Expected ) in function call /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:44: sparse: sparse: got < /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:43: sparse: sparse: not a function <noident> /opt/cross/clang-ab51eccf88/lib/clang/19/include/stdarg.h:22:22: sparse: sparse: bad constant expression type In file included from mm/debug.c:14: In file included from include/linux/migrate.h:6: In file included from include/linux/mempolicy.h:16: include/linux/pagemap.h:425:21: warning: cast from 'int (*)(struct file *, struct page *)' to 'filler_t *' (aka 'int (*)(void *, struct page *)') converts to incompatible function type [-Wcast-function-type-strict] 425 | filler_t *filler = (filler_t *)mapping->a_ops->readpage; | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> mm/debug.c:174:3: warning: format specifies type 'void *' but the argument has type 'int' [-Wformat] 137 | atomic_read(&mm->tlb_flush_pending), | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/linux/printk.h:342:35: note: expanded from macro 'pr_emerg' 342 | printk(KERN_EMERG pr_fmt(fmt), ##__VA_ARGS__) | ~~~ ^~~~~~~~~~~ >> mm/debug.c:175:3: warning: format specifies type 'int' but the argument has type 'unsigned long' [-Wformat] 142 | mm->def_flags, &mm->def_flags | ^~~~~~~~~~~~~ include/linux/printk.h:342:35: note: expanded from macro 'pr_emerg' 342 | printk(KERN_EMERG pr_fmt(fmt), ##__VA_ARGS__) | ~~~ ^~~~~~~~~~~ >> mm/debug.c:175:18: warning: format specifies type 'unsigned long' but the argument has type 'const unsigned long *' [-Wformat] 143 | mm->def_flags, &mm->def_flags | ^~~~~~~~~~~~~~ include/linux/printk.h:342:35: note: expanded from macro 'pr_emerg' 342 | printk(KERN_EMERG pr_fmt(fmt), ##__VA_ARGS__) | ~~~ ^~~~~~~~~~~ >> mm/debug.c:143:21: warning: more '%' conversions than data arguments [-Wformat-insufficient-args] 143 | "def_flags: %#lx(%pGv)\n", | ~^ include/linux/printk.h:342:27: note: expanded from macro 'pr_emerg' 342 | printk(KERN_EMERG pr_fmt(fmt), ##__VA_ARGS__) | ^~~ include/linux/printk.h:332:21: note: expanded from macro 'pr_fmt' 332 | #define pr_fmt(fmt) fmt | ^~~ 5 warnings generated. vim +174 mm/debug.c 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 @14 #include <linux/migrate.h> 4e462112e98f9ad Vlastimil Babka 2016-03-15 15 #include <linux/page_owner.h> 82742a3a5152195 Sasha Levin 2014-10-09 16 edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 17 #include "internal.h" edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 18 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 19 char *migrate_reason_names[MR_TYPES] = { 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 20 "compaction", 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 21 "memory_failure", 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 22 "memory_hotplug", 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 23 "syscall_or_cpuset", 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 24 "mempolicy_mbind", 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 25 "numa_misplaced", 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 26 "cma", 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 27 }; 7cd12b4abfd2f8f Vlastimil Babka 2016-03-15 28 edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 29 const struct trace_print_flags pageflag_names[] = { edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 30 __def_pageflag_names, edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 31 {0, NULL} edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 32 }; edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 33 edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 34 const struct trace_print_flags gfpflag_names[] = { edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 35 __def_gfpflag_names, edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 36 {0, NULL} 420adbe9fc1a451 Vlastimil Babka 2016-03-15 37 }; 420adbe9fc1a451 Vlastimil Babka 2016-03-15 38 edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 39 const struct trace_print_flags vmaflag_names[] = { edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 40 __def_vmaflag_names, edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 41 {0, NULL} 82742a3a5152195 Sasha Levin 2014-10-09 42 }; 82742a3a5152195 Sasha Levin 2014-10-09 43 ff8e81163889ac4 Vlastimil Babka 2016-03-15 44 void __dump_page(struct page *page, const char *reason) 82742a3a5152195 Sasha Levin 2014-10-09 45 { fc36def997cfd6c Pavel Tatashin 2018-07-03 46 bool page_poisoned = PagePoisoned(page); fc36def997cfd6c Pavel Tatashin 2018-07-03 47 int mapcount; fc36def997cfd6c Pavel Tatashin 2018-07-03 48 fc36def997cfd6c Pavel Tatashin 2018-07-03 49 /* fc36def997cfd6c Pavel Tatashin 2018-07-03 50 * If struct page is poisoned don't access Page*() functions as that fc36def997cfd6c Pavel Tatashin 2018-07-03 51 * leads to recursive loop. Page*() check for poisoned pages, and calls fc36def997cfd6c Pavel Tatashin 2018-07-03 52 * dump_page() when detected. fc36def997cfd6c Pavel Tatashin 2018-07-03 53 */ fc36def997cfd6c Pavel Tatashin 2018-07-03 54 if (page_poisoned) { fc36def997cfd6c Pavel Tatashin 2018-07-03 55 pr_emerg("page:%px is uninitialized and poisoned", page); fc36def997cfd6c Pavel Tatashin 2018-07-03 56 goto hex_only; fc36def997cfd6c Pavel Tatashin 2018-07-03 57 } fc36def997cfd6c Pavel Tatashin 2018-07-03 58 9996f05eac09815 Kirill A. Shutemov 2016-10-07 59 /* 9996f05eac09815 Kirill A. Shutemov 2016-10-07 60 * Avoid VM_BUG_ON() in page_mapcount(). 9996f05eac09815 Kirill A. Shutemov 2016-10-07 61 * page->_mapcount space in struct page is used by sl[aou]b pages to 9996f05eac09815 Kirill A. Shutemov 2016-10-07 62 * encode own info. 9996f05eac09815 Kirill A. Shutemov 2016-10-07 63 */ fc36def997cfd6c Pavel Tatashin 2018-07-03 64 mapcount = PageSlab(page) ? 0 : page_mapcount(page); 4d35427ad7641cb Kirill A. Shutemov 2016-09-19 65 152a2d199e1385c Matthew Wilcox 2018-01-04 66 pr_emerg("page:%px count:%d mapcount:%d mapping:%px index:%#lx", 4d35427ad7641cb Kirill A. Shutemov 2016-09-19 67 page, page_ref_count(page), mapcount, 4d35427ad7641cb Kirill A. Shutemov 2016-09-19 68 page->mapping, page_to_pgoff(page)); 53f9263baba69fc Kirill A. Shutemov 2016-01-15 69 if (PageCompound(page)) 53f9263baba69fc Kirill A. Shutemov 2016-01-15 70 pr_cont(" compound_mapcount: %d", compound_mapcount(page)); 53f9263baba69fc Kirill A. Shutemov 2016-01-15 71 pr_cont("\n"); edf14cdbf9a0e5a Vlastimil Babka 2016-03-15 72 BUILD_BUG_ON(ARRAY_SIZE(pageflag_names) != __NR_PAGEFLAGS + 1); ff8e81163889ac4 Vlastimil Babka 2016-03-15 73 b8eceeb99014cf5 Vlastimil Babka 2016-03-15 74 pr_emerg("flags: %#lx(%pGp)\n", page->flags, &page->flags); b8eceeb99014cf5 Vlastimil Babka 2016-03-15 75 fc36def997cfd6c Pavel Tatashin 2018-07-03 76 hex_only: 46e8a3a08c23d07 Vlastimil Babka 2016-12-12 77 print_hex_dump(KERN_ALERT, "raw: ", DUMP_PREFIX_NONE, 32, 46e8a3a08c23d07 Vlastimil Babka 2016-12-12 78 sizeof(unsigned long), page, 46e8a3a08c23d07 Vlastimil Babka 2016-12-12 79 sizeof(struct page), false); 46e8a3a08c23d07 Vlastimil Babka 2016-12-12 80 82742a3a5152195 Sasha Levin 2014-10-09 81 if (reason) 82742a3a5152195 Sasha Levin 2014-10-09 82 pr_alert("page dumped because: %s\n", reason); b8eceeb99014cf5 Vlastimil Babka 2016-03-15 83 9edad6ea0f14164 Johannes Weiner 2014-12-10 84 #ifdef CONFIG_MEMCG fc36def997cfd6c Pavel Tatashin 2018-07-03 85 if (!page_poisoned && page->mem_cgroup) 152a2d199e1385c Matthew Wilcox 2018-01-04 86 pr_alert("page->mem_cgroup:%px\n", page->mem_cgroup); 9edad6ea0f14164 Johannes Weiner 2014-12-10 87 #endif 82742a3a5152195 Sasha Levin 2014-10-09 88 } 82742a3a5152195 Sasha Levin 2014-10-09 89 82742a3a5152195 Sasha Levin 2014-10-09 90 void dump_page(struct page *page, const char *reason) 82742a3a5152195 Sasha Levin 2014-10-09 91 { ff8e81163889ac4 Vlastimil Babka 2016-03-15 92 __dump_page(page, reason); 4e462112e98f9ad Vlastimil Babka 2016-03-15 93 dump_page_owner(page); 82742a3a5152195 Sasha Levin 2014-10-09 94 } 82742a3a5152195 Sasha Levin 2014-10-09 95 EXPORT_SYMBOL(dump_page); 82742a3a5152195 Sasha Levin 2014-10-09 96 82742a3a5152195 Sasha Levin 2014-10-09 97 #ifdef CONFIG_DEBUG_VM 82742a3a5152195 Sasha Levin 2014-10-09 98 82742a3a5152195 Sasha Levin 2014-10-09 99 void dump_vma(const struct vm_area_struct *vma) 82742a3a5152195 Sasha Levin 2014-10-09 100 { 152a2d199e1385c Matthew Wilcox 2018-01-04 101 pr_emerg("vma %px start %px end %px\n" 152a2d199e1385c Matthew Wilcox 2018-01-04 102 "next %px prev %px mm %px\n" 152a2d199e1385c Matthew Wilcox 2018-01-04 103 "prot %lx anon_vma %px vm_ops %px\n" 152a2d199e1385c Matthew Wilcox 2018-01-04 104 "pgoff %lx file %px private_data %px\n" b8eceeb99014cf5 Vlastimil Babka 2016-03-15 105 "flags: %#lx(%pGv)\n", 82742a3a5152195 Sasha Levin 2014-10-09 106 vma, (void *)vma->vm_start, (void *)vma->vm_end, vma->vm_next, 82742a3a5152195 Sasha Levin 2014-10-09 107 vma->vm_prev, vma->vm_mm, 82742a3a5152195 Sasha Levin 2014-10-09 108 (unsigned long)pgprot_val(vma->vm_page_prot), 82742a3a5152195 Sasha Levin 2014-10-09 109 vma->anon_vma, vma->vm_ops, vma->vm_pgoff, b8eceeb99014cf5 Vlastimil Babka 2016-03-15 110 vma->vm_file, vma->vm_private_data, b8eceeb99014cf5 Vlastimil Babka 2016-03-15 111 vma->vm_flags, &vma->vm_flags); 82742a3a5152195 Sasha Levin 2014-10-09 112 } 82742a3a5152195 Sasha Levin 2014-10-09 113 EXPORT_SYMBOL(dump_vma); 82742a3a5152195 Sasha Levin 2014-10-09 114 31c9afa6db122a5 Sasha Levin 2014-10-09 115 void dump_mm(const struct mm_struct *mm) 31c9afa6db122a5 Sasha Levin 2014-10-09 116 { 7a9cdebdcc17e42 Linus Torvalds 2018-09-12 117 pr_emerg("mm %px mmap %px seqnum %llu task_size %lu\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 118 #ifdef CONFIG_MMU 152a2d199e1385c Matthew Wilcox 2018-01-04 119 "get_unmapped_area %px\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 120 #endif 31c9afa6db122a5 Sasha Levin 2014-10-09 121 "mmap_base %lu mmap_legacy_base %lu highest_vm_end %lu\n" 152a2d199e1385c Matthew Wilcox 2018-01-04 122 "pgd %px mm_users %d mm_count %d pgtables_bytes %lu map_count %d\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 123 "hiwater_rss %lx hiwater_vm %lx total_vm %lx locked_vm %lx\n" 84638335900f199 Konstantin Khlebnikov 2016-01-14 124 "pinned_vm %lx data_vm %lx exec_vm %lx stack_vm %lx\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 125 "start_code %lx end_code %lx start_data %lx end_data %lx\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 126 "start_brk %lx brk %lx start_stack %lx\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 127 "arg_start %lx arg_end %lx env_start %lx env_end %lx\n" 152a2d199e1385c Matthew Wilcox 2018-01-04 128 "binfmt %px flags %lx core_state %px\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 129 #ifdef CONFIG_AIO 152a2d199e1385c Matthew Wilcox 2018-01-04 130 "ioctx_table %px\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 131 #endif 2d2fe6b40444bd8 Ding Tianhong 2021-10-30 132 #ifdef CONFIG_MM_OWNER 152a2d199e1385c Matthew Wilcox 2018-01-04 133 "owner %px " 31c9afa6db122a5 Sasha Levin 2014-10-09 134 #endif 152a2d199e1385c Matthew Wilcox 2018-01-04 135 "exe_file %px\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 136 #ifdef CONFIG_MMU_NOTIFIER 152a2d199e1385c Matthew Wilcox 2018-01-04 137 "mmu_notifier_mm %px\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 138 #endif 31c9afa6db122a5 Sasha Levin 2014-10-09 139 #ifdef CONFIG_NUMA_BALANCING 31c9afa6db122a5 Sasha Levin 2014-10-09 140 "numa_next_scan %lu numa_scan_offset %lu numa_scan_seq %d\n" 31c9afa6db122a5 Sasha Levin 2014-10-09 141 #endif 31c9afa6db122a5 Sasha Levin 2014-10-09 142 "tlb_flush_pending %d\n" b8eceeb99014cf5 Vlastimil Babka 2016-03-15 @143 "def_flags: %#lx(%pGv)\n", 31c9afa6db122a5 Sasha Levin 2014-10-09 144 7a9cdebdcc17e42 Linus Torvalds 2018-09-12 145 mm, mm->mmap, (long long) mm->vmacache_seqnum, mm->task_size, 31c9afa6db122a5 Sasha Levin 2014-10-09 146 #ifdef CONFIG_MMU 31c9afa6db122a5 Sasha Levin 2014-10-09 147 mm->get_unmapped_area, 31c9afa6db122a5 Sasha Levin 2014-10-09 148 #endif 31c9afa6db122a5 Sasha Levin 2014-10-09 149 mm->mmap_base, mm->mmap_legacy_base, mm->highest_vm_end, 31c9afa6db122a5 Sasha Levin 2014-10-09 150 mm->pgd, atomic_read(&mm->mm_users), 31c9afa6db122a5 Sasha Levin 2014-10-09 151 atomic_read(&mm->mm_count), af5b0f6a09e42c9 Kirill A. Shutemov 2017-11-15 152 mm_pgtables_bytes(mm), 31c9afa6db122a5 Sasha Levin 2014-10-09 153 mm->map_count, 53f4e528406789b Daniel Jordan 2019-08-14 154 mm->hiwater_rss, mm->hiwater_vm, mm->total_vm, 53f4e528406789b Daniel Jordan 2019-08-14 155 atomic_long_read(&mm->locked_vm), 84638335900f199 Konstantin Khlebnikov 2016-01-14 156 mm->pinned_vm, mm->data_vm, mm->exec_vm, mm->stack_vm, 31c9afa6db122a5 Sasha Levin 2014-10-09 157 mm->start_code, mm->end_code, mm->start_data, mm->end_data, 31c9afa6db122a5 Sasha Levin 2014-10-09 158 mm->start_brk, mm->brk, mm->start_stack, 31c9afa6db122a5 Sasha Levin 2014-10-09 159 mm->arg_start, mm->arg_end, mm->env_start, mm->env_end, 31c9afa6db122a5 Sasha Levin 2014-10-09 160 mm->binfmt, mm->flags, mm->core_state, 31c9afa6db122a5 Sasha Levin 2014-10-09 161 #ifdef CONFIG_AIO 31c9afa6db122a5 Sasha Levin 2014-10-09 162 mm->ioctx_table, 31c9afa6db122a5 Sasha Levin 2014-10-09 163 #endif 31c9afa6db122a5 Sasha Levin 2014-10-09 164 #ifdef CONFIG_MEMCG 31c9afa6db122a5 Sasha Levin 2014-10-09 165 mm->owner, 31c9afa6db122a5 Sasha Levin 2014-10-09 166 #endif 31c9afa6db122a5 Sasha Levin 2014-10-09 167 mm->exe_file, 31c9afa6db122a5 Sasha Levin 2014-10-09 168 #ifdef CONFIG_MMU_NOTIFIER 31c9afa6db122a5 Sasha Levin 2014-10-09 169 mm->mmu_notifier_mm, 31c9afa6db122a5 Sasha Levin 2014-10-09 170 #endif 31c9afa6db122a5 Sasha Levin 2014-10-09 171 #ifdef CONFIG_NUMA_BALANCING 31c9afa6db122a5 Sasha Levin 2014-10-09 172 mm->numa_next_scan, mm->numa_scan_offset, mm->numa_scan_seq, 31c9afa6db122a5 Sasha Levin 2014-10-09 173 #endif 16af97dc5a89753 Nadav Amit 2017-08-10 @174 atomic_read(&mm->tlb_flush_pending), b8eceeb99014cf5 Vlastimil Babka 2016-03-15 @175 mm->def_flags, &mm->def_flags 31c9afa6db122a5 Sasha Levin 2014-10-09 176 ); 31c9afa6db122a5 Sasha Levin 2014-10-09 177 } 31c9afa6db122a5 Sasha Levin 2014-10-09 178 :::::: The code at line 174 was first introduced by commit :::::: 16af97dc5a8975371a83d9e30a64038b48f40a2d mm: migrate: prevent racy access to tlb_flush_pending :::::: TO: Nadav Amit <nadav.amit(a)gmail.com> :::::: CC: Linus Torvalds <torvalds(a)linux-foundation.org> -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[openeuler:OLK-6.6 1474/1474] mm/share_pool.c:1226:14: error: call to undeclared function 'huge_ptep_get'; ISO C99 and later do not support implicit function declarations
by kernel test robot 17 Nov '24

17 Nov '24

Hi Wang, FYI, the error/warning still remains. tree: https://gitee.com/openeuler/kernel.git OLK-6.6 head: 7c547c6bbe6b6a9cedf63d7cdadb2529404df633 commit: 549b1f40b56511536196f7522ffa4d7b3da42337 [1474/1474] mm/sharepool: Implement mg_sp_make_share_u2k() config: arm64-randconfig-003-20241117 (https://download.01.org/0day-ci/archive/20241117/202411172041.LAsMkbYc-lkp@…) compiler: clang version 15.0.7 (https://github.com/llvm/llvm-project 8dfdcc7b7bf66834a761bd8de445840ef68e4d1a) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241117/202411172041.LAsMkbYc-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202411172041.LAsMkbYc-lkp@intel.com/ All errors (new ones prefixed by >>): >> mm/share_pool.c:1226:14: error: call to undeclared function 'huge_ptep_get'; ISO C99 and later do not support implicit function declarations [-Werror,-Wimplicit-function-declaration] pte_t pte = huge_ptep_get(ptep); ^ mm/share_pool.c:1226:8: error: initializing 'pte_t' with an expression of incompatible type 'int' pte_t pte = huge_ptep_get(ptep); ^ ~~~~~~~~~~~~~~~~~~~ 2 errors generated. vim +/huge_ptep_get +1226 mm/share_pool.c 1221 1222 static int sp_hugetlb_entry(pte_t *ptep, unsigned long hmask, 1223 unsigned long addr, unsigned long next, 1224 struct mm_walk *walk) 1225 { > 1226 pte_t pte = huge_ptep_get(ptep); 1227 struct page *page = pte_page(pte); 1228 struct sp_walk_data *sp_walk_data; 1229 1230 if (unlikely(!pte_present(pte))) { 1231 pr_debug("the page of addr %lx unexpectedly not in RAM\n", (unsigned long)addr); 1232 return -EFAULT; 1233 } 1234 1235 sp_walk_data = walk->private; 1236 get_page(page); 1237 sp_walk_data->pages[sp_walk_data->page_count++] = page; 1238 return 0; 1239 } 1240 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

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[PATCH openEuler-OLK-6.6 001/129] iommu/arm-smmu-v3: Make STE programming independent of the callers
by Kunkun Jiang 17 Nov '24

17 Nov '24

From: Jason Gunthorpe <jgg(a)nvidia.com> mainline inclusion from mainline-v6.9-rc1 commit 7da51af9125c624318c8099de13c5ddefd47e9e8 category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/IB4WDJ CVE: NA Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?… -------------------------------- As the comment in arm_smmu_write_strtab_ent() explains, this routine has been limited to only work correctly in certain scenarios that the caller must ensure. Generally the caller must put the STE into ABORT or BYPASS before attempting to program it to something else. The iommu core APIs would ideally expect the driver to do a hitless change of iommu_domain in a number of cases: - RESV_DIRECT support wants IDENTITY -> DMA -> IDENTITY to be hitless for the RESV ranges - PASID upgrade has IDENTIY on the RID with no PASID then a PASID paging domain installed. The RID should not be impacted - PASID downgrade has IDENTIY on the RID and all PASID's removed. The RID should not be impacted - RID does PAGING -> BLOCKING with active PASID, PASID's should not be impacted - NESTING -> NESTING for carrying all the above hitless cases in a VM into the hypervisor. To comprehensively emulate the HW in a VM we should assume the VM OS is running logic like this and expecting hitless updates to be relayed to real HW. For CD updates arm_smmu_write_ctx_desc() has a similar comment explaining how limited it is, and the driver does have a need for hitless CD updates: - SMMUv3 BTM S1 ASID re-label - SVA mm release should change the CD to answert not-present to all requests without allowing logging (EPD0) The next patches/series are going to start removing some of this logic from the callers, and add more complex state combinations than currently. At the end everything that can be hitless will be hitless, including all of the above. Introduce arm_smmu_write_ste() which will run through the multi-qword programming sequence to avoid creating an incoherent 'torn' STE in the HW caches. It automatically detects which of two algorithms to use: 1) The disruptive V=0 update described in the spec which disrupts the entry and does three syncs to make the change: - Write V=0 to QWORD 0 - Write the entire STE except QWORD 0 - Write QWORD 0 2) A hitless update algorithm that follows the same rational that the driver already uses. It is safe to change IGNORED bits that HW doesn't use: - Write the target value into all currently unused bits - Write a single QWORD, this makes the new STE live atomically - Ensure now unused bits are 0 The detection of which path to use and the implementation of the hitless update rely on a "used bitmask" describing what bits the HW is actually using based on the V/CFG/etc bits. This flows from the spec language, typically indicated as IGNORED. Knowing which bits the HW is using we can update the bits it does not use and then compute how many QWORDS need to be changed. If only one qword needs to be updated the hitless algorithm is possible. Later patches will include CD updates in this mechanism so make the implementation generic using a struct arm_smmu_entry_writer and struct arm_smmu_entry_writer_ops to abstract the differences between STE and CD to be plugged in. At this point it generates the same sequence of updates as the current code, except that zeroing the VMID on entry to BYPASS/ABORT will do an extra sync (this seems to be an existing bug). Going forward this will use a V=0 transition instead of cycling through ABORT if a hitfull change is required. This seems more appropriate as ABORT will fail DMAs without any logging, but dropping a DMA due to transient V=0 is probably signaling a bug, so the C_BAD_STE is valuable. Add STRTAB_STE_1_SHCFG_INCOMING to s2_cfg, this was editing the STE in place and subtly inherited the value of data[1] from abort/bypass. Signed-off-by: Michael Shavit <mshavit(a)google.com> Signed-off-by: Jason Gunthorpe <jgg(a)nvidia.com> Link: https://lore.kernel.org/r/1-v6-96275f25c39d+2d4-smmuv3_newapi_p1_jgg@nvidia… Signed-off-by: Will Deacon <will(a)kernel.org> Signed-off-by: Kunkun Jiang <jiangkunkun(a)huawei.com> --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 275 +++++++++++++++----- 1 file changed, 211 insertions(+), 64 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 230368d05892..21cb2e47f96e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -110,6 +110,9 @@ enum arm_smmu_msi_index { ARM_SMMU_MAX_MSIS, }; +static void arm_smmu_sync_ste_for_sid(struct arm_smmu_device *smmu, + ioasid_t sid); + static phys_addr_t arm_smmu_msi_cfg[ARM_SMMU_MAX_MSIS][3] = { [EVTQ_MSI_INDEX] = { ARM_SMMU_EVTQ_IRQ_CFG0, @@ -1190,6 +1193,199 @@ void arm_smmu_tlb_inv_asid(struct arm_smmu_device *smmu, u16 asid) arm_smmu_cmdq_issue_cmd_with_sync(smmu, &cmd); } +/* + * Based on the value of ent report which bits of the STE the HW will access. It + * would be nice if this was complete according to the spec, but minimally it + * has to capture the bits this driver uses. + */ +static void arm_smmu_get_ste_used(const struct arm_smmu_ste *ent, + struct arm_smmu_ste *used_bits) +{ + unsigned int cfg = FIELD_GET(STRTAB_STE_0_CFG, le64_to_cpu(ent->data[0])); + + used_bits->data[0] = cpu_to_le64(STRTAB_STE_0_V); + if (!(ent->data[0] & cpu_to_le64(STRTAB_STE_0_V))) + return; + + used_bits->data[0] |= cpu_to_le64(STRTAB_STE_0_CFG); + + /* S1 translates */ + if (cfg & BIT(0)) { + used_bits->data[0] |= cpu_to_le64(STRTAB_STE_0_S1FMT | + STRTAB_STE_0_S1CTXPTR_MASK | + STRTAB_STE_0_S1CDMAX); + used_bits->data[1] |= + cpu_to_le64(STRTAB_STE_1_S1DSS | STRTAB_STE_1_S1CIR | + STRTAB_STE_1_S1COR | STRTAB_STE_1_S1CSH | + STRTAB_STE_1_S1STALLD | STRTAB_STE_1_STRW | + STRTAB_STE_1_EATS); + used_bits->data[2] |= cpu_to_le64(STRTAB_STE_2_S2VMID); + } + + /* S2 translates */ + if (cfg & BIT(1)) { + used_bits->data[1] |= + cpu_to_le64(STRTAB_STE_1_EATS | STRTAB_STE_1_SHCFG); + used_bits->data[2] |= + cpu_to_le64(STRTAB_STE_2_S2VMID | STRTAB_STE_2_VTCR | + STRTAB_STE_2_S2AA64 | STRTAB_STE_2_S2ENDI | + STRTAB_STE_2_S2PTW | STRTAB_STE_2_S2R); + used_bits->data[3] |= cpu_to_le64(STRTAB_STE_3_S2TTB_MASK); + } + + if (cfg == STRTAB_STE_0_CFG_BYPASS) + used_bits->data[1] |= cpu_to_le64(STRTAB_STE_1_SHCFG); +} + +/* + * Figure out if we can do a hitless update of entry to become target. Returns a + * bit mask where 1 indicates that qword needs to be set disruptively. + * unused_update is an intermediate value of entry that has unused bits set to + * their new values. + */ +static u8 arm_smmu_entry_qword_diff(const struct arm_smmu_ste *entry, + const struct arm_smmu_ste *target, + struct arm_smmu_ste *unused_update) +{ + struct arm_smmu_ste target_used = {}; + struct arm_smmu_ste cur_used = {}; + u8 used_qword_diff = 0; + unsigned int i; + + arm_smmu_get_ste_used(entry, &cur_used); + arm_smmu_get_ste_used(target, &target_used); + + for (i = 0; i != ARRAY_SIZE(target_used.data); i++) { + /* + * Check that masks are up to date, the make functions are not + * allowed to set a bit to 1 if the used function doesn't say it + * is used. + */ + WARN_ON_ONCE(target->data[i] & ~target_used.data[i]); + + /* Bits can change because they are not currently being used */ + unused_update->data[i] = (entry->data[i] & cur_used.data[i]) | + (target->data[i] & ~cur_used.data[i]); + /* + * Each bit indicates that a used bit in a qword needs to be + * changed after unused_update is applied. + */ + if ((unused_update->data[i] & target_used.data[i]) != + target->data[i]) + used_qword_diff |= 1 << i; + } + return used_qword_diff; +} + +static bool entry_set(struct arm_smmu_device *smmu, ioasid_t sid, + struct arm_smmu_ste *entry, + const struct arm_smmu_ste *target, unsigned int start, + unsigned int len) +{ + bool changed = false; + unsigned int i; + + for (i = start; len != 0; len--, i++) { + if (entry->data[i] != target->data[i]) { + WRITE_ONCE(entry->data[i], target->data[i]); + changed = true; + } + } + + if (changed) + arm_smmu_sync_ste_for_sid(smmu, sid); + return changed; +} + +/* + * Update the STE/CD to the target configuration. The transition from the + * current entry to the target entry takes place over multiple steps that + * attempts to make the transition hitless if possible. This function takes care + * not to create a situation where the HW can perceive a corrupted entry. HW is + * only required to have a 64 bit atomicity with stores from the CPU, while + * entries are many 64 bit values big. + * + * The difference between the current value and the target value is analyzed to + * determine which of three updates are required - disruptive, hitless or no + * change. + * + * In the most general disruptive case we can make any update in three steps: + * - Disrupting the entry (V=0) + * - Fill now unused qwords, execpt qword 0 which contains V + * - Make qword 0 have the final value and valid (V=1) with a single 64 + * bit store + * + * However this disrupts the HW while it is happening. There are several + * interesting cases where a STE/CD can be updated without disturbing the HW + * because only a small number of bits are changing (S1DSS, CONFIG, etc) or + * because the used bits don't intersect. We can detect this by calculating how + * many 64 bit values need update after adjusting the unused bits and skip the + * V=0 process. This relies on the IGNORED behavior described in the + * specification. + */ +static void arm_smmu_write_ste(struct arm_smmu_master *master, u32 sid, + struct arm_smmu_ste *entry, + const struct arm_smmu_ste *target) +{ + unsigned int num_entry_qwords = ARRAY_SIZE(target->data); + struct arm_smmu_device *smmu = master->smmu; + struct arm_smmu_ste unused_update; + u8 used_qword_diff; + + used_qword_diff = + arm_smmu_entry_qword_diff(entry, target, &unused_update); + if (hweight8(used_qword_diff) == 1) { + /* + * Only one qword needs its used bits to be changed. This is a + * hitless update, update all bits the current STE is ignoring + * to their new values, then update a single "critical qword" to + * change the STE and finally 0 out any bits that are now unused + * in the target configuration. + */ + unsigned int critical_qword_index = ffs(used_qword_diff) - 1; + + /* + * Skip writing unused bits in the critical qword since we'll be + * writing it in the next step anyways. This can save a sync + * when the only change is in that qword. + */ + unused_update.data[critical_qword_index] = + entry->data[critical_qword_index]; + entry_set(smmu, sid, entry, &unused_update, 0, num_entry_qwords); + entry_set(smmu, sid, entry, target, critical_qword_index, 1); + entry_set(smmu, sid, entry, target, 0, num_entry_qwords); + } else if (used_qword_diff) { + /* + * At least two qwords need their inuse bits to be changed. This + * requires a breaking update, zero the V bit, write all qwords + * but 0, then set qword 0 + */ + unused_update.data[0] = entry->data[0] & (~STRTAB_STE_0_V); + entry_set(smmu, sid, entry, &unused_update, 0, 1); + entry_set(smmu, sid, entry, target, 1, num_entry_qwords - 1); + entry_set(smmu, sid, entry, target, 0, 1); + } else { + /* + * No inuse bit changed. Sanity check that all unused bits are 0 + * in the entry. The target was already sanity checked by + * compute_qword_diff(). + */ + WARN_ON_ONCE( + entry_set(smmu, sid, entry, target, 0, num_entry_qwords)); + } + + /* It's likely that we'll want to use the new STE soon */ + if (!(smmu->options & ARM_SMMU_OPT_SKIP_PREFETCH)) { + struct arm_smmu_cmdq_ent + prefetch_cmd = { .opcode = CMDQ_OP_PREFETCH_CFG, + .prefetch = { + .sid = sid, + } }; + + arm_smmu_cmdq_issue_cmd(smmu, &prefetch_cmd); + } +} + static void arm_smmu_sync_cd(struct arm_smmu_master *master, int ssid, bool leaf) { @@ -1483,34 +1679,12 @@ static void arm_smmu_sync_ste_for_sid(struct arm_smmu_device *smmu, u32 sid) static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, struct arm_smmu_ste *dst) { - /* - * This is hideously complicated, but we only really care about - * three cases at the moment: - * - * 1. Invalid (all zero) -> bypass/fault (init) - * 2. Bypass/fault -> translation/bypass (attach) - * 3. Translation/bypass -> bypass/fault (detach) - * - * Given that we can't update the STE atomically and the SMMU - * doesn't read the thing in a defined order, that leaves us - * with the following maintenance requirements: - * - * 1. Update Config, return (init time STEs aren't live) - * 2. Write everything apart from dword 0, sync, write dword 0, sync - * 3. Update Config, sync - */ - u64 val = le64_to_cpu(dst->data[0]); - bool ste_live = false; + u64 val; struct arm_smmu_device *smmu = master->smmu; struct arm_smmu_ctx_desc_cfg *cd_table = NULL; struct arm_smmu_s2_cfg *s2_cfg = NULL; struct arm_smmu_domain *smmu_domain = master->domain; - struct arm_smmu_cmdq_ent prefetch_cmd = { - .opcode = CMDQ_OP_PREFETCH_CFG, - .prefetch = { - .sid = sid, - }, - }; + struct arm_smmu_ste target = {}; if (smmu_domain) { switch (smmu_domain->stage) { @@ -1525,22 +1699,6 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, } } - if (val & STRTAB_STE_0_V) { - switch (FIELD_GET(STRTAB_STE_0_CFG, val)) { - case STRTAB_STE_0_CFG_BYPASS: - break; - case STRTAB_STE_0_CFG_S1_TRANS: - case STRTAB_STE_0_CFG_S2_TRANS: - ste_live = true; - break; - case STRTAB_STE_0_CFG_ABORT: - BUG_ON(!disable_bypass); - break; - default: - BUG(); /* STE corruption */ - } - } - /* Nuke the existing STE_0 value, as we're going to rewrite it */ val = STRTAB_STE_0_V; @@ -1551,16 +1709,11 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, else val |= FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_BYPASS); - dst->data[0] = cpu_to_le64(val); - dst->data[1] = cpu_to_le64(FIELD_PREP(STRTAB_STE_1_SHCFG, + target.data[0] = cpu_to_le64(val); + target.data[1] = cpu_to_le64(FIELD_PREP(STRTAB_STE_1_SHCFG, STRTAB_STE_1_SHCFG_INCOMING)); - dst->data[2] = 0; /* Nuke the VMID */ - /* - * The SMMU can perform negative caching, so we must sync - * the STE regardless of whether the old value was live. - */ - if (smmu) - arm_smmu_sync_ste_for_sid(smmu, sid); + target.data[2] = 0; /* Nuke the VMID */ + arm_smmu_write_ste(master, sid, dst, &target); return; } @@ -1568,8 +1721,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, u64 strw = smmu->features & ARM_SMMU_FEAT_E2H ? STRTAB_STE_1_STRW_EL2 : STRTAB_STE_1_STRW_NSEL1; - BUG_ON(ste_live); - dst->data[1] = cpu_to_le64( + target.data[1] = cpu_to_le64( FIELD_PREP(STRTAB_STE_1_S1DSS, STRTAB_STE_1_S1DSS_SSID0) | FIELD_PREP(STRTAB_STE_1_S1CIR, STRTAB_STE_1_S1C_CACHE_WBRA) | FIELD_PREP(STRTAB_STE_1_S1COR, STRTAB_STE_1_S1C_CACHE_WBRA) | @@ -1578,7 +1730,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, if (smmu->features & ARM_SMMU_FEAT_STALLS && !master->stall_enabled) - dst->data[1] |= cpu_to_le64(STRTAB_STE_1_S1STALLD); + target.data[1] |= cpu_to_le64(STRTAB_STE_1_S1STALLD); val |= (cd_table->cdtab_dma & STRTAB_STE_0_S1CTXPTR_MASK) | FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S1_TRANS) | @@ -1587,8 +1739,9 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, } if (s2_cfg) { - BUG_ON(ste_live); - dst->data[2] = cpu_to_le64( + target.data[1] = cpu_to_le64(FIELD_PREP(STRTAB_STE_1_SHCFG, + STRTAB_STE_1_SHCFG_INCOMING)); + target.data[2] = cpu_to_le64( FIELD_PREP(STRTAB_STE_2_S2VMID, s2_cfg->vmid) | FIELD_PREP(STRTAB_STE_2_VTCR, s2_cfg->vtcr) | #ifdef __BIG_ENDIAN @@ -1597,23 +1750,17 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, STRTAB_STE_2_S2PTW | STRTAB_STE_2_S2AA64 | STRTAB_STE_2_S2R); - dst->data[3] = cpu_to_le64(s2_cfg->vttbr & STRTAB_STE_3_S2TTB_MASK); + target.data[3] = cpu_to_le64(s2_cfg->vttbr & STRTAB_STE_3_S2TTB_MASK); val |= FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S2_TRANS); } if (master->ats_enabled) - dst->data[1] |= cpu_to_le64(FIELD_PREP(STRTAB_STE_1_EATS, + target.data[1] |= cpu_to_le64(FIELD_PREP(STRTAB_STE_1_EATS, STRTAB_STE_1_EATS_TRANS)); - arm_smmu_sync_ste_for_sid(smmu, sid); - /* See comment in arm_smmu_write_ctx_desc() */ - WRITE_ONCE(dst->data[0], cpu_to_le64(val)); - arm_smmu_sync_ste_for_sid(smmu, sid); - - /* It's likely that we'll want to use the new STE soon */ - if (!(smmu->options & ARM_SMMU_OPT_SKIP_PREFETCH)) - arm_smmu_cmdq_issue_cmd(smmu, &prefetch_cmd); + target.data[0] = cpu_to_le64(val); + arm_smmu_write_ste(master, sid, dst, &target); } static void arm_smmu_init_bypass_stes(struct arm_smmu_ste *strtab, -- 2.33.0

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