- Kernel - mailweb.openeuler.org

[PATCH OLK-6.6 0/2] Add Huawei Intelligent Network Card RDMA Driver: hiroce3
by Shuai Wu 09 Apr '24

09 Apr '24

From: w00623716 <wushuai51(a)huawei.com> The RDMA driver supports the following features: Supports Huawei SP600 series NICs; Supports RoCEv2; Supports RoCE XRC, UD, UC, and RC modes; Supports RoCE UC, RC, and UD local switching; Supports RoCE MR, PD, CQ, QoS, QP, and SRQ management; Supports RoCE congestion control; Supports RoCE Bond; Supports RoCE FLR; Supports RoCE entry specifications; Supports RoCE error detection and reporting; w00623716 (2): net/ethernet/huawei/hinic3: Add the CQM on which the RDMA depends infiniband/hw/hiroce3: Add Huawei Intelligent Network Card RDMA Driver arch/arm64/configs/openeuler_defconfig | 1 + arch/x86/configs/openeuler_defconfig | 1 + drivers/infiniband/Kconfig | 1 + drivers/infiniband/hw/Makefile | 1 + drivers/infiniband/hw/hiroce3/Kconfig | 14 + drivers/infiniband/hw/hiroce3/Makefile | 157 + .../infiniband/hw/hiroce3/bond/roce_bond.h | 149 + .../hw/hiroce3/bond/roce_bond_common.c | 950 + drivers/infiniband/hw/hiroce3/cq/roce_cq.h | 265 + .../infiniband/hw/hiroce3/cq/roce_cq_common.c | 202 + .../infiniband/hw/hiroce3/cq/roce_cq_cqe.c | 731 + .../infiniband/hw/hiroce3/cq/roce_cq_create.c | 604 + .../infiniband/hw/hiroce3/cq/roce_cq_ctrl.c | 872 + .../hw/hiroce3/cq/roce_cq_destroy.c | 298 + drivers/infiniband/hw/hiroce3/dfx/roce_dfx.c | 126 + drivers/infiniband/hw/hiroce3/dfx/roce_dfx.h | 184 + .../infiniband/hw/hiroce3/dfx/roce_dfx_cap.c | 676 + .../infiniband/hw/hiroce3/dfx/roce_dfx_cap.h | 184 + .../hw/hiroce3/dfx/roce_dfx_query.c | 615 + .../hiroce3/extension/roce_cdev_extension.c | 18 + .../hiroce3/extension/roce_event_extension.c | 30 + .../hiroce3/extension/roce_main_extension.c | 206 + .../hw/hiroce3/extension/roce_mr_extension.c | 38 + .../hiroce3/extension/roce_netdev_extension.c | 174 + .../hw/hiroce3/extension/roce_qp_extension.c | 251 + .../extension/roce_qp_post_send_extension.c | 20 + .../hw/hiroce3/extension/roce_srq_extension.c | 35 + .../hw/hiroce3/host/crypt/hisec_cfg.c | 148 + .../hw/hiroce3/host/crypt/hisec_cfg.h | 26 + .../hw/hiroce3/host/crypt/hisec_hwrand.c | 229 + .../hw/hiroce3/host/crypt/hisec_hwrand.h | 14 + .../host/crypt/linux/kernel/hisec_crypt_dev.h | 29 + .../crypt/linux/kernel/hisec_crypt_main.c | 123 + .../hw/hiroce3/host/crypt/readme.txt | 1 + .../hw/hiroce3/host/hmm/hmm_buddy.c | 170 + .../hw/hiroce3/host/hmm/hmm_buddy.h | 36 + .../infiniband/hw/hiroce3/host/hmm/hmm_comp.c | 165 + .../infiniband/hw/hiroce3/host/hmm/hmm_comp.h | 225 + .../hw/hiroce3/host/hmm/hmm_comp_init.c | 131 + .../hw/hiroce3/host/hmm/hmm_comp_mtt.c | 497 + .../hw/hiroce3/host/hmm/hmm_comp_mw_mr.c | 222 + .../hw/hiroce3/host/hmm/hmm_comp_res.c | 63 + .../infiniband/hw/hiroce3/host/hmm/hmm_em.c | 348 + .../infiniband/hw/hiroce3/host/hmm/hmm_em.h | 48 + .../infiniband/hw/hiroce3/host/hmm/hmm_mr.c | 403 + .../infiniband/hw/hiroce3/host/hmm/hmm_mr.h | 34 + .../infiniband/hw/hiroce3/host/hmm/hmm_umem.c | 322 + .../infiniband/hw/hiroce3/host/hmm/hmm_umem.h | 124 + .../hw/hiroce3/host/mt/hinic3_devlink.c | 428 + .../hw/hiroce3/host/mt/hinic3_devlink.h | 173 + .../hw/hiroce3/host/mt/hinic3_hw_mt.c | 605 + .../hw/hiroce3/host/mt/hinic3_hw_mt.h | 49 + .../hw/hiroce3/host/mt/hinic3_nictool.c | 982 + .../hw/hiroce3/host/mt/hinic3_nictool.h | 35 + .../infiniband/hw/hiroce3/host/mt/readme.txt | 1 + .../hw/hiroce3/host/vram/vram_common.c | 192 + .../hw/hiroce3/include/crypt/hisec_mpu_cmd.h | 38 + .../include/crypt/hisec_mpu_cmd_defs.h | 118 + .../hw/hiroce3/include/crypt/hisec_npu_cmd.h | 30 + .../include/crypt/hisec_npu_cmd_defs.h | 415 + .../hw/hiroce3/include/hinic3_hmm.h | 83 + .../hw/hiroce3/include/hinic3_rdma.h | 203 + .../hw/hiroce3/include/hinic3_srv_nic.h | 218 + .../hw/hiroce3/include/hw/db_srv_type_pub.h | 126 + .../hw/hiroce3/include/hw/node_id.h | 58 + .../hw/register/infra/cnb_c_union_define.h | 318 + .../hw/register/infra/cnb_reg_offset.h | 42 + .../hw/register/infra/cpb_c_union_define.h | 8234 + .../hw/register/infra/cpb_reg_offset.h | 1157 + .../hw/register/infra/cpi_c_union_define.h | 23677 +++ .../register/infra/cpi_dfx_glb_reg_offset.h | 236 + .../hw/register/infra/cpi_reg_offset.h | 4698 + .../hw/register/infra/crypto_c_union_define.h | 6226 + .../hw/register/infra/crypto_reg_offset.h | 1181 + .../hw/register/infra/esch_c_union_define.h | 1340 + .../hw/register/infra/esch_reg_offset.h | 802 + .../infra/hi1823_csr_sm_addr_define.h | 384 + .../hw/register/infra/hi1823_csr_sm_typedef.h | 12259 ++ .../register/infra/hinic3_csr_addr_common.h | 254 + .../hw/register/infra/icdq_c_union_define.h | 1062 + .../hw/register/infra/icdq_reg_offset.h | 114 + .../hw/register/infra/ipsurx_c_union_define.h | 4805 + .../hw/register/infra/ipsurx_reg_offset.h | 1469 + .../hw/register/infra/ipsurx_typedef.h | 30688 ++++ .../hw/register/infra/ipsutx_c_union_define.h | 2872 + .../hw/register/infra/ipsutx_reg_offset.h | 429 + .../hw/register/infra/lcam_c_union_define.h | 741 + .../hw/register/infra/lcam_reg_offset.h | 72 + .../hw/register/infra/mqm_c_union_define.h | 11885 ++ .../hw/register/infra/mqm_reg_offset.h | 3696 + .../hw/register/infra/oq_c_union_define.h | 2285 + .../include/hw/register/infra/oq_reg_offset.h | 261 + .../hw/register/infra/pe_c_union_define.h | 1819 + .../include/hw/register/infra/pe_reg_offset.h | 493 + .../hw/register/infra/pqm_c_union_define.h | 2091 + .../hw/register/infra/pqm_reg_offset.h | 291 + .../hw/register/infra/prmrx_c_union_define.h | 2937 + .../hw/register/infra/prmrx_reg_offset.h | 258 + .../hw/register/infra/prmtx_c_union_define.h | 2758 + .../hw/register/infra/prmtx_reg_offset.h | 264 + .../register/infra/ring_cnb_c_union_define.h | 314 + .../hw/register/infra/ring_cnb_reg_offset.h | 52 + .../hw/register/infra/sm_c_union_define.h | 6441 + .../include/hw/register/infra/sm_reg_offset.h | 860 + .../hw/register/infra/stffq_c_union_define.h | 6438 + .../hw/register/infra/stffq_reg_offset.h | 1059 + .../hw/register/infra/stfiq_c_union_define.h | 1413 + .../hw/register/infra/stfiq_reg_offset.h | 148 + .../register/infra/stfisch_c_union_define.h | 420 + .../hw/register/infra/stfisch_reg_offset.h | 828 + .../hw/register/infra/stlfq_c_union_define.h | 6358 + .../hw/register/infra/stlfq_reg_offset.h | 535 + .../hw/register/infra/stliq_c_union_define.h | 1109 + .../hw/register/infra/stliq_reg_offset.h | 106 + .../register/infra/stlisch_c_union_define.h | 425 + .../hw/register/infra/stlisch_reg_offset.h | 527 + .../hw/register/infra/tile_c_union_define.h | 3399 + .../hw/register/infra/tile_reg_offset.h | 399 + .../hw/register/infra/virtio_c_union_define.h | 4349 + .../hw/register/infra/virtio_reg_offset.h | 275 + .../hw/register/mag/c_union_define_mag_top.h | 1695 + .../hw/register/mag/c_union_define_smag_cfg.h | 1457 + .../mag/hi1822_csr_mag_offset_union_define.h | 22 + .../hw/register/mag/mac_reg_an_lth60_offset.h | 483 + .../hw/register/mag/mac_reg_com_offset.h | 33 + .../hw/register/mag/mac_reg_mib_offset.h | 26 + .../hw/register/mag/mac_reg_rx_brfec_offset.h | 68 + .../hw/register/mag/mac_reg_rx_mac_offset.h | 95 + .../hw/register/mag/mac_reg_rx_pcs_offset.h | 343 + .../hw/register/mag/mac_reg_rx_rsfec_offset.h | 503 + .../register/mag/mac_reg_rxpma_core_offset.h | 213 + .../register/mag/mac_reg_rxpma_lane_offset.h | 44 + .../hw/register/mag/mac_reg_tx_brfec_offset.h | 62 + .../hw/register/mag/mac_reg_tx_mac_offset.h | 109 + .../hw/register/mag/mac_reg_tx_pcs_offset.h | 169 + .../hw/register/mag/mac_reg_tx_rsfec_offset.h | 75 + .../register/mag/mac_reg_txpma_core_offset.h | 19 + .../register/mag/mac_reg_txpma_lane_offset.h | 43 + .../mag/mag_fc_sds_harden_reg_offset.h | 60 + .../hw/register/mag/mag_top_reg_offset.h | 379 + .../hw/register/mag/smag_cfg_reg_offset.h | 277 + .../hw/register/misc/sfc_c_union_define.h | 721 + .../include/hw/register/misc/sfc_reg_offset.h | 217 + .../hw/register/mpu/c_union_define_crg.h | 625 + .../include/hw/register/mpu/crg_reg_offset.h | 68 + .../hw/register/mpu/mpu_c_union_define.h | 15330 ++ .../register/mpu/mpu_harden_c_union_define.h | 795 + .../hw/register/mpu/mpu_harden_reg_offset.h | 461 + .../include/hw/register/mpu/mpu_reg_offset.h | 2115 + .../hw/register/pcie/hva_peh_c_union_define.h | 3236 + .../hw/register/pcie/hva_peh_reg_offset.h | 214 + .../hw/register/pcie/pcie5_ap_addr_define.h | 40529 +++++ .../hw/register/pcie/pcie5_ap_typedef.h | 42419 ++++++ .../hw/register/pcie/pcie5_core_addr_define.h | 3233 + .../hw/register/pcie/pcie5_core_typedef.h | 118101 +++++++++++++++ .../hw/register/pcie/pcie5_pcs_addr_define.h | 286 + .../hw/register/pcie/pcie5_pcs_typedef.h | 11995 ++ .../hw/register/rxtx/apb2ff_reg_offset.h | 68 + .../hw/register/rxtx/c_union_define_apb2ff.h | 82 + .../register/top/mag_harden_c_union_define.h | 484 + .../hw/register/top/mag_harden_reg_offset.h | 55 + .../register/top/pcie_harden_c_union_define.h | 738 + .../hw/register/top/pcie_harden_reg_offset.h | 65 + .../register/top/smf0_harden_c_union_define.h | 1611 + .../hw/register/top/smf0_harden_reg_offset.h | 69 + .../top/stlqu_harden_c_union_define.h | 662 + .../hw/register/top/stlqu_harden_reg_offset.h | 69 + .../register/top/top_cpb_harden_reg_offset.h | 42 + .../top_encryp_decryp_harden_c_union_define.h | 48 + .../top/top_encryp_decryp_harden_reg_offset.h | 73 + .../hw/register/top/top_iocfg_reg_offset.h | 81 + .../register/totem/arm_ras_c_union_define.h | 192 + .../hw/register/totem/avs_reg_offset.h | 875 + .../register/totem/ddrc_arm_ras_reg_offset.h | 31 + .../hw/register/totem/ddrc_dmc_c_union_def.h | 102 + .../hw/register/totem/ddrc_dmc_reg_offset.h | 314 + .../register/totem/ddrc_rasc_c_union_define.h | 1411 + .../hw/register/totem/ddrc_rasc_reg_offset.h | 192 + .../hw/register/totem/efuse_reg_offset.h | 125 + .../hw/register/totem/fabric_c_union_define.h | 1629 + .../hw/register/totem/fabric_reg_offset.h | 102 + .../hw/register/totem/hha_c_union_def.h | 62 + .../hw/register/totem/hva_c_union_define.h | 1287 + .../hw/register/totem/hva_reg_offset.h | 110 + .../register/totem/hva_sm23_c_union_define.h | 43 + .../hw/register/totem/hva_sm23_reg_offset.h | 37 + .../register/totem/hva_smf_c_union_define.h | 1194 + .../hw/register/totem/hva_smf_reg_offset.h | 189 + .../hw/register/totem/mbigen_c_union_define.h | 643 + .../hw/register/totem/mbigen_reg_offset.h | 956 + .../hw/register/totem/pcie4_c_union_define.h | 5992 + .../hw/register/totem/pcie4_reg_offset.h | 2240 + .../register/totem/phosphor_c_union_define.h | 2841 + .../hw/register/totem/phosphor_reg_offset.h | 149 + .../include/hw/register/totem/plat_efuse.h | 368 + .../hw/register/totem/ras_c_union_define.h | 295 + .../hw/register/totem/ras_reg_offset.h | 110 + .../hw/register/totem/sioe_reg_offset.h | 426 + .../hw/register/totem/sllc_reg_offset.h | 150 + .../hw/register/totem/smmu_c_union_define.h | 2448 + .../hw/register/totem/smmu_reg_offset.h | 256 + .../hw/register/totem/sysctrl_reg_offset.h | 316 + .../hw/hiroce3/include/hw/service_type_pub.h | 135 + .../hw/hiroce3/include/hw/smf_cache_type.h | 142 + .../hw/hiroce3/include/hw/smf_instance_id.h | 168 + .../hw/hiroce3/include/hw/sml_table.h | 4079 + .../include/hw/sml_table_define_cloud.h | 273 + .../include/hw/sml_table_define_compute_dpu.h | 12 + .../hw/sml_table_define_compute_roce.h | 137 + .../hw/sml_table_define_compute_standard.h | 234 + .../include/hw/sml_table_define_fpga.h | 340 + .../hiroce3/include/hw/sml_table_define_llt.h | 361 + .../include/hw/sml_table_define_storage_fc.h | 65 + .../hw/sml_table_define_storage_fc_adapt.h | 65 + .../hw/sml_table_define_storage_roce.h | 149 + .../hw/sml_table_define_storage_roceaa.h | 164 + .../include/hw/sml_table_define_storage_toe.h | 113 + .../hw/hiroce3/include/hw/sml_table_pub.h | 330 + .../hw/hiroce3/include/hw/tile_spec.h | 28 + .../hw/hiroce3/include/mag/mag_mpu_cmd.h | 77 + .../hw/hiroce3/include/mag/mag_mpu_cmd_defs.h | 928 + .../include/micro_log/hinic3_micro_log.c | 1156 + .../include/micro_log/hinic3_micro_log.h | 169 + .../hw/hiroce3/include/nic/nic_cfg_comm.h | 62 + .../hw/hiroce3/include/nic/nic_mpu_cmd.h | 147 + .../hw/hiroce3/include/nic/nic_mpu_cmd_defs.h | 1317 + .../hw/hiroce3/include/nic/nic_npu_cmd.h | 31 + .../hw/hiroce3/include/nic/nic_npu_cmd_defs.h | 140 + .../hw/hiroce3/include/nic/nic_npu_wqe_defs.h | 240 + .../include/public/npu_cmdq_base_defs.h | 241 + .../include/rdma/rdma_context_format.h | 4435 + .../include/rdma/rdma_ext_ctx_format.h | 382 + .../hw/hiroce3/include/rdma/roce_ccf_format.h | 725 + .../hiroce3/include/rdma/roce_compile_macro.h | 91 + .../hw/hiroce3/include/rdma/roce_ctx_api.h | 265 + .../hw/hiroce3/include/rdma/roce_dif_format.h | 459 + .../hw/hiroce3/include/rdma/roce_err_type.h | 125 + .../hiroce3/include/rdma/roce_hmm_context.h | 196 + .../hw/hiroce3/include/rdma/roce_mpu_common.h | 241 + .../include/rdma/roce_mpu_ulp_common.h | 56 + .../hw/hiroce3/include/rdma/roce_pub.h | 262 + .../hw/hiroce3/include/rdma/roce_pub_cmd.h | 264 + .../hw/hiroce3/include/rdma/roce_ulp.h | 177 + .../hw/hiroce3/include/rdma/roce_vbs_format.h | 208 + .../hw/hiroce3/include/rdma/roce_verbs_attr.h | 400 + .../include/rdma/roce_verbs_attr_qpc_chip.h | 355 + .../hw/hiroce3/include/rdma/roce_verbs_cmd.h | 250 + .../hiroce3/include/rdma/roce_verbs_cq_attr.h | 170 + .../include/rdma/roce_verbs_ext_attr.h | 51 + .../hiroce3/include/rdma/roce_verbs_format.h | 134 + .../include/rdma/roce_verbs_gid_attr.h | 112 + .../hiroce3/include/rdma/roce_verbs_mr_attr.h | 299 + .../hw/hiroce3/include/rdma/roce_verbs_pub.h | 226 + .../include/rdma/roce_verbs_srq_attr.h | 229 + .../include/rdma/roce_verbs_ulp_format.h | 94 + .../hw/hiroce3/include/rdma/roce_wqe_format.h | 825 + .../hw/hiroce3/include/rdma/roce_xqe_format.h | 500 + .../infiniband/hw/hiroce3/include/readme.txt | 1 + .../hw/hiroce3/include/roce_cdev_extension.h | 20 + .../hw/hiroce3/include/roce_event_extension.h | 20 + .../hw/hiroce3/include/roce_main_extension.h | 84 + .../hw/hiroce3/include/roce_mr_extension.h | 24 + .../hiroce3/include/roce_netdev_extension.h | 26 + .../hw/hiroce3/include/roce_qp_extension.h | 69 + .../include/roce_qp_post_send_extension.h | 24 + .../hw/hiroce3/include/roce_srq_extension.h | 20 + drivers/infiniband/hw/hiroce3/mr/roce_mr.c | 1305 + drivers/infiniband/hw/hiroce3/mr/roce_mr.h | 105 + drivers/infiniband/hw/hiroce3/qp/roce_post.h | 198 + drivers/infiniband/hw/hiroce3/qp/roce_qp.h | 255 + .../infiniband/hw/hiroce3/qp/roce_qp_create.c | 1296 + .../hw/hiroce3/qp/roce_qp_destroy.c | 289 + .../infiniband/hw/hiroce3/qp/roce_qp_exp.h | 86 + .../infiniband/hw/hiroce3/qp/roce_qp_modify.c | 2162 + .../hw/hiroce3/qp/roce_qp_post_recv.c | 253 + .../hw/hiroce3/qp/roce_qp_post_send.c | 1257 + .../infiniband/hw/hiroce3/qp/roce_qp_query.c | 386 + .../infiniband/hw/hiroce3/rdma/rdma_bitmap.c | 141 + .../infiniband/hw/hiroce3/rdma/rdma_bitmap.h | 41 + .../infiniband/hw/hiroce3/rdma/rdma_comp.c | 29 + .../infiniband/hw/hiroce3/rdma/rdma_comp.h | 138 + .../hw/hiroce3/rdma/rdma_comp_gid.c | 275 + .../hw/hiroce3/rdma/rdma_comp_init.c | 387 + .../hw/hiroce3/rdma/rdma_comp_mw_mr.c | 244 + .../infiniband/hw/hiroce3/rdma/rdma_comp_pd.c | 57 + .../hw/hiroce3/rdma/rdma_comp_res.c | 247 + drivers/infiniband/hw/hiroce3/roce.h | 635 + drivers/infiniband/hw/hiroce3/roce_cdev.c | 1218 + drivers/infiniband/hw/hiroce3/roce_cmd.c | 753 + drivers/infiniband/hw/hiroce3/roce_cmd.h | 78 + drivers/infiniband/hw/hiroce3/roce_compat.h | 60 + drivers/infiniband/hw/hiroce3/roce_cqm_cmd.c | 57 + drivers/infiniband/hw/hiroce3/roce_cqm_cmd.h | 20 + drivers/infiniband/hw/hiroce3/roce_db.c | 103 + drivers/infiniband/hw/hiroce3/roce_db.h | 36 + drivers/infiniband/hw/hiroce3/roce_event.c | 568 + drivers/infiniband/hw/hiroce3/roce_event.h | 43 + drivers/infiniband/hw/hiroce3/roce_k_ioctl.h | 96 + drivers/infiniband/hw/hiroce3/roce_main.c | 1752 + drivers/infiniband/hw/hiroce3/roce_mix.c | 1402 + drivers/infiniband/hw/hiroce3/roce_mix.h | 210 + drivers/infiniband/hw/hiroce3/roce_netdev.c | 858 + drivers/infiniband/hw/hiroce3/roce_netdev.h | 65 + drivers/infiniband/hw/hiroce3/roce_netlink.c | 368 + drivers/infiniband/hw/hiroce3/roce_netlink.h | 171 + drivers/infiniband/hw/hiroce3/roce_pd.c | 137 + drivers/infiniband/hw/hiroce3/roce_pd.h | 31 + drivers/infiniband/hw/hiroce3/roce_sysfs.c | 1787 + drivers/infiniband/hw/hiroce3/roce_sysfs.h | 115 + drivers/infiniband/hw/hiroce3/roce_user.h | 72 + drivers/infiniband/hw/hiroce3/roce_xrc.c | 203 + drivers/infiniband/hw/hiroce3/roce_xrc.h | 30 + drivers/infiniband/hw/hiroce3/srq/roce_srq.h | 204 + .../infiniband/hw/hiroce3/srq/roce_srq_comm.c | 97 + .../hw/hiroce3/srq/roce_srq_create.c | 710 + .../infiniband/hw/hiroce3/srq/roce_srq_ctrl.c | 634 + drivers/net/ethernet/huawei/hinic3/Makefile | 26 +- .../ethernet/huawei/hinic3/bond/hinic3_bond.c | 1054 + .../ethernet/huawei/hinic3/bond/hinic3_bond.h | 96 + .../ethernet/huawei/hinic3/comm_msg_intf.h | 565 +- .../ethernet/huawei/hinic3/cqm/cqm_bat_cla.c | 2062 + .../ethernet/huawei/hinic3/cqm/cqm_bat_cla.h | 215 + .../huawei/hinic3/cqm/cqm_bitmap_table.c | 1461 + .../huawei/hinic3/cqm/cqm_bitmap_table.h | 67 + .../huawei/hinic3/cqm/cqm_bloomfilter.c | 521 + .../huawei/hinic3/cqm/cqm_bloomfilter.h | 53 + .../net/ethernet/huawei/hinic3/cqm/cqm_cmd.c | 202 + .../net/ethernet/huawei/hinic3/cqm/cqm_cmd.h | 39 + .../net/ethernet/huawei/hinic3/cqm/cqm_db.c | 479 + .../net/ethernet/huawei/hinic3/cqm/cqm_db.h | 36 + .../ethernet/huawei/hinic3/cqm/cqm_define.h | 54 + .../net/ethernet/huawei/hinic3/cqm/cqm_main.c | 1685 + .../net/ethernet/huawei/hinic3/cqm/cqm_main.h | 426 + .../ethernet/huawei/hinic3/cqm/cqm_memsec.c | 674 + .../ethernet/huawei/hinic3/cqm/cqm_memsec.h | 23 + .../ethernet/huawei/hinic3/cqm/cqm_object.c | 1539 + .../ethernet/huawei/hinic3/cqm/cqm_object.h | 715 + .../huawei/hinic3/cqm/cqm_object_intern.c | 1459 + .../huawei/hinic3/cqm/cqm_object_intern.h | 93 + .../net/ethernet/huawei/hinic3/cqm/readme.txt | 3 + .../huawei/hinic3/hw/hinic3_api_cmd.h | 42 +- .../ethernet/huawei/hinic3/hw/hinic3_cmdq.c | 63 +- .../ethernet/huawei/hinic3/hw/hinic3_cmdq.h | 38 +- .../ethernet/huawei/hinic3/hw/hinic3_csr.h | 1 + .../huawei/hinic3/hw/hinic3_devlink.c | 46 +- .../huawei/hinic3/hw/hinic3_devlink.h | 24 + .../ethernet/huawei/hinic3/hw/hinic3_eqs.c | 57 +- .../ethernet/huawei/hinic3/hw/hinic3_eqs.h | 4 +- .../ethernet/huawei/hinic3/hw/hinic3_hw_cfg.c | 153 +- .../ethernet/huawei/hinic3/hw/hinic3_hw_cfg.h | 15 +- .../huawei/hinic3/hw/hinic3_hw_comm.c | 152 +- .../huawei/hinic3/hw/hinic3_hw_comm.h | 2 +- .../ethernet/huawei/hinic3/hw/hinic3_hw_mt.c | 43 +- .../ethernet/huawei/hinic3/hw/hinic3_hwdev.c | 232 +- .../ethernet/huawei/hinic3/hw/hinic3_hwdev.h | 35 +- .../ethernet/huawei/hinic3/hw/hinic3_hwif.c | 54 + .../ethernet/huawei/hinic3/hw/hinic3_mbox.c | 122 +- .../ethernet/huawei/hinic3/hw/hinic3_mbox.h | 82 +- .../ethernet/huawei/hinic3/hw/hinic3_mgmt.c | 83 +- .../ethernet/huawei/hinic3/hw/hinic3_mgmt.h | 27 +- .../huawei/hinic3/hw/hinic3_multi_host_mgmt.c | 1226 + .../huawei/hinic3/hw/hinic3_multi_host_mgmt.h | 124 + .../huawei/hinic3/hw/hinic3_pci_id_tbl.h | 36 +- .../huawei/hinic3/hw/ossl_knl_linux.c | 210 +- .../net/ethernet/huawei/hinic3/hw/readme.txt | 10 + .../hinic3/include/bond/bond_common_defs.h | 115 + .../include/cfg_mgmt/cfg_mgmt_mpu_cmd.h | 15 + .../include/cfg_mgmt/cfg_mgmt_mpu_cmd_defs.h | 215 + .../huawei/hinic3/include/cqm/cqm_npu_cmd.h | 25 + .../hinic3/include/cqm/cqm_npu_cmd_defs.h | 65 + .../huawei/hinic3/include/hinic3_common.h | 203 + .../huawei/hinic3/include/hinic3_cqm.h | 848 + .../huawei/hinic3/include/hinic3_cqm_define.h | 52 + .../huawei/hinic3/{ => include}/hinic3_crm.h | 119 +- .../huawei/hinic3/{ => include}/hinic3_hw.h | 74 +- .../huawei/hinic3/include/hinic3_lld.h | 225 + .../huawei/hinic3/include/hinic3_mt.h | 826 + .../huawei/hinic3/include/hinic3_profile.h | 148 + .../huawei/hinic3/include/hinic3_wq.h | 162 + .../ethernet/huawei/hinic3/include/hiudk3.h | 81 + .../huawei/hinic3/include/hiudk3_common.h | 38 + .../huawei/hinic3/include/hiudk3_cqm.h | 786 + .../huawei/hinic3/include/hiudk3_crm.h | 489 + .../huawei/hinic3/include/hiudk3_crm_adapt.h | 646 + .../huawei/hinic3/include/hiudk3_hw.h | 665 + .../huawei/hinic3/include/hiudk3_lld.h | 196 + .../huawei/hinic3/include/hiudk3_wq.h | 122 + .../huawei/hinic3/include/hiudk_adpt.h | 213 + .../hinic3/include/hiudk_sdk_cqm_adpt.h | 460 + .../huawei/hinic3/include/hiudk_sdk_crm.h | 335 + .../hinic3/include/hiudk_sdk_crm_adpt.h | 726 + .../huawei/hinic3/include/hiudk_sdk_hw_adpt.h | 337 + .../hinic3/include/hiudk_sdk_hw_comm_adpt.h | 412 + .../hinic3/include/mpu/mpu_board_defs.h | 75 + .../hinic3/include/mpu/mpu_cmd_base_defs.h | 122 + .../hinic3/include/mpu/mpu_inband_cmd.h | 184 + .../hinic3/include/mpu/mpu_inband_cmd_defs.h | 1150 + .../hinic3/include/mpu/mpu_outband_mctp_cmd.h | 35 + .../include/mpu/mpu_outband_mctp_cmd_defs.h | 162 + .../hinic3/include/mpu/mpu_outband_ncsi_cmd.h | 196 + .../include/mpu/mpu_outband_ncsi_cmd_defs.h | 1683 + .../include/mpu/mpu_outband_smbus_cmd.h | 56 + .../include/mpu/mpu_outband_smbus_cmd_defs.h | 289 + .../huawei/hinic3/include/ossl_ctype_ex.h | 202 + .../huawei/hinic3/{ => include}/ossl_knl.h | 5 + .../huawei/hinic3/include/ossl_types.h | 173 + .../huawei/hinic3/include/ossl_user.h | 91 + .../include/public/npu_cmdq_base_defs.h | 241 + .../ethernet/huawei/hinic3/include/readme.txt | 1 + .../hinic3/include/vmsec/vmsec_mpu_common.h | 139 + .../huawei/hinic3/include/vram_common.h | 91 + .../ethernet/huawei/hinic3/ossl_knl_linux.h | 1117 +- 412 files changed, 532031 insertions(+), 1013 deletions(-) create mode 100644 drivers/infiniband/hw/hiroce3/Kconfig create mode 100755 drivers/infiniband/hw/hiroce3/Makefile create mode 100644 drivers/infiniband/hw/hiroce3/bond/roce_bond.h create mode 100644 drivers/infiniband/hw/hiroce3/bond/roce_bond_common.c create mode 100644 drivers/infiniband/hw/hiroce3/cq/roce_cq.h create mode 100644 drivers/infiniband/hw/hiroce3/cq/roce_cq_common.c create mode 100644 drivers/infiniband/hw/hiroce3/cq/roce_cq_cqe.c create mode 100644 drivers/infiniband/hw/hiroce3/cq/roce_cq_create.c create mode 100644 drivers/infiniband/hw/hiroce3/cq/roce_cq_ctrl.c create mode 100644 drivers/infiniband/hw/hiroce3/cq/roce_cq_destroy.c create mode 100644 drivers/infiniband/hw/hiroce3/dfx/roce_dfx.c create mode 100644 drivers/infiniband/hw/hiroce3/dfx/roce_dfx.h create mode 100644 drivers/infiniband/hw/hiroce3/dfx/roce_dfx_cap.c create mode 100644 drivers/infiniband/hw/hiroce3/dfx/roce_dfx_cap.h create mode 100644 drivers/infiniband/hw/hiroce3/dfx/roce_dfx_query.c create mode 100644 drivers/infiniband/hw/hiroce3/extension/roce_cdev_extension.c create mode 100644 drivers/infiniband/hw/hiroce3/extension/roce_event_extension.c create mode 100644 drivers/infiniband/hw/hiroce3/extension/roce_main_extension.c create mode 100644 drivers/infiniband/hw/hiroce3/extension/roce_mr_extension.c create mode 100644 drivers/infiniband/hw/hiroce3/extension/roce_netdev_extension.c create mode 100755 drivers/infiniband/hw/hiroce3/extension/roce_qp_extension.c create mode 100644 drivers/infiniband/hw/hiroce3/extension/roce_qp_post_send_extension.c create mode 100644 drivers/infiniband/hw/hiroce3/extension/roce_srq_extension.c create mode 100644 drivers/infiniband/hw/hiroce3/host/crypt/hisec_cfg.c create mode 100644 drivers/infiniband/hw/hiroce3/host/crypt/hisec_cfg.h create mode 100644 drivers/infiniband/hw/hiroce3/host/crypt/hisec_hwrand.c create mode 100644 drivers/infiniband/hw/hiroce3/host/crypt/hisec_hwrand.h create mode 100644 drivers/infiniband/hw/hiroce3/host/crypt/linux/kernel/hisec_crypt_dev.h create mode 100644 drivers/infiniband/hw/hiroce3/host/crypt/linux/kernel/hisec_crypt_main.c create mode 100644 drivers/infiniband/hw/hiroce3/host/crypt/readme.txt create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_buddy.c create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_buddy.h create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_comp.c create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_comp.h create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_comp_init.c create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_comp_mtt.c create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_comp_mw_mr.c create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_comp_res.c create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_em.c create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_em.h create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_mr.c create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_mr.h create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_umem.c create mode 100644 drivers/infiniband/hw/hiroce3/host/hmm/hmm_umem.h create mode 100644 drivers/infiniband/hw/hiroce3/host/mt/hinic3_devlink.c create mode 100644 drivers/infiniband/hw/hiroce3/host/mt/hinic3_devlink.h create mode 100644 drivers/infiniband/hw/hiroce3/host/mt/hinic3_hw_mt.c create mode 100644 drivers/infiniband/hw/hiroce3/host/mt/hinic3_hw_mt.h create mode 100644 drivers/infiniband/hw/hiroce3/host/mt/hinic3_nictool.c create mode 100644 drivers/infiniband/hw/hiroce3/host/mt/hinic3_nictool.h create mode 100644 drivers/infiniband/hw/hiroce3/host/mt/readme.txt create mode 100644 drivers/infiniband/hw/hiroce3/host/vram/vram_common.c create mode 100644 drivers/infiniband/hw/hiroce3/include/crypt/hisec_mpu_cmd.h create mode 100644 drivers/infiniband/hw/hiroce3/include/crypt/hisec_mpu_cmd_defs.h create mode 100644 drivers/infiniband/hw/hiroce3/include/crypt/hisec_npu_cmd.h create mode 100644 drivers/infiniband/hw/hiroce3/include/crypt/hisec_npu_cmd_defs.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hinic3_hmm.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hinic3_rdma.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hinic3_srv_nic.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/db_srv_type_pub.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/node_id.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/cnb_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/cnb_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/cpb_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/cpb_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/cpi_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/cpi_dfx_glb_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/cpi_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/crypto_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/crypto_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/esch_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/esch_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/hi1823_csr_sm_addr_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/hi1823_csr_sm_typedef.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/hinic3_csr_addr_common.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/icdq_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/icdq_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/ipsurx_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/ipsurx_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/ipsurx_typedef.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/ipsutx_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/ipsutx_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/lcam_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/lcam_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/mqm_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/mqm_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/oq_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/oq_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/pe_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/pe_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/pqm_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/pqm_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/prmrx_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/prmrx_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/prmtx_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/prmtx_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/ring_cnb_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/ring_cnb_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/sm_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/sm_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stffq_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stffq_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stfiq_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stfiq_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stfisch_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stfisch_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stlfq_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stlfq_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stliq_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stliq_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stlisch_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/stlisch_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/tile_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/tile_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/virtio_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/infra/virtio_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/c_union_define_mag_top.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/c_union_define_smag_cfg.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/hi1822_csr_mag_offset_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_an_lth60_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_com_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_mib_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_rx_brfec_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_rx_mac_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_rx_pcs_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_rx_rsfec_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_rxpma_core_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_rxpma_lane_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_tx_brfec_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_tx_mac_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_tx_pcs_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_tx_rsfec_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_txpma_core_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mac_reg_txpma_lane_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mag_fc_sds_harden_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/mag_top_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mag/smag_cfg_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/misc/sfc_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/misc/sfc_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mpu/c_union_define_crg.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mpu/crg_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mpu/mpu_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mpu/mpu_harden_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mpu/mpu_harden_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/mpu/mpu_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/pcie/hva_peh_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/pcie/hva_peh_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/pcie/pcie5_ap_addr_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/pcie/pcie5_ap_typedef.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/pcie/pcie5_core_addr_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/pcie/pcie5_core_typedef.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/pcie/pcie5_pcs_addr_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/pcie/pcie5_pcs_typedef.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/rxtx/apb2ff_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/rxtx/c_union_define_apb2ff.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/mag_harden_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/mag_harden_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/pcie_harden_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/pcie_harden_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/smf0_harden_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/smf0_harden_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/stlqu_harden_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/stlqu_harden_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/top_cpb_harden_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/top_encryp_decryp_harden_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/top_encryp_decryp_harden_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/top/top_iocfg_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/arm_ras_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/avs_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/ddrc_arm_ras_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/ddrc_dmc_c_union_def.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/ddrc_dmc_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/ddrc_rasc_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/ddrc_rasc_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/efuse_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/fabric_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/fabric_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/hha_c_union_def.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/hva_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/hva_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/hva_sm23_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/hva_sm23_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/hva_smf_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/hva_smf_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/mbigen_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/mbigen_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/pcie4_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/pcie4_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/phosphor_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/phosphor_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/plat_efuse.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/ras_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/ras_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/sioe_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/sllc_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/smmu_c_union_define.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/smmu_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/register/totem/sysctrl_reg_offset.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/service_type_pub.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/smf_cache_type.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/smf_instance_id.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_cloud.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_compute_dpu.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_compute_roce.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_compute_standard.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_fpga.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_llt.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_storage_fc.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_storage_fc_adapt.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_storage_roce.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_storage_roceaa.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_define_storage_toe.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/sml_table_pub.h create mode 100644 drivers/infiniband/hw/hiroce3/include/hw/tile_spec.h create mode 100644 drivers/infiniband/hw/hiroce3/include/mag/mag_mpu_cmd.h create mode 100644 drivers/infiniband/hw/hiroce3/include/mag/mag_mpu_cmd_defs.h create mode 100644 drivers/infiniband/hw/hiroce3/include/micro_log/hinic3_micro_log.c create mode 100644 drivers/infiniband/hw/hiroce3/include/micro_log/hinic3_micro_log.h create mode 100644 drivers/infiniband/hw/hiroce3/include/nic/nic_cfg_comm.h create mode 100644 drivers/infiniband/hw/hiroce3/include/nic/nic_mpu_cmd.h create mode 100644 drivers/infiniband/hw/hiroce3/include/nic/nic_mpu_cmd_defs.h create mode 100644 drivers/infiniband/hw/hiroce3/include/nic/nic_npu_cmd.h create mode 100644 drivers/infiniband/hw/hiroce3/include/nic/nic_npu_cmd_defs.h create mode 100644 drivers/infiniband/hw/hiroce3/include/nic/nic_npu_wqe_defs.h create mode 100644 drivers/infiniband/hw/hiroce3/include/public/npu_cmdq_base_defs.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/rdma_context_format.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/rdma_ext_ctx_format.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_ccf_format.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_compile_macro.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_ctx_api.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_dif_format.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_err_type.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_hmm_context.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_mpu_common.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_mpu_ulp_common.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_pub.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_pub_cmd.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_ulp.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_vbs_format.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_attr.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_attr_qpc_chip.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_cmd.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_cq_attr.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_ext_attr.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_format.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_gid_attr.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_mr_attr.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_pub.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_srq_attr.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_verbs_ulp_format.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_wqe_format.h create mode 100644 drivers/infiniband/hw/hiroce3/include/rdma/roce_xqe_format.h create mode 100644 drivers/infiniband/hw/hiroce3/include/readme.txt create mode 100644 drivers/infiniband/hw/hiroce3/include/roce_cdev_extension.h create mode 100644 drivers/infiniband/hw/hiroce3/include/roce_event_extension.h create mode 100644 drivers/infiniband/hw/hiroce3/include/roce_main_extension.h create mode 100644 drivers/infiniband/hw/hiroce3/include/roce_mr_extension.h create mode 100644 drivers/infiniband/hw/hiroce3/include/roce_netdev_extension.h create mode 100644 drivers/infiniband/hw/hiroce3/include/roce_qp_extension.h create mode 100644 drivers/infiniband/hw/hiroce3/include/roce_qp_post_send_extension.h create mode 100644 drivers/infiniband/hw/hiroce3/include/roce_srq_extension.h create mode 100755 drivers/infiniband/hw/hiroce3/mr/roce_mr.c create mode 100644 drivers/infiniband/hw/hiroce3/mr/roce_mr.h create mode 100644 drivers/infiniband/hw/hiroce3/qp/roce_post.h create mode 100644 drivers/infiniband/hw/hiroce3/qp/roce_qp.h create mode 100755 drivers/infiniband/hw/hiroce3/qp/roce_qp_create.c create mode 100644 drivers/infiniband/hw/hiroce3/qp/roce_qp_destroy.c create mode 100644 drivers/infiniband/hw/hiroce3/qp/roce_qp_exp.h create mode 100755 drivers/infiniband/hw/hiroce3/qp/roce_qp_modify.c create mode 100644 drivers/infiniband/hw/hiroce3/qp/roce_qp_post_recv.c create mode 100644 drivers/infiniband/hw/hiroce3/qp/roce_qp_post_send.c create mode 100644 drivers/infiniband/hw/hiroce3/qp/roce_qp_query.c create mode 100644 drivers/infiniband/hw/hiroce3/rdma/rdma_bitmap.c create mode 100644 drivers/infiniband/hw/hiroce3/rdma/rdma_bitmap.h create mode 100644 drivers/infiniband/hw/hiroce3/rdma/rdma_comp.c create mode 100644 drivers/infiniband/hw/hiroce3/rdma/rdma_comp.h create mode 100644 drivers/infiniband/hw/hiroce3/rdma/rdma_comp_gid.c create mode 100644 drivers/infiniband/hw/hiroce3/rdma/rdma_comp_init.c create mode 100644 drivers/infiniband/hw/hiroce3/rdma/rdma_comp_mw_mr.c create mode 100644 drivers/infiniband/hw/hiroce3/rdma/rdma_comp_pd.c create mode 100644 drivers/infiniband/hw/hiroce3/rdma/rdma_comp_res.c create mode 100755 drivers/infiniband/hw/hiroce3/roce.h create mode 100755 drivers/infiniband/hw/hiroce3/roce_cdev.c create mode 100755 drivers/infiniband/hw/hiroce3/roce_cmd.c create mode 100755 drivers/infiniband/hw/hiroce3/roce_cmd.h create mode 100644 drivers/infiniband/hw/hiroce3/roce_compat.h create mode 100644 drivers/infiniband/hw/hiroce3/roce_cqm_cmd.c create mode 100644 drivers/infiniband/hw/hiroce3/roce_cqm_cmd.h create mode 100755 drivers/infiniband/hw/hiroce3/roce_db.c create mode 100644 drivers/infiniband/hw/hiroce3/roce_db.h create mode 100644 drivers/infiniband/hw/hiroce3/roce_event.c create mode 100644 drivers/infiniband/hw/hiroce3/roce_event.h create mode 100755 drivers/infiniband/hw/hiroce3/roce_k_ioctl.h create mode 100755 drivers/infiniband/hw/hiroce3/roce_main.c create mode 100755 drivers/infiniband/hw/hiroce3/roce_mix.c create mode 100755 drivers/infiniband/hw/hiroce3/roce_mix.h create mode 100644 drivers/infiniband/hw/hiroce3/roce_netdev.c create mode 100644 drivers/infiniband/hw/hiroce3/roce_netdev.h create mode 100755 drivers/infiniband/hw/hiroce3/roce_netlink.c create mode 100644 drivers/infiniband/hw/hiroce3/roce_netlink.h create mode 100644 drivers/infiniband/hw/hiroce3/roce_pd.c create mode 100644 drivers/infiniband/hw/hiroce3/roce_pd.h create mode 100755 drivers/infiniband/hw/hiroce3/roce_sysfs.c create mode 100644 drivers/infiniband/hw/hiroce3/roce_sysfs.h create mode 100644 drivers/infiniband/hw/hiroce3/roce_user.h create mode 100644 drivers/infiniband/hw/hiroce3/roce_xrc.c create mode 100644 drivers/infiniband/hw/hiroce3/roce_xrc.h create mode 100644 drivers/infiniband/hw/hiroce3/srq/roce_srq.h create mode 100644 drivers/infiniband/hw/hiroce3/srq/roce_srq_comm.c create mode 100644 drivers/infiniband/hw/hiroce3/srq/roce_srq_create.c create mode 100644 drivers/infiniband/hw/hiroce3/srq/roce_srq_ctrl.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/Makefile create mode 100755 drivers/net/ethernet/huawei/hinic3/bond/hinic3_bond.c create mode 100755 drivers/net/ethernet/huawei/hinic3/bond/hinic3_bond.h mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/comm_msg_intf.h create mode 100755 drivers/net/ethernet/huawei/hinic3/cqm/cqm_bat_cla.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_bat_cla.h create mode 100755 drivers/net/ethernet/huawei/hinic3/cqm/cqm_bitmap_table.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_bitmap_table.h create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_bloomfilter.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_bloomfilter.h create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_cmd.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_db.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_db.h create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_define.h create mode 100755 drivers/net/ethernet/huawei/hinic3/cqm/cqm_main.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_main.h create mode 100755 drivers/net/ethernet/huawei/hinic3/cqm/cqm_memsec.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_memsec.h create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_object.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_object.h create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_object_intern.c create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/cqm_object_intern.h create mode 100644 drivers/net/ethernet/huawei/hinic3/cqm/readme.txt mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_cmdq.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_cmdq.h mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_devlink.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_eqs.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_hw_cfg.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_hw_comm.c mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/hw/hinic3_hwdev.c create mode 100644 drivers/net/ethernet/huawei/hinic3/hw/hinic3_multi_host_mgmt.c create mode 100644 drivers/net/ethernet/huawei/hinic3/hw/hinic3_multi_host_mgmt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/hw/readme.txt create mode 100644 drivers/net/ethernet/huawei/hinic3/include/bond/bond_common_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/cfg_mgmt/cfg_mgmt_mpu_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/cfg_mgmt/cfg_mgmt_mpu_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/cqm/cqm_npu_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/cqm/cqm_npu_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_common.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_cqm.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_cqm_define.h rename drivers/net/ethernet/huawei/hinic3/{ => include}/hinic3_crm.h (90%) mode change 100644 => 100755 rename drivers/net/ethernet/huawei/hinic3/{ => include}/hinic3_hw.h (94%) create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_lld.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_mt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_profile.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hinic3_wq.h create mode 100755 drivers/net/ethernet/huawei/hinic3/include/hiudk3.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_common.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_cqm.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_crm.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_crm_adapt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_hw.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_lld.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk3_wq.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk_adpt.h create mode 100755 drivers/net/ethernet/huawei/hinic3/include/hiudk_sdk_cqm_adpt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk_sdk_crm.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk_sdk_crm_adpt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk_sdk_hw_adpt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/hiudk_sdk_hw_comm_adpt.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_board_defs.h create mode 100755 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_cmd_base_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_inband_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_inband_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_mctp_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_mctp_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_ncsi_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_ncsi_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_smbus_cmd.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/mpu/mpu_outband_smbus_cmd_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/ossl_ctype_ex.h rename drivers/net/ethernet/huawei/hinic3/{ => include}/ossl_knl.h (93%) mode change 100644 => 100755 create mode 100644 drivers/net/ethernet/huawei/hinic3/include/ossl_types.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/ossl_user.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/public/npu_cmdq_base_defs.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/readme.txt create mode 100644 drivers/net/ethernet/huawei/hinic3/include/vmsec/vmsec_mpu_common.h create mode 100644 drivers/net/ethernet/huawei/hinic3/include/vram_common.h mode change 100644 => 100755 drivers/net/ethernet/huawei/hinic3/ossl_knl_linux.h -- 2.33.0

1 2

[PATCH OLK-5.10] fbdev: sis: Error out if pixclock equals zero
by Jinjiang Tu 09 Apr '24

09 Apr '24

From: Fullway Wang <fullwaywang(a)outlook.com> stable inclusion from stable-v5.10.211 commit cd36da760bd1f78c63c7078407baf01dd724f313 category: bugfix bugzilla: https://gitee.com/src-openeuler/kernel/issues/I9E2MG CVE: CVE-2024-26777 Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id… -------------------------------- [ Upstream commit e421946be7d9bf545147bea8419ef8239cb7ca52 ] The userspace program could pass any values to the driver through ioctl() interface. If the driver doesn't check the value of pixclock, it may cause divide-by-zero error. In sisfb_check_var(), var->pixclock is used as a divisor to caculate drate before it is checked against zero. Fix this by checking it at the beginning. This is similar to CVE-2022-3061 in i740fb which was fixed by commit 15cf0b8. Signed-off-by: Fullway Wang <fullwaywang(a)outlook.com> Signed-off-by: Helge Deller <deller(a)gmx.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> Signed-off-by: Jinjiang Tu <tujinjiang(a)huawei.com> --- drivers/video/fbdev/sis/sis_main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/fbdev/sis/sis_main.c b/drivers/video/fbdev/sis/sis_main.c index 03c736f6f3d0..e540cb0c5172 100644 --- a/drivers/video/fbdev/sis/sis_main.c +++ b/drivers/video/fbdev/sis/sis_main.c @@ -1474,6 +1474,8 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) vtotal = var->upper_margin + var->lower_margin + var->vsync_len; + if (!var->pixclock) + return -EINVAL; pixclock = var->pixclock; if((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) { -- 2.25.1

2 1

[PATCH openEuler-1.0-LTS] fbdev: sis: Error out if pixclock equals zero
by Jinjiang Tu 09 Apr '24

09 Apr '24

From: Fullway Wang <fullwaywang(a)outlook.com> stable inclusion from stable-v4.19.308 commit 84246c35ca34207114055a87552a1c4289c8fd7e category: bugfix bugzilla: https://gitee.com/src-openeuler/kernel/issues/I9E2MG CVE: CVE-2024-26777 Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id… -------------------------------- [ Upstream commit e421946be7d9bf545147bea8419ef8239cb7ca52 ] The userspace program could pass any values to the driver through ioctl() interface. If the driver doesn't check the value of pixclock, it may cause divide-by-zero error. In sisfb_check_var(), var->pixclock is used as a divisor to caculate drate before it is checked against zero. Fix this by checking it at the beginning. This is similar to CVE-2022-3061 in i740fb which was fixed by commit 15cf0b8. Signed-off-by: Fullway Wang <fullwaywang(a)outlook.com> Signed-off-by: Helge Deller <deller(a)gmx.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> Signed-off-by: Jinjiang Tu <tujinjiang(a)huawei.com> --- drivers/video/fbdev/sis/sis_main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/fbdev/sis/sis_main.c b/drivers/video/fbdev/sis/sis_main.c index 20aff9005978..b7f9da690db2 100644 --- a/drivers/video/fbdev/sis/sis_main.c +++ b/drivers/video/fbdev/sis/sis_main.c @@ -1488,6 +1488,8 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) vtotal = var->upper_margin + var->lower_margin + var->vsync_len; + if (!var->pixclock) + return -EINVAL; pixclock = var->pixclock; if((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) { -- 2.25.1

2 1

[PATCH openEuler-1.0-LTS 0/1] CVE-2021-47144
by Liu Mingrui 09 Apr '24

09 Apr '24

CVE-2021-47144 Jingwen Chen (1): drm/amd/amdgpu: fix refcount leak drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.25.1

2 2

[PATCH openEuler-1.0-LTS 0/1] CVE-2021-47144
by Liu Mingrui 09 Apr '24

09 Apr '24

CVE-2021-47144 Jingwen Chen (1): drm/amd/amdgpu: fix refcount leak drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.25.1

2 2

[openeuler:openEuler-1.0-LTS 21385/22056] drivers/tee/optee/core.c:618:31: sparse: sparse: incorrect type in return expression (different base types)
by kernel test robot 09 Apr '24

09 Apr '24

Hi Ard, First bad commit (maybe != root cause): tree: https://gitee.com/openeuler/kernel.git openEuler-1.0-LTS head: 11b92ddca3376d425d16b81adebee1e8033e3df0 commit: 595311cf7e49c781dd26782e4b45fd54bbfb3e40 [21385/22056] optee: model OP-TEE as a platform device/driver config: arm64-randconfig-r111-20240331 (https://download.01.org/0day-ci/archive/20240409/202404091014.UzbOQtd8-lkp@…) compiler: aarch64-linux-gcc (GCC) 13.2.0 reproduce: (https://download.01.org/0day-ci/archive/20240409/202404091014.UzbOQtd8-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202404091014.UzbOQtd8-lkp@intel.com/ sparse warnings: (new ones prefixed by >>) >> drivers/tee/optee/core.c:618:31: sparse: sparse: incorrect type in return expression (different base types) @@ expected int @@ got void * @@ drivers/tee/optee/core.c:618:31: sparse: expected int drivers/tee/optee/core.c:618:31: sparse: got void * drivers/tee/optee/core.c: In function 'optee_probe': drivers/tee/optee/core.c:618:24: warning: returning 'void *' from a function with return type 'int' makes integer from pointer without a cast [-Wint-conversion] 618 | return ERR_PTR(-EINVAL); | ^~~~~~~~~~~~~~~~ vim +618 drivers/tee/optee/core.c 595311cf7e49c7 Ard Biesheuvel 2019-12-09 581 595311cf7e49c7 Ard Biesheuvel 2019-12-09 582 static int optee_probe(struct platform_device *pdev) 4fb0a5eb364d23 Jens Wiklander 2015-04-14 583 { 4fb0a5eb364d23 Jens Wiklander 2015-04-14 584 optee_invoke_fn *invoke_fn; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 585 struct tee_shm_pool *pool; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 586 struct optee *optee = NULL; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 587 void *memremaped_shm = NULL; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 588 struct tee_device *teedev; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 589 u32 sec_caps; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 590 int rc; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 591 595311cf7e49c7 Ard Biesheuvel 2019-12-09 592 invoke_fn = get_invoke_func(&pdev->dev); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 593 if (IS_ERR(invoke_fn)) 595311cf7e49c7 Ard Biesheuvel 2019-12-09 594 return PTR_ERR(invoke_fn); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 595 4fb0a5eb364d23 Jens Wiklander 2015-04-14 596 if (!optee_msg_api_uid_is_optee_api(invoke_fn)) { 4fb0a5eb364d23 Jens Wiklander 2015-04-14 597 pr_warn("api uid mismatch\n"); 595311cf7e49c7 Ard Biesheuvel 2019-12-09 598 return -EINVAL; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 599 } 4fb0a5eb364d23 Jens Wiklander 2015-04-14 600 5c5f80307ab27c Jérôme Forissier 2017-11-24 601 optee_msg_get_os_revision(invoke_fn); 5c5f80307ab27c Jérôme Forissier 2017-11-24 602 4fb0a5eb364d23 Jens Wiklander 2015-04-14 603 if (!optee_msg_api_revision_is_compatible(invoke_fn)) { 4fb0a5eb364d23 Jens Wiklander 2015-04-14 604 pr_warn("api revision mismatch\n"); 595311cf7e49c7 Ard Biesheuvel 2019-12-09 605 return -EINVAL; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 606 } 4fb0a5eb364d23 Jens Wiklander 2015-04-14 607 4fb0a5eb364d23 Jens Wiklander 2015-04-14 608 if (!optee_msg_exchange_capabilities(invoke_fn, &sec_caps)) { 4fb0a5eb364d23 Jens Wiklander 2015-04-14 609 pr_warn("capabilities mismatch\n"); 595311cf7e49c7 Ard Biesheuvel 2019-12-09 610 return -EINVAL; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 611 } 4fb0a5eb364d23 Jens Wiklander 2015-04-14 612 4fb0a5eb364d23 Jens Wiklander 2015-04-14 613 /* 4fb0a5eb364d23 Jens Wiklander 2015-04-14 614 * We have no other option for shared memory, if secure world 4fb0a5eb364d23 Jens Wiklander 2015-04-14 615 * doesn't have any reserved memory we can use we can't continue. 4fb0a5eb364d23 Jens Wiklander 2015-04-14 616 */ 4fb0a5eb364d23 Jens Wiklander 2015-04-14 617 if (!(sec_caps & OPTEE_SMC_SEC_CAP_HAVE_RESERVED_SHM)) 4fb0a5eb364d23 Jens Wiklander 2015-04-14 @618 return ERR_PTR(-EINVAL); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 619 f58e236c9d665a Volodymyr Babchuk 2017-11-29 620 pool = optee_config_shm_memremap(invoke_fn, &memremaped_shm, sec_caps); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 621 if (IS_ERR(pool)) 595311cf7e49c7 Ard Biesheuvel 2019-12-09 622 return PTR_ERR(pool); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 623 4fb0a5eb364d23 Jens Wiklander 2015-04-14 624 optee = kzalloc(sizeof(*optee), GFP_KERNEL); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 625 if (!optee) { 4fb0a5eb364d23 Jens Wiklander 2015-04-14 626 rc = -ENOMEM; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 627 goto err; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 628 } 4fb0a5eb364d23 Jens Wiklander 2015-04-14 629 4fb0a5eb364d23 Jens Wiklander 2015-04-14 630 optee->invoke_fn = invoke_fn; d885cc5e0759fc Volodymyr Babchuk 2017-11-29 631 optee->sec_caps = sec_caps; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 632 4fb0a5eb364d23 Jens Wiklander 2015-04-14 633 teedev = tee_device_alloc(&optee_desc, NULL, pool, optee); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 634 if (IS_ERR(teedev)) { 4fb0a5eb364d23 Jens Wiklander 2015-04-14 635 rc = PTR_ERR(teedev); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 636 goto err; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 637 } 4fb0a5eb364d23 Jens Wiklander 2015-04-14 638 optee->teedev = teedev; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 639 4fb0a5eb364d23 Jens Wiklander 2015-04-14 640 teedev = tee_device_alloc(&optee_supp_desc, NULL, pool, optee); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 641 if (IS_ERR(teedev)) { 4fb0a5eb364d23 Jens Wiklander 2015-04-14 642 rc = PTR_ERR(teedev); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 643 goto err; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 644 } 4fb0a5eb364d23 Jens Wiklander 2015-04-14 645 optee->supp_teedev = teedev; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 646 4fb0a5eb364d23 Jens Wiklander 2015-04-14 647 rc = tee_device_register(optee->teedev); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 648 if (rc) 4fb0a5eb364d23 Jens Wiklander 2015-04-14 649 goto err; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 650 4fb0a5eb364d23 Jens Wiklander 2015-04-14 651 rc = tee_device_register(optee->supp_teedev); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 652 if (rc) 4fb0a5eb364d23 Jens Wiklander 2015-04-14 653 goto err; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 654 4fb0a5eb364d23 Jens Wiklander 2015-04-14 655 mutex_init(&optee->call_queue.mutex); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 656 INIT_LIST_HEAD(&optee->call_queue.waiters); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 657 optee_wait_queue_init(&optee->wait_queue); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 658 optee_supp_init(&optee->supp); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 659 optee->memremaped_shm = memremaped_shm; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 660 optee->pool = pool; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 661 4fb0a5eb364d23 Jens Wiklander 2015-04-14 662 optee_enable_shm_cache(optee); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 663 595311cf7e49c7 Ard Biesheuvel 2019-12-09 664 platform_set_drvdata(pdev, optee); 595311cf7e49c7 Ard Biesheuvel 2019-12-09 665 4fb0a5eb364d23 Jens Wiklander 2015-04-14 666 pr_info("initialized driver\n"); 595311cf7e49c7 Ard Biesheuvel 2019-12-09 667 return 0; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 668 err: 4fb0a5eb364d23 Jens Wiklander 2015-04-14 669 if (optee) { 4fb0a5eb364d23 Jens Wiklander 2015-04-14 670 /* 4fb0a5eb364d23 Jens Wiklander 2015-04-14 671 * tee_device_unregister() is safe to call even if the 4fb0a5eb364d23 Jens Wiklander 2015-04-14 672 * devices hasn't been registered with 4fb0a5eb364d23 Jens Wiklander 2015-04-14 673 * tee_device_register() yet. 4fb0a5eb364d23 Jens Wiklander 2015-04-14 674 */ 4fb0a5eb364d23 Jens Wiklander 2015-04-14 675 tee_device_unregister(optee->supp_teedev); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 676 tee_device_unregister(optee->teedev); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 677 kfree(optee); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 678 } 4fb0a5eb364d23 Jens Wiklander 2015-04-14 679 if (pool) 4fb0a5eb364d23 Jens Wiklander 2015-04-14 680 tee_shm_pool_free(pool); 4fb0a5eb364d23 Jens Wiklander 2015-04-14 681 if (memremaped_shm) 4fb0a5eb364d23 Jens Wiklander 2015-04-14 682 memunmap(memremaped_shm); 595311cf7e49c7 Ard Biesheuvel 2019-12-09 683 return rc; 4fb0a5eb364d23 Jens Wiklander 2015-04-14 684 } 4fb0a5eb364d23 Jens Wiklander 2015-04-14 685 :::::: The code at line 618 was first introduced by commit :::::: 4fb0a5eb364d239722e745c02aef0dbd4e0f1ad2 tee: add OP-TEE driver :::::: TO: Jens Wiklander <jens.wiklander(a)linaro.org> :::::: CC: Jens Wiklander <jens.wiklander(a)linaro.org> -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

1 0

[PATCH OLK-6.6] irqdomain: Fix driver re-inserting failures when IRQs not being freed
by Jie Zhan 09 Apr '24

09 Apr '24

driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I9ERMB ------------------------------------------------------------------------ Since commit 4615fbc3788d ("genirq/irqdomain: Don't try to free an interrupt that has no mapping"), we have found failures when re-inserting some specific drivers: [root@localhost ~]# rmmod hisi_sas_v3_hw [root@localhost ~]# modprobe hisi_sas_v3_hw [ 1295.622525] hisi_sas_v3_hw: probe of 0000:30:04.0 failed with error -2 A relevant discussion can be found at: https://lore.kernel.org/lkml/3d3d0155e66429968cb4f6b4feeae4b3@kernel.org/ This is because IRQs from a low-level domain are not freed together, leaving some leaked. Thus, the next driver insertion fails to allocate the same number of IRQs. Free a contiguous group of IRQs in one go to fix this issue. Fixes: 4615fbc3788d ("genirq/irqdomain: Don't try to free an interrupt that has no mapping") Signed-off-by: Jie Zhan <zhanjie9(a)hisilicon.com> Reviewed-by: Liao Chang <liaochang1(a)huawei.com> Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> --- kernel/irq/irqdomain.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index 0bdef4fe925b..2ec5bd39635c 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -1443,13 +1443,24 @@ static void irq_domain_free_irqs_hierarchy(struct irq_domain *domain, unsigned int nr_irqs) { unsigned int i; + int n; if (!domain->ops->free) return; for (i = 0; i < nr_irqs; i++) { - if (irq_domain_get_irq_data(domain, irq_base + i)) - domain->ops->free(domain, irq_base + i, 1); + /* Find the largest possible span of IRQs to free in one go */ + for (n = 0; + ((i + n) < nr_irqs) && + (irq_domain_get_irq_data(domain, irq_base + i + n)); + n++) + ; + + if (!n) + continue; + + domain->ops->free(domain, irq_base + i, n); + i += n; } } -- 2.30.0

3 2

[PATCH openEuler-1.0-LTS 0/1] CVE-2021-47144
by Liu Mingrui 09 Apr '24

09 Apr '24

CVE-2021-47144 Jingwen Chen (1): drm/amd/amdgpu: fix refcount leak drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.25.1

2 2

[PATCH OLK-5.10 0/4] cvm feature patches
by hejingxian 09 Apr '24

09 Apr '24

From: Jingxian He <hejingxian(a)huawei.com> Add cvm feature patches: 1. add cvm host feature 2. enable pmu phys irq inject for cvm 3. add bounce buffer feature for cvm guest 4. add lpi support for cvm guest arch/arm64/configs/defconfig | 2 + arch/arm64/configs/openeuler_defconfig | 2 + arch/arm64/include/asm/cvm_guest.h | 21 + arch/arm64/include/asm/kvm_emulate.h | 14 + arch/arm64/include/asm/kvm_host.h | 12 + arch/arm64/include/asm/kvm_tmi.h | 376 +++++++++++ arch/arm64/include/asm/kvm_tmm.h | 72 +++ arch/arm64/kvm/Kconfig | 16 + arch/arm64/kvm/Makefile | 5 + arch/arm64/kvm/arch_timer.c | 104 +++- arch/arm64/kvm/arm.c | 155 ++++- arch/arm64/kvm/cvm.c | 824 +++++++++++++++++++++++++ arch/arm64/kvm/cvm_exit.c | 229 +++++++ arch/arm64/kvm/cvm_guest.c | 90 +++ arch/arm64/kvm/guest.c | 8 + arch/arm64/kvm/hyp/vgic-v3-sr.c | 19 + arch/arm64/kvm/mmio.c | 17 +- arch/arm64/kvm/mmu.c | 7 + arch/arm64/kvm/pmu-emul.c | 9 + arch/arm64/kvm/psci.c | 12 +- arch/arm64/kvm/reset.c | 10 + arch/arm64/kvm/tmi.c | 148 +++++ arch/arm64/kvm/vgic/vgic-v3.c | 16 +- arch/arm64/kvm/vgic/vgic.c | 52 +- arch/arm64/mm/mmu.c | 11 + arch/arm64/mm/pageattr.c | 9 +- drivers/irqchip/irq-gic-v3-its.c | 228 ++++++- drivers/perf/arm_pmu.c | 17 + include/kvm/arm_arch_timer.h | 4 + include/linux/kvm_host.h | 21 + include/linux/perf/arm_pmu.h | 3 + include/linux/swiotlb.h | 13 + include/uapi/linux/kvm.h | 29 + kernel/dma/direct.c | 39 ++ kernel/dma/swiotlb.c | 86 ++- virt/kvm/kvm_main.c | 7 +- 36 files changed, 2646 insertions(+), 41 deletions(-) create mode 100644 arch/arm64/include/asm/cvm_guest.h create mode 100644 arch/arm64/include/asm/kvm_tmi.h create mode 100644 arch/arm64/include/asm/kvm_tmm.h create mode 100644 arch/arm64/kvm/cvm.c create mode 100644 arch/arm64/kvm/cvm_exit.c create mode 100644 arch/arm64/kvm/cvm_guest.c create mode 100644 arch/arm64/kvm/tmi.c -- 2.33.0

2 5

[PATCH OLK-6.6 v2 00/15] Support NMI in the virtual machine
by chenxiang 09 Apr '24

09 Apr '24

From: caijian <caijian11(a)h-partners.com> The patches support for nmi in the virtual machine. https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?… Marc Zyngier (15): KVM: arm64: vgic-v3: Upgrade AP1Rn to 64bit. KVM: arm64: vgic-v3: Allow the NMI state to make it into the LRs KVM: arm64: vgic-v3: Make NMI priority RES0 KVM: arm64: vgic-v4: Propagate the NMI state into the GICv4.1 VSGI configuration KVM: arm64: vgic-v3: Use the NMI attribute as part of the AP-list sorting KVM: arm64: vgic-v3: Add support for GIC{D,R}_INMIR registers KVM: arm64: vgic-v3: Add userspace selection for GICv3.3 NMI KVM: arm64: vgic-debug: Add the NMI field to the debug output KVM: arm64: Allow userspace to control ID_AA64PFR1_EL1.NMI KVM: arm64: Don't trap ALLINT accesses if the vcpu has FEAT_NMI KVM: arm64: vgic-v3: Don't inject an NMI if the vcpu doesn't have FEAT_NMI KVM: arm64: Allow GICv3.3 NMI if the host supports it KVM: arm64: Handle traps of ALLINT arm64: Decouple KVM from CONFIG_ARM64_NMI KVM: arm64: vgic-v3: Handle traps of ICV_NMIAR1_EL1 arch/arm64/include/asm/cpufeature.h | 3 +- arch/arm64/include/asm/kvm_host.h | 2 + arch/arm64/include/asm/sysreg.h | 3 ++ arch/arm64/kernel/cpufeature.c | 13 +++-- arch/arm64/kvm/arm.c | 3 ++ arch/arm64/kvm/hyp/include/hyp/switch.h | 6 ++- arch/arm64/kvm/hyp/vgic-v3-sr.c | 14 +++-- arch/arm64/kvm/sys_regs.c | 33 +++++++++++- arch/arm64/kvm/vgic/vgic-debug.c | 9 ++-- arch/arm64/kvm/vgic/vgic-init.c | 10 +++- arch/arm64/kvm/vgic/vgic-mmio-v2.c | 1 + arch/arm64/kvm/vgic/vgic-mmio-v3.c | 70 ++++++++++++++++++++++++- arch/arm64/kvm/vgic/vgic-mmio.c | 25 ++++++--- arch/arm64/kvm/vgic/vgic-v3.c | 12 ++++- arch/arm64/kvm/vgic/vgic-v4.c | 1 + arch/arm64/kvm/vgic/vgic.c | 8 ++- arch/arm64/kvm/vgic/vgic.h | 1 + drivers/irqchip/irq-gic-v3-its.c | 9 ++++ drivers/irqchip/irq-gic-v3.c | 12 +++++ drivers/irqchip/irq-gic-v4.c | 3 +- include/kvm/arm_vgic.h | 10 +++- include/linux/irqchip/arm-gic-v4.h | 4 +- include/linux/irqchip/arm-vgic-info.h | 2 + 23 files changed, 224 insertions(+), 30 deletions(-) -- 2.30.0

2 16