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[PATCH openEuler-5.10 01/97] PCI: aardvark: Increase polling delay to 1.5s while waiting for PIO response
by Zheng Zengkai 15 Nov '21

15 Nov '21

From: Pali Rohár <pali(a)kernel.org> stable inclusion from stable-5.10.70 commit 31bd6cd06a18315c9a1b4c6035d027f086c59942 bugzilla: 182949 https://gitee.com/openeuler/kernel/issues/I4I3GQ Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id… -------------------------------- commit 2b58db229eb617d97d5746113b77045f1f884bcb upstream. Measurements in different conditions showed that aardvark hardware PIO response can take up to 1.44s. Increase wait timeout from 1ms to 1.5s to ensure that we do not miss responses from hardware. After 1.44s hardware returns errors (e.g. Completer abort). The previous two patches fixed checking for PIO status, so now we can use it to also catch errors which are reported by hardware after 1.44s. After applying this patch, kernel can detect and print PIO errors to dmesg: [ 6.879999] advk-pcie d0070000.pcie: Non-posted PIO Response Status: CA, 0xe00 @ 0x100004 [ 6.896436] advk-pcie d0070000.pcie: Posted PIO Response Status: COMP_ERR, 0x804 @ 0x100004 [ 6.913049] advk-pcie d0070000.pcie: Posted PIO Response Status: COMP_ERR, 0x804 @ 0x100010 [ 6.929663] advk-pcie d0070000.pcie: Non-posted PIO Response Status: CA, 0xe00 @ 0x100010 [ 6.953558] advk-pcie d0070000.pcie: Posted PIO Response Status: COMP_ERR, 0x804 @ 0x100014 [ 6.970170] advk-pcie d0070000.pcie: Non-posted PIO Response Status: CA, 0xe00 @ 0x100014 [ 6.994328] advk-pcie d0070000.pcie: Posted PIO Response Status: COMP_ERR, 0x804 @ 0x100004 Without this patch kernel prints only a generic error to dmesg: [ 5.246847] advk-pcie d0070000.pcie: config read/write timed out Link: https://lore.kernel.org/r/20210722144041.12661-3-pali@kernel.org Signed-off-by: Pali Rohár <pali(a)kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi(a)arm.com> Reviewed-by: Marek Behún <kabel(a)kernel.org> Cc: stable(a)vger.kernel.org # 7fbcb5da811b ("PCI: aardvark: Don't rely on jiffies while holding spinlock") Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Signed-off-by: Chen Jun <chenjun102(a)huawei.com> Acked-by: Weilong Chen <chenweilong(a)huawei.com> Signed-off-by: Chen Jun <chenjun102(a)huawei.com> --- drivers/pci/controller/pci-aardvark.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index f175cff39b46..4f1a29ede576 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -214,7 +214,7 @@ (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn)) | \ PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where)) -#define PIO_RETRY_CNT 500 +#define PIO_RETRY_CNT 750000 /* 1.5 s */ #define PIO_RETRY_DELAY 2 /* 2 us*/ #define LINK_WAIT_MAX_RETRIES 10 -- 2.20.1

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[PATCH openEuler-5.10 1/5] arm64: remove page granularity limitation from KFENCE
by Zheng Zengkai 15 Nov '21

15 Nov '21

From: Liu Shixin <liushixin2(a)huawei.com> hulk inclusion category: bugfix bugzilla: 181005 https://gitee.com/openeuler/kernel/issues/I4DDEL ------------------------------------------------- Currently if KFENCE is enabled in arm64, the entire linear map will be mapped at page granularity which seems overkilled. Actually only the kfence pool requires to be mapped at page granularity. We can remove the restriction from KFENCE and force the linear mapping of the kfence pool at page granularity later in arch_kfence_init_pool(). Signed-off-by: Liu Shixin <liushixin2(a)huawei.com> Reviewed-by: Kefeng Wang <wangkefeng.wang(a)huawei.com> Signed-off-by: Chen Jun <chenjun102(a)huawei.com> --- arch/arm64/include/asm/kfence.h | 70 ++++++++++++++++++++++++++++++++- arch/arm64/mm/mmu.c | 6 +-- 2 files changed, 71 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/kfence.h b/arch/arm64/include/asm/kfence.h index d061176d57ea..322e95bc228d 100644 --- a/arch/arm64/include/asm/kfence.h +++ b/arch/arm64/include/asm/kfence.h @@ -8,9 +8,77 @@ #ifndef __ASM_KFENCE_H #define __ASM_KFENCE_H +#include <linux/kfence.h> #include <asm/cacheflush.h> +#include <asm/pgalloc.h> -static inline bool arch_kfence_init_pool(void) { return true; } +static inline int split_pud_page(pud_t *pud, unsigned long addr) +{ + int i; + pmd_t *pmd = pmd_alloc_one(&init_mm, addr); + unsigned long pfn = PFN_DOWN(__pa(addr)); + + if (!pmd) + return -ENOMEM; + + for (i = 0; i < PTRS_PER_PMD; i++) + set_pmd(pmd + i, pmd_mkhuge(pfn_pmd(pfn + i * PTRS_PER_PTE, PAGE_KERNEL))); + + smp_wmb(); /* See comment in __pte_alloc */ + pud_populate(&init_mm, pud, pmd); + + flush_tlb_kernel_range(addr, addr + PUD_SIZE); + return 0; +} + +static inline int split_pmd_page(pmd_t *pmd, unsigned long addr) +{ + int i; + pte_t *pte = pte_alloc_one_kernel(&init_mm); + unsigned long pfn = PFN_DOWN(__pa(addr)); + + if (!pte) + return -ENOMEM; + + for (i = 0; i < PTRS_PER_PTE; i++) + set_pte(pte + i, pfn_pte(pfn + i, PAGE_KERNEL)); + + smp_wmb(); /* See comment in __pte_alloc */ + pmd_populate_kernel(&init_mm, pmd, pte); + + flush_tlb_kernel_range(addr, addr + PMD_SIZE); + return 0; +} + +static inline bool arch_kfence_init_pool(void) +{ + unsigned long addr; + pgd_t *pgd; + p4d_t *p4d; + pud_t *pud; + pmd_t *pmd; + + for (addr = (unsigned long)__kfence_pool; is_kfence_address((void *)addr); + addr += PAGE_SIZE) { + pgd = pgd_offset(&init_mm, addr); + if (pgd_leaf(*pgd)) + return false; + p4d = p4d_offset(pgd, addr); + if (p4d_leaf(*p4d)) + return false; + pud = pud_offset(p4d, addr); + if (pud_leaf(*pud)) { + if (split_pud_page(pud, addr & PUD_MASK)) + return false; + } + pmd = pmd_offset(pud, addr); + if (pmd_leaf(*pmd)) { + if (split_pmd_page(pmd, addr & PMD_MASK)) + return false; + } + } + return true; +} static inline bool kfence_protect_page(unsigned long addr, bool protect) { diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index b6a9895d6655..1c2a965e65b3 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -492,8 +492,7 @@ static void __init map_mem(pgd_t *pgdp) int flags = 0; u64 i; - if (rodata_full || crash_mem_map || debug_pagealloc_enabled() || - IS_ENABLED(CONFIG_KFENCE)) + if (rodata_full || crash_mem_map || debug_pagealloc_enabled()) flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; /* @@ -1458,8 +1457,7 @@ int arch_add_memory(int nid, u64 start, u64 size, * KFENCE requires linear map to be mapped at page granularity, so that * it is possible to protect/unprotect single pages in the KFENCE pool. */ - if (rodata_full || debug_pagealloc_enabled() || - IS_ENABLED(CONFIG_KFENCE)) + if (rodata_full || debug_pagealloc_enabled()) flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; __create_pgd_mapping(swapper_pg_dir, start, __phys_to_virt(start), -- 2.20.1

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[PATCH openEuler-5.10 01/56] PCI: pci-bridge-emul: Add PCIe Root Capabilities Register
by Zheng Zengkai 15 Nov '21

15 Nov '21

From: Pali Rohár <pali(a)kernel.org> stable inclusion from stable-5.10.69 commit 9e766b86a9ef653a8ca48a9f70d3dbb580284594 bugzilla: 182675 https://gitee.com/openeuler/kernel/issues/I4I3ED Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id… -------------------------------- commit e902bb7c24a7099d0eb0eb4cba06f2d91e9299f3 upstream. The 16-bit Root Capabilities register is at offset 0x1e in the PCIe Capability. Rename current 'rsvd' struct member to 'rootcap'. Link: https://lore.kernel.org/r/20210722144041.12661-4-pali@kernel.org Signed-off-by: Pali Rohár <pali(a)kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi(a)arm.com> Reviewed-by: Marek Behún <kabel(a)kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Signed-off-by: Chen Jun <chenjun102(a)huawei.com> Acked-by: Weilong Chen <chenweilong(a)huawei.com> Signed-off-by: Chen Jun <chenjun102(a)huawei.com> --- drivers/pci/pci-bridge-emul.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pci-bridge-emul.h b/drivers/pci/pci-bridge-emul.h index b31883022a8e..49bbd37ee318 100644 --- a/drivers/pci/pci-bridge-emul.h +++ b/drivers/pci/pci-bridge-emul.h @@ -54,7 +54,7 @@ struct pci_bridge_emul_pcie_conf { __le16 slotctl; __le16 slotsta; __le16 rootctl; - __le16 rsvd; + __le16 rootcap; __le32 rootsta; __le32 devcap2; __le16 devctl2; -- 2.20.1

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[PATCH openEuler-5.10 01/26] sched/fair: fix sd_llc_alloc_all() compile error
by Zheng Zengkai 15 Nov '21

15 Nov '21

From: Cheng Jian <cj.chengjian(a)huawei.com> hulk inclusion category: bugfix bugzilla: 38261, https://gitee.com/openeuler/kernel/issues/I49XPZ CVE: NA --------------------------- when CONFIG_SCHED_STEAL disabled: kernel/sched/topology.c:24:74: warning: ‘struct s_data’ declared inside parameter list will not be visible outside of this definition or declaration 24 | static inline int sd_llc_alloc_all(const struct cpumask *cpu_map, struct s_data *d) { return 0; } | ^~~~~~ kernel/sched/topology.c: In function ‘build_sched_domains’: kernel/sched/topology.c:2188:32: error: passing argument 2 of ‘sd_llc_alloc_all’ from incompatible pointer type [-Werror=incompatible-pointer-types] 2188 | if (sd_llc_alloc_all(cpu_map, &d)) | ^~ | | | struct s_data * Signed-off-by: Cheng Jian <cj.chengjian(a)huawei.com> Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> --- kernel/sched/topology.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c index 0564aeabbcb8..fcf6aebb13c4 100644 --- a/kernel/sched/topology.c +++ b/kernel/sched/topology.c @@ -13,8 +13,8 @@ DEFINE_MUTEX(sched_domains_mutex); static cpumask_var_t sched_domains_tmpmask; static cpumask_var_t sched_domains_tmpmask2; -#ifdef CONFIG_SCHED_STEAL struct s_data; +#ifdef CONFIG_SCHED_STEAL static int sd_llc_alloc(struct sched_domain *sd); static void sd_llc_free(struct sched_domain *sd); static int sd_llc_alloc_all(const struct cpumask *cpu_map, struct s_data *d); -- 2.20.1

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[PATCH openEuler-1.0-LTS] iommu: smmuv2: fix compile error when CONFIG_ARCH_PHYTIUM is off
by Yang Yingliang 15 Nov '21

15 Nov '21

From: Zheng Zengkai <zhengzengkai(a)huawei.com> phytium inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I41AUQ -------------------------------------- Disabling CONFIG_ARCH_PHYTIUM results in following compile errors: drivers/iommu/arm-smmu.c: In function ‘phytium_smmu_def_domain_type’: drivers/iommu/arm-smmu.c:1641:6: error: implicit declaration of function ‘typeof_ft2000plus’ [-Werror=implicit-function-declaration] 1641 | if (typeof_ft2000plus() || typeof_s2500()) { | ^~~~~~~~~~~~~~~~~ drivers/iommu/arm-smmu.c:1641:29: error: implicit declaration of function ‘typeof_s2500’ [-Werror=implicit-function-declaration] 1641 | if (typeof_ft2000plus() || typeof_s2500()) { | ^~~~~~~~~~~~ cc1: some warnings being treated as errors Fix it by using CONFIG_ARCH_PHYTIUM to control phytium related code. Signed-off-by: Zheng Zengkai <zhengzengkai(a)huawei.com> Reviewed-by: Zhen Lei <thunder.leizhen(a)huawei.com> Reviewed-by: wangxiongfeng 00379786 <wangxiongfeng2(a)huawei.com> Signed-off-by: Yang Yingliang <yangyingliang(a)huawei.com> --- drivers/iommu/arm-smmu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 18863198bb036..d1c00b1dfd2ef 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1634,8 +1634,7 @@ static void arm_smmu_put_resv_regions(struct device *dev, #ifdef CONFIG_SMMU_BYPASS_DEV -#ifdef CONFIG_ARM64 -#include <asm/cputype.h> +#ifdef CONFIG_ARCH_PHYTIUM static int phytium_smmu_def_domain_type(struct device *dev, unsigned int *type) { if (typeof_ft2000plus() || typeof_s2500()) { -- 2.25.1

1 0

[PATCH OLK-5.10] SCSI: spfc: fix typo of last_cmsn
by Yanling Song 15 Nov '21

15 Nov '21

Ramaxel inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4I0OZ CVE: NA Fix typo of last_cmsn which should be last_pmsn Signed-off-by: Yanling Song <songyl(a)ramaxel.com> --- drivers/scsi/spfc/hw/spfc_queue.c | 28 ++++++++++++++-------------- drivers/scsi/spfc/hw/spfc_queue.h | 2 +- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/scsi/spfc/hw/spfc_queue.c b/drivers/scsi/spfc/hw/spfc_queue.c index 3f73fa26aad1..abcf1ff3f49f 100644 --- a/drivers/scsi/spfc/hw/spfc_queue.c +++ b/drivers/scsi/spfc/hw/spfc_queue.c @@ -1027,7 +1027,7 @@ u32 spfc_create_ssq(void *handle) sq_ctrl->wqe_offset = 0; sq_ctrl->head_start_cmsn = 0; sq_ctrl->head_end_cmsn = SPFC_GET_WP_END_CMSN(0, sq_ctrl->wqe_num_per_buf); - sq_ctrl->last_cmsn = 0; + sq_ctrl->last_pmsn = 0; /* Linked List SQ Owner Bit 1 valid,0 invalid */ sq_ctrl->last_pi_owner = 1; atomic_set(&sq_ctrl->sq_valid, true); @@ -3127,7 +3127,7 @@ static u32 spfc_parent_sq_ring_direct_wqe_doorbell(struct spfc_parent_ssq_info * struct spfc_hba_info *hba; hba = (struct spfc_hba_info *)sq->hba; - pmsn = sq->last_cmsn; + pmsn = sq->last_pmsn; if (sq->cache_id == INVALID_VALUE32) { FC_DRV_PRINT(UNF_LOG_IO_ATT, UNF_ERR, @@ -3166,7 +3166,7 @@ u32 spfc_parent_sq_ring_doorbell(struct spfc_parent_ssq_info *sq, u8 qos_level, struct spfc_parent_sq_db door_bell; hba = (struct spfc_hba_info *)sq->hba; - pmsn = sq->last_cmsn; + pmsn = sq->last_pmsn; /* Obtain the low 8 Bit of PMSN */ pmsn_lo = (u8)(pmsn & SPFC_PMSN_MASK); /* Obtain the high 8 Bit of PMSN */ @@ -3231,10 +3231,10 @@ u32 spfc_direct_sq_enqueue(struct spfc_parent_ssq_info *ssq, struct spfc_sqe *io FC_DRV_PRINT(UNF_LOG_NORMAL, UNF_INFO, "[info]Ssq(0x%x), xid(0x%x) qid(0x%x) add wqepage at Pmsn(0x%x), sqe_minus_cqe_cnt(0x%x)", ssq->sqn, ssq->context_id, ssq->sq_queue_id, - ssq->last_cmsn, + ssq->last_pmsn, atomic_read(&ssq->sqe_minus_cqe_cnt)); - link_wqe_msn = SPFC_MSN_DEC(ssq->last_cmsn); + link_wqe_msn = SPFC_MSN_DEC(ssq->last_pmsn); link_wqe = (struct spfc_linkwqe *)spfc_get_wqe_page_entry(tail_wpg, ssq->wqe_offset); msn_wd = be32_to_cpu(link_wqe->val_wd1); @@ -3250,7 +3250,7 @@ u32 spfc_direct_sq_enqueue(struct spfc_parent_ssq_info *ssq, struct spfc_sqe *io } sqe_in_wp = (struct spfc_sqe *)spfc_get_wqe_page_entry(tail_wpg, ssq->wqe_offset); - spfc_build_wqe_owner_pmsn(io_sqe, (ssq->last_pi_owner), ssq->last_cmsn); + spfc_build_wqe_owner_pmsn(io_sqe, (ssq->last_pi_owner), ssq->last_pmsn); SPFC_IO_STAT((struct spfc_hba_info *)ssq->hba, wqe_type); wqe_gpa = tail_wpg->wpg_phy_addr + (ssq->wqe_offset * sizeof(struct spfc_sqe)); @@ -3260,11 +3260,11 @@ u32 spfc_direct_sq_enqueue(struct spfc_parent_ssq_info *ssq, struct spfc_sqe *io dre_door_bell.wd0.cos = 0; dre_door_bell.wd0.c = 0; dre_door_bell.wd0.pi_hi = - (u32)(ssq->last_cmsn >> UNF_SHIFT_12) & SPFC_DB_WD0_PI_H_MASK; + (u32)(ssq->last_pmsn >> UNF_SHIFT_12) & SPFC_DB_WD0_PI_H_MASK; dre_door_bell.wd0.cntx_size = SPFC_CNTX_SIZE_T_256B; dre_door_bell.wd0.xid = ssq->context_id; dre_door_bell.wd1.sm_data = ssq->cache_id; - dre_door_bell.wd1.pi_lo = (u32)(ssq->last_cmsn & SPFC_DB_WD0_PI_L_MASK); + dre_door_bell.wd1.pi_lo = (u32)(ssq->last_pmsn & SPFC_DB_WD0_PI_L_MASK); io_sqe->db_val = *(u64 *)&dre_door_bell; spfc_convert_parent_wqe_to_big_endian(io_sqe); @@ -3275,7 +3275,7 @@ u32 spfc_direct_sq_enqueue(struct spfc_parent_ssq_info *ssq, struct spfc_sqe *io "[INFO]Ssq(0x%x) xid:0x%x,qid:0x%x wqegpa:0x%llx,o:0x%x,outstandind:0x%x,pmsn:0x%x,cmsn:0x%x", ssq->sqn, ssq->context_id, ssq->sq_queue_id, wqe_gpa, ssq->last_pi_owner, atomic_read(&ssq->sqe_minus_cqe_cnt), - ssq->last_cmsn, SPFC_GET_QUEUE_CMSN(ssq)); + ssq->last_pmsn, SPFC_GET_QUEUE_CMSN(ssq)); ssq->accum_wqe_cnt++; if (ssq->accum_wqe_cnt == accum_db_num) { @@ -3286,7 +3286,7 @@ u32 spfc_direct_sq_enqueue(struct spfc_parent_ssq_info *ssq, struct spfc_sqe *io } ssq->wqe_offset += 1; - ssq->last_cmsn = SPFC_MSN_INC(ssq->last_cmsn); + ssq->last_pmsn = SPFC_MSN_INC(ssq->last_pmsn); atomic_inc(&ssq->sq_wqe_cnt); atomic_inc(&ssq->sqe_minus_cqe_cnt); SPFC_SQ_IO_STAT(ssq, wqe_type); @@ -3319,7 +3319,7 @@ u32 spfc_parent_ssq_enqueue(struct spfc_parent_ssq_info *ssq, struct spfc_sqe *i FC_DRV_PRINT(UNF_LOG_NORMAL, UNF_INFO, "[info]Ssq(0x%x), xid(0x%x) qid(0x%x) add wqepage at Pmsn(0x%x), WpgCnt(0x%x)", ssq->sqn, ssq->context_id, ssq->sq_queue_id, - ssq->last_cmsn, + ssq->last_pmsn, atomic_read(&ssq->wqe_page_cnt)); cur_cmsn = SPFC_GET_QUEUE_CMSN(ssq); spfc_free_sq_wqe_page(ssq, cur_cmsn); @@ -3335,7 +3335,7 @@ u32 spfc_parent_ssq_enqueue(struct spfc_parent_ssq_info *ssq, struct spfc_sqe *i link_wqe->next_page_addr_hi = cpu_to_be32(addr_wd); addr_wd = SPFC_LSD(new_wqe_page->wpg_phy_addr); link_wqe->next_page_addr_lo = cpu_to_be32(addr_wd); - link_wqe_msn = SPFC_MSN_DEC(ssq->last_cmsn); + link_wqe_msn = SPFC_MSN_DEC(ssq->last_pmsn); msn_wd = be32_to_cpu(link_wqe->val_wd1); msn_wd |= ((u32)(link_wqe_msn & SPFC_MSNWD_L_MASK)); msn_wd |= (((u32)(link_wqe_msn & SPFC_MSNWD_H_MASK)) << UNF_SHIFT_16); @@ -3351,7 +3351,7 @@ u32 spfc_parent_ssq_enqueue(struct spfc_parent_ssq_info *ssq, struct spfc_sqe *i atomic_inc(&ssq->wqe_page_cnt); } - spfc_build_wqe_owner_pmsn(io_sqe, !(ssq->last_pi_owner), ssq->last_cmsn); + spfc_build_wqe_owner_pmsn(io_sqe, !(ssq->last_pi_owner), ssq->last_pmsn); SPFC_IO_STAT((struct spfc_hba_info *)ssq->hba, wqe_type); spfc_convert_parent_wqe_to_big_endian(io_sqe); sqe_in_wp = (struct spfc_sqe *)spfc_get_wqe_page_entry(tail_wpg, ssq->wqe_offset); @@ -3371,7 +3371,7 @@ u32 spfc_parent_ssq_enqueue(struct spfc_parent_ssq_info *ssq, struct spfc_sqe *i ssq->accum_wqe_cnt = 0; } ssq->wqe_offset += 1; - ssq->last_cmsn = SPFC_MSN_INC(ssq->last_cmsn); + ssq->last_pmsn = SPFC_MSN_INC(ssq->last_pmsn); atomic_inc(&ssq->sq_wqe_cnt); atomic_inc(&ssq->sqe_minus_cqe_cnt); SPFC_SQ_IO_STAT(ssq, wqe_type); diff --git a/drivers/scsi/spfc/hw/spfc_queue.h b/drivers/scsi/spfc/hw/spfc_queue.h index b1184eb17556..c09f098e7324 100644 --- a/drivers/scsi/spfc/hw/spfc_queue.h +++ b/drivers/scsi/spfc/hw/spfc_queue.h @@ -597,7 +597,7 @@ struct spfc_parent_ssq_info { u32 wqe_offset; u16 head_start_cmsn; u16 head_end_cmsn; - u16 last_cmsn; + u16 last_pmsn; u16 last_pi_owner; u32 queue_style; atomic_t sq_valid; -- 2.30.0

2 1

[PATCH OLK-5.10] Change CPU page size to 4KB for ARM architecture
by shenzijun 15 Nov '21

15 Nov '21

From: 沈子俊 <shenzijun(a)kylinos.cn> kylin inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I4HDHZ?from=project-issue CVE: NA ---------------------------------------------------------------------- change config about ARM64_4K_PAGES in openeuler-defconfig from arch/arm64 Signed-off-by: 沈子俊 <shenzijun(a)kylinos.cn> --- arch/arm64/configs/openeuler_defconfig | 31 +++++++++++++------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/arm64/configs/openeuler_defconfig b/arch/arm64/configs/openeuler_defconfig index 76d6a118330d..87cf82bcb30e 100644 --- a/arch/arm64/configs/openeuler_defconfig +++ b/arch/arm64/configs/openeuler_defconfig @@ -250,12 +250,12 @@ CONFIG_TRACEPOINTS=y CONFIG_ARM64=y CONFIG_64BIT=y CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=16 -CONFIG_ARM64_CONT_PTE_SHIFT=5 -CONFIG_ARM64_CONT_PMD_SHIFT=5 -CONFIG_ARCH_MMAP_RND_BITS_MIN=14 -CONFIG_ARCH_MMAP_RND_BITS_MAX=14 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=7 +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_CONT_PTE_SHIFT=4 +CONFIG_ARM64_CONT_PMD_SHIFT=4 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_STACKTRACE_SUPPORT=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 @@ -365,17 +365,17 @@ CONFIG_HISILICON_ERRATUM_HIP08_RU_PREFETCH=y CONFIG_SOCIONEXT_SYNQUACER_PREITS=y # end of ARM errata workarounds via the alternatives framework -# CONFIG_ARM64_4K_PAGES is not set +CONFIG_ARM64_4K_PAGES=y # CONFIG_ARM64_16K_PAGES is not set -CONFIG_ARM64_64K_PAGES=y -# CONFIG_ARM64_VA_BITS_42 is not set +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_VA_BITS_39=y # CONFIG_ARM64_VA_BITS_48 is not set -CONFIG_ARM64_VA_BITS_52=y +# CONFIG_ARM64_VA_BITS_52 is not set # CONFIG_ARM64_FORCE_52BIT is not set -CONFIG_ARM64_VA_BITS=52 -# CONFIG_ARM64_PA_BITS_48 is not set -CONFIG_ARM64_PA_BITS_52=y -CONFIG_ARM64_PA_BITS=52 +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_PA_BITS_48=y +# CONFIG_ARM64_PA_BITS_52 is not set +CONFIG_ARM64_PA_BITS=48 # CONFIG_CPU_BIG_ENDIAN is not set CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_SCHED_MC=y @@ -402,6 +402,7 @@ CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_HAVE_ARCH_PFN_VALID=y CONFIG_HW_PERF_EVENTS=y CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y CONFIG_PARAVIRT=y @@ -411,7 +412,7 @@ CONFIG_KEXEC=y CONFIG_CRASH_DUMP=y CONFIG_ARM64_CPU_PARK=y # CONFIG_XEN is not set -CONFIG_FORCE_MAX_ZONEORDER=14 +CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_UNMAP_KERNEL_AT_EL0=y CONFIG_RODATA_FULL_DEFAULT_ENABLED=y CONFIG_ARM64_PMEM_RESERVE=y -- 2.30.0

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[PATCH OLK-5.10] fix structure type undeclared error in topology.c
by shenzijun 15 Nov '21

15 Nov '21

From: 沈子俊 <shenzijun(a)kylinos.cn> kylin inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4I4E2#note_7386759 CVE: NA ------------------------------------------------------------------ add declaration of 'struct s_data' Signed-off-by: 沈子俊 <shenzijun(a)kylinos.cn> --- kernel/sched/topology.c | 1 + 1 file changed, 1 insertion(+) diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c index 0564aeabbcb8..1fac5d28c0dc 100644 --- a/kernel/sched/topology.c +++ b/kernel/sched/topology.c @@ -20,6 +20,7 @@ static void sd_llc_free(struct sched_domain *sd); static int sd_llc_alloc_all(const struct cpumask *cpu_map, struct s_data *d); static void sd_llc_free_all(const struct cpumask *cpu_map); #else +struct s_data; static inline void sd_llc_free(struct sched_domain *sd) {} static inline int sd_llc_alloc_all(const struct cpumask *cpu_map, struct s_data *d) { return 0; } static inline void sd_llc_free_all(const struct cpumask *cpu_map) {} -- 2.30.0

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[PATCH kernel-4.19 v2] fix the problem that the pointer may be double free
by zhangyue 15 Nov '21

15 Nov '21

kylin inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4AH11?from=project-issue CVE: NA int driver/md/md.c, if the function autorun_array() is called, first called do_md_run() and then do_md_stop(), this time, the pointer mddev->private may be double free Signed-off-by: zhangyue <zhangyue1(a)kylinos.cn> --- drivers/md/md.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/md/md.c b/drivers/md/md.c index 4406bb137a27..aa204ec74066 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c @@ -6000,8 +6000,10 @@ static void __md_stop(struct mddev *mddev) spin_lock(&mddev->lock); mddev->pers = NULL; spin_unlock(&mddev->lock); - pers->free(mddev, mddev->private); - mddev->private = NULL; + if (mddev->private) { + pers->free(mddev, mddev->private); + mddev->private = NULL; + } if (pers->sync_request && mddev->to_remove == NULL) mddev->to_remove = &md_redundancy_group; module_put(pers->owner); -- 2.30.0

1 0

[PATCH kernel-4.19 v2] fix the problem that the pointer "sp" is double free
by zhangyue 15 Nov '21

15 Nov '21

kylin inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I4AFG6?from=project-issue CVE: NA in function qla24xx_sp_unmap, it is already called sp->free(sp), then it`s not need to called sp->free(sp) after qla24xx_sp_unmap is called. Signed-off-by: zhangyue <zhangyue1(a)kylinos.cn> --- drivers/scsi/qla2xxx/qla_gs.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/scsi/qla2xxx/qla_gs.c b/drivers/scsi/qla2xxx/qla_gs.c index c3195d4c25e5..a7198a1e23fb 100644 --- a/drivers/scsi/qla2xxx/qla_gs.c +++ b/drivers/scsi/qla2xxx/qla_gs.c @@ -4228,7 +4228,6 @@ static void qla2x00_async_gpnft_gnnft_sp_done(void *s, int res) if (rc) { /* Cleanup here to prevent memory leak */ qla24xx_sp_unmap(vha, sp); - sp->free(sp); } spin_lock_irqsave(&vha->work_lock, flags); -- 2.30.0

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