- Kernel - mailweb.openeuler.org

[PATCH OLK-5.10] driver/perf: Not enabled ARM64_BRBE by default
by Junhao He 29 Nov '23

29 Nov '23

driver inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I8EC9K CVE: NA -------------------------------- The BRBE feature depend on ARMV8 PMU hardware support for branch stack sampling. Not enabled ARM64_BRBE by default. Signed-off-by: Junhao He <hejunhao3(a)huawei.com> --- drivers/perf/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index 25a577530da4..67ad53cde11f 100644 --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -133,7 +133,6 @@ config ARM_SPE_PMU config ARM64_BRBE bool "Enable support for Branch Record Buffer Extension (BRBE)" depends on PERF_EVENTS && ARM64 && ARM_PMU - default y help Enable perf support for Branch Record Buffer Extension (BRBE) which records all branches taken in an execution path. This supports some -- 2.33.0

2 1

[PACH OLK-5.10 v5 00/20] psi irq in cgroupv1 and psi fine grained
by Lu Jialin 29 Nov '23

29 Nov '23

Chen Wandun (3): mm: disable psi cgroup v1 by default mm: add config isolation for psi under cgroup v1 psi: dont alloc memory for psi by default Chengming Zhou (3): sched/psi: Fix periodic aggregation shut off sched/psi: Optimize task switch inside shared cgroups again sched/psi: Add PSI_IRQ to track IRQ/SOFTIRQ pressure Hao Jia (1): sched/psi: Zero the memory of struct psi_group Johannes Weiner (1): sched/psi: Remove NR_ONCPU task accounting Lu Jialin (11): psi: support irq.pressure under cgroup v1 psi: enable CONFIG_PSI_CGROUP_V1 in openeuler_defconfig psi: update psi irqtime when the irq delta is nozero memcg: split async memcg reclaim from reclaim_high psi: add struct psi_group_ext PSI: Introduce fine grained stall time collect for cgroup reclaim PSI: Introduce avgs and total calculation for cgroup reclaim PSI: Introduce pressure.stat in psi PSI: add more memory fine grained stall tracking in pressure.stat add cpu fine grained stall tracking in pressure.stat PSI: enable CONFIG_PSI_FINE_GRAINED in openeuler_defconfig Suren Baghdasaryan (1): psi: Fix "defined but not used" warnings when CONFIG_PROC_FS=n Documentation/admin-guide/cgroup-v2.rst | 6 + arch/arm64/configs/openeuler_defconfig | 2 + arch/x86/configs/openeuler_defconfig | 2 + block/blk-cgroup.c | 2 +- block/blk-core.c | 2 +- include/linux/cgroup-defs.h | 6 +- include/linux/cgroup.h | 2 +- include/linux/psi.h | 9 +- include/linux/psi_types.h | 99 +++- include/linux/sched.h | 4 + init/Kconfig | 20 + kernel/cgroup/cgroup.c | 64 ++- kernel/sched/core.c | 2 + kernel/sched/cpuacct.c | 6 +- kernel/sched/fair.c | 6 - kernel/sched/psi.c | 691 ++++++++++++++++++++---- kernel/sched/stats.h | 9 + mm/compaction.c | 2 +- mm/filemap.c | 4 +- mm/memcontrol.c | 92 ++-- mm/page_alloc.c | 6 + mm/page_io.c | 3 + mm/vmscan.c | 5 +- 23 files changed, 873 insertions(+), 171 deletions(-) -- 2.34.1

1 20

[PATCH OLK-6.6 v2 00/31] Backport ARM64-ILP32 patches
by Jinjie Ruan 29 Nov '23

29 Nov '23

Backport ILP32 for ARM64 patches to OLK6.6 form openEuler-23.09. Andrew Pinski (3): arm64: rename COMPAT to AARCH32_EL0 arm64: uapi: set __BITS_PER_LONG correctly for ILP32 and LP64 arm64:ilp32: add ARM64_ILP32 to Kconfig Chen Jiahao (4): arm64: fix AUDIT_ARCH_AARCH64ILP32 bug on audit subsystem arm64: fix address limit problem with TASK_SIZE_MAX arm64: set 32-bit compatible TASK_SIZE_MAX to fix U32 libc_write_01 error arm64: fix image size inflation with CONFIG_COMPAT_TASK_SIZE Dave Martin (1): arm64: signal: Make parse_user_sigframe() independent of rt_sigframe layout James Morse (1): ptrace: Add compat PTRACE_{G,S}ETSIGMASK handlers Philipp Tomsich (1): arm64:ilp32: add vdso-ilp32 and use for signal return Xiongfeng Wang (6): arm64: rename functions that reference compat term arm64: secomp: fix the secure computing mode 1 syscall check for ilp32 ilp32: avoid clearing upper 32 bits of syscall return value for ilp32 ilp32: skip ARM erratum 1418040 for ilp32 application arm64: fix abi change caused by ILP32 ilp32: fix compile problem when ARM64_ILP32 and UBSAN are both enabled Yury Norov (14): thread: move thread bits accessors to separated file arm64: ilp32: add documentation on the ILP32 ABI for ARM64 arm64: introduce is_a32_compat_{task,thread} for AArch32 compat arm64: ilp32: add is_ilp32_compat_{task,thread} and TIF_32BIT_AARCH64 arm64: introduce AUDIT_ARCH_AARCH64ILP32 for ilp32 arm64: introduce binfmt_elf32.c arm64: change compat_elf_hwcap and compat_elf_hwcap2 prefix to a32 arm64: ilp32: introduce binfmt_ilp32.c arm64: ilp32: share aarch32 syscall handlers arm64: ilp32: introduce syscall table for ILP32 arm64: signal: share lp64 signal structures and routines to ilp32 arm64: signal32: move ilp32 and aarch32 common code to separated file arm64: ilp32: introduce ilp32-specific sigframe and ucontext arm64: ptrace: handle ptrace_request differently for aarch32 and ilp32 Zhen Lei (1): arm64: replace is_compat_task() with is_ilp32_compat_task() in TASK_SIZE_MAX Documentation/arm64/ilp32.txt | 52 +++ arch/arm64/Kconfig | 26 +- arch/arm64/Makefile | 3 + arch/arm64/include/asm/arch_timer.h | 4 +- arch/arm64/include/asm/compat.h | 18 +- arch/arm64/include/asm/elf.h | 32 +- arch/arm64/include/asm/fpsimd.h | 2 +- arch/arm64/include/asm/ftrace.h | 2 +- arch/arm64/include/asm/hwcap.h | 8 +- arch/arm64/include/asm/is_compat.h | 83 ++++ arch/arm64/include/asm/processor.h | 24 +- arch/arm64/include/asm/ptrace.h | 16 +- arch/arm64/include/asm/seccomp.h | 32 +- arch/arm64/include/asm/signal32.h | 31 +- arch/arm64/include/asm/signal32_common.h | 13 + arch/arm64/include/asm/signal_common.h | 391 +++++++++++++++++ arch/arm64/include/asm/signal_ilp32.h | 23 + arch/arm64/include/asm/syscall.h | 14 +- arch/arm64/include/asm/thread_info.h | 4 +- arch/arm64/include/asm/unistd.h | 5 + arch/arm64/include/asm/vdso.h | 9 + arch/arm64/include/uapi/asm/bitsperlong.h | 9 +- arch/arm64/include/uapi/asm/unistd.h | 15 +- arch/arm64/kernel/Makefile | 8 +- arch/arm64/kernel/armv8_deprecated.c | 14 +- arch/arm64/kernel/asm-offsets.c | 13 +- arch/arm64/kernel/binfmt_elf32.c | 27 ++ arch/arm64/kernel/binfmt_ilp32.c | 89 ++++ arch/arm64/kernel/compat_alignment.c | 2 +- arch/arm64/kernel/cpufeature.c | 36 +- arch/arm64/kernel/cpuinfo.c | 18 +- arch/arm64/kernel/debug-monitors.c | 4 +- arch/arm64/kernel/entry-common.c | 6 +- arch/arm64/kernel/hw_breakpoint.c | 8 +- arch/arm64/kernel/perf_callchain.c | 28 +- arch/arm64/kernel/perf_regs.c | 4 +- arch/arm64/kernel/process.c | 15 +- arch/arm64/kernel/proton-pack.c | 2 +- arch/arm64/kernel/ptrace.c | 38 +- arch/arm64/kernel/signal.c | 397 +++--------------- arch/arm64/kernel/signal32.c | 97 ++--- arch/arm64/kernel/signal32_common.c | 37 ++ arch/arm64/kernel/signal_ilp32.c | 67 +++ arch/arm64/kernel/sys32.c | 104 +---- arch/arm64/kernel/sys32_common.c | 106 +++++ arch/arm64/kernel/sys_compat.c | 12 +- arch/arm64/kernel/sys_ilp32.c | 82 ++++ arch/arm64/kernel/syscall.c | 37 +- arch/arm64/kernel/traps.c | 5 +- arch/arm64/kernel/vdso-ilp32/.gitignore | 2 + arch/arm64/kernel/vdso-ilp32/Makefile | 111 +++++ arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S | 22 + arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S | 88 ++++ arch/arm64/kernel/vdso.c | 46 +- arch/arm64/mm/fault.c | 2 +- include/linux/sched.h | 1 + include/linux/thread_bits.h | 87 ++++ include/linux/thread_info.h | 73 +--- kernel/ptrace.c | 52 ++- 59 files changed, 1790 insertions(+), 766 deletions(-) create mode 100644 Documentation/arm64/ilp32.txt create mode 100644 arch/arm64/include/asm/is_compat.h create mode 100644 arch/arm64/include/asm/signal32_common.h create mode 100644 arch/arm64/include/asm/signal_common.h create mode 100644 arch/arm64/include/asm/signal_ilp32.h create mode 100644 arch/arm64/kernel/binfmt_elf32.c create mode 100644 arch/arm64/kernel/binfmt_ilp32.c create mode 100644 arch/arm64/kernel/signal32_common.c create mode 100644 arch/arm64/kernel/signal_ilp32.c create mode 100644 arch/arm64/kernel/sys32_common.c create mode 100644 arch/arm64/kernel/sys_ilp32.c create mode 100644 arch/arm64/kernel/vdso-ilp32/.gitignore create mode 100644 arch/arm64/kernel/vdso-ilp32/Makefile create mode 100644 arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S create mode 100644 arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S create mode 100644 include/linux/thread_bits.h -- 2.34.1

1 31

[openEuler-20.03-LTS-SP4 PATCH] arm64: cpufeature: Extract capped perfmon fields
by Kunkun Jiang 29 Nov '23

29 Nov '23

From: zhangyuan <zhangyuan162(a)huawei.com> KVM: arm64: limit PMU version to PMUv3 for ARMv8.1 Backport patches from upstream to fix the issue of PMU. Signed-off-by: Yuan Zhang <zhangyuan162(a)huawei.com> --- kernel.spec | 5 +- ...eature-Extract-capped-perfmon-fields.patch | 80 +++++++++++++++++ ...mit-PMU-version-to-PMUv3-for-ARMv8.1.patch | 90 +++++++++++++++++++ series.conf | 2 + 4 files changed, 176 insertions(+), 1 deletion(-) create mode 100644 patches/0758-arm64-cpufeature-Extract-capped-perfmon-fields.patch create mode 100644 patches/0759-KVM-arm64-limit-PMU-version-to-PMUv3-for-ARMv8.1.patch diff --git a/kernel.spec b/kernel.spec index 0ddbd93..7a06c2c 100644 --- a/kernel.spec +++ b/kernel.spec @@ -32,7 +32,7 @@ Name: kernel Version: 4.19.90 -Release: %{hulkrelease}.0252 +Release: %{hulkrelease}.0253 Summary: Linux Kernel License: GPLv2 URL: http://www.kernel.org/ @@ -849,6 +849,9 @@ fi %endif %changelog +* Tue Nov 28 2023 Yuan Zhang <zhangyuan162(a)huawei.com> - 4.19.90-2311.5.0.0253 +- arm64: cpufeature: Extract capped perfmon fields +- KVM: arm64: limit PMU version to PMUv3 for ARMv8.1 * Tue Nov 28 2023 Li Xiaodong <lixiaodong67(a)huawei.com> - 4.19.90-2311.5.0.0252 - !3000 [openEuler-1.0-LTS] add Phytium drivers CONFIG diff --git a/patches/0758-arm64-cpufeature-Extract-capped-perfmon-fields.patch b/patches/0758-arm64-cpufeature-Extract-capped-perfmon-fields.patch new file mode 100644 index 0000000..de1db70 --- /dev/null +++ b/patches/0758-arm64-cpufeature-Extract-capped-perfmon-fields.patch @@ -0,0 +1,80 @@ +From a207eaeac98757a86cce704be6c4e097439503c5 Mon Sep 17 00:00:00 2001 +From: Andrew Murray <andrew.murray(a)arm.com> +Date: Tue, 28 Nov 2023 15:46:32 +0800 +Subject: [PATCH 1/2] arm64: cpufeature: Extract capped perfmon fields + +mainline inclusion +from mainline-v5.7-rc1 +commit 8e35aa642ee4dab01b16cc4b2df59d1936f3b3c2 +category: bugfix +bugzilla: https://gitee.com/openeuler/kernel/issues/I8K8XV +CVE: NA + +Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?… + +----------------------------------- + +commit 8e35aa642ee4dab01b16cc4b2df59d1936f3b3c2 upstream. + +When emulating ID registers there is often a need to cap the version +bits of a feature such that the guest will not use features that the +host is not aware of. For example, when KVM mediates access to the PMU +by emulating register accesses. + +Let's add a helper that extracts a performance monitors ID field and +caps the version to a given value. + +Fields that identify the version of the Performance Monitors Extension +do not follow the standard ID scheme, and instead follow the scheme +described in ARM DDI 0487E.a page D13-2825 "Alternative ID scheme used +for the Performance Monitors Extension version". The value 0xF means an +IMPLEMENTATION DEFINED PMU is present, and values 0x0-OxE can be treated +the same as an unsigned field with 0x0 meaning no PMU is present. + +Signed-off-by: Andrew Murray <andrew.murray(a)arm.com> +Reviewed-by: Suzuki K Poulose <suzuki.poulose(a)arm.com> +[Mark: rework to handle perfmon fields] +Signed-off-by: Mark Rutland <mark.rutland(a)arm.com> +Signed-off-by: Will Deacon <will(a)kernel.org> +Signed-off-by: zhangyuan <zhangyuan162(a)huawei.com> +--- + arch/arm64/include/asm/cpufeature.h | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h +index eef5a9c9b823..e2ba573644d5 100644 +--- a/arch/arm64/include/asm/cpufeature.h ++++ b/arch/arm64/include/asm/cpufeature.h +@@ -449,6 +449,29 @@ cpuid_feature_extract_unsigned_field(u64 features, int field) + return cpuid_feature_extract_unsigned_field_width(features, field, 4); + } + ++/* ++ * Fields that identify the version of the Performance Monitors Extension do ++ * not follow the standard ID scheme. See ARM DDI 0487E.a page D13-2825, ++ * "Alternative ID scheme used for the Performance Monitors Extension version". ++ */ ++static inline u64 __attribute_const__ ++cpuid_feature_cap_perfmon_field(u64 features, int field, u64 cap) ++{ ++ u64 val = cpuid_feature_extract_unsigned_field(features, field); ++ u64 mask = GENMASK_ULL(field + 3, field); ++ ++ /* Treat IMPLEMENTATION DEFINED functionality as unimplemented */ ++ if (val == 0xf) ++ val = 0; ++ ++ if (val > cap) { ++ features &= ~mask; ++ features |= (cap << field) & mask; ++ } ++ ++ return features; ++} ++ + static inline u64 arm64_ftr_mask(const struct arm64_ftr_bits *ftrp) + { + return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift); +-- +2.33.0 + diff --git a/patches/0759-KVM-arm64-limit-PMU-version-to-PMUv3-for-ARMv8.1.patch b/patches/0759-KVM-arm64-limit-PMU-version-to-PMUv3-for-ARMv8.1.patch new file mode 100644 index 0000000..1f72f92 --- /dev/null +++ b/patches/0759-KVM-arm64-limit-PMU-version-to-PMUv3-for-ARMv8.1.patch @@ -0,0 +1,90 @@ +From 6a416c5efa3ce99f5f0f7e9c603b42b0e047481c Mon Sep 17 00:00:00 2001 +From: Andrew Murray <andrew.murray(a)arm.com> +Date: Tue, 28 Nov 2023 15:46:33 +0800 +Subject: [PATCH 2/2] KVM: arm64: limit PMU version to PMUv3 for ARMv8.1 + +mainline inclusion +from mainline-v5.7-rc1 +commit c854188ea01062f5a5fd7f05658feb1863774eaa +category: bugfix +bugzilla: https://gitee.com/openeuler/kernel/issues/I8K8XV +CVE: NA + +Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?… + +----------------------------------- + +commit c854188ea01062f5a5fd7f05658feb1863774eaa upstream. + +We currently expose the PMU version of the host to the guest via +emulation of the DFR0_EL1 and AA64DFR0_EL1 debug feature registers. +However many of the features offered beyond PMUv3 for 8.1 are not +supported in KVM. Examples of this include support for the PMMIR +registers (added in PMUv3 for ARMv8.4) and 64-bit event counters +added in (PMUv3 for ARMv8.5). + +Let's trap the Debug Feature Registers in order to limit +PMUVer/PerfMon in the Debug Feature Registers to PMUv3 for ARMv8.1 +to avoid unexpected behaviour. + +Both ID_AA64DFR0.PMUVer and ID_DFR0.PerfMon follow the "Alternative ID +scheme used for the Performance Monitors Extension version" where 0xF +means an IMPLEMENTATION DEFINED PMU is implemented, and values 0x0-0xE +are treated as with an unsigned field (with 0x0 meaning no PMU is +present). As we don't expect to expose an IMPLEMENTATION DEFINED PMU, +and our cap is below 0xF, we can treat these fields as unsigned when +applying the cap. + +Signed-off-by: Andrew Murray <andrew.murray(a)arm.com> +Reviewed-by: Suzuki K Poulose <suzuki.poulose(a)arm.com> +[Mark: make field names consistent, use perfmon cap] +Signed-off-by: Mark Rutland <mark.rutland(a)arm.com> +Signed-off-by: Will Deacon <will(a)kernel.org> +[zhangyuan162(a)huawei.com: adjust the context in read_id_reg()] +Signed-off-by: zhangyuan <zhangyuan162(a)huawei.com> +--- + arch/arm64/include/asm/sysreg.h | 6 ++++++ + arch/arm64/kvm/sys_regs.c | 10 ++++++++++ + 2 files changed, 16 insertions(+) + +diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h +index de4c31f073bb..041100c28cab 100644 +--- a/arch/arm64/include/asm/sysreg.h ++++ b/arch/arm64/include/asm/sysreg.h +@@ -637,6 +637,12 @@ + #define ID_AA64DFR0_TRACEVER_SHIFT 4 + #define ID_AA64DFR0_DEBUGVER_SHIFT 0 + ++#define ID_AA64DFR0_PMUVER_8_1 0x4 ++ ++#define ID_DFR0_PERFMON_SHIFT 24 ++ ++#define ID_DFR0_PERFMON_8_1 0x4 ++ + #define ID_AA64DFR0_PMSVER_8_2 0x1 + #define ID_AA64DFR0_PMSVER_8_3 0x2 + +diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c +index 25caa9ec95e4..cc824a208684 100644 +--- a/arch/arm64/kvm/sys_regs.c ++++ b/arch/arm64/kvm/sys_regs.c +@@ -1082,6 +1082,16 @@ static u64 read_id_reg(struct kvm_vcpu *vcpu, + kvm_debug("LORegions unsupported for guests, suppressing\n"); + + val &= ~(0xfUL << ID_AA64MMFR1_LOR_SHIFT); ++ } else if (id == SYS_ID_AA64DFR0_EL1) { ++ /* Limit guests to PMUv3 for ARMv8.1 */ ++ val = cpuid_feature_cap_perfmon_field(val, ++ ID_AA64DFR0_PMUVER_SHIFT, ++ ID_AA64DFR0_PMUVER_8_1); ++ } else if (id == SYS_ID_DFR0_EL1) { ++ /* Limit guests to PMUv3 for ARMv8.1 */ ++ val = cpuid_feature_cap_perfmon_field(val, ++ ID_DFR0_PERFMON_SHIFT, ++ ID_DFR0_PERFMON_8_1); + } + + return val; +-- +2.33.0 + diff --git a/series.conf b/series.conf index f5f2522..67b9be0 100644 --- a/series.conf +++ b/series.conf @@ -758,3 +758,5 @@ patches/0754-scsi-hisi_sas_v3_hw-Remove-extra-function-calls-for-.patch patches/0755-config-arm64-Enable-dubugfs-config-of-hisi-sas.patch patches/0756-crypto-hisilicon-Add-value-profile-support-for-kerne.patch patches/0757-Revert-genirq-Increase-the-number-of-IRQ-descriptors.patch +patches/arm64-cpufeature-Extract-capped-perfmon-fields.patch +patches/KVM-arm64-limit-PMU-version-to-PMUv3-for-ARMv8.1.patch -- 2.33.0

1 0

[PATCH OLK-5.10 0/5] SME bugfixes
by Wang ShaoBo 28 Nov '23

28 Nov '23

SME bugfixes Catalin Marinas (1): arm64: Remove the __user annotation for the restore_za_context() argument Christophe JAILLET (1): arm64/ptrace: Clean up error handling path in sve_set_common() Mark Brown (3): arm64: cpufeature: Add missing .field_width for GIC system registers arm64/signal: Flush FPSIMD register state when disabling streaming mode arm64/fpsimd: Sync and zero pad FPSIMD state for streaming SVE arch/arm64/kernel/cpufeature.c | 1 + arch/arm64/kernel/fpsimd.c | 3 ++- arch/arm64/kernel/ptrace.c | 3 ++- arch/arm64/kernel/signal.c | 12 +++++++++++- 4 files changed, 16 insertions(+), 3 deletions(-) -- 2.25.1

2 6

[PATCH OLK-5.10 0/7] support page eject
by Wupeng Ma 28 Nov '23

28 Nov '23

From: Ma Wupeng <mawupeng1(a)huawei.com> Page ejection is achieved by soft_offline_page and unpoison_memory. A linked list is maintained to log the pfns which are offlined by this module. Only the pfns present in the list is allowed to go online. The follow sysfs is introduced to online/offline page via this module, since there is a internal linked list to record all offlined pages, remove_page is introduce to remove this page from list. - /sys/kernel/page_eject/online_page - /sys/kernel/page_eject/offline_page - /sys/kernel/page_eject/remove_page Besides pag eject, machine check safe is enhanced as follow: During soft offline page, page is copied to new page in kernel. If the origin page has UCE, there will lead to kernel panic. In order to solve this problem, use machine check safe to catch this error which can be achieved by using copy_mc_to_kernel to replace copy_page. Signal SIGBUS will be send to user task if this UCE is consumed by this situation to avoid kernel panic. Jiaqi Yan (1): mm/hwpoison: introduce copy_mc_highpage Ma Wupeng (6): mm: introduce copy_mc_highpages mm: arm64: Add migrate_page_copy_mc() mm: Update PF_COREDUMP_MCS to PF_MCS mm/hwpoison: Export symbol soft_offline_page mm: page_eject: Introuduce page ejection mm: page_eject: Add mc support during offline page drivers/ras/Kconfig | 10 ++ drivers/ras/Makefile | 1 + drivers/ras/page_eject.c | 249 +++++++++++++++++++++++++++++++++++++++ fs/coredump.c | 4 +- include/linux/highmem.h | 49 ++++++++ include/linux/sched.h | 2 +- lib/iov_iter.c | 2 +- mm/memory-failure.c | 1 + mm/migrate.c | 63 ++++++++-- 9 files changed, 365 insertions(+), 16 deletions(-) create mode 100644 drivers/ras/page_eject.c -- 2.25.1

2 8

[PATCH OLK-5.10] mpam: Fix uninitialized value
by Yu Liao 28 Nov '23

28 Nov '23

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7ZRRD -------------------------------- Fix the following smatch warning: drivers/acpi/arm64/mpam.c:219 acpi_mpam_parse_version() error: uninitialized symbol 'ret'. Fixes: b1e2f3d84839 ("[Backport] ACPI/MPAM: Adapt to Arm's MPAM ACPI table version 2") Signed-off-by: Yu Liao <liaoyu15(a)huawei.com> --- drivers/acpi/arm64/mpam.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/acpi/arm64/mpam.c b/drivers/acpi/arm64/mpam.c index f625f539d50a..9d59652e49f8 100644 --- a/drivers/acpi/arm64/mpam.c +++ b/drivers/acpi/arm64/mpam.c @@ -219,7 +219,7 @@ int __init acpi_mpam_parse_version(void) { struct acpi_table_header *mpam, *pptt; acpi_status status; - int ret; + int ret = -EINVAL; if (!cpus_have_const_cap(ARM64_HAS_MPAM)) return 0; -- 2.25.1

2 1

[PATCH OLK-5.10] Revert "arm64/mpam: Fix mpam corrupt when cpu online"
by Yu Liao 28 Nov '23

28 Nov '23

From: Wang ShaoBo <bobo.shaobowang(a)huawei.com> hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7R0WK ------------------------------------------------- BUG 'sleeping function called from invalid context' reported when setup MPAM driver, it was blamed to bc9e3f9895ef2 ("arm64/mpam: Fix mpam corrupt when cpu online"), which reported a 'Bad PC' BUG, but missing the right conclusion, finally disabling irqs before calling cpuhp_setup_state() may only affect the probability of reproduction. The reason why triggerring 'Bad PC' BUG report is because mpam_enable() is __init type function, and may schedule out after calling __cpuhp_setup_state()->__might_sleep(), so the space of mpam_enable() might be freed after scheduling back. As we have changed mpam_enable() to non-init type function, we can revert commit bc9e3f9895ef2 directly, to solve these both two problems. Fixes: bc9e3f9895ef2 ("arm64/mpam: Fix mpam corrupt when cpu online") Signed-off-by: Wang ShaoBo <bobo.shaobowang(a)huawei.com> Signed-off-by: Yu Liao <liaoyu15(a)huawei.com> --- arch/arm64/kernel/mpam/mpam_device.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/kernel/mpam/mpam_device.c b/arch/arm64/kernel/mpam/mpam_device.c index 96288f66f619..b3de7f518423 100644 --- a/arch/arm64/kernel/mpam/mpam_device.c +++ b/arch/arm64/kernel/mpam/mpam_device.c @@ -621,11 +621,9 @@ static void mpam_enable(struct work_struct *work) pr_err("Failed to setup/init resctrl\n"); mutex_unlock(&mpam_devices_lock); - local_irq_disable(); mpam_cpuhp_state = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "mpam:online", mpam_cpu_online, mpam_cpu_offline); - local_irq_enable(); if (mpam_cpuhp_state <= 0) pr_err("Failed to re-register 'dyn' cpuhp callbacks"); mutex_unlock(&mpam_cpuhp_lock); -- 2.25.1

2 1

[PATCH OLK-5.10] posix-cpu-timers: Implement timer_wait_running callback
by Xiongfeng Wang 28 Nov '23

28 Nov '23

hulk inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/I7EQ8B -------------------------------- For posix CPU timers, the .timer_wait_running() callback is missing, which cause WARN_ON() in timer_wait_running(). Commit f7abf14f0001 ("posix-cpu-timers: Implement the missing timer_wait_running callback") solved the problem. But it introduce a kabi broken which is hard to fix. The commit also describe a livelock in preemptible kernel. To fix the livelock, we add cond_resched() in the retry loop. *** below is from origin commit merge tag The reason is that for CONFIG_POSIX_CPU_TIMERS_TASK_WORK enabled systems there is a livelock issue independent of RT. CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y moves the expiry of POSIX CPU timers out from hard interrupt context to task work, which is handled before returning to user space or to a VM. The expiry mechanism moves the expired timers to a stack local list head with sighand lock held. Once sighand is dropped the task can be preempted and a task which wants to delete a timer will spin-wait until the expiry task is scheduled back in. In the worst case this will end up in a livelock when the preempting task and the expiry task are pinned on the same CPU. Signed-off-by: Xiongfeng Wang <wangxiongfeng2(a)huawei.com> --- kernel/time/posix-cpu-timers.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/kernel/time/posix-cpu-timers.c b/kernel/time/posix-cpu-timers.c index c97bc3e3b210..578d0ebedb67 100644 --- a/kernel/time/posix-cpu-timers.c +++ b/kernel/time/posix-cpu-timers.c @@ -1446,6 +1446,9 @@ static int do_cpu_nanosleep(const clockid_t which_clock, int flags, spin_lock_irq(&timer.it_lock); error = posix_cpu_timer_del(&timer); spin_unlock_irq(&timer.it_lock); +#ifdef CONFIG_POSIX_CPU_TIMERS_TASK_WORK + cond_resched(); +#endif } if ((it.it_value.tv_sec | it.it_value.tv_nsec) == 0) { @@ -1546,6 +1549,18 @@ static int thread_cpu_timer_create(struct k_itimer *timer) return posix_cpu_timer_create(timer); } +static void posix_cpu_timer_wait_running(struct k_itimer *timr) +{ +#ifdef CONFIG_POSIX_CPU_TIMERS_TASK_WORK + rcu_read_unlock(); + cond_resched(); + rcu_read_lock(); +#else + cpu_relax(); +#endif +} + + const struct k_clock clock_posix_cpu = { .clock_getres = posix_cpu_clock_getres, .clock_set = posix_cpu_clock_set, @@ -1556,6 +1571,7 @@ const struct k_clock clock_posix_cpu = { .timer_del = posix_cpu_timer_del, .timer_get = posix_cpu_timer_get, .timer_rearm = posix_cpu_timer_rearm, + .timer_wait_running = posix_cpu_timer_wait_running, }; const struct k_clock clock_process = { -- 2.20.1

2 1

[PATCH OLK-6.6 0/6] Handle more faults under the VMA lock
by Tong Tiangen 28 Nov '23

28 Nov '23

At this point, we're handling the majority of file-backed page faults under the VMA lock, using the ->map_pages entry point. This patch set attempts to expand that for the following siutations: - We have to do a read. This could be because we've hit the point in the readahead window where we need to kick off the next readahead, or because the page is simply not present in cache. - We're handling a write fault. Most applications don't do I/O by writes to shared mmaps for very good reasons, but some do, and it'd be nice to not make that slow unnecessarily. - We're doing a COW of a private mapping (both PTE already present and PTE not-present). These are two different codepaths and I handle both of them in this patch set. There is no support in this patch set for drivers to mark themselves as being VMA lock friendly; they could implement the ->map_pages vm_operation, but if they do, they would be the first. This is probably something we want to change at some point in the future, and I've marked where to make that change in the code. There is very little performance change in the benchmarks we've run; mostly because the vast majority of page faults are handled through the other paths. I still think this patch series is useful for workloads that may take these paths more often, and just for cleaning up the fault path in general (it's now clearer why we have to retry in these cases). Matthew Wilcox (Oracle) (6): mm: make lock_folio_maybe_drop_mmap() VMA lock aware mm: call wp_page_copy() under the VMA lock mm: handle shared faults under the VMA lock mm: handle COW faults under the VMA lock mm: handle read faults under the VMA lock mm: handle write faults to RO pages under the VMA lock mm/filemap.c | 13 ++++---- mm/memory.c | 93 ++++++++++++++++++++++++++++++++-------------------- 2 files changed, 65 insertions(+), 41 deletions(-) -- 2.25.1

2 7