virt inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I9A45R CVE: NA
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Add macro for feature DVMBM.
Signed-off-by: lishusen lishusen2@huawei.com --- arch/arm64/include/asm/kvm_host.h | 2 ++ arch/arm64/include/asm/kvm_mmu.h | 5 +++++ arch/arm64/kvm/arm.c | 12 ++++++++---- arch/arm64/kvm/hisilicon/hisi_virt.c | 21 ++++++++++++--------- arch/arm64/kvm/hyp/pgtable.c | 5 +++++ 5 files changed, 32 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 8c64fa87279b..e68e39fbf26e 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -1227,7 +1227,9 @@ extern unsigned int twedel; void kvm_arm_vcpu_power_off(struct kvm_vcpu *vcpu); bool kvm_arm_vcpu_stopped(struct kvm_vcpu *vcpu);
+#ifdef CONFIG_KVM_HISI_VIRT extern bool kvm_ncsnp_support; extern bool kvm_dvmbm_support; +#endif
#endif /* __ARM64_KVM_HOST_H__ */ diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index d698ce35deb8..e3cf02f3b8fd 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -218,8 +218,13 @@ static inline void __clean_dcache_guest_page(void *va, size_t size) * faulting in pages. Furthermore, FWB implies IDC, so cleaning to * PoU is not required either in this case. */ +#ifdef CONFIG_KVM_HISI_VIRT if (kvm_ncsnp_support || cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) return; +#else + if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) + return; +#endif
kvm_flush_dcache_to_poc(va, size); } diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c index 859689e80ec4..981aaaf5671a 100644 --- a/arch/arm64/kvm/arm.c +++ b/arch/arm64/kvm/arm.c @@ -58,11 +58,13 @@ DECLARE_KVM_NVHE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);
static bool vgic_present, kvm_arm_initialised;
+#ifdef CONFIG_KVM_HISI_VIRT /* Capability of non-cacheable snooping */ bool kvm_ncsnp_support;
/* Capability of DVMBM */ bool kvm_dvmbm_support; +#endif
static DEFINE_PER_CPU(unsigned char, kvm_hyp_initialized); DEFINE_STATIC_KEY_FALSE(userspace_irqchip_in_use); @@ -2524,6 +2526,8 @@ static __init int kvm_arm_init(void) { int err; bool in_hyp_mode; + bool kvm_ncsnp_enable = false; + bool kvm_dvmbm_enable = false;
if (!is_hyp_mode_available()) { kvm_info("HYP mode not available\n"); @@ -2542,10 +2546,10 @@ static __init int kvm_arm_init(void) }
probe_hisi_cpu_type(); - kvm_ncsnp_support = hisi_ncsnp_supported(); - kvm_dvmbm_support = hisi_dvmbm_supported(); - kvm_info("KVM ncsnp %s\n", kvm_ncsnp_support ? "enabled" : "disabled"); - kvm_info("KVM dvmbm %s\n", kvm_dvmbm_support ? "enabled" : "disabled"); + kvm_ncsnp_enable = hisi_ncsnp_supported(); + kvm_dvmbm_enable = hisi_dvmbm_supported(); + kvm_info("KVM ncsnp %s\n", kvm_ncsnp_enable ? "enabled" : "disabled"); + kvm_info("KVM dvmbm %s\n", kvm_dvmbm_enable ? "enabled" : "disabled");
in_hyp_mode = is_kernel_in_hyp_mode();
diff --git a/arch/arm64/kvm/hisilicon/hisi_virt.c b/arch/arm64/kvm/hisilicon/hisi_virt.c index 662ddf5b124b..28eb7aa6a5f0 100644 --- a/arch/arm64/kvm/hisilicon/hisi_virt.c +++ b/arch/arm64/kvm/hisilicon/hisi_virt.c @@ -108,23 +108,23 @@ bool hisi_ncsnp_supported(void) { void __iomem *base; unsigned int high; - bool supported = false; + kvm_ncsnp_support = false;
if (cpu_type != HI_1620) - return supported; + return kvm_ncsnp_support;
base = ioremap(NCSNP_MMIO_BASE, 4); if (!base) { pr_warn("Unable to map MMIO region when probing ncsnp!\n"); - return supported; + return kvm_ncsnp_support; }
high = readl_relaxed(base) >> 28; iounmap(base); if (high != 0x1) - supported = true; + kvm_ncsnp_support = true;
- return supported; + return kvm_ncsnp_support; }
static int __init early_dvmbm_enable(char *buf) @@ -153,17 +153,18 @@ static void hardware_disable_dvmbm(void *data)
bool hisi_dvmbm_supported(void) { + kvm_dvmbm_support = false; if (cpu_type != HI_IP09) - return false; + return kvm_dvmbm_support;
/* Determine whether DVMBM is supported by the hardware */ if (!(read_sysreg(aidr_el1) & AIDR_EL1_DVMBM_MASK)) - return false; + return kvm_dvmbm_support;
/* User provided kernel command-line parameter */ if (!dvmbm_enabled || !is_kernel_in_hyp_mode()) { on_each_cpu(hardware_disable_dvmbm, NULL, 1); - return false; + return kvm_dvmbm_support; }
/* @@ -171,7 +172,9 @@ bool hisi_dvmbm_supported(void) * LSUDVM_CTRL_EL2's bit[0]. */ on_each_cpu(hardware_enable_dvmbm, NULL, 1); - return true; + + kvm_dvmbm_support = true; + return kvm_dvmbm_support; }
int kvm_sched_affinity_vcpu_init(struct kvm_vcpu *vcpu) diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c index 1ba101ba9392..b740a4f1c255 100644 --- a/arch/arm64/kvm/hyp/pgtable.c +++ b/arch/arm64/kvm/hyp/pgtable.c @@ -1342,8 +1342,13 @@ int kvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size) .arg = pgt, };
+#ifdef CONFIG_KVM_HISI_VIRT if (kvm_ncsnp_support || stage2_has_fwb(pgt)) return 0; +#else + if (stage2_has_fwb(pgt)) + return 0; +#endif
return kvm_pgtable_walk(pgt, addr, size, &walker); }