From: Gao Chuan gaochuan4@huawei.com
driver inclusion category: bugfix bugzilla: NA CVE: NA
Hisi sas tried to alloc 16 affinity interrupts. When cpu cores > 16, it will own all what it alloced. However when cpu cores < 16, such as cpu cores = 8, only 8 affinity interrupts could be alloced. Then hisi sas set "nvecs = 8" to record the number. When resetting hisi sas host, it tried to operate all it'self interrupts. it used "queue_count" instead of "nvecs" to find the interrupts. But the "queue_count" was 16 forever, which lead to try to operate other's interrupt finally.
Feature or Bugfix:Bugfix
Signed-off-by: Gao Chuan gaochuan4@huawei.com Reviewed-by: zhouyupeng zhouyupeng1@huawei.com Reviewed-by: luojian luojian5@huawei.com Signed-off-by: Yang Yingliang yangyingliang@huawei.com --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 23bf4750f358..acf2fc667ac0 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -2691,7 +2691,7 @@ static void interrupt_disable_v3_hw(struct hisi_hba *hisi_hba) synchronize_irq(pci_irq_vector(pdev, PCI_IRQ_PHY)); synchronize_irq(pci_irq_vector(pdev, PCI_IRQ_CHANNEL)); synchronize_irq(pci_irq_vector(pdev, PCI_IRQ_AXI_FATAL)); - for (i = 0; i < hisi_hba->queue_count; i++) { + for (i = 0; i < hisi_hba->nvecs; i++) { hisi_sas_write32(hisi_hba, OQ0_INT_SRC_MSK + 0x4 * i, 0x1); synchronize_irq(pci_irq_vector(pdev, i + PCI_IRQ_CQ_BASE)); }