LoongArch inclusion category: bugfix bugzilla: https://gitee.com/openeuler/kernel/issues/IB4PPE CVE: NA

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This reverts commit 1c1c00037eb689f81d98f269fbdf76fa178bb15d.

Fixes: 1c1c00037eb6 ("Loongarch: Dynamic enable writecombine") Signed-off-by: Hongchen Zhang zhanghongchen@loongson.cn --- arch/loongarch/kernel/setup.c | 28 ++-------------------------- include/drm/drm_cache.h | 2 +- 2 files changed, 3 insertions(+), 27 deletions(-)

diff --git a/arch/loongarch/kernel/setup.c b/arch/loongarch/kernel/setup.c index a210e2507368..481c85a5f1b5 100644 --- a/arch/loongarch/kernel/setup.c +++ b/arch/loongarch/kernel/setup.c @@ -184,14 +184,12 @@ bool wc_enabled = false;

EXPORT_SYMBOL(wc_enabled);

-static int wc_arg = -1; - static int __init setup_writecombine(char *p) { if (!strcmp(p, "on")) - wc_arg = true; + wc_enabled = true; else if (!strcmp(p, "off")) - wc_arg = false; + wc_enabled = false; else pr_warn("Unknown writecombine setting "%s".\n", p);

@@ -373,26 +371,6 @@ static void __init bootcmdline_init(char **cmdline_p) *cmdline_p = boot_command_line; }

-static void __init writecombine_detect(void) -{ - u64 cpuname; - - if (wc_arg >= 0) { - wc_enabled = wc_arg; - return; - } - - cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME); - - switch (cpuname) { - case 0x0000303030364333: - wc_enabled = true; - break; - default: - break; - } -} - void __init platform_init(void) { arch_reserve_vmcore(); @@ -416,8 +394,6 @@ void __init platform_init(void) smbios_parse(); pr_info("The BIOS Version: %s\n", b_info.bios_version);

- writecombine_detect(); - pr_info("WriteCombine: %s\n", wc_enabled ? "on":"off"); efi_runtime_init(); }

diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h index 667fb0368ef6..08e0e3ffad13 100644 --- a/include/drm/drm_cache.h +++ b/include/drm/drm_cache.h @@ -74,7 +74,7 @@ static inline bool drm_arch_can_wc_memory(void) * cache coherency machanism. This means WUC can only used for write-only * memory regions. */ - return wc_enabled; + return false; #else return true; #endif