From: Yufeng Mo moyufeng@huawei.com

driver inclusion category: bugfix bugzilla: NA CVE: NA DTS:DTS202107060S2FXIP1300

----------------------------

Currently, affinity_mask is set to a single value. As a result, irqbalance becomes invalid in SUBSET or EXACT mode. To solve this problem, change affinity_mask to a value range. In this way, irqbalance can be performed on the CPU of the NUMA node.

Signed-off-by: Yufeng Mo moyufeng@huawei.com Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index e9a04e72ae02..90dd2a2ebd38 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -1452,15 +1452,12 @@ static int hclge_configure(struct hclge_dev *hdev)

hclge_init_kdump_kernel_config(hdev);

- /* Set the init affinity based on pci func number */ + /* Set the affinity based on numa node */ node = dev_to_node(&hdev->pdev->dev); if (node != NUMA_NO_NODE) cpumask = cpumask_of_node(node);

- i = cpumask_weight(cpumask); - i = i ? PCI_FUNC(hdev->pdev->devfn) % i : 0; - cpumask_set_cpu(cpumask_local_spread(i, dev_to_node(&hdev->pdev->dev)), - &hdev->affinity_mask); + cpumask_copy(&hdev->affinity_mask, cpumask);

return ret; }

From: Huazhong Tan tanhuazhong@huawei.com

mainline inclusion from mainline-v5.8-rc1 commit 6f45a9bdd2aee6cc1e4223fdc9e4f548a3f54595 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

When initializing CMDQ fails because of reset pending, there is no hint for debugging, so adds a log for it.

Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Milldder davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c index ea220cc88224..fc436f25e69a 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c @@ -450,6 +450,9 @@ int hclge_cmd_init(struct hclge_dev *hdev) * reset may happen when lower level reset is being processed. */ if ((hclge_is_reset_pending(hdev))) { + dev_err(&hdev->pdev->dev, + "failed to init cmd since reset %#lx pending\n", + hdev->reset_pending); ret = -EBUSY; goto err_cmd_init; }

From: Huazhong Tan tanhuazhong@huawei.com

mainline inclusion from mainline-v5.8-rc1 commit ead38a8537bf87228917f23c2131c7a020fe0951 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

When calling hclge_parse_speed() fails, printing out the speed is helpful for debugging.

Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 1187e3546464..c5aad5e79a38 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -1419,7 +1419,8 @@ static int hclge_configure(struct hclge_dev *hdev)

ret = hclge_parse_speed(cfg.default_speed, &hdev->hw.mac.speed); if (ret) { - dev_err(&hdev->pdev->dev, "Get wrong speed ret=%d.\n", ret); + dev_err(&hdev->pdev->dev, "failed to parse speed %u, ret = %d\n", + cfg.default_speed, ret); return ret; }

From: Yufeng Mo moyufeng@huawei.com

mainline inclusion from mainline-v5.10-rc1 commit 348775ebe9114e9ceedafc5c85530c7e29cea369 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

The pf's interrupt resources will be changed with the number of enabled pf. Dumping this resource information will be helpful for debugging.

Signed-off-by: Yufeng Mo moyufeng@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 1 + .../ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c | 12 ++++++++++++ 2 files changed, 13 insertions(+)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index f14022d6b2f6..8f8eb6827e14 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -263,6 +263,7 @@ static void hns3_dbg_help(struct hnae3_handle *h) dev_info(&h->pdev->dev, "dump qs shaper [qs id]\n"); dev_info(&h->pdev->dev, "dump uc mac list <func id>\n"); dev_info(&h->pdev->dev, "dump mc mac list <func id>\n"); + dev_info(&h->pdev->dev, "dump intr\n"); dev_info(&h->pdev->dev, "dump umv info <func id>\n"); dev_info(&h->pdev->dev, "dump vlan filter <func id>\n");

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 4895eb88fc9d..0138b85038af 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -1296,6 +1296,14 @@ static void hclge_dbg_dump_serv_info(struct hclge_dev *hdev) hdev->serv_processed_cnt); }

+static void hclge_dbg_dump_interrupt(struct hclge_dev *hdev) +{ + dev_info(&hdev->pdev->dev, "num_nic_msi: %u\n", hdev->num_nic_msi); + dev_info(&hdev->pdev->dev, "num_roce_msi: %u\n", hdev->num_roce_msi); + dev_info(&hdev->pdev->dev, "num_msi_used: %u\n", hdev->num_msi_used); + dev_info(&hdev->pdev->dev, "num_msi_left: %u\n", hdev->num_msi_left); +} + static void hclge_dbg_get_m7_stats_info(struct hclge_dev *hdev) { struct hclge_desc *desc_src, *desc_tmp; @@ -1714,6 +1722,7 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) { #define DUMP_REG "dump reg" #define DUMP_LOOPBACK "dump loopback" +#define DUMP_INTERRUPT "dump intr" #define DUMP_VLAN_FILTER "dump vlan filter" #define DUMP_UMV_INFO "dump umv info"

@@ -1765,6 +1774,9 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) hclge_dbg_dump_mac_list(hdev, &cmd_buf[sizeof("dump mc mac list")], false); + } else if (strncmp(cmd_buf, DUMP_INTERRUPT, + strlen(DUMP_INTERRUPT)) == 0) { + hclge_dbg_dump_interrupt(hdev); } else if (strncmp(cmd_buf, DUMP_VLAN_FILTER, strlen(DUMP_VLAN_FILTER)) == 0) { hclge_dbg_dump_vlan_filter(hdev,

From: Zheng Yongjun zhengyongjun3@huawei.com

mainline inclusion from mainline-v5.11 commit 474d8feffb31b7f798be0eeab2f5d95557bd79d7 category: cleanup bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

Replace a comma between expression statements by a semicolon.

Signed-off-by: Zheng Yongjun zhengyongjun3@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index c5aad5e79a38..9ccafe3ea668 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -4968,7 +4968,7 @@ static int hclge_init_fd_config(struct hclge_dev *hdev) }

key_cfg = &hdev->fd_cfg.key_cfg[HCLGE_FD_STAGE_1]; - key_cfg->key_sel = HCLGE_FD_KEY_BASE_ON_TUPLE, + key_cfg->key_sel = HCLGE_FD_KEY_BASE_ON_TUPLE; key_cfg->inner_sipv6_word_en = LOW_2_WORDS; key_cfg->inner_dipv6_word_en = LOW_2_WORDS; key_cfg->outer_sipv6_word_en = 0;

From: Jian Shen shenjian15@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit 060e9accaa74 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

The struct hclge_vf_vlan_cfg is firstly designed for setting VLAN filter tag. And it's reused for enable RX VLAN offload later. It's strange to use member "is_kill" to indicate "enable". So redefine the struct hclge_vf_vlan_cfg to adapt it.

For there are already 3 subcodes being used in function hclge_set_vf_vlan_cfg(), use "switch-case" style for each branch, rather than "if-else". Also simplify the assignment for each branch to make it more clearly.

Signed-off-by: Jian Shen shenjian15@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: Jakub Kicinski kuba@kernel.org Signed-off-by: Junxin Chen chenjunxin1@huawei.com --- .../hisilicon/hns3/hns3pf/hclge_main.h | 11 +++++-- .../hisilicon/hns3/hns3pf/hclge_mbx.c | 31 +++++++------------ 2 files changed, 20 insertions(+), 22 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index eefbe9b4383b..f186bd62923f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -700,9 +700,14 @@ struct hclge_mac_tnl_stats { struct hclge_vf_vlan_cfg { u8 mbx_cmd; u8 subcode; - u8 is_kill; - u16 vlan; - u16 proto; + union { + struct { + u8 is_kill; + u16 vlan; + u16 proto; + }; + u8 enable; + }; };

#pragma pack() diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c index d2bfa5f7f22f..2ce59e080107 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c @@ -423,31 +423,24 @@ static int hclge_set_vf_vlan_cfg(struct hclge_vport *vport, { #define HCLGE_MBX_VLAN_STATE_OFFSET 0 #define HCLGE_MBX_VLAN_INFO_OFFSET 2 + struct hnae3_handle *handle = &vport->nic; struct hclge_vf_vlan_cfg *msg_cmd; - int status = 0;

msg_cmd = (struct hclge_vf_vlan_cfg *)&mbx_req->msg; - if (msg_cmd->subcode == HCLGE_MBX_VLAN_FILTER) { - struct hnae3_handle *handle = &vport->nic; - u16 vlan, proto; - bool is_kill; - - is_kill = !!msg_cmd->is_kill; - vlan = msg_cmd->vlan; - proto = msg_cmd->proto; - status = hclge_set_vlan_filter(handle, cpu_to_be16(proto), - vlan, is_kill); - } else if (msg_cmd->subcode == HCLGE_MBX_VLAN_RX_OFF_CFG) { - struct hnae3_handle *handle = &vport->nic; - bool en = msg_cmd->is_kill ? true : false; - - status = hclge_en_hw_strip_rxvtag(handle, en); - } else if (msg_cmd->subcode == HCLGE_MBX_GET_PORT_BASE_VLAN_STATE) { + switch (msg_cmd->subcode) { + case HCLGE_MBX_VLAN_FILTER: + return hclge_set_vlan_filter(handle, + cpu_to_be16(msg_cmd->proto), + msg_cmd->vlan, msg_cmd->is_kill); + case HCLGE_MBX_VLAN_RX_OFF_CFG: + return hclge_en_hw_strip_rxvtag(handle, msg_cmd->enable); + case HCLGE_MBX_GET_PORT_BASE_VLAN_STATE: resp_msg->data[0] = vport->port_base_vlan_cfg.state; resp_msg->len = sizeof(u8); + return 0; + default: + return 0; } - - return status; }

static int hclge_set_vf_alive(struct hclge_vport *vport,

From: Jian Shen shenjian15@huawei.com

mainline inclusion from mainline-v5.12-rc1 commit 55ff3ed57b5031c3d48aa064333c35c6a547e3ee category: cleanup bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

Currently the RSS commands of VF are using host byte order. According to the user manual, it should use little endian in the command to firmware. For the host and firmware are both using little endian, so it can work well in this case.

Do cleanup to make it more explicitly.

Signed-off-by: Jian Shen shenjian15@huawei.com Signed-off-by: Huazhong tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- .../ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h | 6 +++--- .../hisilicon/hns3/hns3vf/hclgevf_main.c | 16 +++++++++++----- 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h index b2f5760b0b07..c87ec29f4f38 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h @@ -190,8 +190,8 @@ struct hclgevf_rss_input_tuple_cmd { #define HCLGEVF_RSS_CFG_TBL_SIZE 16

struct hclgevf_rss_indirection_table_cmd { - u16 start_table_index; - u16 rss_set_bitmap; + __le16 start_table_index; + __le16 rss_set_bitmap; u8 rsv[4]; u8 rss_result[HCLGEVF_RSS_CFG_TBL_SIZE]; }; @@ -203,7 +203,7 @@ struct hclgevf_rss_indirection_table_cmd { #define HCLGEVF_RSS_TC_VALID_B 15 #define HCLGEVF_MAX_TC_NUM 8 struct hclgevf_rss_tc_mode_cmd { - u16 rss_tc_mode[HCLGEVF_MAX_TC_NUM]; + __le16 rss_tc_mode[HCLGEVF_MAX_TC_NUM]; u8 rsv[8]; };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index 7516e8530b9a..ec7e5d0c7842 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -639,8 +639,10 @@ static int hclgevf_set_rss_indir_table(struct hclgevf_dev *hdev) for (i = 0; i < HCLGEVF_RSS_CFG_TBL_NUM; i++) { hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_INDIR_TABLE, false); - req->start_table_index = i * HCLGEVF_RSS_CFG_TBL_SIZE; - req->rss_set_bitmap = HCLGEVF_RSS_SET_BITMAP_MSK; + req->start_table_index = + cpu_to_le16(i * HCLGEVF_RSS_CFG_TBL_SIZE); + req->rss_set_bitmap = cpu_to_le16(HCLGEVF_RSS_SET_BITMAP_MSK); + for (j = 0; j < HCLGEVF_RSS_CFG_TBL_SIZE; j++) req->rss_result[j] = indir[i * HCLGEVF_RSS_CFG_TBL_SIZE + j]; @@ -681,12 +683,16 @@ static int hclgevf_set_rss_tc_mode(struct hclgevf_dev *hdev, u16 rss_size)

hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_RSS_TC_MODE, false); for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) { - hnae3_set_bit(req->rss_tc_mode[i], HCLGEVF_RSS_TC_VALID_B, + u16 mode = 0; + + hnae3_set_bit(mode, HCLGEVF_RSS_TC_VALID_B, (tc_valid[i] & 0x1)); - hnae3_set_field(req->rss_tc_mode[i], HCLGEVF_RSS_TC_SIZE_M, + hnae3_set_field(mode, HCLGEVF_RSS_TC_SIZE_M, HCLGEVF_RSS_TC_SIZE_S, tc_size[i]); - hnae3_set_field(req->rss_tc_mode[i], HCLGEVF_RSS_TC_OFFSET_M, + hnae3_set_field(mode, HCLGEVF_RSS_TC_OFFSET_M, HCLGEVF_RSS_TC_OFFSET_S, tc_offset[i]); + + req->rss_tc_mode[i] = cpu_to_le16(mode); } status = hclgevf_cmd_send(&hdev->hw, &desc, 1); if (status)

From: Jian Shen shenjian15@huawei.com

mainline inclusion from mainline-v5.12-rc3 commit c75ec148a316e8cf52274d16b9b422703b96f5ce category: bugfix bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

Currently, the driver returns VLAN_VID_MASK for vlan mask field, when get flow director rule information for rule doesn't use vlan. It may cause the vlan mask value display as 0xf000 in this case, like below:

estuary:/$ ethtool -u eth1 50 RX rings available Total 1 rules

Filter: 2 Rule Type: TCP over IPv4 Src IP addr: 0.0.0.0 mask: 255.255.255.255 Dest IP addr: 0.0.0.0 mask: 255.255.255.255 TOS: 0x0 mask: 0xff Src port: 0 mask: 0xffff Dest port: 0 mask: 0xffff VLAN EtherType: 0x0 mask: 0xffff VLAN: 0x0 mask: 0xf000 User-defined: 0x1234 mask: 0x0 Action: Direct to queue 3

Fix it by return 0.

Fixes: 05c2314fe6a8 ("net: hns3: Add support for rule query of flow director") Signed-off-by: Jian Shen shenjian15@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: Jakub Kicinski kuba@kernel.org Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 9ccafe3ea668..a63d039b7426 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -6168,8 +6168,7 @@ static void hclge_fd_get_ext_info(struct ethtool_rx_flow_spec *fs, fs->h_ext.vlan_tci = cpu_to_be16(rule->tuples.vlan_tag1); fs->m_ext.vlan_tci = rule->unused_tuple & BIT(INNER_VLAN_TAG_FST) ? - cpu_to_be16(VLAN_VID_MASK) : - cpu_to_be16(rule->tuples_mask.vlan_tag1); + 0 : cpu_to_be16(rule->tuples_mask.vlan_tag1); }

if (fs->flow_type & FLOW_MAC_EXT) {

From: Huazhong Tan tanhuazhong@huawei.com

mainline inclusion from mainline-v5.13-rc1 commit 1c5a2ba67989c01b8aeda81969b7a4a3702c51b5 category: cleanup bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

When enter suspend mode the counter of pf reset will be increased twice, since both hclge_prepare_general() and hclge_prepare_wait() increase this counter. So remove the duplicate counting in hclge_prepare_general().

Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 2 -- 1 file changed, 2 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 943339f4bad6..fdf2c88b6336 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -10204,8 +10204,6 @@ static void hclge_reset_prepare_general(struct hnae3_ae_dev *ae_dev,

if (hdev->reset_type == HNAE3_FLR_RESET) hdev->rst_stats.flr_rst_cnt++; - else if (hdev->reset_type == HNAE3_FUNC_RESET) - hdev->rst_stats.pf_rst_cnt++; }

static void hclge_reset_done(struct hnae3_ae_dev *ae_dev)

From: Jian Shen shenjian15@huawei.com

mainline inclusion from mainline-v5.11-rc1 commit 35244430d624 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, there are multiple members related to tc information in struct hnae3_knic_private_info. Merge them into a new struct hnae3_tc_info.

Signed-off-by: Jian Shen shenjian15@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Junxin Chen chenjunxin1@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 18 +++---- .../net/ethernet/hisilicon/hns3/hns3_enet.c | 33 ++++++------- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 2 +- .../hisilicon/hns3/hns3pf/hclge_main.c | 4 +- .../hisilicon/hns3/hns3pf/hclge_mbx.c | 2 +- .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 49 +++++++++---------- .../hisilicon/hns3/hns3vf/hclgevf_main.c | 21 ++++---- 7 files changed, 63 insertions(+), 66 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 98ae2afee3b1..69e038b3743a 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -604,6 +604,9 @@ struct hnae3_ae_algo { #define HNAE3_INT_NAME_LEN 32 #define HNAE3_ITR_COUNTDOWN_START 100

+#define HNAE3_MAX_TC 8 +#define HNAE3_MAX_USER_PRIO 8 + #define HNAE3_FORMAT_MAC_ADDR_LEN 18 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_0 0 #define HNAE3_FORMAT_MAC_ADDR_OFFSET_4 4 @@ -619,14 +622,13 @@ static inline void hnae3_format_mac_addr(char *format_mac_addr, }

struct hnae3_tc_info { - u16 tqp_offset; /* TQP offset from base TQP */ - u16 tqp_count; /* Total TQPs */ - u8 tc; /* TC index */ - bool enable; /* If this TC is enable or not */ + u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ + u16 tqp_count[HNAE3_MAX_TC]; + u16 tqp_offset[HNAE3_MAX_TC]; + unsigned long tc_en; /* bitmap of TC enabled */ + u8 num_tc; /* Total number of enabled TCs */ };

-#define HNAE3_MAX_TC 8 -#define HNAE3_MAX_USER_PRIO 8 struct hnae3_knic_private_info { struct net_device *netdev; /* Set by KNIC client when init instance */ u16 rss_size; /* Allocated RSS queues */ @@ -635,9 +637,7 @@ struct hnae3_knic_private_info { u16 num_tx_desc; u16 num_rx_desc;

- u8 num_tc; /* Total number of enabled TCs */ - u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ - struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */ + struct hnae3_tc_info tc_info;

u16 num_tqps; /* total number of TQPs in this handle */ struct hnae3_queue **tqp; /* array base of all TQPs in this instance */ diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index 5c5bdea36fcc..a2981e4573f0 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -270,13 +270,14 @@ static int hns3_nic_set_real_num_queue(struct net_device *netdev) { struct hnae3_handle *h = hns3_get_handle(netdev); struct hnae3_knic_private_info *kinfo = &h->kinfo; - unsigned int queue_size = kinfo->rss_size * kinfo->num_tc; + struct hnae3_tc_info *tc_info = &kinfo->tc_info; + unsigned int queue_size = kinfo->rss_size * tc_info->num_tc; int i, ret;

- if (kinfo->num_tc <= 1) { + if (tc_info->num_tc <= 1) { netdev_reset_tc(netdev); } else { - ret = netdev_set_num_tc(netdev, kinfo->num_tc); + ret = netdev_set_num_tc(netdev, tc_info->num_tc); if (ret) { netdev_err(netdev, "netdev_set_num_tc fail, ret=%d!\n", ret); @@ -284,13 +285,11 @@ static int hns3_nic_set_real_num_queue(struct net_device *netdev) }

for (i = 0; i < HNAE3_MAX_TC; i++) { - if (!kinfo->tc_info[i].enable) + if (!test_bit(i, &tc_info->tc_en)) continue;

- netdev_set_tc_queue(netdev, - kinfo->tc_info[i].tc, - kinfo->tc_info[i].tqp_count, - kinfo->tc_info[i].tqp_offset); + netdev_set_tc_queue(netdev, i, tc_info->tqp_count[i], + tc_info->tqp_offset[i]); } }

@@ -316,7 +315,7 @@ static u16 hns3_get_max_available_channels(struct hnae3_handle *h) u16 alloc_tqps, max_rss_size, rss_size;

h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size); - rss_size = alloc_tqps / h->kinfo.num_tc; + rss_size = alloc_tqps / h->kinfo.tc_info.num_tc;

return min_t(u16, rss_size, max_rss_size); } @@ -455,7 +454,7 @@ static int hns3_nic_net_open(struct net_device *netdev)

kinfo = &h->kinfo; for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) - netdev_set_prio_tc_map(netdev, i, kinfo->prio_tc[i]); + netdev_set_prio_tc_map(netdev, i, kinfo->tc_info.prio_tc[i]);

if (h->ae_algo->ops->set_timer_task) h->ae_algo->ops->set_timer_task(priv->ae_handle, true); @@ -3996,21 +3995,20 @@ static void hns3_init_ring_hw(struct hns3_enet_ring *ring) static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv) { struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo; + struct hnae3_tc_info *tc_info = &kinfo->tc_info; int i;

for (i = 0; i < HNAE3_MAX_TC; i++) { - struct hnae3_tc_info *tc_info = &kinfo->tc_info[i]; int j;

- if (!tc_info->enable) + if (!test_bit(i, &tc_info->tc_en)) continue;

- for (j = 0; j < tc_info->tqp_count; j++) { + for (j = 0; j < tc_info->tqp_count[i]; j++) { struct hnae3_queue *q;

- q = priv->ring[tc_info->tqp_offset + j].tqp; - hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG, - tc_info->tc); + q = priv->ring[tc_info->tqp_offset[i] + j].tqp; + hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG, i); } } } @@ -4141,7 +4139,8 @@ static void hns3_info_show(struct hns3_nic_priv *priv) dev_info(priv->dev, "RX buffer length: %u\n", kinfo->rx_buf_len); dev_info(priv->dev, "Desc num per TX queue: %u\n", kinfo->num_tx_desc); dev_info(priv->dev, "Desc num per RX queue: %u\n", kinfo->num_rx_desc); - dev_info(priv->dev, "Total number of enabled TCs: %u\n", kinfo->num_tc); + dev_info(priv->dev, "Total number of enabled TCs: %u\n", + kinfo->tc_info.num_tc); dev_info(priv->dev, "Max mtu size: %u\n", priv->netdev->max_mtu); }

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 0138b85038af..96e0661776c0 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -1549,7 +1549,7 @@ static void hclge_dbg_dump_qs_shaper_all(struct hclge_dev *hdev)

dev_info(&hdev->pdev->dev, "qs cfg of vport%d:\n", vport_id);

- for (i = 0; i < kinfo->num_tc; i++) { + for (i = 0; i < kinfo->tc_info.num_tc; i++) { u16 qsid = vport->qs_offset + i;

hclge_dbg_dump_qs_shaper_single(hdev, qsid); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index fdf2c88b6336..2b32d18bcc1c 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -10832,7 +10832,7 @@ static u32 hclge_get_max_channels(struct hnae3_handle *handle) struct hclge_dev *hdev = vport->back;

return min_t(u32, hdev->rss_size_max, - vport->alloc_tqps / kinfo->num_tc); + vport->alloc_tqps / kinfo->tc_info.num_tc); }

static void hclge_get_channels(struct hnae3_handle *handle, @@ -10919,7 +10919,7 @@ static int hclge_set_channels(struct hnae3_handle *handle, u32 new_tqps_num, dev_info(&hdev->pdev->dev, "Channels changed, rss_size from %u to %u, tqps from %u to %u", cur_rss_size, kinfo->rss_size, - cur_tqps, kinfo->rss_size * kinfo->num_tc); + cur_tqps, kinfo->rss_size * kinfo->tc_info.num_tc);

return ret; } diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c index 2ce59e080107..ae2e00ecf295 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c @@ -463,7 +463,7 @@ static void hclge_get_vf_tcinfo(struct hclge_vport *vport, struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo; unsigned int i;

- for (i = 0; i < kinfo->num_tc; i++) + for (i = 0; i < kinfo->tc_info.num_tc; i++) resp_msg->data[0] |= BIT(i);

resp_msg->len = sizeof(u8); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c index d5a85a464fac..161714d34598 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c @@ -533,7 +533,7 @@ int hclge_tm_qs_shaper_cfg(struct hclge_vport *vport, int max_tx_rate) HCLGE_SHAPER_BS_U_DEF, HCLGE_SHAPER_BS_S_DEF);

- for (i = 0; i < kinfo->num_tc; i++) { + for (i = 0; i < kinfo->tc_info.num_tc; i++) { hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_QCN_SHAPPING_CFG, false);

@@ -564,13 +564,13 @@ static void hclge_tm_vport_tc_info_update(struct hclge_vport *vport) /* TC configuration is shared by PF/VF in one port, only allow * one tc for VF for simplicity. VF's vport_id is non zero. */ - kinfo->num_tc = vport->vport_id ? 1 : + kinfo->tc_info.num_tc = vport->vport_id ? 1 : min_t(u16, vport->alloc_tqps, hdev->tm_info.num_tc); vport->qs_offset = (vport->vport_id ? HNAE3_MAX_TC : 0) + (vport->vport_id ? (vport->vport_id - 1) : 0);

max_rss_size = min_t(u16, hdev->rss_size_max, - vport->alloc_tqps / kinfo->num_tc); + vport->alloc_tqps / kinfo->tc_info.num_tc);

/* Set to user value, no larger than max_rss_size. */ if (kinfo->req_rss_size != kinfo->rss_size && kinfo->req_rss_size && @@ -587,34 +587,32 @@ static void hclge_tm_vport_tc_info_update(struct hclge_vport *vport) if (!kinfo->req_rss_size) max_rss_size = min_t(u16, max_rss_size, (hdev->num_nic_msi - 1) / - kinfo->num_tc); + kinfo->tc_info.num_tc);

/* Set to the maximum specification value (max_rss_size). */ kinfo->rss_size = max_rss_size; }

- kinfo->num_tqps = kinfo->num_tc * kinfo->rss_size; + kinfo->num_tqps = kinfo->tc_info.num_tc * kinfo->rss_size; vport->dwrr = 100; /* 100 percent as init */ vport->alloc_rss_size = kinfo->rss_size; vport->bw_limit = hdev->tm_info.pg_info[0].bw_limit;

for (i = 0; i < HNAE3_MAX_TC; i++) { - if (hdev->hw_tc_map & BIT(i) && i < kinfo->num_tc) { - kinfo->tc_info[i].enable = true; - kinfo->tc_info[i].tqp_offset = i * kinfo->rss_size; - kinfo->tc_info[i].tqp_count = kinfo->rss_size; - kinfo->tc_info[i].tc = i; + if (hdev->hw_tc_map & BIT(i) && i < kinfo->tc_info.num_tc) { + set_bit(i, &kinfo->tc_info.tc_en); + kinfo->tc_info.tqp_offset[i] = i * kinfo->rss_size; + kinfo->tc_info.tqp_count[i] = kinfo->rss_size; } else { /* Set to default queue if TC is disable */ - kinfo->tc_info[i].enable = false; - kinfo->tc_info[i].tqp_offset = 0; - kinfo->tc_info[i].tqp_count = 1; - kinfo->tc_info[i].tc = 0; + clear_bit(i, &kinfo->tc_info.tc_en); + kinfo->tc_info.tqp_offset[i] = 0; + kinfo->tc_info.tqp_count[i] = 1; } }

- memcpy(kinfo->prio_tc, hdev->tm_info.prio_tc, - FIELD_SIZEOF(struct hnae3_knic_private_info, prio_tc)); + memcpy(kinfo->tc_info.prio_tc, hdev->tm_info.prio_tc, + FIELD_SIZEOF(struct hnae3_tc_info, prio_tc)); }

static void hclge_tm_vport_info_update(struct hclge_dev *hdev) @@ -794,15 +792,14 @@ static int hclge_vport_q_to_qs_map(struct hclge_dev *hdev, struct hclge_vport *vport) { struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo; + struct hnae3_tc_info *tc_info = &kinfo->tc_info; struct hnae3_queue **tqp = kinfo->tqp; - struct hnae3_tc_info *v_tc_info; u32 i, j; int ret;

- for (i = 0; i < kinfo->num_tc; i++) { - v_tc_info = &kinfo->tc_info[i]; - for (j = 0; j < v_tc_info->tqp_count; j++) { - struct hnae3_queue *q = tqp[v_tc_info->tqp_offset + j]; + for (i = 0; i < tc_info->num_tc; i++) { + for (j = 0; j < tc_info->tqp_count[i]; j++) { + struct hnae3_queue *q = tqp[tc_info->tqp_offset[i] + j];

ret = hclge_tm_q_to_qs_map_cfg(hdev, hclge_get_queue_id(q), @@ -827,7 +824,7 @@ static int hclge_tm_pri_q_qs_cfg(struct hclge_dev *hdev) struct hnae3_knic_private_info *kinfo = &vport[k].nic.kinfo;

- for (i = 0; i < kinfo->num_tc; i++) { + for (i = 0; i < kinfo->tc_info.num_tc; i++) { ret = hclge_tm_qs_to_pri_map_cfg( hdev, vport[k].qs_offset + i, i); if (ret) @@ -933,7 +930,7 @@ static int hclge_tm_pri_vnet_base_shaper_qs_cfg(struct hclge_vport *vport) u32 i; int ret;

- for (i = 0; i < kinfo->num_tc; i++) { + for (i = 0; i < kinfo->tc_info.num_tc; i++) { ret = hclge_shaper_para_calc( hdev->tm_info.tc_info[i].bw_limit, HCLGE_SHAPER_LVL_QSET, @@ -1056,7 +1053,7 @@ static int hclge_tm_pri_vnet_base_dwrr_pri_cfg(struct hclge_vport *vport) return ret;

/* Qset dwrr */ - for (i = 0; i < kinfo->num_tc; i++) { + for (i = 0; i < kinfo->tc_info.num_tc; i++) { ret = hclge_tm_qs_weight_cfg( hdev, vport->qs_offset + i, hdev->tm_info.pg_info[0].tc_dwrr[i]); @@ -1187,7 +1184,7 @@ static int hclge_tm_schd_mode_vnet_base_cfg(struct hclge_vport *vport) if (ret) return ret;

- for (i = 0; i < kinfo->num_tc; i++) { + for (i = 0; i < kinfo->tc_info.num_tc; i++) { u8 sch_mode = hdev->tm_info.tc_info[i].tc_sch_mode;

ret = hclge_tm_qs_schd_mode_cfg(hdev, vport->qs_offset + i, @@ -1410,7 +1407,7 @@ void hclge_tm_prio_tc_info_update(struct hclge_dev *hdev, u8 *prio_tc)

for (k = 0; k < hdev->num_alloc_vport; k++) { kinfo = &vport[k].nic.kinfo; - kinfo->prio_tc[i] = prio_tc[i]; + kinfo->tc_info.prio_tc[i] = prio_tc[i]; } } } diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index 1cd372e1d9a0..39c6b6d177d2 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -414,19 +414,20 @@ static int hclgevf_knic_setup(struct hclgevf_dev *hdev) struct hnae3_knic_private_info *kinfo; u16 new_tqps = hdev->num_tqps; unsigned int i; + u8 num_tc = 0;

kinfo = &nic->kinfo; - kinfo->num_tc = 0; kinfo->num_tx_desc = hdev->num_tx_desc; kinfo->num_rx_desc = hdev->num_rx_desc; kinfo->rx_buf_len = hdev->rx_buf_len; for (i = 0; i < HCLGEVF_MAX_TC_NUM; i++) if (hdev->hw_tc_map & BIT(i)) - kinfo->num_tc++; + num_tc++;

- kinfo->rss_size - = min_t(u16, hdev->rss_size_max, new_tqps / kinfo->num_tc); - new_tqps = kinfo->rss_size * kinfo->num_tc; + num_tc = num_tc ? num_tc : 1; + kinfo->tc_info.num_tc = num_tc; + kinfo->rss_size = min_t(u16, hdev->rss_size_max, new_tqps / num_tc); + new_tqps = kinfo->rss_size * num_tc; kinfo->num_tqps = min(new_tqps, hdev->num_tqps);

kinfo->tqp = devm_kcalloc(&hdev->pdev->dev, kinfo->num_tqps, @@ -444,7 +445,7 @@ static int hclgevf_knic_setup(struct hclgevf_dev *hdev) * and rss size with the actual vector numbers */ kinfo->num_tqps = min_t(u16, hdev->num_nic_msix - 1, kinfo->num_tqps); - kinfo->rss_size = min_t(u16, kinfo->num_tqps / kinfo->num_tc, + kinfo->rss_size = min_t(u16, kinfo->num_tqps / num_tc, kinfo->rss_size);

return 0; @@ -3241,7 +3242,7 @@ static u32 hclgevf_get_max_channels(struct hclgevf_dev *hdev) struct hnae3_knic_private_info *kinfo = &nic->kinfo;

return min_t(u32, hdev->rss_size_max, - hdev->num_tqps / kinfo->num_tc); + hdev->num_tqps / kinfo->tc_info.num_tc); }

/** @@ -3284,7 +3285,7 @@ static void hclgevf_update_rss_size(struct hnae3_handle *handle, kinfo->req_rss_size = new_tqps_num;

max_rss_size = min_t(u16, hdev->rss_size_max, - hdev->num_tqps / kinfo->num_tc); + hdev->num_tqps / kinfo->tc_info.num_tc);

/* Set to user value, no larger than max_rss_size. */ if (kinfo->req_rss_size != kinfo->rss_size && kinfo->req_rss_size && @@ -3300,7 +3301,7 @@ static void hclgevf_update_rss_size(struct hnae3_handle *handle, kinfo->rss_size = max_rss_size; }

- kinfo->num_tqps = kinfo->num_tc * kinfo->rss_size; + kinfo->num_tqps = kinfo->tc_info.num_tc * kinfo->rss_size; }

static int hclgevf_set_channels(struct hnae3_handle *handle, u32 new_tqps_num, @@ -3346,7 +3347,7 @@ static int hclgevf_set_channels(struct hnae3_handle *handle, u32 new_tqps_num, dev_info(&hdev->pdev->dev, "Channels changed, rss_size from %u to %u, tqps from %u to %u", cur_rss_size, kinfo->rss_size, - cur_tqps, kinfo->rss_size * kinfo->num_tc); + cur_tqps, kinfo->rss_size * kinfo->tc_info.num_tc);

return ret; }

From: Hao Chen chenhao288@hisilicon.com

mainline inclusion from mainline-v5.13-rc1 commit 905416f18fe74bdd4de91bf94ef5a790a36e4b99 category: bugfix bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

When skb->ip_summed is CHECKSUM_PARTIAL, for non-tunnel udp packet, which has a dest port as the IANA assigned, the hardware is expected to do the checksum offload, but the hardware whose version is below V3 will not do the checksum offload when udp dest port is 4790.

So fixes it by doing the checksum in software for this case.

Fixes: 76ad4f0ee747 ("net: hns3: Add support of HNS3 Ethernet Driver for hip08 SoC") Signed-off-by: Hao Chen chenhao288@hisilicon.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index 4ab6cd0da201..af172dd3634d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -775,7 +775,7 @@ static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto, * and it is udp packet, which has a dest port as the IANA assigned. * the hardware is expected to do the checksum offload, but the * hardware will not do the checksum offload when udp dest port is - * 4789 or 6081. + * 4789, 4790 or 6081. */ static bool hns3_tunnel_csum_bug(struct sk_buff *skb) { @@ -785,6 +785,10 @@ static bool hns3_tunnel_csum_bug(struct sk_buff *skb)

#ifndef GENEVE_UDP_PORT #define GENEVE_UDP_PORT 6081 +#endif + +#ifndef IANA_VXLAN_GPE_UDP_PORT +#define IANA_VXLAN_GPE_UDP_PORT 4790 #endif

union l4_hdr_info l4; @@ -793,7 +797,8 @@ static bool hns3_tunnel_csum_bug(struct sk_buff *skb)

if (!(!skb->encapsulation && (l4.udp->dest == htons(IANA_VXLAN_UDP_PORT) || - l4.udp->dest == htons(GENEVE_UDP_PORT)))) + l4.udp->dest == htons(GENEVE_UDP_PORT) || + l4.udp->dest == htons(IANA_VXLAN_GPE_UDP_PORT)))) return false;

skb_checksum_help(skb);

From: Guangbin Huang huangguangbin2@huawei.com

mainline inclusion from mainline-v5.12-rc1 commit 2bbad0aa40e172e7ed7aba6f6ad4d9977dbd0be3 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

Add some interfaces to get information of tm priority and qset, then they can be used by debugfs.

Signed-off-by: Guangbin Huang huangguangbin2@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: Jakub Kicinski kuba@kernel.org Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 150 ++++++++++++++++++ .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 37 ++++- 2 files changed, 186 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c index 161714d34598..1757daffd12e 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c @@ -1495,3 +1495,153 @@ int hclge_tm_vport_map_update(struct hclge_dev *hdev)

return hclge_tm_bp_setup(hdev); } + +int hclge_tm_get_qset_num(struct hclge_dev *hdev, u16 *qset_num) +{ + *qset_num = HCLGE_TM_PF_MAX_QSET_NUM + pci_num_vf(hdev->pdev); + return 0; +} + +int hclge_tm_get_pri_num(struct hclge_dev *hdev, u8 *pri_num) +{ + *pri_num = HCLGE_TM_PF_MAX_PRI_NUM; + return 0; +} + +int hclge_tm_get_qset_map_pri(struct hclge_dev *hdev, u16 qset_id, u8 *priority, + u8 *link_vld) +{ + struct hclge_qs_to_pri_link_cmd *map; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_QS_TO_PRI_LINK, true); + map = (struct hclge_qs_to_pri_link_cmd *)desc.data; + map->qs_id = cpu_to_le16(qset_id); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get qset map priority, ret = %d\n", ret); + return ret; + } + + *priority = map->priority; + *link_vld = map->link_vld; + return 0; +} + +int hclge_tm_get_qset_sch_mode(struct hclge_dev *hdev, u16 qset_id, u8 *mode) +{ + struct hclge_qs_sch_mode_cfg_cmd *qs_sch_mode; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_QS_SCH_MODE_CFG, true); + qs_sch_mode = (struct hclge_qs_sch_mode_cfg_cmd *)desc.data; + qs_sch_mode->qs_id = cpu_to_le16(qset_id); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get qset sch mode, ret = %d\n", ret); + return ret; + } + + *mode = qs_sch_mode->sch_mode; + return 0; +} + +int hclge_tm_get_qset_weight(struct hclge_dev *hdev, u16 qset_id, u8 *weight) +{ + struct hclge_qs_weight_cmd *qs_weight; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_QS_WEIGHT, true); + qs_weight = (struct hclge_qs_weight_cmd *)desc.data; + qs_weight->qs_id = cpu_to_le16(qset_id); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get qset weight, ret = %d\n", ret); + return ret; + } + + *weight = qs_weight->dwrr; + return 0; +} + +int hclge_tm_get_pri_sch_mode(struct hclge_dev *hdev, u8 pri_id, u8 *mode) +{ + struct hclge_pri_sch_mode_cfg_cmd *pri_sch_mode; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_PRI_SCH_MODE_CFG, true); + pri_sch_mode = (struct hclge_pri_sch_mode_cfg_cmd *)desc.data; + pri_sch_mode->pri_id = pri_id; + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get priority sch mode, ret = %d\n", ret); + return ret; + } + + *mode = pri_sch_mode->sch_mode; + return 0; +} + +int hclge_tm_get_pri_weight(struct hclge_dev *hdev, u8 pri_id, u8 *weight) +{ + struct hclge_priority_weight_cmd *priority_weight; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_PRI_WEIGHT, true); + priority_weight = (struct hclge_priority_weight_cmd *)desc.data; + priority_weight->pri_id = pri_id; + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get priority weight, ret = %d\n", ret); + return ret; + } + + *weight = priority_weight->dwrr; + return 0; +} + +int hclge_tm_get_pri_shaper(struct hclge_dev *hdev, u8 pri_id, + enum hclge_opcode_type cmd, + struct hclge_pri_shaper_para *para) +{ + struct hclge_pri_shapping_cmd *shap_cfg_cmd; + struct hclge_desc desc; + u32 shapping_para; + int ret; + + if (cmd != HCLGE_OPC_TM_PRI_C_SHAPPING && + cmd != HCLGE_OPC_TM_PRI_P_SHAPPING) + return -EINVAL; + + hclge_cmd_setup_basic_desc(&desc, cmd, true); + shap_cfg_cmd = (struct hclge_pri_shapping_cmd *)desc.data; + shap_cfg_cmd->pri_id = pri_id; + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get priority shaper(%#x), ret = %d\n", + cmd, ret); + return ret; + } + + shapping_para = le32_to_cpu(shap_cfg_cmd->pri_shapping_para); + para->ir_b = hclge_tm_get_field(shapping_para, IR_B); + para->ir_u = hclge_tm_get_field(shapping_para, IR_U); + para->ir_s = hclge_tm_get_field(shapping_para, IR_S); + para->bs_b = hclge_tm_get_field(shapping_para, BS_B); + para->bs_s = hclge_tm_get_field(shapping_para, BS_S); + para->flag = 0; + para->rate = 0; + + return 0; +} diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h index 95ef6e1204cf..d2dfef5616c6 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h @@ -19,6 +19,9 @@ #define HCLGE_TM_TX_SCHD_DWRR_MSK BIT(0) #define HCLGE_TM_TX_SCHD_SP_MSK (0xFE)

+#define HCLGE_TM_PF_MAX_PRI_NUM 8 +#define HCLGE_TM_PF_MAX_QSET_NUM 8 + struct hclge_pg_to_pri_link_cmd { u8 pg_id; u8 rsvd1[3]; @@ -57,6 +60,18 @@ struct hclge_priority_weight_cmd { u8 dwrr; };

+struct hclge_pri_sch_mode_cfg_cmd { + u8 pri_id; + u8 rsvd[3]; + u8 sch_mode; +}; + +struct hclge_qs_sch_mode_cfg_cmd { + __le16 qs_id; + u8 rsvd[2]; + u8 sch_mode; +}; + struct hclge_qs_weight_cmd { __le16 qs_id; u8 dwrr; @@ -139,6 +154,16 @@ struct hclge_port_shapping_cmd { __le32 port_shapping_para; };

+struct hclge_pri_shaper_para { + u8 ir_b; + u8 ir_u; + u8 ir_s; + u8 bs_b; + u8 bs_s; + u8 flag; + u32 rate; +}; + #define hclge_tm_set_field(dest, string, val) \ hnae3_set_field((dest), \ (HCLGE_TM_SHAP_##string##_MSK), \ @@ -161,5 +186,15 @@ int hclge_pause_addr_cfg(struct hclge_dev *hdev, const u8 *mac_addr); int hclge_pfc_rx_stats_get(struct hclge_dev *hdev, u64 *stats); int hclge_pfc_tx_stats_get(struct hclge_dev *hdev, u64 *stats); int hclge_tm_qs_shaper_cfg(struct hclge_vport *vport, int max_tx_rate); - +int hclge_tm_get_qset_num(struct hclge_dev *hdev, u16 *qset_num); +int hclge_tm_get_pri_num(struct hclge_dev *hdev, u8 *pri_num); +int hclge_tm_get_qset_map_pri(struct hclge_dev *hdev, u16 qset_id, u8 *priority, + u8 *link_vld); +int hclge_tm_get_qset_sch_mode(struct hclge_dev *hdev, u16 qset_id, u8 *mode); +int hclge_tm_get_qset_weight(struct hclge_dev *hdev, u16 qset_id, u8 *weight); +int hclge_tm_get_pri_sch_mode(struct hclge_dev *hdev, u8 pri_id, u8 *mode); +int hclge_tm_get_pri_weight(struct hclge_dev *hdev, u8 pri_id, u8 *weight); +int hclge_tm_get_pri_shaper(struct hclge_dev *hdev, u8 pri_id, + enum hclge_opcode_type cmd, + struct hclge_pri_shaper_para *para); #endif

From: Yufeng Mo moyufeng@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit 5e69ea7ee2a6 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, each debugfs command needs to create a file to get the information. To better support more debugfs commands, the debugfs process is reconstructed, including the process of creating dentries and files, and obtaining information.

Signed-off-by: Yufeng Mo moyufeng@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 11 +- .../ethernet/hisilicon/hns3/hns3_debugfs.c | 179 +++++++++++++++--- .../ethernet/hisilicon/hns3/hns3_debugfs.h | 31 +++ .../net/ethernet/hisilicon/hns3/hns3_enet.c | 7 +- .../net/ethernet/hisilicon/hns3/hns3_enet.h | 2 +- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 25 ++- .../hisilicon/hns3/hns3pf/hclge_debugfs.h | 5 + .../hisilicon/hns3/hns3pf/hclge_main.h | 2 +- 8 files changed, 220 insertions(+), 42 deletions(-) create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 7485c15e1af1..48d27168f4f8 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -179,6 +179,12 @@ enum hnae3_port_base_vlan_state { HNAE3_PORT_BASE_VLAN_NOCHANGE, };

+enum hnae3_dbg_cmd { + HNAE3_DBG_CMD_TM_PRI, + HNAE3_DBG_CMD_TM_QSET, + HNAE3_DBG_CMD_UNKNOWN, +}; + struct hnae3_vector_info { u8 __iomem *io_addr; int vector; @@ -542,7 +548,7 @@ struct hnae3_ae_ops { int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id, u16 flow_id, struct flow_keys *fkeys); int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf); - int (*dbg_read_cmd)(struct hnae3_handle *handle, const char *cmd_buf, + int (*dbg_read_cmd)(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, char *buf, int len); pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev); bool (*get_hw_reset_stat)(struct hnae3_handle *handle); @@ -736,9 +742,6 @@ struct hnae3_handle { #define hnae3_get_bit(origin, shift) \ hnae3_get_field((origin), (0x1 << (shift)), (shift))

-#define HNAE3_DBG_TM_PRI "tm_priority" -#define HNAE3_DBG_TM_QSET "tm_qset" - int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev); void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 8118a2a878f1..6f07158612d9 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -5,13 +5,41 @@ #include <linux/device.h>

#include "hnae3.h" +#include "hns3_debugfs.h" #include "hns3_enet.h"

-#define HNS3_DBG_READ_LEN 65536 -#define HNS3_DBG_WRITE_LEN 1024 - static struct dentry *hns3_dbgfs_root;

+static struct hns3_dbg_dentry_info hns3_dbg_dentry[] = { + { + .name = "tm" + }, + /* keep common at the bottom and add new directory above */ + { + .name = "common" + }, +}; + +static int hns3_dbg_common_file_init(struct hnae3_handle *handle, + unsigned int cmd); + +static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { + { + .name = "tm_priority", + .cmd = HNAE3_DBG_CMD_TM_PRI, + .dentry = HNS3_DBG_DENTRY_TM, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "tm_qset", + .cmd = HNAE3_DBG_CMD_TM_QSET, + .dentry = HNS3_DBG_DENTRY_TM, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, +}; + static int hns3_dbg_queue_info(struct hnae3_handle *h, const char *cmd_buf) { @@ -380,40 +408,90 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, return count; }

+static int hns3_dbg_get_cmd_index(struct hnae3_handle *handle, + const unsigned char *name, u32 *index) +{ + u32 i; + + for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++) { + if (!strncmp(name, hns3_dbg_cmd[i].name, + strlen(hns3_dbg_cmd[i].name))) { + *index = i; + return 0; + } + } + + dev_err(&handle->pdev->dev, "unknown command(%s)\n", name); + return -EINVAL; +} + +static int hns3_dbg_read_cmd(struct hnae3_handle *handle, + enum hnae3_dbg_cmd cmd, char *buf, int len) +{ + const struct hnae3_ae_ops *ops = handle->ae_algo->ops; + + if (!ops->dbg_read_cmd) + return -EOPNOTSUPP; + + return ops->dbg_read_cmd(handle, cmd, buf, len); +} + static ssize_t hns3_dbg_read(struct file *filp, char __user *buffer, size_t count, loff_t *ppos) { struct hnae3_handle *handle = filp->private_data; - const struct hnae3_ae_ops *ops = handle->ae_algo->ops; struct hns3_nic_priv *priv = handle->priv; - char *cmd_buf, *read_buf; ssize_t size = 0; - int ret = 0; + char **save_buf; + char *read_buf; + u32 index; + int ret;

- if (!filp->f_path.dentry->d_iname) - return -EINVAL; + ret = hns3_dbg_get_cmd_index(handle, filp->f_path.dentry->d_iname, + &index); + if (ret) + return ret;

- read_buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL); - if (!read_buf) - return -ENOMEM; + save_buf = &hns3_dbg_cmd[index].buf;

- cmd_buf = filp->f_path.dentry->d_iname; + if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) || + test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) { + ret = -EBUSY; + goto out; + }

- if (ops->dbg_read_cmd) - ret = ops->dbg_read_cmd(handle, cmd_buf, read_buf, - HNS3_DBG_READ_LEN); + if (*save_buf) { + read_buf = *save_buf; + } else { + read_buf = kvzalloc(hns3_dbg_cmd[index].buf_len, GFP_KERNEL); + if (!read_buf) + return -ENOMEM;

- if (ret) { - dev_info(priv->dev, "unknown command\n"); - goto out; + /* save the buffer addr until the last read operation */ + *save_buf = read_buf; + } + + /* get data ready for the first time to read */ + if (!*ppos) { + ret = hns3_dbg_read_cmd(handle, hns3_dbg_cmd[index].cmd, + read_buf, hns3_dbg_cmd[index].buf_len); + if (ret) + goto out; }

size = simple_read_from_buffer(buffer, count, ppos, read_buf, strlen(read_buf)); + if (size > 0) + return size;

out: - kfree(read_buf); - return size; + /* free the buffer for the last read operation */ + if (*save_buf) { + kvfree(*save_buf); + *save_buf = NULL; + } + + return ret; }

static const struct file_operations hns3_dbg_cmd_fops = { @@ -429,25 +507,70 @@ static const struct file_operations hns3_dbg_fops = { .read = hns3_dbg_read, };

-void hns3_dbg_init(struct hnae3_handle *handle) +static int hns3_dbg_common_file_init(struct hnae3_handle *handle, u32 cmd) { - const char *name = pci_name(handle->pdev); struct dentry *entry_dir;

- handle->hnae3_dbgfs = debugfs_create_dir(name, hns3_dbgfs_root); + entry_dir = hns3_dbg_dentry[hns3_dbg_cmd[cmd].dentry].dentry; + debugfs_create_file(hns3_dbg_cmd[cmd].name, 0400, entry_dir, + handle, &hns3_dbg_fops); + + return 0; +} + +int hns3_dbg_init(struct hnae3_handle *handle) +{ + const char *name = pci_name(handle->pdev); + int ret; + u32 i; + + hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry = + debugfs_create_dir(name, hns3_dbgfs_root); + handle->hnae3_dbgfs = hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry;

debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle, &hns3_dbg_cmd_fops);

- entry_dir = debugfs_create_dir("tm", handle->hnae3_dbgfs); - debugfs_create_file(HNAE3_DBG_TM_PRI, 0600, entry_dir, handle, - &hns3_dbg_fops); - debugfs_create_file(HNAE3_DBG_TM_QSET, 0600, entry_dir, handle, - &hns3_dbg_fops); + for (i = 0; i < HNS3_DBG_DENTRY_COMMON; i++) + hns3_dbg_dentry[i].dentry = + debugfs_create_dir(hns3_dbg_dentry[i].name, + handle->hnae3_dbgfs); + + for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++) { + if (!hns3_dbg_cmd[i].init) { + dev_err(&handle->pdev->dev, + "cmd %s lack of init func\n", + hns3_dbg_cmd[i].name); + ret = -EINVAL; + goto out; + } + + ret = hns3_dbg_cmd[i].init(handle, i); + if (ret) { + dev_err(&handle->pdev->dev, "failed to init cmd %s\n", + hns3_dbg_cmd[i].name); + goto out; + } + } + + return 0; + +out: + debugfs_remove_recursive(handle->hnae3_dbgfs); + handle->hnae3_dbgfs = NULL; + return ret; }

void hns3_dbg_uninit(struct hnae3_handle *handle) { + u32 i; + + for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++) + if (hns3_dbg_cmd[i].buf) { + kvfree(hns3_dbg_cmd[i].buf); + hns3_dbg_cmd[i].buf = NULL; + } + debugfs_remove_recursive(handle->hnae3_dbgfs); handle->hnae3_dbgfs = NULL; } diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h new file mode 100644 index 000000000000..9fddd8f18c81 --- /dev/null +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* Copyright (c) 2021 Hisilicon Limited. */ + +#ifndef __HNS3_DEBUGFS_H +#define __HNS3_DEBUGFS_H + +#include "hnae3.h" + +#define HNS3_DBG_READ_LEN 65536 +#define HNS3_DBG_WRITE_LEN 1024 + +enum hns3_dbg_dentry_type { + HNS3_DBG_DENTRY_TM, + HNS3_DBG_DENTRY_COMMON, +}; + +struct hns3_dbg_dentry_info { + const char *name; + struct dentry *dentry; +}; + +struct hns3_dbg_cmd_info { + const char *name; + enum hnae3_dbg_cmd cmd; + enum hns3_dbg_dentry_type dentry; + u32 buf_len; + char *buf; + int (*init)(struct hnae3_handle *handle, unsigned int cmd); +}; + +#endif diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index af172dd3634d..967391681991 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -4253,7 +4253,12 @@ static int hns3_client_init(struct hnae3_handle *handle)

hns3_dcbnl_setup(handle);

- hns3_dbg_init(handle); + ret = hns3_dbg_init(handle); + if (ret) { + dev_err(priv->dev, "failed to init debugfs, ret = %d\n", + ret); + goto out_client_start; + }

#ifdef HAVE_NETDEVICE_MIN_MAX_MTU /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */ diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h index b4b176cda109..deba15e175b1 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h @@ -659,7 +659,7 @@ void hns3_dcbnl_setup(struct hnae3_handle *handle); static inline void hns3_dcbnl_setup(struct hnae3_handle *handle) {} #endif bool hns3_get_tx_timeo_queue_info(struct net_device *ndev); -void hns3_dbg_init(struct hnae3_handle *handle); +int hns3_dbg_init(struct hnae3_handle *handle); void hns3_dbg_uninit(struct hnae3_handle *handle); void hns3_dbg_register_debugfs(const char *debugfs_dir_name); void hns3_dbg_unregister_debugfs(void); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 8b4ee79aa627..dd4256be228e 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -1894,18 +1894,29 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) return 0; }

-int hclge_dbg_read_cmd(struct hnae3_handle *handle, const char *cmd_buf, +static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { + { + .cmd = HNAE3_DBG_CMD_TM_PRI, + .dbg_dump = hclge_dbg_dump_tm_pri, + }, + { + .cmd = HNAE3_DBG_CMD_TM_QSET, + .dbg_dump = hclge_dbg_dump_tm_qset, + }, +}; + +int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, char *buf, int len) { struct hclge_vport *vport = hclge_get_vport(handle); struct hclge_dev *hdev = vport->back; + u32 i;

- if (strncmp(cmd_buf, HNAE3_DBG_TM_PRI, - strlen(HNAE3_DBG_TM_PRI)) == 0) - return hclge_dbg_dump_tm_pri(hdev, buf, len); - else if (strncmp(cmd_buf, HNAE3_DBG_TM_QSET, - strlen(HNAE3_DBG_TM_QSET)) == 0) - return hclge_dbg_dump_tm_qset(hdev, buf, len); + for (i = 0; i < ARRAY_SIZE(hclge_dbg_cmd_func); i++) { + if (cmd == hclge_dbg_cmd_func[i].cmd) + return hclge_dbg_cmd_func[i].dbg_dump(hdev, buf, len); + }

+ dev_err(&hdev->pdev->dev, "invalid command(%d)\n", cmd); return -EINVAL; } diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h index 6dcc0cabcac2..57e4afa17289 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h @@ -101,6 +101,11 @@ struct hclge_dbg_reg_type_info { struct hclge_dbg_reg_common_msg reg_msg; };

+struct hclge_dbg_func { + enum hnae3_dbg_cmd cmd; + int (*dbg_dump)(struct hclge_dev *hdev, char *buf, int len); +}; + static struct hclge_dbg_dfx_message hclge_dbg_bios_common_reg[] = { {false, "Reserved"}, {true, "BP_CPU_STATE"}, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index 7bd91e2916b6..a4f891208cc8 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -1031,7 +1031,7 @@ int hclge_vport_start(struct hclge_vport *vport); void hclge_vport_stop(struct hclge_vport *vport); int hclge_set_vport_mtu(struct hclge_vport *vport, int new_mtu); int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf); -int hclge_dbg_read_cmd(struct hnae3_handle *handle, const char *cmd_buf, +int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, char *buf, int len); u16 hclge_covert_handle_qid_global(struct hnae3_handle *handle, u16 queue_id); int hclge_notify_client(struct hclge_dev *hdev,

From: Huazhong Tan tanhuazhong@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit 1556ea9120ff category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, the debugfs command for mac list info is implemented by "echo xxxx > cmd", and record the information in dmesg. It's unnecessary and heavy. To improve it, create two files "uc" and "mc" under directory "mac_list" for it, and query mac list info by "cat mac_list/uc" and "mac_list/mc", return the result to userspace, rather than record in dmesg.

The display style is below: $ cat mac_list/uc UC MAC_LIST: FUNC_ID MAC_ADDR STATE pf 00:18:2d:00:00:71 ACTIVE

$ cat mac_list/mc MC MAC_LIST: FUNC_ID MAC_ADDR STATE pf 01:80:c2:00:00:21 ACTIVE

Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 2 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 19 ++- .../ethernet/hisilicon/hns3/hns3_debugfs.h | 1 + .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 127 +++++++++++++----- .../hisilicon/hns3/hns3pf/hclge_debugfs.h | 9 ++ 5 files changed, 119 insertions(+), 39 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 2747a7ecba1b..f6643f7ca647 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -184,6 +184,8 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_TM_QSET, HNAE3_DBG_CMD_TX_BD, HNAE3_DBG_CMD_RX_BD, + HNAE3_DBG_CMD_MAC_UC, + HNAE3_DBG_CMD_MAC_MC, HNAE3_DBG_CMD_UNKNOWN, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index ed3134247203..97dd0d636d87 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -20,6 +20,9 @@ static struct hns3_dbg_dentry_info hns3_dbg_dentry[] = { { .name = "rx_bd_info" }, + { + .name = "mac_list" + }, /* keep common at the bottom and add new directory above */ { .name = "common" @@ -59,6 +62,20 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN_4MB, .init = hns3_dbg_bd_file_init, }, + { + .name = "uc", + .cmd = HNAE3_DBG_CMD_MAC_UC, + .dentry = HNS3_DBG_DENTRY_MAC, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "mc", + .cmd = HNAE3_DBG_CMD_MAC_MC, + .dentry = HNS3_DBG_DENTRY_MAC, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, };

static void hns3_dbg_fill_content(char *content, u16 len, @@ -402,8 +419,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) dev_info(&h->pdev->dev, "dump mac tnl status\n"); dev_info(&h->pdev->dev, "dump loopback\n"); dev_info(&h->pdev->dev, "dump qs shaper [qs id]\n"); - dev_info(&h->pdev->dev, "dump uc mac list <func id>\n"); - dev_info(&h->pdev->dev, "dump mc mac list <func id>\n"); dev_info(&h->pdev->dev, "dump intr\n"); dev_info(&h->pdev->dev, "dump umv info <func id>\n"); dev_info(&h->pdev->dev, "dump vlan filter <func id>\n"); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h index 3528bab7e44d..8b69f68c0fb7 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h @@ -29,6 +29,7 @@ enum hns3_dbg_dentry_type { HNS3_DBG_DENTRY_TM, HNS3_DBG_DENTRY_TX_BD, HNS3_DBG_DENTRY_RX_BD, + HNS3_DBG_DENTRY_MAC, HNS3_DBG_DENTRY_COMMON, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index dd4256be228e..82612d8af993 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -8,6 +8,10 @@ #include "hclge_tm.h" #include "hnae3.h"

+static const char * const hclge_mac_state_str[] = { + "TO_ADD", "TO_DEL", "ACTIVE" +}; + static struct hclge_dbg_reg_type_info hclge_dbg_reg_info[] = { { .reg_type = "bios common", .dfx_msg = &hclge_dbg_bios_common_reg[0], @@ -71,6 +75,35 @@ static struct hclge_dbg_reg_type_info hclge_dbg_reg_info[] = { .cmd = HCLGE_OPC_DFX_TQP_REG } }, };

+static void hclge_dbg_fill_content(char *content, u16 len, + const struct hclge_dbg_item *items, + const char **result, u16 size) +{ + char *pos = content; + u16 i; + + memset(content, ' ', len); + for (i = 0; i < size; i++) { + if (result) + strncpy(pos, result[i], strlen(result[i])); + else + strncpy(pos, items[i].name, strlen(items[i].name)); + pos += strlen(items[i].name) + items[i].interval; + } + *pos++ = '\n'; + *pos++ = '\0'; +} + +static char *hclge_dbg_get_func_id_str(char *buf, u8 id) +{ + if (id) + sprintf(buf, "vf%u", id - 1); + else + sprintf(buf, "pf"); + + return buf; +} + static int hclge_dbg_get_dfx_bd_num(struct hclge_dev *hdev, int offset) { struct hclge_desc desc[HCLGE_GET_DFX_REG_TYPE_CNT]; @@ -1682,45 +1715,65 @@ static void hclge_dbg_dump_qs_shaper(struct hclge_dev *hdev, hclge_dbg_dump_qs_shaper_single(hdev, qsid); }

-static int hclge_dbg_dump_mac_list(struct hclge_dev *hdev, const char *cmd_buf, - bool is_unicast) +static const struct hclge_dbg_item mac_list_items[] = { + { "FUNC_ID", 2 }, + { "MAC_ADDR", 12 }, + { "STATE", 2 }, +}; + +static void hclge_dbg_dump_mac_list(struct hclge_dev *hdev, char *buf, int len, + bool is_unicast) { + char data_str[ARRAY_SIZE(mac_list_items)][HCLGE_DBG_DATA_STR_LEN]; + char content[HCLGE_DBG_INFO_LEN], str_id[HCLGE_DBG_ID_LEN]; + char *result[ARRAY_SIZE(mac_list_items)]; struct hclge_vport_mac_addr_cfg *mac_node, *tmp; struct hclge_vport *vport; struct list_head *list; u32 func_id; - int ret; - - ret = kstrtouint(cmd_buf, 0, &func_id); - if (ret < 0) { - dev_err(&hdev->pdev->dev, - "dump mac list: bad command string, ret=%d\n", ret); - return -EINVAL; - } + int pos = 0; + int i;

- if (func_id >= hdev->num_alloc_vport) { - dev_err(&hdev->pdev->dev, - "function id(%u) is out of range(0-%u)\n", func_id, - hdev->num_alloc_vport - 1); - return -EINVAL; + for (i = 0; i < ARRAY_SIZE(mac_list_items); i++) + result[i] = &data_str[i][0]; + + pos += scnprintf(buf + pos, len - pos, "%s MAC_LIST:\n", + is_unicast ? "UC" : "MC"); + hclge_dbg_fill_content(content, sizeof(content), mac_list_items, + NULL, ARRAY_SIZE(mac_list_items)); + pos += scnprintf(buf + pos, len - pos, "%s", content); + + for (func_id = 0; func_id < hdev->num_alloc_vport; func_id++) { + vport = &hdev->vport[func_id]; + list = is_unicast ? &vport->uc_mac_list : &vport->mc_mac_list; + spin_lock_bh(&vport->mac_list_lock); + list_for_each_entry_safe(mac_node, tmp, list, node) { + i = 0; + result[i++] = hclge_dbg_get_func_id_str(str_id, + func_id); + sprintf(result[i++], "%pM", mac_node->mac_addr); + sprintf(result[i++], "%5s", + hclge_mac_state_str[mac_node->state]); + hclge_dbg_fill_content(content, sizeof(content), + mac_list_items, + (const char **)result, + ARRAY_SIZE(mac_list_items)); + pos += scnprintf(buf + pos, len - pos, "%s", content); + } + spin_unlock_bh(&vport->mac_list_lock); } +}

- vport = &hdev->vport[func_id]; - - list = is_unicast ? &vport->uc_mac_list : &vport->mc_mac_list; - - dev_info(&hdev->pdev->dev, "vport %u %s mac list:\n", - func_id, is_unicast ? "uc" : "mc"); - dev_info(&hdev->pdev->dev, "mac address state\n"); - - spin_lock_bh(&vport->mac_list_lock); +static int hclge_dbg_dump_mac_uc(struct hclge_dev *hdev, char *buf, int len) +{ + hclge_dbg_dump_mac_list(hdev, buf, len, true);

- list_for_each_entry_safe(mac_node, tmp, list, node) { - dev_info(&hdev->pdev->dev, "%pM %d\n", - mac_node->mac_addr, mac_node->state); - } + return 0; +}

- spin_unlock_bh(&vport->mac_list_lock); +static int hclge_dbg_dump_mac_mc(struct hclge_dev *hdev, char *buf, int len) +{ + hclge_dbg_dump_mac_list(hdev, buf, len, false);

return 0; } @@ -1868,14 +1921,6 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) } else if (strncmp(cmd_buf, "dump qs shaper", 14) == 0) { hclge_dbg_dump_qs_shaper(hdev, &cmd_buf[sizeof("dump qs shaper")]); - } else if (strncmp(cmd_buf, "dump uc mac list", 16) == 0) { - hclge_dbg_dump_mac_list(hdev, - &cmd_buf[sizeof("dump uc mac list")], - true); - } else if (strncmp(cmd_buf, "dump mc mac list", 16) == 0) { - hclge_dbg_dump_mac_list(hdev, - &cmd_buf[sizeof("dump mc mac list")], - false); } else if (strncmp(cmd_buf, DUMP_INTERRUPT, strlen(DUMP_INTERRUPT)) == 0) { hclge_dbg_dump_interrupt(hdev); @@ -1903,6 +1948,14 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_TM_QSET, .dbg_dump = hclge_dbg_dump_tm_qset, }, + { + .cmd = HNAE3_DBG_CMD_MAC_UC, + .dbg_dump = hclge_dbg_dump_mac_uc, + }, + { + .cmd = HNAE3_DBG_CMD_MAC_MC, + .dbg_dump = hclge_dbg_dump_mac_mc, + }, };

int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h index 57e4afa17289..86e3f7b52e45 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h @@ -746,4 +746,13 @@ static struct hclge_dbg_dfx_message hclge_dbg_tqp_reg[] = { {true, "RCB_CFG_TX_RING_EBDNUM"}, };

+#define HCLGE_DBG_INFO_LEN 256 +#define HCLGE_DBG_ID_LEN 16 +#define HCLGE_DBG_ITEM_NAME_LEN 32 +#define HCLGE_DBG_DATA_STR_LEN 32 +struct hclge_dbg_item { + char name[HCLGE_DBG_ITEM_NAME_LEN]; + u16 interval; /* blank numbers after the item */ +}; + #endif

From: Yufeng Mo moyufeng@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit d658ff34dd7f category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, the debugfs command for loopback is implemented by "echo xxxx > cmd", and record the information in dmesg. It's unnecessary and heavy. To improve it, create a single file "loopback" for it, and query it by command "cat loopback", return the result to userspace, rather than record in dmesg.

The display style is below: $ cat loopback mac id: 0 app loopback: off serdes serial loopback: off serdes parallel loopback: off

Signed-off-by: Yufeng Mo moyufeng@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 8 +++- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 44 +++++++++++-------- 3 files changed, 33 insertions(+), 20 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index cd6b780b85eb..318318f2f567 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -187,6 +187,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_MAC_UC, HNAE3_DBG_CMD_MAC_MC, HNAE3_DBG_CMD_MNG_TBL, + HNAE3_DBG_CMD_LOOPBACK, HNAE3_DBG_CMD_UNKNOWN, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 4008c972209c..ef262e70d9ad 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -83,6 +83,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN, .init = hns3_dbg_common_file_init, }, + { + .name = "loopback", + .cmd = HNAE3_DBG_CMD_LOOPBACK, + .dentry = HNS3_DBG_DENTRY_COMMON, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, };

static void hns3_dbg_fill_content(char *content, u16 len, @@ -423,7 +430,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) dev_info(&h->pdev->dev, "dump m7 info\n"); dev_info(&h->pdev->dev, "dump ncl_config <offset> <length>(in hex)\n"); dev_info(&h->pdev->dev, "dump mac tnl status\n"); - dev_info(&h->pdev->dev, "dump loopback\n"); dev_info(&h->pdev->dev, "dump qs shaper [qs id]\n"); dev_info(&h->pdev->dev, "dump intr\n"); dev_info(&h->pdev->dev, "dump umv info <func id>\n"); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index fe58ba94d50c..c2f6097d7fba 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -8,6 +8,7 @@ #include "hclge_tm.h" #include "hnae3.h"

+static const char * const state_str[] = { "off", "on" }; static const char * const hclge_mac_state_str[] = { "TO_ADD", "TO_DEL", "ACTIVE" }; @@ -1560,33 +1561,34 @@ static void hclge_dbg_dump_ncl_config(struct hclge_dev *hdev, } }

-static void hclge_dbg_dump_loopback(struct hclge_dev *hdev, - const char *cmd_buf) +static int hclge_dbg_dump_loopback(struct hclge_dev *hdev, char *buf, int len) { struct phy_device *phydev = hdev->hw.mac.phydev; struct hclge_config_mac_mode_cmd *req_app; struct hclge_serdes_lb_cmd *req_serdes; struct hclge_desc desc; u8 loopback_en; + int pos = 0; int ret;

req_app = (struct hclge_config_mac_mode_cmd *)desc.data; req_serdes = (struct hclge_serdes_lb_cmd *)desc.data;

- dev_info(&hdev->pdev->dev, "mac id: %u\n", hdev->hw.mac.mac_id); + pos += scnprintf(buf + pos, len - pos, "mac id: %u\n", + hdev->hw.mac.mac_id);

hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAC_MODE, true); ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) { dev_err(&hdev->pdev->dev, "failed to dump app loopback status, ret = %d\n", ret); - return; + return ret; }

loopback_en = hnae3_get_bit(le32_to_cpu(req_app->txrx_pad_fcs_loop_en), HCLGE_MAC_APP_LP_B); - dev_info(&hdev->pdev->dev, "app loopback: %s\n", - loopback_en ? "on" : "off"); + pos += scnprintf(buf + pos, len - pos, "app loopback: %s\n", + state_str[loopback_en]);

hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_SERDES_LOOPBACK, true); ret = hclge_cmd_send(&hdev->hw, &desc, 1); @@ -1594,21 +1596,25 @@ static void hclge_dbg_dump_loopback(struct hclge_dev *hdev, dev_err(&hdev->pdev->dev, "failed to dump serdes loopback status, ret = %d\n", ret); - return; + return ret; }

loopback_en = req_serdes->enable & HCLGE_CMD_SERDES_SERIAL_INNER_LOOP_B; - dev_info(&hdev->pdev->dev, "serdes serial loopback: %s\n", - loopback_en ? "on" : "off"); + pos += scnprintf(buf + pos, len - pos, "serdes serial loopback: %s\n", + state_str[loopback_en]);

loopback_en = req_serdes->enable & - HCLGE_CMD_SERDES_PARALLEL_INNER_LOOP_B; - dev_info(&hdev->pdev->dev, "serdes parallel loopback: %s\n", - loopback_en ? "on" : "off"); + HCLGE_CMD_SERDES_PARALLEL_INNER_LOOP_B ? 1 : 0; + pos += scnprintf(buf + pos, len - pos, "serdes parallel loopback: %s\n", + state_str[loopback_en]); + + if (phydev) { + loopback_en = phydev->loopback_enabled; + pos += scnprintf(buf + pos, len - pos, "phy loopback: %s\n", + state_str[loopback_en]); + }

- if (phydev) - dev_info(&hdev->pdev->dev, "phy loopback: %s\n", - phydev->loopback_enabled ? "on" : "off"); + return 0; }

/* hclge_dbg_dump_mac_tnl_status: print message about mac tnl interrupt @@ -1868,7 +1874,6 @@ static void hclge_dbg_dump_vlan_filter(struct hclge_dev *hdev, int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) { #define DUMP_REG "dump reg" -#define DUMP_LOOPBACK "dump loopback" #define DUMP_INTERRUPT "dump intr" #define DUMP_VLAN_FILTER "dump vlan filter" #define DUMP_UMV_INFO "dump umv info" @@ -1905,9 +1910,6 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) &cmd_buf[sizeof("dump ncl_config")]); } else if (strncmp(cmd_buf, "dump mac tnl status", 19) == 0) { hclge_dbg_dump_mac_tnl_status(hdev); - } else if (strncmp(cmd_buf, DUMP_LOOPBACK, - strlen(DUMP_LOOPBACK)) == 0) { - hclge_dbg_dump_loopback(hdev, &cmd_buf[sizeof(DUMP_LOOPBACK)]); } else if (strncmp(cmd_buf, "dump qs shaper", 14) == 0) { hclge_dbg_dump_qs_shaper(hdev, &cmd_buf[sizeof("dump qs shaper")]); @@ -1950,6 +1952,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_MNG_TBL, .dbg_dump = hclge_dbg_dump_mng_table, }, + { + .cmd = HNAE3_DBG_CMD_LOOPBACK, + .dbg_dump = hclge_dbg_dump_loopback, + }, };

int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,

From: Jiaran Zhang zhangjiaran@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit 1a7ff8280b16 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, the debugfs command for reset info is implemented by "echo xxxx > cmd", and record the information in dmesg. It's unnecessary and heavy. To improve it, create a single file "reset_info" for it, and query it by command "cat reset_info", return the result to userspace, rather than record in dmesg.

The display style is below: $cat reset_info PF reset count: 0 FLR reset count: 0 GLOBAL reset count: 0 IMP reset count: 0 reset done count: 0 HW reset done count: 0 reset count: 0 reset fail count: 0 vector0 interrupt enable status: 0x1 reset interrupt source: 0x0 reset interrupt status: 0x0 RAS interrupt status:0x0 hardware reset status: 0x0 handshake status: 0x80 function reset status: 0x0

Change to the "hclge_show_rst_info" in the "hclge_reset_err_handle", when the reset fails, display reset info immediately.

Signed-off-by: Jiaran Zhang zhangjiaran@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 8 +- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 76 +++++++++++-------- .../hisilicon/hns3/hns3pf/hclge_main.c | 17 ++++- .../hisilicon/hns3/hns3pf/hclge_main.h | 4 +- 5 files changed, 71 insertions(+), 35 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 1bc48dc662be..75492b012986 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -189,6 +189,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_MNG_TBL, HNAE3_DBG_CMD_LOOPBACK, HNAE3_DBG_CMD_INTERRUPT_INFO, + HNAE3_DBG_CMD_RESET_INFO, HNAE3_DBG_CMD_UNKNOWN, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index c0df40d5a740..381b048c1d3d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -97,6 +97,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN, .init = hns3_dbg_common_file_init, }, + { + .name = "reset_info", + .cmd = HNAE3_DBG_CMD_RESET_INFO, + .dentry = HNS3_DBG_DENTRY_COMMON, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, };

static void hns3_dbg_fill_content(char *content, u16 len, @@ -433,7 +440,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) dev_info(&h->pdev->dev, "dump qos pri map\n"); dev_info(&h->pdev->dev, "dump qos buf cfg\n"); dev_info(&h->pdev->dev, "dump mac tbl\n"); - dev_info(&h->pdev->dev, "dump reset info\n"); dev_info(&h->pdev->dev, "dump m7 info\n"); dev_info(&h->pdev->dev, "dump ncl_config <offset> <length>(in hex)\n"); dev_info(&h->pdev->dev, "dump mac tnl status\n"); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index c283310b1aaa..95dd80604576 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -4,6 +4,7 @@ #include <linux/device.h>

#include "hclge_debugfs.h" +#include "hclge_err.h" #include "hclge_main.h" #include "hclge_tm.h" #include "hnae3.h" @@ -1383,37 +1384,46 @@ static void hclge_dbg_fd_tcam(struct hclge_dev *hdev) kfree(rule_locs); }

-void hclge_dbg_dump_rst_info(struct hclge_dev *hdev) +int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len) { - dev_info(&hdev->pdev->dev, "PF reset count: %u\n", - hdev->rst_stats.pf_rst_cnt); - dev_info(&hdev->pdev->dev, "FLR reset count: %u\n", - hdev->rst_stats.flr_rst_cnt); - dev_info(&hdev->pdev->dev, "GLOBAL reset count: %u\n", - hdev->rst_stats.global_rst_cnt); - dev_info(&hdev->pdev->dev, "IMP reset count: %u\n", - hdev->rst_stats.imp_rst_cnt); - dev_info(&hdev->pdev->dev, "reset done count: %u\n", - hdev->rst_stats.reset_done_cnt); - dev_info(&hdev->pdev->dev, "HW reset done count: %u\n", - hdev->rst_stats.hw_reset_done_cnt); - dev_info(&hdev->pdev->dev, "reset count: %u\n", - hdev->rst_stats.reset_cnt); - dev_info(&hdev->pdev->dev, "reset fail count: %u\n", - hdev->rst_stats.reset_fail_cnt); - dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n", - hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_REG_BASE)); - dev_info(&hdev->pdev->dev, "reset interrupt source: 0x%x\n", - hclge_read_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG)); - dev_info(&hdev->pdev->dev, "reset interrupt status: 0x%x\n", - hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS)); - dev_info(&hdev->pdev->dev, "hardware reset status: 0x%x\n", - hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG)); - dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n", - hclge_read_dev(&hdev->hw, HCLGE_NIC_CSQ_DEPTH_REG)); - dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n", - hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING)); - dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state); + int pos = 0; + + pos += scnprintf(buf + pos, len - pos, "PF reset count: %u\n", + hdev->rst_stats.pf_rst_cnt); + pos += scnprintf(buf + pos, len - pos, "FLR reset count: %u\n", + hdev->rst_stats.flr_rst_cnt); + pos += scnprintf(buf + pos, len - pos, "GLOBAL reset count: %u\n", + hdev->rst_stats.global_rst_cnt); + pos += scnprintf(buf + pos, len - pos, "IMP reset count: %u\n", + hdev->rst_stats.imp_rst_cnt); + pos += scnprintf(buf + pos, len - pos, "reset done count: %u\n", + hdev->rst_stats.reset_done_cnt); + pos += scnprintf(buf + pos, len - pos, "HW reset done count: %u\n", + hdev->rst_stats.hw_reset_done_cnt); + pos += scnprintf(buf + pos, len - pos, "reset count: %u\n", + hdev->rst_stats.reset_cnt); + pos += scnprintf(buf + pos, len - pos, "reset fail count: %u\n", + hdev->rst_stats.reset_fail_cnt); + pos += scnprintf(buf + pos, len - pos, + "vector0 interrupt enable status: 0x%x\n", + hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_REG_BASE)); + pos += scnprintf(buf + pos, len - pos, "reset interrupt source: 0x%x\n", + hclge_read_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG)); + pos += scnprintf(buf + pos, len - pos, "reset interrupt status: 0x%x\n", + hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS)); + pos += scnprintf(buf + pos, len - pos, "RAS interrupt status: 0x%x\n", + hclge_read_dev(&hdev->hw, + HCLGE_RAS_PF_OTHER_INT_STS_REG)); + pos += scnprintf(buf + pos, len - pos, "hardware reset status: 0x%x\n", + hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG)); + pos += scnprintf(buf + pos, len - pos, "handshake status: 0x%x\n", + hclge_read_dev(&hdev->hw, HCLGE_NIC_CSQ_DEPTH_REG)); + pos += scnprintf(buf + pos, len - pos, "function reset status: 0x%x\n", + hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING)); + pos += scnprintf(buf + pos, len - pos, "hdev state: 0x%lx\n", + hdev->state); + + return 0; }

static void hclge_dbg_dump_serv_info(struct hclge_dev *hdev) @@ -1906,8 +1916,6 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) hclge_dbg_dump_mac_table(hdev); } else if (strncmp(cmd_buf, DUMP_REG, strlen(DUMP_REG)) == 0) { hclge_dbg_dump_reg_cmd(hdev, &cmd_buf[sizeof(DUMP_REG)]); - } else if (strncmp(cmd_buf, "dump reset info", 15) == 0) { - hclge_dbg_dump_rst_info(hdev); } else if (strncmp(cmd_buf, "dump serv info", 14) == 0) { hclge_dbg_dump_serv_info(hdev); } else if (strncmp(cmd_buf, "dump m7 info", 12) == 0) { @@ -1964,6 +1972,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_INTERRUPT_INFO, .dbg_dump = hclge_dbg_dump_interrupt, }, + { + .cmd = HNAE3_DBG_CMD_RESET_INFO, + .dbg_dump = hclge_dbg_dump_rst_info, + }, };

int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 5797f22a903e..778f1e2124d3 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -3652,6 +3652,21 @@ static int hclge_reset_prepare_wait(struct hclge_dev *hdev) return ret; }

+static void hclge_show_rst_info(struct hclge_dev *hdev) +{ + char *buf; + + buf = kzalloc(HCLGE_DBG_RESET_INFO_LEN, GFP_KERNEL); + if (!buf) + return; + + hclge_dbg_dump_rst_info(hdev, buf, HCLGE_DBG_RESET_INFO_LEN); + + dev_info(&hdev->pdev->dev, "dump reset info:\n%s", buf); + + kfree(buf); +} + static bool hclge_reset_err_handle(struct hclge_dev *hdev) { struct hnae3_handle *handle = &hdev->vport[0].nic; @@ -3683,7 +3698,7 @@ static bool hclge_reset_err_handle(struct hclge_dev *hdev) if (handle && handle->ae_algo->ops->reset_end) handle->ae_algo->ops->reset_end(handle, false);

- hclge_dbg_dump_rst_info(hdev); + hclge_show_rst_info(hdev);

set_bit(HCLGE_STATE_RST_FAIL, &hdev->state);

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index a4f891208cc8..9719c1c39db6 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -148,6 +148,8 @@ /* Factor used to calculate offset and bitmap of VF num */ #define HCLGE_VF_NUM_PER_CMD 64

+#define HCLGE_DBG_RESET_INFO_LEN 1024 + enum HLCGE_PORT_TYPE { HOST_PORT, NETWORK_PORT @@ -1061,7 +1063,7 @@ int hclge_query_bd_num_cmd_send(struct hclge_dev *hdev, struct hclge_desc *desc); void hclge_report_hw_error(struct hclge_dev *hdev, enum hnae3_hw_error_type type); -void hclge_dbg_dump_rst_info(struct hclge_dev *hdev); +int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len); bool hclge_vf_vlan_need_enable(struct hclge_vport *vport); int hclge_push_vf_link_status(struct hclge_vport *vport); #endif

From: Jiaran Zhang zhangjiaran@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit e76e6886646b category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, the debugfs command for ncl config is implemented by "echo xxxx > cmd", and record the information in dmesg. It's unnecessary and heavy. To improve it, create a single file "ncl_config" for it, and query it by command "cat ncl_config", return the result to userspace, rather than record in dmesg.

The display style is below: $cat ncl_config offset | data 0x0000 | 0x00000028 0x0004 | 0x00000400 0x0008 | 0x08040201 0x000c | 0x00000000 0x0010 | 0x00040004 0x0014 | 0x00040004 0x0018 | 0x00000000 0x001c | 0x00000000 0x0020 | 0x00040004

Signed-off-by: Jiaran Zhang zhangjiaran@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 8 +- .../ethernet/hisilicon/hns3/hns3_debugfs.h | 1 + .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 77 ++++++++----------- 4 files changed, 39 insertions(+), 48 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 7465bf07ecbd..83438bca835c 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -191,6 +191,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_INTERRUPT_INFO, HNAE3_DBG_CMD_RESET_INFO, HNAE3_DBG_CMD_IMP_INFO, + HNAE3_DBG_CMD_NCL_CONFIG, HNAE3_DBG_CMD_UNKNOWN, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index b98cda80c95d..4c4620409010 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -111,6 +111,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN, .init = hns3_dbg_common_file_init, }, + { + .name = "ncl_config", + .cmd = HNAE3_DBG_CMD_NCL_CONFIG, + .dentry = HNS3_DBG_DENTRY_COMMON, + .buf_len = HNS3_DBG_READ_LEN_128KB, + .init = hns3_dbg_common_file_init, + }, };

static void hns3_dbg_fill_content(char *content, u16 len, @@ -447,7 +454,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) dev_info(&h->pdev->dev, "dump qos pri map\n"); dev_info(&h->pdev->dev, "dump qos buf cfg\n"); dev_info(&h->pdev->dev, "dump mac tbl\n"); - dev_info(&h->pdev->dev, "dump ncl_config <offset> <length>(in hex)\n"); dev_info(&h->pdev->dev, "dump mac tnl status\n"); dev_info(&h->pdev->dev, "dump qs shaper [qs id]\n"); dev_info(&h->pdev->dev, "dump umv info <func id>\n"); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h index 8b69f68c0fb7..817328eb56da 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h @@ -7,6 +7,7 @@ #include "hnae3.h"

#define HNS3_DBG_READ_LEN 65536 +#define HNS3_DBG_READ_LEN_128KB 0x20000 #define HNS3_DBG_READ_LEN_4MB 0x400000 #define HNS3_DBG_WRITE_LEN 1024

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 5af3266e6bac..37e2234fa72d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -1520,80 +1520,62 @@ hclge_dbg_get_imp_stats_info(struct hclge_dev *hdev, char *buf, int len) }

#define HCLGE_CMD_NCL_CONFIG_BD_NUM 5 +#define HCLGE_MAX_NCL_CONFIG_LENGTH 16384

-static void hclge_ncl_config_data_print(struct hclge_dev *hdev, - struct hclge_desc *desc, int *offset, - int *length) +static void hclge_ncl_config_data_print(struct hclge_desc *desc, int *index, + char *buf, int *len, int *pos) { #define HCLGE_CMD_DATA_NUM 6

- int i; - int j; + int offset = HCLGE_MAX_NCL_CONFIG_LENGTH - *index; + int i, j;

for (i = 0; i < HCLGE_CMD_NCL_CONFIG_BD_NUM; i++) { for (j = 0; j < HCLGE_CMD_DATA_NUM; j++) { if (i == 0 && j == 0) continue;

- dev_info(&hdev->pdev->dev, "0x%04x | 0x%08x\n", - *offset, - le32_to_cpu(desc[i].data[j])); - *offset += sizeof(u32); - *length -= sizeof(u32); - if (*length <= 0) + *pos += scnprintf(buf + *pos, *len - *pos, + "0x%04x | 0x%08x\n", offset, + le32_to_cpu(desc[i].data[j])); + + offset += sizeof(u32); + *index -= sizeof(u32); + + if (*index <= 0) return; } } }

-/* hclge_dbg_dump_ncl_config: print specified range of NCL_CONFIG file - * @hdev: pointer to struct hclge_dev - * @cmd_buf: string that contains offset and length - */ -static void hclge_dbg_dump_ncl_config(struct hclge_dev *hdev, - const char *cmd_buf) +static int hclge_dbg_dump_ncl_config(struct hclge_dev *hdev, char *buf, int len) { -#define HCLGE_MAX_NCL_CONFIG_OFFSET 16384 #define HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD (20 + 24 * 4) -#define HCLGE_NCL_CONFIG_PARAM_NUM 2

struct hclge_desc desc[HCLGE_CMD_NCL_CONFIG_BD_NUM]; int bd_num = HCLGE_CMD_NCL_CONFIG_BD_NUM; - int offset; - int length; - int data0; + int index = HCLGE_MAX_NCL_CONFIG_LENGTH; + int pos = 0; + u32 data0; int ret;

- ret = sscanf(cmd_buf, "%x %x", &offset, &length); - if (ret != HCLGE_NCL_CONFIG_PARAM_NUM) { - dev_err(&hdev->pdev->dev, - "Too few parameters, num = %d.\n", ret); - return; - } - - if (offset < 0 || offset >= HCLGE_MAX_NCL_CONFIG_OFFSET || - length <= 0 || length > HCLGE_MAX_NCL_CONFIG_OFFSET - offset) { - dev_err(&hdev->pdev->dev, - "Invalid input, offset = %d, length = %d.\n", - offset, length); - return; - } - - dev_info(&hdev->pdev->dev, "offset | data\n"); + pos += scnprintf(buf + pos, len - pos, "offset | data\n");

- while (length > 0) { - data0 = offset; - if (length >= HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD) + while (index > 0) { + data0 = HCLGE_MAX_NCL_CONFIG_LENGTH - index; + if (index >= HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD) data0 |= HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD << 16; else - data0 |= length << 16; + data0 |= (u32)index << 16; ret = hclge_dbg_cmd_send(hdev, desc, data0, bd_num, HCLGE_OPC_QUERY_NCL_CONFIG); if (ret) - return; + return ret;

- hclge_ncl_config_data_print(hdev, desc, &offset, &length); + hclge_ncl_config_data_print(desc, &index, buf, &len, &pos); } + + return 0; }

static int hclge_dbg_dump_loopback(struct hclge_dev *hdev, char *buf, int len) @@ -1935,9 +1917,6 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) hclge_dbg_dump_reg_cmd(hdev, &cmd_buf[sizeof(DUMP_REG)]); } else if (strncmp(cmd_buf, "dump serv info", 14) == 0) { hclge_dbg_dump_serv_info(hdev); - } else if (strncmp(cmd_buf, "dump ncl_config", 15) == 0) { - hclge_dbg_dump_ncl_config(hdev, - &cmd_buf[sizeof("dump ncl_config")]); } else if (strncmp(cmd_buf, "dump mac tnl status", 19) == 0) { hclge_dbg_dump_mac_tnl_status(hdev); } else if (strncmp(cmd_buf, "dump qs shaper", 14) == 0) { @@ -1995,6 +1974,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_IMP_INFO, .dbg_dump = hclge_dbg_get_imp_stats_info, }, + { + .cmd = HNAE3_DBG_CMD_NCL_CONFIG, + .dbg_dump = hclge_dbg_dump_ncl_config, + }, };

int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,

From: Yufeng Mo moyufeng@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit d96b0e59468d category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, the debugfs command for reg is implemented by "echo xxxx > cmd", and record the information in dmesg. It's unnecessary and heavy. To improve it, create some files "bios_common/ssu/igu_egu/rpu/ncsi/rtc/ppp/rcb/tqp/mac" for it, and query it by command "cat xxx", return the result to userspace, rather than record in dmesg.

The display style is below: $ cat bios_common BP_CPU_STATE: 0x0 DFX_MSIX_INFO_NIC_0: 0xc000 DFX_MSIX_INFO_NIC_1: 0x0 DFX_MSIX_INFO_NIC_2: 0x0 DFX_MSIX_INFO_NIC_3: 0x0 DFX_MSIX_INFO_ROC_0: 0xc000 DFX_MSIX_INFO_ROC_1: 0x0 DFX_MSIX_INFO_ROC_2: 0x0 DFX_MSIX_INFO_ROC_3: 0x0

Signed-off-by: Yufeng Mo moyufeng@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 10 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 84 +++- .../ethernet/hisilicon/hns3/hns3_debugfs.h | 1 + .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 362 ++++++++++++------ .../hisilicon/hns3/hns3pf/hclge_debugfs.h | 4 +- 5 files changed, 324 insertions(+), 137 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 83438bca835c..9ee2863c207e 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -192,6 +192,16 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_RESET_INFO, HNAE3_DBG_CMD_IMP_INFO, HNAE3_DBG_CMD_NCL_CONFIG, + HNAE3_DBG_CMD_REG_BIOS_COMMON, + HNAE3_DBG_CMD_REG_SSU, + HNAE3_DBG_CMD_REG_IGU_EGU, + HNAE3_DBG_CMD_REG_RPU, + HNAE3_DBG_CMD_REG_NCSI, + HNAE3_DBG_CMD_REG_RTC, + HNAE3_DBG_CMD_REG_PPP, + HNAE3_DBG_CMD_REG_RCB, + HNAE3_DBG_CMD_REG_TQP, + HNAE3_DBG_CMD_REG_MAC, HNAE3_DBG_CMD_UNKNOWN, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 4c4620409010..2b2ce102c9c7 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -23,6 +23,9 @@ static struct hns3_dbg_dentry_info hns3_dbg_dentry[] = { { .name = "mac_list" }, + { + .name = "reg" + }, /* keep common at the bottom and add new directory above */ { .name = "common" @@ -118,6 +121,76 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN_128KB, .init = hns3_dbg_common_file_init, }, + { + .name = "bios_common", + .cmd = HNAE3_DBG_CMD_REG_BIOS_COMMON, + .dentry = HNS3_DBG_DENTRY_REG, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "ssu", + .cmd = HNAE3_DBG_CMD_REG_SSU, + .dentry = HNS3_DBG_DENTRY_REG, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "igu_egu", + .cmd = HNAE3_DBG_CMD_REG_IGU_EGU, + .dentry = HNS3_DBG_DENTRY_REG, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "rpu", + .cmd = HNAE3_DBG_CMD_REG_RPU, + .dentry = HNS3_DBG_DENTRY_REG, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "ncsi", + .cmd = HNAE3_DBG_CMD_REG_NCSI, + .dentry = HNS3_DBG_DENTRY_REG, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "rtc", + .cmd = HNAE3_DBG_CMD_REG_RTC, + .dentry = HNS3_DBG_DENTRY_REG, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "ppp", + .cmd = HNAE3_DBG_CMD_REG_PPP, + .dentry = HNS3_DBG_DENTRY_REG, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "rcb", + .cmd = HNAE3_DBG_CMD_REG_RCB, + .dentry = HNS3_DBG_DENTRY_REG, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "tqp", + .cmd = HNAE3_DBG_CMD_REG_TQP, + .dentry = HNS3_DBG_DENTRY_REG, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "mac", + .cmd = HNAE3_DBG_CMD_REG_MAC, + .dentry = HNS3_DBG_DENTRY_REG, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, };

static void hns3_dbg_fill_content(char *content, u16 len, @@ -459,17 +532,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) dev_info(&h->pdev->dev, "dump umv info <func id>\n"); dev_info(&h->pdev->dev, "dump vlan filter <func id>\n");

- memset(printf_buf, 0, HNS3_DBG_BUF_LEN); - strncat(printf_buf, "dump reg [[bios common] [ssu <port_id>]", - HNS3_DBG_BUF_LEN - 1); - strncat(printf_buf + strlen(printf_buf), - " [igu egu <port_id>] [rpu <tc_queue_num>]", - HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1); - strncat(printf_buf + strlen(printf_buf), - " [rtc] [ppp] [rcb] [tqp <queue_num>] [mac]]\n", - HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1); - dev_info(&h->pdev->dev, "%s", printf_buf); - memset(printf_buf, 0, HNS3_DBG_BUF_LEN); strncat(printf_buf, "dump reg dcb <port_id> <pri_id> <pg_id>", HNS3_DBG_BUF_LEN - 1); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h index 817328eb56da..e4c871839965 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h @@ -31,6 +31,7 @@ enum hns3_dbg_dentry_type { HNS3_DBG_DENTRY_TX_BD, HNS3_DBG_DENTRY_RX_BD, HNS3_DBG_DENTRY_MAC, + HNS3_DBG_DENTRY_REG, HNS3_DBG_DENTRY_COMMON, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index d795b4d6a98e..5059377058ed 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -15,62 +15,62 @@ static const char * const hclge_mac_state_str[] = { };

static const struct hclge_dbg_reg_type_info hclge_dbg_reg_info[] = { - { .reg_type = "bios common", + { .cmd = HNAE3_DBG_CMD_REG_BIOS_COMMON, .dfx_msg = &hclge_dbg_bios_common_reg[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_bios_common_reg), .offset = HCLGE_DBG_DFX_BIOS_OFFSET, .cmd = HCLGE_OPC_DFX_BIOS_COMMON_REG } }, - { .reg_type = "ssu", + { .cmd = HNAE3_DBG_CMD_REG_SSU, .dfx_msg = &hclge_dbg_ssu_reg_0[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ssu_reg_0), .offset = HCLGE_DBG_DFX_SSU_0_OFFSET, .cmd = HCLGE_OPC_DFX_SSU_REG_0 } }, - { .reg_type = "ssu", + { .cmd = HNAE3_DBG_CMD_REG_SSU, .dfx_msg = &hclge_dbg_ssu_reg_1[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ssu_reg_1), .offset = HCLGE_DBG_DFX_SSU_1_OFFSET, .cmd = HCLGE_OPC_DFX_SSU_REG_1 } }, - { .reg_type = "ssu", + { .cmd = HNAE3_DBG_CMD_REG_SSU, .dfx_msg = &hclge_dbg_ssu_reg_2[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ssu_reg_2), .offset = HCLGE_DBG_DFX_SSU_2_OFFSET, .cmd = HCLGE_OPC_DFX_SSU_REG_2 } }, - { .reg_type = "igu egu", + { .cmd = HNAE3_DBG_CMD_REG_IGU_EGU, .dfx_msg = &hclge_dbg_igu_egu_reg[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_igu_egu_reg), .offset = HCLGE_DBG_DFX_IGU_OFFSET, .cmd = HCLGE_OPC_DFX_IGU_EGU_REG } }, - { .reg_type = "rpu", + { .cmd = HNAE3_DBG_CMD_REG_RPU, .dfx_msg = &hclge_dbg_rpu_reg_0[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rpu_reg_0), .offset = HCLGE_DBG_DFX_RPU_0_OFFSET, .cmd = HCLGE_OPC_DFX_RPU_REG_0 } }, - { .reg_type = "rpu", + { .cmd = HNAE3_DBG_CMD_REG_RPU, .dfx_msg = &hclge_dbg_rpu_reg_1[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rpu_reg_1), .offset = HCLGE_DBG_DFX_RPU_1_OFFSET, .cmd = HCLGE_OPC_DFX_RPU_REG_1 } }, - { .reg_type = "ncsi", + { .cmd = HNAE3_DBG_CMD_REG_NCSI, .dfx_msg = &hclge_dbg_ncsi_reg[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ncsi_reg), .offset = HCLGE_DBG_DFX_NCSI_OFFSET, .cmd = HCLGE_OPC_DFX_NCSI_REG } }, - { .reg_type = "rtc", + { .cmd = HNAE3_DBG_CMD_REG_RTC, .dfx_msg = &hclge_dbg_rtc_reg[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rtc_reg), .offset = HCLGE_DBG_DFX_RTC_OFFSET, .cmd = HCLGE_OPC_DFX_RTC_REG } }, - { .reg_type = "ppp", + { .cmd = HNAE3_DBG_CMD_REG_PPP, .dfx_msg = &hclge_dbg_ppp_reg[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_ppp_reg), .offset = HCLGE_DBG_DFX_PPP_OFFSET, .cmd = HCLGE_OPC_DFX_PPP_REG } }, - { .reg_type = "rcb", + { .cmd = HNAE3_DBG_CMD_REG_RCB, .dfx_msg = &hclge_dbg_rcb_reg[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_rcb_reg), .offset = HCLGE_DBG_DFX_RCB_OFFSET, .cmd = HCLGE_OPC_DFX_RCB_REG } }, - { .reg_type = "tqp", + { .cmd = HNAE3_DBG_CMD_REG_TQP, .dfx_msg = &hclge_dbg_tqp_reg[0], .reg_msg = { .msg_num = ARRAY_SIZE(hclge_dbg_tqp_reg), .offset = HCLGE_DBG_DFX_TQP_OFFSET, @@ -106,7 +106,8 @@ static char *hclge_dbg_get_func_id_str(char *buf, u8 id) return buf; }

-static int hclge_dbg_get_dfx_bd_num(struct hclge_dev *hdev, int offset) +static int hclge_dbg_get_dfx_bd_num(struct hclge_dev *hdev, int offset, + u32 *bd_num) { struct hclge_desc desc[HCLGE_GET_DFX_REG_TYPE_CNT]; int entries_per_desc; @@ -116,13 +117,21 @@ static int hclge_dbg_get_dfx_bd_num(struct hclge_dev *hdev, int offset) ret = hclge_query_bd_num_cmd_send(hdev, desc); if (ret) { dev_err(&hdev->pdev->dev, - "get dfx bdnum fail, ret = %d\n", ret); + "failed to get dfx bd_num, offset = %d, ret = %d\n", + offset, ret); return ret; }

entries_per_desc = ARRAY_SIZE(desc[0].data); index = offset % entries_per_desc; - return le32_to_cpu(desc[offset / entries_per_desc].data[index]); + + *bd_num = le32_to_cpu(desc[offset / entries_per_desc].data[index]); + if (!(*bd_num)) { + dev_err(&hdev->pdev->dev, "The value of dfx bd_num is 0!\n"); + return -EINVAL; + } + + return 0; }

static int hclge_dbg_cmd_send(struct hclge_dev *hdev, @@ -149,66 +158,108 @@ static int hclge_dbg_cmd_send(struct hclge_dev *hdev, return ret; }

-static void hclge_dbg_dump_reg_common(struct hclge_dev *hdev, - const struct hclge_dbg_reg_type_info *reg_info, - const char *cmd_buf) +static int +hclge_dbg_dump_reg_tqp(struct hclge_dev *hdev, + const struct hclge_dbg_reg_type_info *reg_info, + char *buf, int len, int *pos) { -#define IDX_OFFSET 1 - - const char *s = &cmd_buf[strlen(reg_info->reg_type) + IDX_OFFSET]; const struct hclge_dbg_dfx_message *dfx_message = reg_info->dfx_msg; const struct hclge_dbg_reg_common_msg *reg_msg = &reg_info->reg_msg; struct hclge_desc *desc_src; + u32 index, entry, i, cnt; + int bd_num, min_num, ret; struct hclge_desc *desc; - int entries_per_desc; - int bd_num, buf_len; - int index = 0; - int min_num; - int ret, i;

- if (*s) { - ret = kstrtouint(s, 0, &index); - index = (ret != 0) ? 0 : index; - } + ret = hclge_dbg_get_dfx_bd_num(hdev, reg_msg->offset, &bd_num); + if (ret) + return ret;

- bd_num = hclge_dbg_get_dfx_bd_num(hdev, reg_msg->offset); - if (bd_num <= 0) { - dev_err(&hdev->pdev->dev, "get cmd(%d) bd num(%d) failed\n", - reg_msg->offset, bd_num); - return; + desc_src = kcalloc(bd_num, sizeof(struct hclge_desc), GFP_KERNEL); + if (!desc_src) + return -ENOMEM; + + min_num = min_t(int, bd_num * HCLGE_DESC_DATA_LEN, reg_msg->msg_num); + + for (i = 0, cnt = 0; i < min_num; i++, dfx_message++) + *pos += scnprintf(buf + *pos, len - *pos, "item%u = %s\n", + cnt++, dfx_message->message); + + for (i = 0; i < cnt; i++) + *pos += scnprintf(buf + *pos, len - *pos, "item%u\t", i); + + *pos += scnprintf(buf + *pos, len - *pos, "\n"); + + for (index = 0; index < hdev->vport[0].alloc_tqps; index++) { + dfx_message = reg_info->dfx_msg; + desc = desc_src; + ret = hclge_dbg_cmd_send(hdev, desc, index, bd_num, + reg_msg->cmd); + if (ret) + break; + + for (i = 0; i < min_num; i++, dfx_message++) { + entry = i % HCLGE_DESC_DATA_LEN; + if (i > 0 && !entry) + desc++; + + *pos += scnprintf(buf + *pos, len - *pos, "%#x\t", + le32_to_cpu(desc->data[entry])); + } + *pos += scnprintf(buf + *pos, len - *pos, "\n"); }

- buf_len = sizeof(struct hclge_desc) * bd_num; - desc_src = kzalloc(buf_len, GFP_KERNEL); + kfree(desc_src); + return ret; +} + +static int +hclge_dbg_dump_reg_common(struct hclge_dev *hdev, + const struct hclge_dbg_reg_type_info *reg_info, + char *buf, int len, int *pos) +{ + const struct hclge_dbg_reg_common_msg *reg_msg = &reg_info->reg_msg; + const struct hclge_dbg_dfx_message *dfx_message = reg_info->dfx_msg; + struct hclge_desc *desc_src; + int bd_num, min_num, ret; + struct hclge_desc *desc; + u32 entry, i; + + ret = hclge_dbg_get_dfx_bd_num(hdev, reg_msg->offset, &bd_num); + if (ret) + return ret; + + desc_src = kcalloc(bd_num, sizeof(struct hclge_desc), GFP_KERNEL); if (!desc_src) - return; + return -ENOMEM;

desc = desc_src; - ret = hclge_dbg_cmd_send(hdev, desc, index, bd_num, reg_msg->cmd); + + ret = hclge_dbg_cmd_send(hdev, desc, 0, bd_num, reg_msg->cmd); if (ret) { - kfree(desc_src); - return; + kfree(desc); + return ret; }

- entries_per_desc = ARRAY_SIZE(desc->data); - min_num = min_t(int, bd_num * entries_per_desc, reg_msg->msg_num); + min_num = min_t(int, bd_num * HCLGE_DESC_DATA_LEN, reg_msg->msg_num);

- desc = desc_src; - for (i = 0; i < min_num; i++) { - if (i > 0 && (i % entries_per_desc) == 0) + for (i = 0; i < min_num; i++, dfx_message++) { + entry = i % HCLGE_DESC_DATA_LEN; + if (i > 0 && !entry) desc++; - if (dfx_message->flag) - dev_info(&hdev->pdev->dev, "%s: 0x%x\n", - dfx_message->message, - le32_to_cpu(desc->data[i % entries_per_desc])); + if (!dfx_message->flag) + continue;

- dfx_message++; + *pos += scnprintf(buf + *pos, len - *pos, "%s: %#x\n", + dfx_message->message, + le32_to_cpu(desc->data[entry])); }

kfree(desc_src); + return 0; }

-static void hclge_dbg_dump_mac_enable_status(struct hclge_dev *hdev) +static int hclge_dbg_dump_mac_enable_status(struct hclge_dev *hdev, char *buf, + int len, int *pos) { struct hclge_config_mac_mode_cmd *req; struct hclge_desc desc; @@ -220,44 +271,52 @@ static void hclge_dbg_dump_mac_enable_status(struct hclge_dev *hdev) ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) { dev_err(&hdev->pdev->dev, - "failed to dump mac enable status, ret = %d.\n", ret); - return; + "failed to dump mac enable status, ret = %d\n", ret); + return ret; }

req = (struct hclge_config_mac_mode_cmd *)desc.data; loop_en = le32_to_cpu(req->txrx_pad_fcs_loop_en);

- dev_info(&hdev->pdev->dev, "config_mac_trans_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_TX_EN_B)); - dev_info(&hdev->pdev->dev, "config_mac_rcv_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_RX_EN_B)); - dev_info(&hdev->pdev->dev, "config_pad_trans_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_PAD_TX_B)); - dev_info(&hdev->pdev->dev, "config_pad_rcv_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_PAD_RX_B)); - dev_info(&hdev->pdev->dev, "config_1588_trans_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_1588_TX_B)); - dev_info(&hdev->pdev->dev, "config_1588_rcv_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_1588_RX_B)); - dev_info(&hdev->pdev->dev, "config_mac_app_loop_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_APP_LP_B)); - dev_info(&hdev->pdev->dev, "config_mac_line_loop_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_LINE_LP_B)); - dev_info(&hdev->pdev->dev, "config_mac_fcs_tx_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_FCS_TX_B)); - dev_info(&hdev->pdev->dev, "config_mac_rx_oversize_truncate_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_RX_OVERSIZE_TRUNCATE_B)); - dev_info(&hdev->pdev->dev, "config_mac_rx_fcs_strip_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_RX_FCS_STRIP_B)); - dev_info(&hdev->pdev->dev, "config_mac_rx_fcs_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_RX_FCS_B)); - dev_info(&hdev->pdev->dev, "config_mac_tx_under_min_err_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_TX_UNDER_MIN_ERR_B)); - dev_info(&hdev->pdev->dev, "config_mac_tx_oversize_truncate_en: %#x\n", - hnae3_get_bit(loop_en, HCLGE_MAC_TX_OVERSIZE_TRUNCATE_B)); + *pos += scnprintf(buf + *pos, len - *pos, "mac_trans_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_TX_EN_B)); + *pos += scnprintf(buf + *pos, len - *pos, "mac_rcv_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_RX_EN_B)); + *pos += scnprintf(buf + *pos, len - *pos, "pad_trans_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_PAD_TX_B)); + *pos += scnprintf(buf + *pos, len - *pos, "pad_rcv_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_PAD_RX_B)); + *pos += scnprintf(buf + *pos, len - *pos, "1588_trans_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_1588_TX_B)); + *pos += scnprintf(buf + *pos, len - *pos, "1588_rcv_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_1588_RX_B)); + *pos += scnprintf(buf + *pos, len - *pos, "mac_app_loop_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_APP_LP_B)); + *pos += scnprintf(buf + *pos, len - *pos, "mac_line_loop_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_LINE_LP_B)); + *pos += scnprintf(buf + *pos, len - *pos, "mac_fcs_tx_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_FCS_TX_B)); + *pos += scnprintf(buf + *pos, len - *pos, + "mac_rx_oversize_truncate_en: %#x\n", + hnae3_get_bit(loop_en, + HCLGE_MAC_RX_OVERSIZE_TRUNCATE_B)); + *pos += scnprintf(buf + *pos, len - *pos, "mac_rx_fcs_strip_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_RX_FCS_STRIP_B)); + *pos += scnprintf(buf + *pos, len - *pos, "mac_rx_fcs_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_RX_FCS_B)); + *pos += scnprintf(buf + *pos, len - *pos, + "mac_tx_under_min_err_en: %#x\n", + hnae3_get_bit(loop_en, HCLGE_MAC_TX_UNDER_MIN_ERR_B)); + *pos += scnprintf(buf + *pos, len - *pos, + "mac_tx_oversize_truncate_en: %#x\n", + hnae3_get_bit(loop_en, + HCLGE_MAC_TX_OVERSIZE_TRUNCATE_B)); + + return 0; }

-static void hclge_dbg_dump_mac_frame_size(struct hclge_dev *hdev) +static int hclge_dbg_dump_mac_frame_size(struct hclge_dev *hdev, char *buf, + int len, int *pos) { struct hclge_config_max_frm_size_cmd *req; struct hclge_desc desc; @@ -268,18 +327,22 @@ static void hclge_dbg_dump_mac_frame_size(struct hclge_dev *hdev) ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) { dev_err(&hdev->pdev->dev, - "failed to dump mac frame size, ret = %d.\n", ret); - return; + "failed to dump mac frame size, ret = %d\n", ret); + return ret; }

req = (struct hclge_config_max_frm_size_cmd *)desc.data;

- dev_info(&hdev->pdev->dev, "max_frame_size: 0x%x\n", - le16_to_cpu(req->max_frm_size)); - dev_info(&hdev->pdev->dev, "min_frame_size: 0x%x\n", req->min_frm_size); + *pos += scnprintf(buf + *pos, len - *pos, "max_frame_size: %u\n", + le16_to_cpu(req->max_frm_size)); + *pos += scnprintf(buf + *pos, len - *pos, "min_frame_size: %u\n", + req->min_frm_size); + + return 0; }

-static void hclge_dbg_dump_mac_speed_duplex(struct hclge_dev *hdev) +static int hclge_dbg_dump_mac_speed_duplex(struct hclge_dev *hdev, char *buf, + int len, int *pos) { #define HCLGE_MAC_SPEED_SHIFT 0 #define HCLGE_MAC_SPEED_MASK GENMASK(5, 0) @@ -294,26 +357,35 @@ static void hclge_dbg_dump_mac_speed_duplex(struct hclge_dev *hdev) ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) { dev_err(&hdev->pdev->dev, - "failed to dump mac speed duplex, ret = %d.\n", ret); - return; + "failed to dump mac speed duplex, ret = %d\n", ret); + return ret; }

req = (struct hclge_config_mac_speed_dup_cmd *)desc.data;

- dev_info(&hdev->pdev->dev, "speed: 0x%lx\n", - hnae3_get_field(req->speed_dup, HCLGE_MAC_SPEED_MASK, - HCLGE_MAC_SPEED_SHIFT)); - dev_info(&hdev->pdev->dev, "duplex: 0x%x\n", - hnae3_get_bit(req->speed_dup, HCLGE_MAC_DUPLEX_SHIFT)); + *pos += scnprintf(buf + *pos, len - *pos, "speed: %#lx\n", + hnae3_get_field(req->speed_dup, HCLGE_MAC_SPEED_MASK, + HCLGE_MAC_SPEED_SHIFT)); + *pos += scnprintf(buf + *pos, len - *pos, "duplex: %#x\n", + hnae3_get_bit(req->speed_dup, + HCLGE_MAC_DUPLEX_SHIFT)); + return 0; }

-static void hclge_dbg_dump_mac(struct hclge_dev *hdev) +static int hclge_dbg_dump_mac(struct hclge_dev *hdev, char *buf, int len) { - hclge_dbg_dump_mac_enable_status(hdev); + int pos = 0; + int ret; + + ret = hclge_dbg_dump_mac_enable_status(hdev, buf, len, &pos); + if (ret) + return ret;

- hclge_dbg_dump_mac_frame_size(hdev); + ret = hclge_dbg_dump_mac_frame_size(hdev, buf, len, &pos); + if (ret) + return ret;

- hclge_dbg_dump_mac_speed_duplex(hdev); + return hclge_dbg_dump_mac_speed_duplex(hdev, buf, len, &pos); }

static void hclge_dbg_dump_dcb(struct hclge_dev *hdev, const char *cmd_buf) @@ -432,35 +504,28 @@ static void hclge_dbg_dump_dcb(struct hclge_dev *hdev, const char *cmd_buf) cmd, ret); }

-static void hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev, const char *cmd_buf) +static int hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev, + enum hnae3_dbg_cmd cmd, char *buf, int len) { const struct hclge_dbg_reg_type_info *reg_info; - bool has_dump = false; + int pos = 0, ret = 0; int i;

for (i = 0; i < ARRAY_SIZE(hclge_dbg_reg_info); i++) { reg_info = &hclge_dbg_reg_info[i]; - if (!strncmp(cmd_buf, reg_info->reg_type, - strlen(reg_info->reg_type))) { - hclge_dbg_dump_reg_common(hdev, reg_info, cmd_buf); - has_dump = true; + if (cmd == reg_info->cmd) { + if (cmd == HNAE3_DBG_CMD_REG_TQP) + return hclge_dbg_dump_reg_tqp(hdev, reg_info, + buf, len, &pos); + + ret = hclge_dbg_dump_reg_common(hdev, reg_info, buf, + len, &pos); + if (ret) + break; } }

- if (strncmp(cmd_buf, "mac", strlen("mac")) == 0) { - hclge_dbg_dump_mac(hdev); - has_dump = true; - } - - if (strncmp(cmd_buf, "dcb", 3) == 0) { - hclge_dbg_dump_dcb(hdev, &cmd_buf[sizeof("dcb")]); - has_dump = true; - } - - if (!has_dump) { - dev_info(&hdev->pdev->dev, "unknown command\n"); - return; - } + return ret; }

static void hclge_title_idx_print(struct hclge_dev *hdev, bool flag, int index, @@ -1890,7 +1955,7 @@ static void hclge_dbg_dump_vlan_filter(struct hclge_dev *hdev,

int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) { -#define DUMP_REG "dump reg" +#define DUMP_REG_DCB "dump reg dcb" #define DUMP_VLAN_FILTER "dump vlan filter" #define DUMP_UMV_INFO "dump umv info"

@@ -1913,8 +1978,8 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) hclge_dbg_dump_qos_buf_cfg(hdev); } else if (strncmp(cmd_buf, "dump mac tbl", 12) == 0) { hclge_dbg_dump_mac_table(hdev); - } else if (strncmp(cmd_buf, DUMP_REG, strlen(DUMP_REG)) == 0) { - hclge_dbg_dump_reg_cmd(hdev, &cmd_buf[sizeof(DUMP_REG)]); + } else if (strncmp(cmd_buf, DUMP_REG_DCB, strlen(DUMP_REG_DCB)) == 0) { + hclge_dbg_dump_dcb(hdev, &cmd_buf[sizeof(DUMP_REG_DCB)]); } else if (strncmp(cmd_buf, "dump serv info", 14) == 0) { hclge_dbg_dump_serv_info(hdev); } else if (strncmp(cmd_buf, "dump mac tnl status", 19) == 0) { @@ -1978,18 +2043,65 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_NCL_CONFIG, .dbg_dump = hclge_dbg_dump_ncl_config, }, + { + .cmd = HNAE3_DBG_CMD_REG_BIOS_COMMON, + .dbg_dump_reg = hclge_dbg_dump_reg_cmd, + }, + { + .cmd = HNAE3_DBG_CMD_REG_SSU, + .dbg_dump_reg = hclge_dbg_dump_reg_cmd, + }, + { + .cmd = HNAE3_DBG_CMD_REG_IGU_EGU, + .dbg_dump_reg = hclge_dbg_dump_reg_cmd, + }, + { + .cmd = HNAE3_DBG_CMD_REG_RPU, + .dbg_dump_reg = hclge_dbg_dump_reg_cmd, + }, + { + .cmd = HNAE3_DBG_CMD_REG_NCSI, + .dbg_dump_reg = hclge_dbg_dump_reg_cmd, + }, + { + .cmd = HNAE3_DBG_CMD_REG_RTC, + .dbg_dump_reg = hclge_dbg_dump_reg_cmd, + }, + { + .cmd = HNAE3_DBG_CMD_REG_PPP, + .dbg_dump_reg = hclge_dbg_dump_reg_cmd, + }, + { + .cmd = HNAE3_DBG_CMD_REG_RCB, + .dbg_dump_reg = hclge_dbg_dump_reg_cmd, + }, + { + .cmd = HNAE3_DBG_CMD_REG_TQP, + .dbg_dump_reg = hclge_dbg_dump_reg_cmd, + }, + { + .cmd = HNAE3_DBG_CMD_REG_MAC, + .dbg_dump = hclge_dbg_dump_mac, + }, };

int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, char *buf, int len) { struct hclge_vport *vport = hclge_get_vport(handle); + const struct hclge_dbg_func *cmd_func; struct hclge_dev *hdev = vport->back; u32 i;

for (i = 0; i < ARRAY_SIZE(hclge_dbg_cmd_func); i++) { - if (cmd == hclge_dbg_cmd_func[i].cmd) - return hclge_dbg_cmd_func[i].dbg_dump(hdev, buf, len); + if (cmd == hclge_dbg_cmd_func[i].cmd) { + cmd_func = &hclge_dbg_cmd_func[i]; + if (cmd_func->dbg_dump) + return cmd_func->dbg_dump(hdev, buf, len); + else + return cmd_func->dbg_dump_reg(hdev, cmd, buf, + len); + } }

dev_err(&hdev->pdev->dev, "invalid command(%d)\n", cmd); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h index 574e86e37617..1f115ff98a41 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h @@ -96,7 +96,7 @@ struct hclge_dbg_dfx_message {

#define HCLGE_DBG_MAC_REG_TYPE_LEN 32 struct hclge_dbg_reg_type_info { - const char *reg_type; + enum hnae3_dbg_cmd cmd; const struct hclge_dbg_dfx_message *dfx_msg; struct hclge_dbg_reg_common_msg reg_msg; }; @@ -104,6 +104,8 @@ struct hclge_dbg_reg_type_info { struct hclge_dbg_func { enum hnae3_dbg_cmd cmd; int (*dbg_dump)(struct hclge_dev *hdev, char *buf, int len); + int (*dbg_dump_reg)(struct hclge_dev *hdev, enum hnae3_dbg_cmd cmd, + char *buf, int len); };

static struct hclge_dbg_dfx_message hclge_dbg_bios_common_reg[] = {

From: Hao Chen chenhao288@hisilicon.com

mainline inclusion from mainline-v5.14-rc1 commit d2f737cf21b8 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, the debugfs command for queue map is implemented by "echo xxxx > cmd", and record the information in dmesg. It's unnecessary and heavy. To improve it, create a single file "queue_map" for it, and query it by command "cat queue_map", return the result to userspace, rather than record in dmesg.

The display style is below: $ cat queue_map local_queue_id global_queue_id vector_id 0 0 341

Signed-off-by: Hao Chen chenhao288@hisilicon.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 64 ++++++++++++++----- .../ethernet/hisilicon/hns3/hns3_debugfs.h | 2 + 3 files changed, 52 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 2d2410fcc399..aaf82891ba18 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -203,6 +203,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_REG_TQP, HNAE3_DBG_CMD_REG_MAC, HNAE3_DBG_CMD_REG_DCB, + HNAE3_DBG_CMD_QUEUE_MAP, HNAE3_DBG_CMD_UNKNOWN, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 1e6fa7a1ef3d..af126bdb39e8 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -26,6 +26,9 @@ static struct hns3_dbg_dentry_info hns3_dbg_dentry[] = { { .name = "reg" }, + { + .name = "queue" + }, /* keep common at the bottom and add new directory above */ { .name = "common" @@ -198,6 +201,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN, .init = hns3_dbg_common_file_init, }, + { + .name = "queue_map", + .cmd = HNAE3_DBG_CMD_QUEUE_MAP, + .dentry = HNS3_DBG_DENTRY_QUEUE, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, };

static void hns3_dbg_fill_content(char *content, u16 len, @@ -339,27 +349,45 @@ static int hns3_dbg_queue_info(struct hnae3_handle *h, return 0; }

-static int hns3_dbg_queue_map(struct hnae3_handle *h) +static const struct hns3_dbg_item queue_map_items[] = { + { "local_queue_id", 2 }, + { "global_queue_id", 2 }, + { "vector_id", 2 }, +}; + +static int hns3_dbg_queue_map(struct hnae3_handle *h, char *buf, int len) { + char data_str[ARRAY_SIZE(queue_map_items)][HNS3_DBG_DATA_STR_LEN]; + char *result[ARRAY_SIZE(queue_map_items)]; struct hns3_nic_priv *priv = h->priv; - int i; + char content[HNS3_DBG_INFO_LEN]; + int pos = 0; + int j; + u32 i;

if (!h->ae_algo->ops->get_global_queue_id) return -EOPNOTSUPP;

- dev_info(&h->pdev->dev, "map info for queue id and vector id\n"); - dev_info(&h->pdev->dev, - "local queue id | global queue id | vector id\n"); - for (i = 0; i < h->kinfo.num_tqps; i++) { - u16 global_qid; + for (i = 0; i < ARRAY_SIZE(queue_map_items); i++) + result[i] = &data_str[i][0];

- global_qid = h->ae_algo->ops->get_global_queue_id(h, i); + hns3_dbg_fill_content(content, sizeof(content), queue_map_items, + NULL, ARRAY_SIZE(queue_map_items)); + pos += scnprintf(buf + pos, len - pos, "%s", content); + for (i = 0; i < h->kinfo.num_tqps; i++) { if (!priv->ring || !priv->ring[i].tqp_vector) continue;

- dev_info(&h->pdev->dev, - " %4d %4d %4d\n", - i, global_qid, priv->ring[i].tqp_vector->vector_irq); + j = 0; + sprintf(result[j++], "%u", i); + sprintf(result[j++], "%u", + h->ae_algo->ops->get_global_queue_id(h, i)); + sprintf(result[j++], "%u", + priv->ring[i].tqp_vector->vector_irq); + hns3_dbg_fill_content(content, sizeof(content), queue_map_items, + (const char **)result, + ARRAY_SIZE(queue_map_items)); + pos += scnprintf(buf + pos, len - pos, "%s", content); }

return 0; @@ -517,7 +545,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) { dev_info(&h->pdev->dev, "available commands\n"); dev_info(&h->pdev->dev, "queue info <number>\n"); - dev_info(&h->pdev->dev, "queue map\n");

if (!hns3_is_phys_func(h->pdev)) return; @@ -607,8 +634,6 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, hns3_dbg_help(handle); else if (strncmp(cmd_buf, "queue info", 10) == 0) ret = hns3_dbg_queue_info(handle, cmd_buf); - else if (strncmp(cmd_buf, "queue map", 9) == 0) - ret = hns3_dbg_queue_map(handle); else if (handle->ae_algo->ops->dbg_run_cmd) ret = handle->ae_algo->ops->dbg_run_cmd(handle, cmd_buf); else @@ -641,6 +666,10 @@ static int hns3_dbg_get_cmd_index(struct hnae3_handle *handle, }

static const struct hns3_dbg_func hns3_dbg_cmd_func[] = { + { + .cmd = HNAE3_DBG_CMD_QUEUE_MAP, + .dbg_dump = hns3_dbg_queue_map, + }, { .cmd = HNAE3_DBG_CMD_TX_BD, .dbg_dump_bd = hns3_dbg_tx_bd_info, @@ -661,7 +690,12 @@ static int hns3_dbg_read_cmd(struct hns3_dbg_data *dbg_data, for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd_func); i++) { if (cmd == hns3_dbg_cmd_func[i].cmd) { cmd_func = &hns3_dbg_cmd_func[i]; - return cmd_func->dbg_dump_bd(dbg_data, buf, len); + if (cmd_func->dbg_dump) + return cmd_func->dbg_dump(dbg_data->handle, buf, + len); + else + return cmd_func->dbg_dump_bd(dbg_data, buf, + len); } }

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h index e4c871839965..af0742a4818c 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h @@ -32,6 +32,7 @@ enum hns3_dbg_dentry_type { HNS3_DBG_DENTRY_RX_BD, HNS3_DBG_DENTRY_MAC, HNS3_DBG_DENTRY_REG, + HNS3_DBG_DENTRY_QUEUE, HNS3_DBG_DENTRY_COMMON, };

@@ -51,6 +52,7 @@ struct hns3_dbg_cmd_info {

struct hns3_dbg_func { enum hnae3_dbg_cmd cmd; + int (*dbg_dump)(struct hnae3_handle *handle, char *buf, int len); int (*dbg_dump_bd)(struct hns3_dbg_data *data, char *buf, int len); };

From: Hao Chen chenhao288@hisilicon.com

mainline inclusion from mainline-v5.14-rc1 commit b5a0b70d77b9 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, the debugfs command for fd tcam is implemented by "echo xxxx > cmd", and record the information in dmesg. It's unnecessary and heavy. To improve it, create a single file "fd_tcam" for it, and query it by command "cat fd_tcam", return the result to userspace, rather than record in dmesg.

The display style is below: $ cat fd_tcam read result tcam key x(31): 00000000 00000000 00000000 08000000 00000600 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 read result tcam key y(31): 00000000 00000000 00000000 f7ff0000 0000f900 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0000fff8

Signed-off-by: Hao Chen chenhao288@hisilicon.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 11 ++- .../ethernet/hisilicon/hns3/hns3_debugfs.h | 1 + .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 89 ++++++++++++------- .../hisilicon/hns3/hns3pf/hclge_debugfs.h | 5 ++ 5 files changed, 75 insertions(+), 32 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index e92ee6867fe5..ccedc523a39f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -206,6 +206,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_QUEUE_MAP, HNAE3_DBG_CMD_RX_QUEUE_INFO, HNAE3_DBG_CMD_TX_QUEUE_INFO, + HNAE3_DBG_CMD_FD_TCAM, HNAE3_DBG_CMD_UNKNOWN, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index d634b351f546..978385d665a1 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -29,6 +29,9 @@ static struct hns3_dbg_dentry_info hns3_dbg_dentry[] = { { .name = "queue" }, + { + .name = "fd" + }, /* keep common at the bottom and add new directory above */ { .name = "common" @@ -222,6 +225,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN_1MB, .init = hns3_dbg_common_file_init, }, + { + .name = "fd_tcam", + .cmd = HNAE3_DBG_CMD_FD_TCAM, + .dentry = HNS3_DBG_DENTRY_FD, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, };

static void hns3_dbg_fill_content(char *content, u16 len, @@ -640,7 +650,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) if (!hns3_is_phys_func(h->pdev)) return;

- dev_info(&h->pdev->dev, "dump fd tcam\n"); dev_info(&h->pdev->dev, "dump tc\n"); dev_info(&h->pdev->dev, "dump tm map <q_num>\n"); dev_info(&h->pdev->dev, "dump tm\n"); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h index 5820b040c3f7..2fa3030d5b5b 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h @@ -34,6 +34,7 @@ enum hns3_dbg_dentry_type { HNS3_DBG_DENTRY_MAC, HNS3_DBG_DENTRY_REG, HNS3_DBG_DENTRY_QUEUE, + HNS3_DBG_DENTRY_FD, HNS3_DBG_DENTRY_COMMON, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index a9d7157b7ff7..d4edc6b12c00 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -1449,13 +1449,17 @@ static int hclge_dbg_dump_mng_table(struct hclge_dev *hdev, char *buf, int len) return 0; }

-static int hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage, - bool sel_x, u32 loc) +#define HCLGE_DBG_TCAM_BUF_SIZE 256 + +static int hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, bool sel_x, + char *tcam_buf, + struct hclge_dbg_tcam_msg tcam_msg) { struct hclge_fd_tcam_config_1_cmd *req1; struct hclge_fd_tcam_config_2_cmd *req2; struct hclge_fd_tcam_config_3_cmd *req3; struct hclge_desc desc[3]; + int pos = 0; int ret, i; u32 *req;

@@ -1469,31 +1473,35 @@ static int hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage, req2 = (struct hclge_fd_tcam_config_2_cmd *)desc[1].data; req3 = (struct hclge_fd_tcam_config_3_cmd *)desc[2].data;

- req1->stage = stage; + req1->stage = tcam_msg.stage; req1->xy_sel = sel_x ? 1 : 0; - req1->index = cpu_to_le32(loc); + req1->index = cpu_to_le32(tcam_msg.loc);

ret = hclge_cmd_send(&hdev->hw, desc, 3); if (ret) return ret;

- dev_info(&hdev->pdev->dev, " read result tcam key %s(%u):\n", - sel_x ? "x" : "y", loc); + pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos, + "read result tcam key %s(%u):\n", sel_x ? "x" : "y", + tcam_msg.loc);

/* tcam_data0 ~ tcam_data1 */ req = (u32 *)req1->tcam_data; for (i = 0; i < 2; i++) - dev_info(&hdev->pdev->dev, "%08x\n", *req++); + pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos, + "%08x\n", *req++);

/* tcam_data2 ~ tcam_data7 */ req = (u32 *)req2->tcam_data; for (i = 0; i < 6; i++) - dev_info(&hdev->pdev->dev, "%08x\n", *req++); + pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos, + "%08x\n", *req++);

/* tcam_data8 ~ tcam_data12 */ req = (u32 *)req3->tcam_data; for (i = 0; i < 5; i++) - dev_info(&hdev->pdev->dev, "%08x\n", *req++); + pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos, + "%08x\n", *req++);

return ret; } @@ -1511,59 +1519,76 @@ static int hclge_dbg_get_rules_location(struct hclge_dev *hdev, u16 *rule_locs) } spin_unlock_bh(&hdev->fd_rule_lock);

- if (cnt != hdev->hclge_fd_rule_num) + if (cnt != hdev->hclge_fd_rule_num || cnt == 0) return -EINVAL;

return cnt; }

-static void hclge_dbg_fd_tcam(struct hclge_dev *hdev) +static int hclge_dbg_dump_fd_tcam(struct hclge_dev *hdev, char *buf, int len) { + u32 rule_num = hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1]; + struct hclge_dbg_tcam_msg tcam_msg; int i, ret, rule_cnt; u16 *rule_locs; + char *tcam_buf; + int pos = 0;

if (!hnae3_dev_fd_supported(hdev)) { dev_err(&hdev->pdev->dev, "Only FD-supported dev supports dump fd tcam\n"); - return; + return -EOPNOTSUPP; }

- if (!hdev->hclge_fd_rule_num || - !hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1]) - return; + if (!hdev->hclge_fd_rule_num || !rule_num) + return 0;

- rule_locs = kcalloc(hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1], - sizeof(u16), GFP_KERNEL); + rule_locs = kcalloc(rule_num, sizeof(u16), GFP_KERNEL); if (!rule_locs) - return; + return -ENOMEM; + + tcam_buf = kzalloc(HCLGE_DBG_TCAM_BUF_SIZE, GFP_KERNEL); + if (!tcam_buf) { + kfree(rule_locs); + return -ENOMEM; + }

rule_cnt = hclge_dbg_get_rules_location(hdev, rule_locs); - if (rule_cnt <= 0) { + if (rule_cnt < 0) { + ret = rule_cnt; dev_err(&hdev->pdev->dev, - "failed to get rule number, ret = %d\n", rule_cnt); - kfree(rule_locs); - return; + "failed to get rule number, ret = %d\n", ret); + goto out; }

+ ret = 0; for (i = 0; i < rule_cnt; i++) { - ret = hclge_dbg_fd_tcam_read(hdev, 0, true, rule_locs[i]); + tcam_msg.stage = HCLGE_FD_STAGE_1; + tcam_msg.loc = rule_locs[i]; + + ret = hclge_dbg_fd_tcam_read(hdev, true, tcam_buf, tcam_msg); if (ret) { dev_err(&hdev->pdev->dev, "failed to get fd tcam key x, ret = %d\n", ret); - kfree(rule_locs); - return; + goto out; }

- ret = hclge_dbg_fd_tcam_read(hdev, 0, false, rule_locs[i]); + pos += scnprintf(buf + pos, len - pos, "%s", tcam_buf); + + ret = hclge_dbg_fd_tcam_read(hdev, false, tcam_buf, tcam_msg); if (ret) { dev_err(&hdev->pdev->dev, "failed to get fd tcam key y, ret = %d\n", ret); - kfree(rule_locs); - return; + goto out; } + + pos += scnprintf(buf + pos, len - pos, "%s", tcam_buf); }

+out: + kfree(tcam_buf); kfree(rule_locs); + return ret; }

int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len) @@ -2078,9 +2103,7 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) struct hclge_vport *vport = hclge_get_vport(handle); struct hclge_dev *hdev = vport->back;

- if (strncmp(cmd_buf, "dump fd tcam", 12) == 0) { - hclge_dbg_fd_tcam(hdev); - } else if (strncmp(cmd_buf, "dump tc", 7) == 0) { + if (strncmp(cmd_buf, "dump tc", 7) == 0) { hclge_dbg_dump_tc(hdev); } else if (strncmp(cmd_buf, "dump tm map", 11) == 0) { hclge_dbg_dump_tm_map(hdev, &cmd_buf[sizeof("dump tm map")]); @@ -2201,6 +2224,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_REG_DCB, .dbg_dump = hclge_dbg_dump_dcb, }, + { + .cmd = HNAE3_DBG_CMD_FD_TCAM, + .dbg_dump = hclge_dbg_dump_fd_tcam, + }, };

int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h index 1f115ff98a41..df6494ac95e7 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h @@ -88,6 +88,11 @@ struct hclge_mac_vlan_idx_rd_mc { u8 mg_vf_mb[32]; };

+struct hclge_dbg_tcam_msg { + u8 stage; + u32 loc; +}; + #define HCLGE_DBG_MAX_DFX_MSG_LEN 60 struct hclge_dbg_dfx_message { int flag;

From: Guangbin Huang huangguangbin2@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit cad7c215a4b1 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, user gets some tm info by implementing debugfs command "echo dump tm > cmd", this command will dump info in dmesg. It's unnecessary and heavy.

In addition, the info of this command mixes info of qset, priority, pg and port. Qset and priority have their own command to get info of themself, so can remove info of qset and priority from this command.

To optimize it, create two new files "tm_pg", "tm_port" in tm directory and use cat command to separately get info of pg and port.

The display style is below: $ cat tm_pg ID PRI_MAP MODE DWRR C_IR_B C_IR_U C_IR_S C_BS_B C_BS_S ... 00 0x1f dwrr 1 75 9 0 31 20 ...

$ cat tm_port IR_B IR_U IR_S BS_B BS_S FLAG RATE(Mbps) 75 9 0 31 20 1 200000

Signed-off-by: Guangbin Huang huangguangbin2@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 2 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 15 +- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 292 ++++++------------ .../hisilicon/hns3/hns3pf/hclge_debugfs.h | 2 + .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 125 +++++++- .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 15 +- 6 files changed, 257 insertions(+), 194 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 176948e786d5..b36494288fd1 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -183,6 +183,8 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_TM_PRI, HNAE3_DBG_CMD_TM_QSET, HNAE3_DBG_CMD_TM_MAP, + HNAE3_DBG_CMD_TM_PG, + HNAE3_DBG_CMD_TM_PORT, HNAE3_DBG_CMD_TX_BD, HNAE3_DBG_CMD_RX_BD, HNAE3_DBG_CMD_MAC_UC, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 1d3be6ef8604..5eb108f3bb7e 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -64,6 +64,20 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN_1MB, .init = hns3_dbg_common_file_init, }, + { + .name = "tm_pg", + .cmd = HNAE3_DBG_CMD_TM_PG, + .dentry = HNS3_DBG_DENTRY_TM, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, + { + .name = "tm_port", + .cmd = HNAE3_DBG_CMD_TM_PORT, + .dentry = HNS3_DBG_DENTRY_TM, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, { .name = "tx_bd_queue", .cmd = HNAE3_DBG_CMD_TX_BD, @@ -658,7 +672,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) return;

dev_info(&h->pdev->dev, "dump tc\n"); - dev_info(&h->pdev->dev, "dump tm\n"); dev_info(&h->pdev->dev, "dump qos pause cfg\n"); dev_info(&h->pdev->dev, "dump qos pri map\n"); dev_info(&h->pdev->dev, "dump qos buf cfg\n"); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index a90182e3da43..9b928752e3a9 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -690,212 +690,120 @@ static void hclge_dbg_dump_tc(struct hclge_dev *hdev) "tc", "no sp mode", "sp mode"); }

-static void hclge_dbg_dump_tm_pg(struct hclge_dev *hdev) -{ - struct hclge_port_shapping_cmd *port_shap_cfg_cmd; - struct hclge_bp_to_qs_map_cmd *bp_to_qs_map_cmd; - struct hclge_pg_shapping_cmd *pg_shap_cfg_cmd; - enum hclge_opcode_type cmd; - struct hclge_desc desc; - int ret; - - cmd = HCLGE_OPC_TM_PG_C_SHAPPING; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_pg_cmd_send; - - pg_shap_cfg_cmd = (struct hclge_pg_shapping_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "PG_C pg_id: %u\n", pg_shap_cfg_cmd->pg_id); - dev_info(&hdev->pdev->dev, "PG_C pg_shapping: 0x%x\n", - le32_to_cpu(pg_shap_cfg_cmd->pg_shapping_para)); +static const struct hclge_dbg_item tm_pg_items[] = { + { "ID", 2 }, + { "PRI_MAP", 2 }, + { "MODE", 2 }, + { "DWRR", 2 }, + { "C_IR_B", 2 }, + { "C_IR_U", 2 }, + { "C_IR_S", 2 }, + { "C_BS_B", 2 }, + { "C_BS_S", 2 }, + { "C_FLAG", 2 }, + { "C_RATE(Mbps)", 2 }, + { "P_IR_B", 2 }, + { "P_IR_U", 2 }, + { "P_IR_S", 2 }, + { "P_BS_B", 2 }, + { "P_BS_S", 2 }, + { "P_FLAG", 2 }, + { "P_RATE(Mbps)", 0 } +};

- cmd = HCLGE_OPC_TM_PG_P_SHAPPING; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_pg_cmd_send; +static void hclge_dbg_fill_shaper_content(struct hclge_tm_shaper_para *para, + char **result, u8 *index) +{ + sprintf(result[(*index)++], "%3u", para->ir_b); + sprintf(result[(*index)++], "%3u", para->ir_u); + sprintf(result[(*index)++], "%3u", para->ir_s); + sprintf(result[(*index)++], "%3u", para->bs_b); + sprintf(result[(*index)++], "%3u", para->bs_s); + sprintf(result[(*index)++], "%3u", para->flag); + sprintf(result[(*index)++], "%6u", para->rate); +}

- pg_shap_cfg_cmd = (struct hclge_pg_shapping_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "PG_P pg_id: %u\n", pg_shap_cfg_cmd->pg_id); - dev_info(&hdev->pdev->dev, "PG_P pg_shapping: 0x%x\n", - le32_to_cpu(pg_shap_cfg_cmd->pg_shapping_para)); +static int hclge_dbg_dump_tm_pg(struct hclge_dev *hdev, char *buf, int len) +{ + char data_str[ARRAY_SIZE(tm_pg_items)][HCLGE_DBG_DATA_STR_LEN]; + struct hclge_tm_shaper_para c_shaper_para, p_shaper_para; + char *result[ARRAY_SIZE(tm_pg_items)], *sch_mode_str; + u8 pg_id, sch_mode, weight, pri_bit_map, i, j; + char content[HCLGE_DBG_TM_INFO_LEN]; + int pos = 0; + int ret;

- cmd = HCLGE_OPC_TM_PORT_SHAPPING; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_pg_cmd_send; + for (i = 0; i < ARRAY_SIZE(tm_pg_items); i++) + result[i] = &data_str[i][0];

- port_shap_cfg_cmd = (struct hclge_port_shapping_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "PORT port_shapping: 0x%x\n", - le32_to_cpu(port_shap_cfg_cmd->port_shapping_para)); + hclge_dbg_fill_content(content, sizeof(content), tm_pg_items, + NULL, ARRAY_SIZE(tm_pg_items)); + pos += scnprintf(buf + pos, len - pos, "%s", content);

- cmd = HCLGE_OPC_TM_PG_SCH_MODE_CFG; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_pg_cmd_send; + for (pg_id = 0; pg_id < hdev->tm_info.num_pg; pg_id++) { + ret = hclge_tm_get_pg_to_pri_map(hdev, pg_id, &pri_bit_map); + if (ret) + return ret;

- dev_info(&hdev->pdev->dev, "PG_SCH pg_id: %u\n", - le32_to_cpu(desc.data[0])); + ret = hclge_tm_get_pg_sch_mode(hdev, pg_id, &sch_mode); + if (ret) + return ret;

- cmd = HCLGE_OPC_TM_PRI_SCH_MODE_CFG; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_pg_cmd_send; + ret = hclge_tm_get_pg_weight(hdev, pg_id, &weight); + if (ret) + return ret;

- dev_info(&hdev->pdev->dev, "PRI_SCH pri_id: %u\n", - le32_to_cpu(desc.data[0])); + ret = hclge_tm_get_pg_shaper(hdev, pg_id, + HCLGE_OPC_TM_PG_C_SHAPPING, + &c_shaper_para); + if (ret) + return ret;

- cmd = HCLGE_OPC_TM_QS_SCH_MODE_CFG; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_pg_cmd_send; + ret = hclge_tm_get_pg_shaper(hdev, pg_id, + HCLGE_OPC_TM_PG_P_SHAPPING, + &p_shaper_para); + if (ret) + return ret;

- dev_info(&hdev->pdev->dev, "QS_SCH qs_id: %u\n", - le32_to_cpu(desc.data[0])); + sch_mode_str = sch_mode & HCLGE_TM_TX_SCHD_DWRR_MSK ? "dwrr" : + "sp";

- if (!hnae3_dev_dcb_supported(hdev)) { - dev_info(&hdev->pdev->dev, - "Only DCB-supported dev supports tm mapping\n"); - return; + j = 0; + sprintf(result[j++], "%02u", pg_id); + sprintf(result[j++], "0x%02x", pri_bit_map); + sprintf(result[j++], "%4s", sch_mode_str); + sprintf(result[j++], "%3u", weight); + hclge_dbg_fill_shaper_content(&c_shaper_para, result, &j); + hclge_dbg_fill_shaper_content(&p_shaper_para, result, &j); + + hclge_dbg_fill_content(content, sizeof(content), tm_pg_items, + (const char **)result, + ARRAY_SIZE(tm_pg_items)); + pos += scnprintf(buf + pos, len - pos, "%s", content); }

- cmd = HCLGE_OPC_TM_BP_TO_QSET_MAPPING; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_pg_cmd_send; - - bp_to_qs_map_cmd = (struct hclge_bp_to_qs_map_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "BP_TO_QSET tc_id: %u\n", - bp_to_qs_map_cmd->tc_id); - dev_info(&hdev->pdev->dev, "BP_TO_QSET qs_group_id: 0x%x\n", - bp_to_qs_map_cmd->qs_group_id); - dev_info(&hdev->pdev->dev, "BP_TO_QSET qs_bit_map: 0x%x\n", - le32_to_cpu(bp_to_qs_map_cmd->qs_bit_map)); - return; - -err_tm_pg_cmd_send: - dev_err(&hdev->pdev->dev, "dump tm_pg fail(0x%x), ret = %d\n", - cmd, ret); + return 0; }

-static void hclge_dbg_dump_tm(struct hclge_dev *hdev) +static int hclge_dbg_dump_tm_port(struct hclge_dev *hdev, char *buf, int len) { - struct hclge_priority_weight_cmd *priority_weight; - struct hclge_pg_to_pri_link_cmd *pg_to_pri_map; - struct hclge_qs_to_pri_link_cmd *qs_to_pri_map; - struct hclge_nq_to_qs_link_cmd *nq_to_qs_map; - struct hclge_pri_shapping_cmd *shap_cfg_cmd; - struct hclge_pg_weight_cmd *pg_weight; - struct hclge_qs_weight_cmd *qs_weight; - enum hclge_opcode_type cmd; - struct hclge_desc desc; + struct hclge_tm_shaper_para shaper_para; + int pos = 0; int ret;

- cmd = HCLGE_OPC_TM_PG_TO_PRI_LINK; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_cmd_send; - - pg_to_pri_map = (struct hclge_pg_to_pri_link_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "dump tm\n"); - dev_info(&hdev->pdev->dev, "PG_TO_PRI gp_id: %u\n", - pg_to_pri_map->pg_id); - dev_info(&hdev->pdev->dev, "PG_TO_PRI map: 0x%x\n", - pg_to_pri_map->pri_bit_map); - - cmd = HCLGE_OPC_TM_QS_TO_PRI_LINK; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_cmd_send; - - qs_to_pri_map = (struct hclge_qs_to_pri_link_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "QS_TO_PRI qs_id: %u\n", - le16_to_cpu(qs_to_pri_map->qs_id)); - dev_info(&hdev->pdev->dev, "QS_TO_PRI priority: %u\n", - qs_to_pri_map->priority); - dev_info(&hdev->pdev->dev, "QS_TO_PRI link_vld: %u\n", - qs_to_pri_map->link_vld); - - cmd = HCLGE_OPC_TM_NQ_TO_QS_LINK; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_cmd_send; - - nq_to_qs_map = (struct hclge_nq_to_qs_link_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "NQ_TO_QS nq_id: %u\n", - le16_to_cpu(nq_to_qs_map->nq_id)); - dev_info(&hdev->pdev->dev, "NQ_TO_QS qset_id: 0x%x\n", - le16_to_cpu(nq_to_qs_map->qset_id)); - - cmd = HCLGE_OPC_TM_PG_WEIGHT; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_cmd_send; - - pg_weight = (struct hclge_pg_weight_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "PG pg_id: %u\n", pg_weight->pg_id); - dev_info(&hdev->pdev->dev, "PG dwrr: %u\n", pg_weight->dwrr); - - cmd = HCLGE_OPC_TM_QS_WEIGHT; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_cmd_send; - - qs_weight = (struct hclge_qs_weight_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "QS qs_id: %u\n", - le16_to_cpu(qs_weight->qs_id)); - dev_info(&hdev->pdev->dev, "QS dwrr: %u\n", qs_weight->dwrr); - - cmd = HCLGE_OPC_TM_PRI_WEIGHT; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_cmd_send; - - priority_weight = (struct hclge_priority_weight_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "PRI pri_id: %u\n", priority_weight->pri_id); - dev_info(&hdev->pdev->dev, "PRI dwrr: %u\n", priority_weight->dwrr); - - cmd = HCLGE_OPC_TM_PRI_C_SHAPPING; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) - goto err_tm_cmd_send; - - shap_cfg_cmd = (struct hclge_pri_shapping_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "PRI_C pri_id: %u\n", shap_cfg_cmd->pri_id); - dev_info(&hdev->pdev->dev, "PRI_C pri_shapping: 0x%x\n", - le32_to_cpu(shap_cfg_cmd->pri_shapping_para)); - - cmd = HCLGE_OPC_TM_PRI_P_SHAPPING; - hclge_cmd_setup_basic_desc(&desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); + ret = hclge_tm_get_port_shaper(hdev, &shaper_para); if (ret) - goto err_tm_cmd_send; - - shap_cfg_cmd = (struct hclge_pri_shapping_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "PRI_P pri_id: %u\n", shap_cfg_cmd->pri_id); - dev_info(&hdev->pdev->dev, "PRI_P pri_shapping: 0x%x\n", - le32_to_cpu(shap_cfg_cmd->pri_shapping_para)); - - hclge_dbg_dump_tm_pg(hdev); + return ret;

- return; + pos += scnprintf(buf + pos, len - pos, + "IR_B IR_U IR_S BS_B BS_S FLAG RATE(Mbps)\n"); + pos += scnprintf(buf + pos, len - pos, + "%3u %3u %3u %3u %3u %1u %6u\n", + shaper_para.ir_b, shaper_para.ir_u, shaper_para.ir_s, + shaper_para.bs_b, shaper_para.bs_s, shaper_para.flag, + shaper_para.rate);

-err_tm_cmd_send: - dev_err(&hdev->pdev->dev, "dump tm fail(0x%x), ret = %d\n", - cmd, ret); + return 0; }

static int hclge_dbg_dump_tm_bp_qset_map(struct hclge_dev *hdev, u8 tc_id, @@ -991,8 +899,8 @@ static int hclge_dbg_dump_tm_map(struct hclge_dev *hdev, char *buf, int len)

static int hclge_dbg_dump_tm_pri(struct hclge_dev *hdev, char *buf, int len) { - struct hclge_pri_shaper_para c_shaper_para; - struct hclge_pri_shaper_para p_shaper_para; + struct hclge_tm_shaper_para c_shaper_para; + struct hclge_tm_shaper_para p_shaper_para; u8 pri_num, sch_mode, weight; char *sch_mode_str; int pos = 0; @@ -2106,8 +2014,6 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf)

if (strncmp(cmd_buf, "dump tc", 7) == 0) { hclge_dbg_dump_tc(hdev); - } else if (strncmp(cmd_buf, "dump tm", 7) == 0) { - hclge_dbg_dump_tm(hdev); } else if (strncmp(cmd_buf, "dump qos pause cfg", 18) == 0) { hclge_dbg_dump_qos_pause_cfg(hdev); } else if (strncmp(cmd_buf, "dump qos pri map", 16) == 0) { @@ -2151,6 +2057,14 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_TM_MAP, .dbg_dump = hclge_dbg_dump_tm_map, }, + { + .cmd = HNAE3_DBG_CMD_TM_PG, + .dbg_dump = hclge_dbg_dump_tm_pg, + }, + { + .cmd = HNAE3_DBG_CMD_TM_PORT, + .dbg_dump = hclge_dbg_dump_tm_port, + }, { .cmd = HNAE3_DBG_CMD_MAC_UC, .dbg_dump = hclge_dbg_dump_mac_uc, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h index df6494ac95e7..8846911654c0 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h @@ -757,6 +757,8 @@ static const struct hclge_dbg_dfx_message hclge_dbg_tqp_reg[] = { #define HCLGE_DBG_ID_LEN 16 #define HCLGE_DBG_ITEM_NAME_LEN 32 #define HCLGE_DBG_DATA_STR_LEN 32 +#define HCLGE_DBG_TM_INFO_LEN 256 + struct hclge_dbg_item { char name[HCLGE_DBG_ITEM_NAME_LEN]; u16 interval; /* blank numbers after the item */ diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c index 748b5a63c4e7..af75949ab736 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c @@ -1612,7 +1612,7 @@ int hclge_tm_get_pri_weight(struct hclge_dev *hdev, u8 pri_id, u8 *weight)

int hclge_tm_get_pri_shaper(struct hclge_dev *hdev, u8 pri_id, enum hclge_opcode_type cmd, - struct hclge_pri_shaper_para *para) + struct hclge_tm_shaper_para *para) { struct hclge_pri_shapping_cmd *shap_cfg_cmd; struct hclge_desc desc; @@ -1689,3 +1689,126 @@ int hclge_tm_get_q_to_tc(struct hclge_dev *hdev, u16 q_id, u8 *tc_id) *tc_id = tc->tc_id & HCLGE_TM_TC_MASK; return 0; } + +int hclge_tm_get_pg_to_pri_map(struct hclge_dev *hdev, u8 pg_id, + u8 *pri_bit_map) +{ + struct hclge_pg_to_pri_link_cmd *map; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_PG_TO_PRI_LINK, true); + map = (struct hclge_pg_to_pri_link_cmd *)desc.data; + map->pg_id = pg_id; + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get pg to pri map, ret = %d\n", ret); + return ret; + } + + *pri_bit_map = map->pri_bit_map; + return 0; +} + +int hclge_tm_get_pg_weight(struct hclge_dev *hdev, u8 pg_id, u8 *weight) +{ + struct hclge_pg_weight_cmd *pg_weight_cmd; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_PG_WEIGHT, true); + pg_weight_cmd = (struct hclge_pg_weight_cmd *)desc.data; + pg_weight_cmd->pg_id = pg_id; + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get pg weight, ret = %d\n", ret); + return ret; + } + + *weight = pg_weight_cmd->dwrr; + return 0; +} + +int hclge_tm_get_pg_sch_mode(struct hclge_dev *hdev, u8 pg_id, u8 *mode) +{ + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_PG_SCH_MODE_CFG, true); + desc.data[0] = cpu_to_le32(pg_id); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get pg sch mode, ret = %d\n", ret); + return ret; + } + + *mode = (u8)le32_to_cpu(desc.data[1]); + return 0; +} + +int hclge_tm_get_pg_shaper(struct hclge_dev *hdev, u8 pg_id, + enum hclge_opcode_type cmd, + struct hclge_tm_shaper_para *para) +{ + struct hclge_pg_shapping_cmd *shap_cfg_cmd; + struct hclge_desc desc; + u32 shapping_para; + int ret; + + if (cmd != HCLGE_OPC_TM_PG_C_SHAPPING && + cmd != HCLGE_OPC_TM_PG_P_SHAPPING) + return -EINVAL; + + hclge_cmd_setup_basic_desc(&desc, cmd, true); + shap_cfg_cmd = (struct hclge_pg_shapping_cmd *)desc.data; + shap_cfg_cmd->pg_id = pg_id; + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get pg shaper(%#x), ret = %d\n", + cmd, ret); + return ret; + } + + shapping_para = le32_to_cpu(shap_cfg_cmd->pg_shapping_para); + para->ir_b = hclge_tm_get_field(shapping_para, IR_B); + para->ir_u = hclge_tm_get_field(shapping_para, IR_U); + para->ir_s = hclge_tm_get_field(shapping_para, IR_S); + para->bs_b = hclge_tm_get_field(shapping_para, BS_B); + para->bs_s = hclge_tm_get_field(shapping_para, BS_S); + para->flag = 0; + para->rate = 0; + return 0; +} + +int hclge_tm_get_port_shaper(struct hclge_dev *hdev, + struct hclge_tm_shaper_para *para) +{ + struct hclge_port_shapping_cmd *port_shap_cfg_cmd; + struct hclge_desc desc; + u32 shapping_para; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_PORT_SHAPPING, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get port shaper, ret = %d\n", ret); + return ret; + } + + port_shap_cfg_cmd = (struct hclge_port_shapping_cmd *)desc.data; + shapping_para = le32_to_cpu(port_shap_cfg_cmd->port_shapping_para); + para->ir_b = hclge_tm_get_field(shapping_para, IR_B); + para->ir_u = hclge_tm_get_field(shapping_para, IR_U); + para->ir_s = hclge_tm_get_field(shapping_para, IR_S); + para->bs_b = hclge_tm_get_field(shapping_para, BS_B); + para->bs_s = hclge_tm_get_field(shapping_para, BS_S); + para->flag = 0; + para->rate = 0; + + return 0; +} diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h index 953748a8065a..2a92761f49d7 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h @@ -156,14 +156,14 @@ struct hclge_port_shapping_cmd { __le32 port_shapping_para; };

-struct hclge_pri_shaper_para { +struct hclge_tm_shaper_para { + u32 rate; u8 ir_b; u8 ir_u; u8 ir_s; u8 bs_b; u8 bs_s; u8 flag; - u32 rate; };

#define hclge_tm_set_field(dest, string, val) \ @@ -198,7 +198,16 @@ int hclge_tm_get_pri_sch_mode(struct hclge_dev *hdev, u8 pri_id, u8 *mode); int hclge_tm_get_pri_weight(struct hclge_dev *hdev, u8 pri_id, u8 *weight); int hclge_tm_get_pri_shaper(struct hclge_dev *hdev, u8 pri_id, enum hclge_opcode_type cmd, - struct hclge_pri_shaper_para *para); + struct hclge_tm_shaper_para *para); int hclge_tm_get_q_to_qs_map(struct hclge_dev *hdev, u16 q_id, u16 *qset_id); int hclge_tm_get_q_to_tc(struct hclge_dev *hdev, u16 q_id, u8 *tc_id); +int hclge_tm_get_pg_to_pri_map(struct hclge_dev *hdev, u8 pg_id, + u8 *pri_bit_map); +int hclge_tm_get_pg_weight(struct hclge_dev *hdev, u8 pg_id, u8 *weight); +int hclge_tm_get_pg_sch_mode(struct hclge_dev *hdev, u8 pg_id, u8 *mode); +int hclge_tm_get_pg_shaper(struct hclge_dev *hdev, u8 pg_id, + enum hclge_opcode_type cmd, + struct hclge_tm_shaper_para *para); +int hclge_tm_get_port_shaper(struct hclge_dev *hdev, + struct hclge_tm_shaper_para *para); #endif

From: Guangbin Huang huangguangbin2@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit 6571ec2eda65 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, user gets pause config by implementing debugfs command "echo dump qos pause cfg > cmd", this command will dump info in dmesg. It's unnecessary and heavy.

To optimize it, create a single file "qos_pause_cfg" in tm directory and use cat command to get info. It will return info to userspace, rather than record in dmesg.

The display style is below: $ cat qos_pause_cfg pause_trans_gap: 0x7f pause_trans_time: 0xffff

Signed-off-by: Guangbin Huang huangguangbin2@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 8 ++++- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 30 +++++++++++-------- 3 files changed, 25 insertions(+), 14 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index bb2b6a9f9c41..334ea2528d53 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -186,6 +186,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_TM_PG, HNAE3_DBG_CMD_TM_PORT, HNAE3_DBG_CMD_TC_SCH_INFO, + HNAE3_DBG_CMD_QOS_PAUSE_CFG, HNAE3_DBG_CMD_TX_BD, HNAE3_DBG_CMD_RX_BD, HNAE3_DBG_CMD_MAC_UC, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index de4a0d242726..46dcfeefee96 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -85,6 +85,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN, .init = hns3_dbg_common_file_init, }, + { + .name = "qos_pause_cfg", + .cmd = HNAE3_DBG_CMD_QOS_PAUSE_CFG, + .dentry = HNS3_DBG_DENTRY_TM, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, { .name = "tx_bd_queue", .cmd = HNAE3_DBG_CMD_TX_BD, @@ -678,7 +685,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) if (!hns3_is_phys_func(h->pdev)) return;

- dev_info(&h->pdev->dev, "dump qos pause cfg\n"); dev_info(&h->pdev->dev, "dump qos pri map\n"); dev_info(&h->pdev->dev, "dump qos buf cfg\n"); dev_info(&h->pdev->dev, "dump mac tbl\n"); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index e12a652169ea..34cf78411715 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -995,27 +995,29 @@ static int hclge_dbg_dump_tm_qset(struct hclge_dev *hdev, char *buf, int len) return 0; }

-static void hclge_dbg_dump_qos_pause_cfg(struct hclge_dev *hdev) +static int hclge_dbg_dump_qos_pause_cfg(struct hclge_dev *hdev, char *buf, + int len) { struct hclge_cfg_pause_param_cmd *pause_param; struct hclge_desc desc; + int pos = 0; int ret;

hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CFG_MAC_PARA, true); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) { - dev_err(&hdev->pdev->dev, "dump checksum fail, ret = %d\n", - ret); - return; + dev_err(&hdev->pdev->dev, + "failed to dump qos pause, ret = %d\n", ret); + return ret; }

pause_param = (struct hclge_cfg_pause_param_cmd *)desc.data; - dev_info(&hdev->pdev->dev, "dump qos pause cfg\n"); - dev_info(&hdev->pdev->dev, "pause_trans_gap: 0x%x\n", - pause_param->pause_trans_gap); - dev_info(&hdev->pdev->dev, "pause_trans_time: 0x%x\n", - le16_to_cpu(pause_param->pause_trans_time)); + + pos += scnprintf(buf + pos, len - pos, "pause_trans_gap: 0x%x\n", + pause_param->pause_trans_gap); + pos += scnprintf(buf + pos, len - pos, "pause_trans_time: 0x%x\n", + le16_to_cpu(pause_param->pause_trans_time)); + return 0; }

static void hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev) @@ -2008,9 +2010,7 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) struct hclge_vport *vport = hclge_get_vport(handle); struct hclge_dev *hdev = vport->back;

- if (strncmp(cmd_buf, "dump qos pause cfg", 18) == 0) { - hclge_dbg_dump_qos_pause_cfg(hdev); - } else if (strncmp(cmd_buf, "dump qos pri map", 16) == 0) { + if (strncmp(cmd_buf, "dump qos pri map", 16) == 0) { hclge_dbg_dump_qos_pri_map(hdev); } else if (strncmp(cmd_buf, "dump qos buf cfg", 16) == 0) { hclge_dbg_dump_qos_buf_cfg(hdev); @@ -2063,6 +2063,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_TC_SCH_INFO, .dbg_dump = hclge_dbg_dump_tc, }, + { + .cmd = HNAE3_DBG_CMD_QOS_PAUSE_CFG, + .dbg_dump = hclge_dbg_dump_qos_pause_cfg, + }, { .cmd = HNAE3_DBG_CMD_MAC_UC, .dbg_dump = hclge_dbg_dump_mac_uc,

From: Jian Shen shenjian15@huawei.com

mainline inclusion from mainline-v5.12-rc1 commit b3712fa73d56e31e5c94375977ad25966948c6ae category: cleanup bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

hclge_dbg_dump_qos_buf_cfg() is bloated, so split it into separate functions for readability and maintainability.

Signed-off-by: Jian Shen shenjian15@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 158 +++++++++++++----- 1 file changed, 115 insertions(+), 43 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 121943eb5776..42238c7a5a0a 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -1057,39 +1057,39 @@ static int hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev, char *buf, return 0; }

-static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev) +static int hclge_dbg_dump_tx_buf_cfg(struct hclge_dev *hdev) { struct hclge_tx_buff_alloc_cmd *tx_buf_cmd; - struct hclge_rx_priv_buff_cmd *rx_buf_cmd; - struct hclge_rx_priv_wl_buf *rx_priv_wl; - struct hclge_rx_com_wl *rx_packet_cnt; - struct hclge_rx_com_thrd *rx_com_thrd; - struct hclge_rx_com_wl *rx_com_wl; - enum hclge_opcode_type cmd; - struct hclge_desc desc[2]; + struct hclge_desc desc; int i, ret;

- cmd = HCLGE_OPC_TX_BUFF_ALLOC; - hclge_cmd_setup_basic_desc(desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, desc, 1); + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TX_BUFF_ALLOC, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) - goto err_qos_cmd_send; + return ret;

dev_info(&hdev->pdev->dev, "dump qos buf cfg\n"); - - tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc[0].data; + tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc.data; for (i = 0; i < HCLGE_MAX_TC_NUM; i++) dev_info(&hdev->pdev->dev, "tx_packet_buf_tc_%d: 0x%x\n", i, le16_to_cpu(tx_buf_cmd->tx_pkt_buff[i]));

- cmd = HCLGE_OPC_RX_PRIV_BUFF_ALLOC; - hclge_cmd_setup_basic_desc(desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, desc, 1); + return 0; +} + +static int hclge_dbg_dump_rx_priv_buf_cfg(struct hclge_dev *hdev) +{ + struct hclge_rx_priv_buff_cmd *rx_buf_cmd; + struct hclge_desc desc; + int i, ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_PRIV_BUFF_ALLOC, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) - goto err_qos_cmd_send; + return ret;

dev_info(&hdev->pdev->dev, "\n"); - rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc[0].data; + rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc.data; for (i = 0; i < HCLGE_MAX_TC_NUM; i++) dev_info(&hdev->pdev->dev, "rx_packet_buf_tc_%d: 0x%x\n", i, le16_to_cpu(rx_buf_cmd->buf_num[i])); @@ -1097,43 +1097,61 @@ static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev) dev_info(&hdev->pdev->dev, "rx_share_buf: 0x%x\n", le16_to_cpu(rx_buf_cmd->shared_buf));

- cmd = HCLGE_OPC_RX_COM_WL_ALLOC; - hclge_cmd_setup_basic_desc(desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, desc, 1); + return 0; +} + +static int hclge_dbg_dump_rx_common_wl_cfg(struct hclge_dev *hdev) +{ + struct hclge_rx_com_wl *rx_com_wl; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_COM_WL_ALLOC, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) - goto err_qos_cmd_send; + return ret;

- rx_com_wl = (struct hclge_rx_com_wl *)desc[0].data; + rx_com_wl = (struct hclge_rx_com_wl *)desc.data; dev_info(&hdev->pdev->dev, "\n"); dev_info(&hdev->pdev->dev, "rx_com_wl: high: 0x%x, low: 0x%x\n", le16_to_cpu(rx_com_wl->com_wl.high), le16_to_cpu(rx_com_wl->com_wl.low));

- cmd = HCLGE_OPC_RX_GBL_PKT_CNT; - hclge_cmd_setup_basic_desc(desc, cmd, true); - ret = hclge_cmd_send(&hdev->hw, desc, 1); + return 0; +} + +static int hclge_dbg_dump_rx_global_pkt_cnt(struct hclge_dev *hdev) +{ + struct hclge_rx_com_wl *rx_packet_cnt; + struct hclge_desc desc; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_GBL_PKT_CNT, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) - goto err_qos_cmd_send; + return ret;

- rx_packet_cnt = (struct hclge_rx_com_wl *)desc[0].data; + rx_packet_cnt = (struct hclge_rx_com_wl *)desc.data; dev_info(&hdev->pdev->dev, "rx_global_packet_cnt: high: 0x%x, low: 0x%x\n", le16_to_cpu(rx_packet_cnt->com_wl.high), le16_to_cpu(rx_packet_cnt->com_wl.low)); - dev_info(&hdev->pdev->dev, "\n");

- if (!hnae3_dev_dcb_supported(hdev)) { - dev_info(&hdev->pdev->dev, - "Only DCB-supported dev supports rx priv wl\n"); - return; - } - cmd = HCLGE_OPC_RX_PRIV_WL_ALLOC; - hclge_cmd_setup_basic_desc(&desc[0], cmd, true); + return 0; +} + +static int hclge_dbg_dump_rx_priv_wl_buf_cfg(struct hclge_dev *hdev) +{ + struct hclge_rx_priv_wl_buf *rx_priv_wl; + struct hclge_desc desc[2]; + int i, ret; + + hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_RX_PRIV_WL_ALLOC, true); desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); - hclge_cmd_setup_basic_desc(&desc[1], cmd, true); + hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_RX_PRIV_WL_ALLOC, true); ret = hclge_cmd_send(&hdev->hw, desc, 2); if (ret) - goto err_qos_cmd_send; + return ret;

rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[0].data; for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) @@ -1150,13 +1168,21 @@ static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev) le16_to_cpu(rx_priv_wl->tc_wl[i].high), le16_to_cpu(rx_priv_wl->tc_wl[i].low));

- cmd = HCLGE_OPC_RX_COM_THRD_ALLOC; - hclge_cmd_setup_basic_desc(&desc[0], cmd, true); + return 0; +} + +static int hclge_dbg_dump_rx_common_threshold_cfg(struct hclge_dev *hdev) +{ + struct hclge_rx_com_thrd *rx_com_thrd; + struct hclge_desc desc[2]; + int i, ret; + + hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_RX_COM_THRD_ALLOC, true); desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); - hclge_cmd_setup_basic_desc(&desc[1], cmd, true); + hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_RX_COM_THRD_ALLOC, true); ret = hclge_cmd_send(&hdev->hw, desc, 2); if (ret) - goto err_qos_cmd_send; + return ret;

dev_info(&hdev->pdev->dev, "\n"); rx_com_thrd = (struct hclge_rx_com_thrd *)desc[0].data; @@ -1173,6 +1199,52 @@ static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev) i + HCLGE_TC_NUM_ONE_DESC, le16_to_cpu(rx_com_thrd->com_thrd[i].high), le16_to_cpu(rx_com_thrd->com_thrd[i].low)); + + return 0; +} + +static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev) +{ + enum hclge_opcode_type cmd; + int ret; + + cmd = HCLGE_OPC_TX_BUFF_ALLOC; + ret = hclge_dbg_dump_tx_buf_cfg(hdev); + if (ret) + goto err_qos_cmd_send; + + cmd = HCLGE_OPC_RX_PRIV_BUFF_ALLOC; + ret = hclge_dbg_dump_rx_priv_buf_cfg(hdev); + if (ret) + goto err_qos_cmd_send; + + cmd = HCLGE_OPC_RX_COM_WL_ALLOC; + ret = hclge_dbg_dump_rx_common_wl_cfg(hdev); + if (ret) + goto err_qos_cmd_send; + + cmd = HCLGE_OPC_RX_GBL_PKT_CNT; + ret = hclge_dbg_dump_rx_global_pkt_cnt(hdev); + if (ret) + goto err_qos_cmd_send; + + dev_info(&hdev->pdev->dev, "\n"); + if (!hnae3_dev_dcb_supported(hdev)) { + dev_info(&hdev->pdev->dev, + "Only DCB-supported dev supports rx priv wl\n"); + return; + } + + cmd = HCLGE_OPC_RX_PRIV_WL_ALLOC; + ret = hclge_dbg_dump_rx_priv_wl_buf_cfg(hdev); + if (ret) + goto err_qos_cmd_send; + + cmd = HCLGE_OPC_RX_COM_THRD_ALLOC; + ret = hclge_dbg_dump_rx_common_threshold_cfg(hdev); + if (ret) + goto err_qos_cmd_send; + return;

err_qos_cmd_send:

From: Guangbin Huang huangguangbin2@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit 484e1ed1b25a category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, user gets qset shaper parameters by implementing debugfs command "echo dump qs shaper > cmd", this command will dump info in dmesg. It's unnecessary and heavy.

As there is "tm_qset" file in tm directory for dump qset info, to optimize these command, merge qset shaper parameters to tm_qset file and use cat command to get them.

The display style is below: $ cat tm_qset ID MAP_PRI LINK_VLD MODE DWRR IR_B IR_U IR_S BS_B BS_S FLAG 0000 0 1 dwrr 100 150 7 0 5 20 0 0001 0 0 sp 0 150 7 0 5 20 0

Signed-off-by: Guangbin Huang huangguangbin2@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- .../ethernet/hisilicon/hns3/hns3_debugfs.c | 1 - .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 130 ++++++------------ .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 30 ++++ .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 2 + 4 files changed, 76 insertions(+), 87 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 22f618eb9efc..1f2f0b940bc6 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -701,7 +701,6 @@ static void hns3_dbg_help(struct hnae3_handle *h)

dev_info(&h->pdev->dev, "dump mac tbl\n"); dev_info(&h->pdev->dev, "dump mac tnl status\n"); - dev_info(&h->pdev->dev, "dump qs shaper [qs id]\n"); dev_info(&h->pdev->dev, "dump umv info <func id>\n"); dev_info(&h->pdev->dev, "dump vlan filter <func id>\n"); } diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 26f078533e24..9f94aa57ddf2 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -958,19 +958,42 @@ static int hclge_dbg_dump_tm_pri(struct hclge_dev *hdev, char *buf, int len) return 0; }

+static const struct hclge_dbg_item tm_qset_items[] = { + { "ID", 4 }, + { "MAP_PRI", 2 }, + { "LINK_VLD", 2 }, + { "MODE", 2 }, + { "DWRR", 2 }, + { "IR_B", 2 }, + { "IR_U", 2 }, + { "IR_S", 2 }, + { "BS_B", 2 }, + { "BS_S", 2 }, + { "FLAG", 2 }, + { "RATE(Mbps)", 0 } +}; + static int hclge_dbg_dump_tm_qset(struct hclge_dev *hdev, char *buf, int len) { + char data_str[ARRAY_SIZE(tm_qset_items)][HCLGE_DBG_DATA_STR_LEN]; + char *result[ARRAY_SIZE(tm_qset_items)], *sch_mode_str; u8 priority, link_vld, sch_mode, weight; - char *sch_mode_str; + struct hclge_tm_shaper_para shaper_para; + char content[HCLGE_DBG_TM_INFO_LEN]; + u16 qset_num, i; int ret, pos; - u16 qset_num; - u16 i; + u8 j;

ret = hclge_tm_get_qset_num(hdev, &qset_num); if (ret) return ret;

- pos = scnprintf(buf, len, "ID MAP_PRI LINK_VLD MODE DWRR\n"); + for (i = 0; i < ARRAY_SIZE(tm_qset_items); i++) + result[i] = &data_str[i][0]; + + hclge_dbg_fill_content(content, sizeof(content), tm_qset_items, + NULL, ARRAY_SIZE(tm_qset_items)); + pos = scnprintf(buf, len, "%s", content);

for (i = 0; i < qset_num; i++) { ret = hclge_tm_get_qset_map_pri(hdev, i, &priority, &link_vld); @@ -985,11 +1008,25 @@ static int hclge_dbg_dump_tm_qset(struct hclge_dev *hdev, char *buf, int len) if (ret) return ret;

+ ret = hclge_tm_get_qset_shaper(hdev, i, &shaper_para); + if (ret) + return ret; + sch_mode_str = sch_mode & HCLGE_TM_TX_SCHD_DWRR_MSK ? "dwrr" : "sp"; - pos += scnprintf(buf + pos, len - pos, - "%04u %4u %1u %4s %3u\n", - i, priority, link_vld, sch_mode_str, weight); + + j = 0; + sprintf(result[j++], "%04u", i); + sprintf(result[j++], "%4u", priority); + sprintf(result[j++], "%4u", link_vld); + sprintf(result[j++], "%4s", sch_mode_str); + sprintf(result[j++], "%3u", weight); + hclge_dbg_fill_shaper_content(&shaper_para, result, &j); + + hclge_dbg_fill_content(content, sizeof(content), tm_qset_items, + (const char **)result, + ARRAY_SIZE(tm_qset_items)); + pos += scnprintf(buf + pos, len - pos, "%s", content); }

return 0; @@ -1875,82 +1912,6 @@ static void hclge_dbg_dump_mac_tnl_status(struct hclge_dev *hdev) } }

-static void hclge_dbg_dump_qs_shaper_single(struct hclge_dev *hdev, u16 qsid) -{ - struct hclge_qs_shapping_cmd *shap_cfg_cmd; - u8 ir_u, ir_b, ir_s, bs_b, bs_s; - struct hclge_desc desc; - u32 shapping_para; - int ret; - - hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_QCN_SHAPPING_CFG, true); - - shap_cfg_cmd = (struct hclge_qs_shapping_cmd *)desc.data; - shap_cfg_cmd->qs_id = cpu_to_le16(qsid); - - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) { - dev_err(&hdev->pdev->dev, - "qs%u failed to get tx_rate, ret=%d\n", - qsid, ret); - return; - } - - shapping_para = le32_to_cpu(shap_cfg_cmd->qs_shapping_para); - ir_b = hclge_tm_get_field(shapping_para, IR_B); - ir_u = hclge_tm_get_field(shapping_para, IR_U); - ir_s = hclge_tm_get_field(shapping_para, IR_S); - bs_b = hclge_tm_get_field(shapping_para, BS_B); - bs_s = hclge_tm_get_field(shapping_para, BS_S); - - dev_info(&hdev->pdev->dev, - "qs%u ir_b:%u, ir_u:%u, ir_s:%u, bs_b:%u, bs_s:%u\n", - qsid, ir_b, ir_u, ir_s, bs_b, bs_s); -} - -static void hclge_dbg_dump_qs_shaper_all(struct hclge_dev *hdev) -{ - struct hnae3_knic_private_info *kinfo; - struct hclge_vport *vport; - int vport_id, i; - - for (vport_id = 0; vport_id <= pci_num_vf(hdev->pdev); vport_id++) { - vport = &hdev->vport[vport_id]; - kinfo = &vport->nic.kinfo; - - dev_info(&hdev->pdev->dev, "qs cfg of vport%d:\n", vport_id); - - for (i = 0; i < kinfo->tc_info.num_tc; i++) { - u16 qsid = vport->qs_offset + i; - - hclge_dbg_dump_qs_shaper_single(hdev, qsid); - } - } -} - -static void hclge_dbg_dump_qs_shaper(struct hclge_dev *hdev, - const char *cmd_buf) -{ -#define HCLGE_MAX_QSET_NUM 1024 - - u16 qsid; - int ret; - - ret = kstrtou16(cmd_buf, 0, &qsid); - if (ret) { - hclge_dbg_dump_qs_shaper_all(hdev); - return; - } - - if (qsid >= HCLGE_MAX_QSET_NUM) { - dev_err(&hdev->pdev->dev, "qsid(%u) out of range[0-1023]\n", - qsid); - return; - } - - hclge_dbg_dump_qs_shaper_single(hdev, qsid); -} - static const struct hclge_dbg_item mac_list_items[] = { { "FUNC_ID", 2 }, { "MAC_ADDR", 12 }, @@ -2123,9 +2084,6 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) hclge_dbg_dump_serv_info(hdev); } else if (strncmp(cmd_buf, "dump mac tnl status", 19) == 0) { hclge_dbg_dump_mac_tnl_status(hdev); - } else if (strncmp(cmd_buf, "dump qs shaper", 14) == 0) { - hclge_dbg_dump_qs_shaper(hdev, - &cmd_buf[sizeof("dump qs shaper")]); } else if (strncmp(cmd_buf, DUMP_VLAN_FILTER, strlen(DUMP_VLAN_FILTER)) == 0) { hclge_dbg_dump_vlan_filter(hdev, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c index af75949ab736..b26ef9d9e2fd 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c @@ -1570,6 +1570,36 @@ int hclge_tm_get_qset_weight(struct hclge_dev *hdev, u16 qset_id, u8 *weight) return 0; }

+int hclge_tm_get_qset_shaper(struct hclge_dev *hdev, u16 qset_id, + struct hclge_tm_shaper_para *para) +{ + struct hclge_qs_shapping_cmd *shap_cfg_cmd; + struct hclge_desc desc; + u32 shapping_para; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_QCN_SHAPPING_CFG, true); + shap_cfg_cmd = (struct hclge_qs_shapping_cmd *)desc.data; + shap_cfg_cmd->qs_id = cpu_to_le16(qset_id); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get qset %u shaper, ret = %d\n", qset_id, + ret); + return ret; + } + + shapping_para = le32_to_cpu(shap_cfg_cmd->qs_shapping_para); + para->ir_b = hclge_tm_get_field(shapping_para, IR_B); + para->ir_u = hclge_tm_get_field(shapping_para, IR_U); + para->ir_s = hclge_tm_get_field(shapping_para, IR_S); + para->bs_b = hclge_tm_get_field(shapping_para, BS_B); + para->bs_s = hclge_tm_get_field(shapping_para, BS_S); + para->flag = 0; + para->rate = 0; + return 0; +} + int hclge_tm_get_pri_sch_mode(struct hclge_dev *hdev, u8 pri_id, u8 *mode) { struct hclge_pri_sch_mode_cfg_cmd *pri_sch_mode; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h index 2a92761f49d7..015229d6b91c 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h @@ -194,6 +194,8 @@ int hclge_tm_get_qset_map_pri(struct hclge_dev *hdev, u16 qset_id, u8 *priority, u8 *link_vld); int hclge_tm_get_qset_sch_mode(struct hclge_dev *hdev, u16 qset_id, u8 *mode); int hclge_tm_get_qset_weight(struct hclge_dev *hdev, u16 qset_id, u8 *weight); +int hclge_tm_get_qset_shaper(struct hclge_dev *hdev, u16 qset_id, + struct hclge_tm_shaper_para *para); int hclge_tm_get_pri_sch_mode(struct hclge_dev *hdev, u8 pri_id, u8 *mode); int hclge_tm_get_pri_weight(struct hclge_dev *hdev, u8 pri_id, u8 *weight); int hclge_tm_get_pri_shaper(struct hclge_dev *hdev, u8 pri_id,

From: Yufeng Mo moyufeng@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit 058c3be95235 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, the debugfs command for serv info is implemented by "echo xxxx > cmd", and record the inforamtion in dmesg. It's unnecessary and heavy. To improve it, create a single file "serv_info" for it, and query it by command "cat serv_info", return the result to userspace, rather than record in dmesg.

The display style is below: $ cat service_task_info local_clock: [ 114.203321] delta: 784(ms) last_service_task_processed: 4294918512(jiffies) last_service_task_cnt: 4

Signed-off-by: Yufeng Mo moyufeng@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 7 ++++ .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 32 +++++++++++++------ .../hisilicon/hns3/hns3pf/hclge_debugfs.h | 2 ++ 4 files changed, 33 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 2b00c7a55049..44ae4e8e0db7 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -215,6 +215,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_TX_QUEUE_INFO, HNAE3_DBG_CMD_FD_TCAM, HNAE3_DBG_CMD_MAC_TNL_STATUS, + HNAE3_DBG_CMD_SERV_INFO, HNAE3_DBG_CMD_UNKNOWN, };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 4703a3d94343..09c16ff9bc84 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -288,6 +288,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN, .init = hns3_dbg_common_file_init, }, + { + .name = "service_task_info", + .cmd = HNAE3_DBG_CMD_SERV_INFO, + .dentry = HNS3_DBG_DENTRY_COMMON, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, };

static void hns3_dbg_fill_content(char *content, u16 len, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index d4f120974792..1c6cdc781620 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -1684,12 +1684,26 @@ int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len) return 0; }

-static void hclge_dbg_dump_serv_info(struct hclge_dev *hdev) +static int hclge_dbg_dump_serv_info(struct hclge_dev *hdev, char *buf, int len) { - dev_info(&hdev->pdev->dev, "last_serv_processed: %lu\n", - hdev->last_serv_processed); - dev_info(&hdev->pdev->dev, "last_serv_cnt: %lu\n", - hdev->serv_processed_cnt); + unsigned long rem_nsec; + int pos = 0; + u64 lc; + + lc = local_clock(); + rem_nsec = do_div(lc, HCLGE_BILLION_NANO_SECONDS); + + pos += scnprintf(buf + pos, len - pos, "local_clock: [%5lu.%06lu]\n", + (unsigned long)lc, rem_nsec / 1000); + pos += scnprintf(buf + pos, len - pos, "delta: %u(ms)\n", + jiffies_to_msecs(jiffies - hdev->last_serv_processed)); + pos += scnprintf(buf + pos, len - pos, + "last_service_task_processed: %lu(jiffies)\n", + hdev->last_serv_processed); + pos += scnprintf(buf + pos, len - pos, "last_service_task_cnt: %lu\n", + hdev->serv_processed_cnt); + + return 0; }

static int hclge_dbg_dump_interrupt(struct hclge_dev *hdev, char *buf, int len) @@ -1898,8 +1912,6 @@ static int hclge_dbg_dump_loopback(struct hclge_dev *hdev, char *buf, int len) static int hclge_dbg_dump_mac_tnl_status(struct hclge_dev *hdev, char *buf, int len) { -#define HCLGE_BILLION_NANO_SECONDS 1000000000 - struct hclge_mac_tnl_stats stats; unsigned long rem_nsec; int pos = 0; @@ -2087,8 +2099,6 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf)

if (strncmp(cmd_buf, "dump mac tbl", 12) == 0) { hclge_dbg_dump_mac_table(hdev); - } else if (strncmp(cmd_buf, "dump serv info", 14) == 0) { - hclge_dbg_dump_serv_info(hdev); } else if (strncmp(cmd_buf, DUMP_VLAN_FILTER, strlen(DUMP_VLAN_FILTER)) == 0) { hclge_dbg_dump_vlan_filter(hdev, @@ -2225,6 +2235,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_MAC_TNL_STATUS, .dbg_dump = hclge_dbg_dump_mac_tnl_status, }, + { + .cmd = HNAE3_DBG_CMD_SERV_INFO, + .dbg_dump = hclge_dbg_dump_serv_info, + }, };

int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h index 8846911654c0..72990b9253d4 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h @@ -759,6 +759,8 @@ static const struct hclge_dbg_dfx_message hclge_dbg_tqp_reg[] = { #define HCLGE_DBG_DATA_STR_LEN 32 #define HCLGE_DBG_TM_INFO_LEN 256

+#define HCLGE_BILLION_NANO_SECONDS 1000000000 + struct hclge_dbg_item { char name[HCLGE_DBG_ITEM_NAME_LEN]; u16 interval; /* blank numbers after the item */

driver inclusion category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

Currently, the debugfs command for ncl config is implemented by "echo xxxx > cmd", and record the information in dmesg. It's unnecessary and heavy. To improve it, create a single file "mac_tbl" for it, and query it by command "cat mac_tbl", return the result to userspace, rather than record in dmesg.

Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 8 +- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 124 ++++++++---------- 3 files changed, 66 insertions(+), 67 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index eff07fa0e3f2..188d2ef63db4 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -193,6 +193,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_RX_BD, HNAE3_DBG_CMD_MAC_UC, HNAE3_DBG_CMD_MAC_MC, + HNAE3_DBG_CMD_MAC_TBL, HNAE3_DBG_CMD_MNG_TBL, HNAE3_DBG_CMD_LOOPBACK, HNAE3_DBG_CMD_INTERRUPT_INFO, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index d83ac7f37a56..dd71d4b871a4 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -134,6 +134,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN, .init = hns3_dbg_common_file_init, }, + { + .name = "mac_tbl", + .cmd = HNAE3_DBG_CMD_MAC_TBL, + .dentry = HNS3_DBG_DENTRY_COMMON, + .buf_len = HNS3_DBG_READ_LEN_1MB, + .init = hns3_dbg_common_file_init, + }, { .name = "mng_tbl", .cmd = HNAE3_DBG_CMD_MNG_TBL, @@ -720,7 +727,6 @@ static void hns3_dbg_help(struct hnae3_handle *h) if (!hns3_is_phys_func(h->pdev)) return;

- dev_info(&h->pdev->dev, "dump mac tbl\n"); dev_info(&h->pdev->dev, "dump vlan filter <func id>\n"); }

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 0e751272d1d6..4670059d9a70 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -1315,29 +1315,28 @@ static int hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev, char *buf, return 0; }

-static void hclge_dbg_dump_mac_table(struct hclge_dev *hdev) +static int hclge_dbg_dump_mac_table(struct hclge_dev *hdev, char *buf, int len) { struct hclge_mac_vlan_idx_rd_cmd *mac_rd_cmd; struct hclge_mac_vlan_idx_rd_mc *mc_mac_tbl; - char printf_buf[HCLGE_DBG_BUF_LEN]; struct hclge_desc desc[3]; u32 mc_tbl_idx, i; - int ret, len; + int mc_tbl_len; + int pos = 0; + int ret; int j;

- len = sizeof(struct hclge_mac_vlan_idx_rd_mc) * HCLGE_DBG_MAC_TBL_MAX; - mc_mac_tbl = kzalloc(len, GFP_KERNEL); + mc_tbl_len = sizeof(struct hclge_mac_vlan_idx_rd_mc) * + HCLGE_DBG_MAC_TBL_MAX; + mc_mac_tbl = kzalloc(mc_tbl_len, GFP_KERNEL); if (!mc_mac_tbl) - return; - - memset(printf_buf, 0, HCLGE_DBG_BUF_LEN); - dev_info(&hdev->pdev->dev, "Unicast tab:\n"); - strncat(printf_buf, "|index |mac_addr |vlan_id |VMDq1 |", - HCLGE_DBG_BUF_LEN - 1); - strncat(printf_buf, "U_M |mac_en |in_port |E_type |E_Port\n", - HCLGE_DBG_BUF_LEN - strlen(printf_buf) - 1); + return -ENOMEM;

- dev_info(&hdev->pdev->dev, "%s", printf_buf); + pos += scnprintf(buf + pos, len - pos, "Unicast tab:\n"); + pos += scnprintf(buf + pos, len - pos, + " index mac_addr vlan_id VMDq1 "); + pos += scnprintf(buf + pos, len - pos, + "U_M mac_en in_port E_type E_Port\n");

mc_tbl_idx = 0; for (i = 0; i < HCLGE_DBG_MAC_TBL_MAX; i++) { @@ -1360,9 +1359,9 @@ static void hclge_dbg_dump_mac_table(struct hclge_dev *hdev) ret = hclge_cmd_send(&hdev->hw, desc, 3); if (ret) { dev_err(&hdev->pdev->dev, - "call hclge_cmd_send fail, ret = %d\n", ret); + "failed to dump mac table, ret = %d\n", ret); kfree(mc_mac_tbl); - return; + return ret; }

if (mac_rd_cmd->resp_code) @@ -1381,64 +1380,55 @@ static void hclge_dbg_dump_mac_table(struct hclge_dev *hdev) continue; }

- memset(printf_buf, 0, HCLGE_DBG_BUF_LEN); - snprintf(printf_buf, HCLGE_DBG_BUF_LEN, - "|%04u |%02x:%02x:%02x:%02x:%02x:%02x |", - i, mac_rd_cmd->mac_addr[0], mac_rd_cmd->mac_addr[1], - mac_rd_cmd->mac_addr[2], mac_rd_cmd->mac_addr[3], - mac_rd_cmd->mac_addr[4], mac_rd_cmd->mac_addr[5]); - - snprintf(printf_buf + strlen(printf_buf), - HCLGE_DBG_BUF_LEN - strlen(printf_buf), - "%04u |%u |%u |%u |%u |", - le16_to_cpu(mac_rd_cmd->vlan_tag), - mac_rd_cmd->entry_type & HCLGE_DBG_MAC_TBL_EN_TYPE, - mac_rd_cmd->entry_type & HCLGE_DBG_MAC_TBL_MC_TYPE, - mac_rd_cmd->mc_mac_en & HCLGE_DBG_MAC_TBL_MAC_EN, - le16_to_cpu(mac_rd_cmd->port) & - HCLGE_DBG_MAC_TBL_IN_PORT); - snprintf(printf_buf + strlen(printf_buf), - HCLGE_DBG_BUF_LEN - strlen(printf_buf), - "%lu |%04x\n", - le16_to_cpu(mac_rd_cmd->egress_port) & - HCLGE_DBG_MAC_TBL_E_PORT_B, - le16_to_cpu(mac_rd_cmd->egress_port) & - HCLGE_DBG_MAC_TBL_E_PORT); - - dev_info(&hdev->pdev->dev, "%s", printf_buf); + pos += scnprintf(buf + pos, len - pos, " %04u %pM ", + i, mac_rd_cmd->mac_addr); + + pos += scnprintf(buf + pos, len - pos, + " %04u %u %u %u %u ", + le16_to_cpu(mac_rd_cmd->vlan_tag), + mac_rd_cmd->entry_type & + HCLGE_DBG_MAC_TBL_EN_TYPE, + mac_rd_cmd->entry_type & + HCLGE_DBG_MAC_TBL_MC_TYPE, + mac_rd_cmd->mc_mac_en & + HCLGE_DBG_MAC_TBL_MAC_EN, + le16_to_cpu(mac_rd_cmd->port) & + HCLGE_DBG_MAC_TBL_IN_PORT); + + pos += scnprintf(buf + pos, len - pos, + "%lu %04x\n", + le16_to_cpu(mac_rd_cmd->egress_port) & + HCLGE_DBG_MAC_TBL_E_PORT_B, + le16_to_cpu(mac_rd_cmd->egress_port) & + HCLGE_DBG_MAC_TBL_E_PORT); }

if (mc_tbl_idx > 0) { - dev_info(&hdev->pdev->dev, - "Multicast tab: entry number = %u\n", mc_tbl_idx); - memset(printf_buf, 0, HCLGE_DBG_BUF_LEN); - strncat(printf_buf, "|index |mac_addr |UM_MC_RDATA\n", - HCLGE_DBG_BUF_LEN - 1); - dev_info(&hdev->pdev->dev, "%s", printf_buf); + pos += scnprintf(buf + pos, len - pos, + "Multicast tab: entry number = %u\n", + mc_tbl_idx); + pos += scnprintf(buf + pos, len - pos, + " index mac_addr UM_MC_RDATA\n"); }

for (i = 0; i < mc_tbl_idx; i++) { - memset(printf_buf, 0, HCLGE_DBG_BUF_LEN); - snprintf(printf_buf, HCLGE_DBG_BUF_LEN, - "|%04u |%02x:%02x:%02x:%02x:%02x:%02x |", - mc_mac_tbl[i].index, mc_mac_tbl[i].mac_addr[0], - mc_mac_tbl[i].mac_addr[1], mc_mac_tbl[i].mac_addr[2], - mc_mac_tbl[i].mac_addr[3], mc_mac_tbl[i].mac_addr[4], - mc_mac_tbl[i].mac_addr[5]); + pos += scnprintf(buf + pos, len - pos, " %04u %pM ", + mc_mac_tbl[i].index, mc_mac_tbl[i].mac_addr);

for (j = 31; j >= 3; j -= 4) - snprintf(printf_buf + strlen(printf_buf), - HCLGE_DBG_BUF_LEN - strlen(printf_buf), - "%02x%02x%02x%02x:", mc_mac_tbl[i].mg_vf_mb[j], - mc_mac_tbl[i].mg_vf_mb[j - 1], - mc_mac_tbl[i].mg_vf_mb[j - 2], - mc_mac_tbl[i].mg_vf_mb[j - 3]); - - printf_buf[strlen(printf_buf) - 1] = '\n'; - dev_info(&hdev->pdev->dev, "%s", printf_buf); + pos += scnprintf(buf + pos, len - pos, + "%02x%02x%02x%02x ", + mc_mac_tbl[i].mg_vf_mb[j], + mc_mac_tbl[i].mg_vf_mb[j - 1], + mc_mac_tbl[i].mg_vf_mb[j - 2], + mc_mac_tbl[i].mg_vf_mb[j - 3]); + + pos += scnprintf(buf + pos, len - pos, "\n"); }

kfree(mc_mac_tbl); + + return 0; }

static int hclge_dbg_dump_mng_table(struct hclge_dev *hdev, char *buf, int len) @@ -2083,9 +2073,7 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) struct hclge_vport *vport = hclge_get_vport(handle); struct hclge_dev *hdev = vport->back;

- if (strncmp(cmd_buf, "dump mac tbl", 12) == 0) { - hclge_dbg_dump_mac_table(hdev); - } else if (strncmp(cmd_buf, DUMP_VLAN_FILTER, + if (strncmp(cmd_buf, DUMP_VLAN_FILTER, strlen(DUMP_VLAN_FILTER)) == 0) { hclge_dbg_dump_vlan_filter(hdev, &cmd_buf[sizeof(DUMP_VLAN_FILTER)]); @@ -2142,6 +2130,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_MAC_MC, .dbg_dump = hclge_dbg_dump_mac_mc, }, + { + .cmd = HNAE3_DBG_CMD_MAC_TBL, + .dbg_dump = hclge_dbg_dump_mac_table, + }, { .cmd = HNAE3_DBG_CMD_MNG_TBL, .dbg_dump = hclge_dbg_dump_mng_table,

From: shenhao shenhao21@huawei.com

driver inclusion category: Feature bugzilla: NA CVE: NA DTS: DTS2021090315802

---------------------------------------------------

This reverts commit 2eeca9dad888d02764d0366d573a659ffad7f825.

This patch adds support for extended VLAN mode, as we call dynamic vlan mode. In this mode, vf vlan filter will be switch between enable and disable, according to user configuration.

This patch also adds support for QOS in vlan 802.1Q protocol.

Signed-off-by: liaoguojia liaoguojia@huawei.com Signed-off-by: shenhao shenhao21@huawei.com Reviewed-by: Zhong Zhaohui zhongzhaohui@huawei.com Signed-off-by: Yang Yingliang yangyingliang@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 4 +- .../net/ethernet/hisilicon/hns3/hns3_enet.c | 3 - .../ethernet/hisilicon/hns3/hns3_ethtool.c | 5 +- .../hisilicon/hns3/hns3pf/hclge_cmd.h | 2 - .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 8 - .../hisilicon/hns3/hns3pf/hclge_main.c | 281 ++++-------------- .../hisilicon/hns3/hns3pf/hclge_main.h | 19 +- .../hisilicon/hns3/hns3vf/hclgevf_main.c | 5 - 8 files changed, 65 insertions(+), 262 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 188d2ef63db4..19fac4adf371 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -729,12 +729,10 @@ struct hnae3_unic_private_info { #define HNAE3_BPE BIT(2) /* broadcast promisc enable */ #define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */ #define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */ -#define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter by promisc mode */ -#define HNAE3_VF_VLAN_EN BIT(6) /* enable vf vlan filter by vlan used */ +#define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */ #define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE) #define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE) #define HNAE3_OVERFLOW_UMPE (HNAE3_OVERFLOW_UPE | HNAE3_OVERFLOW_MPE) -#define HNAE3_VLAN_FLTR_EN (HNAE3_VLAN_FLTR | HNAE3_VF_VLAN_EN)

struct hnae3_handle { struct hnae3_client *client; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index dc556de21875..3a08b9cc2366 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -583,7 +583,6 @@ static int hns3_nic_mc_unsync(struct net_device *netdev,

static u8 hns3_get_netdev_flags(struct net_device *netdev) { - struct hnae3_handle *h = hns3_get_handle(netdev); u8 flags = 0;

if (netdev->flags & IFF_PROMISC) { @@ -594,8 +593,6 @@ static u8 hns3_get_netdev_flags(struct net_device *netdev) flags |= HNAE3_USER_MPE; }

- flags |= (h->netdev_flags & HNAE3_VF_VLAN_EN); - return flags; }

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c index 1bebeb3bbdf0..f302c8ff4414 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c @@ -110,8 +110,7 @@ static int hns3_lp_setup(struct net_device *ndev, enum hnae3_loop loop, bool en) } else { /* recover promisc mode before loopback test */ hns3_request_update_promisc_mode(h); - vlan_filter_enable = (h->netdev_flags & HNAE3_VLAN_FLTR_EN) ? - false : true; + vlan_filter_enable = ndev->flags & IFF_PROMISC ? false : true; hns3_enable_vlan_filter(ndev, vlan_filter_enable); }

@@ -401,7 +400,7 @@ static void hns3_self_test(struct net_device *ndev, #if IS_ENABLED(CONFIG_VLAN_8021Q) if (dis_vlan_filter) h->ae_algo->ops->enable_vlan_filter(h, - h->netdev_flags & HNAE3_VF_VLAN_EN); + ndev->flags & IFF_PROMISC); #endif

if (if_running) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h index 3e10dafdee0c..9c25fffb1e18 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h @@ -498,8 +498,6 @@ struct hclge_pf_res_cmd { #define HCLGE_CFG_RSS_SIZE_M GENMASK(31, 24) #define HCLGE_CFG_SPEED_ABILITY_S 0 #define HCLGE_CFG_SPEED_ABILITY_M GENMASK(7, 0) -#define HCLGE_CFG_VLAN_MODE_S 8 -#define HCLGE_CFG_VLAN_MODE_M GENMASK(9, 8) #define HCLGE_CFG_UMV_TBL_SPACE_S 16 #define HCLGE_CFG_UMV_TBL_SPACE_M GENMASK(31, 16)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 4670059d9a70..00d474329a01 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -2020,7 +2020,6 @@ static void hclge_dbg_dump_vlan_filter(struct hclge_dev *hdev, struct hclge_vlan_filter_ctrl_cmd *req; struct hclge_vport *vport; struct hclge_desc desc; - bool has_vlan_used; u32 vf_id; int ret;

@@ -2049,19 +2048,12 @@ static void hclge_dbg_dump_vlan_filter(struct hclge_dev *hdev, }

vport = &hdev->vport[vf_id]; - has_vlan_used = hclge_vf_vlan_need_enable(vport);

dev_info(&hdev->pdev->dev, "vf_id:%u\n", req->vf_id); dev_info(&hdev->pdev->dev, "vlan_type:%u\n", req->vlan_type); dev_info(&hdev->pdev->dev, "vlan_fe:%u\n", req->vlan_fe); - dev_info(&hdev->pdev->dev, "vf_vlan_en:%u\n", vport->vf_vlan_en); - dev_info(&hdev->pdev->dev, "vlan_mode:%s\n", - (hdev->vlan_mode == HCLGE_VLAN_DEFAULT_MODE) ? "default" : - "dynamic"); dev_info(&hdev->pdev->dev, "netdev_flags:%x\n", vport->nic.netdev_flags); - dev_info(&hdev->pdev->dev, "has_vlan_used:%s\n", - has_vlan_used ? "true" : "false"); dev_info(&hdev->pdev->dev, "port_base_vlan_cfg_state:%u\n", vport->port_base_vlan_cfg.state); } diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 778f1e2124d3..4c4c39ca99e9 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -68,7 +68,6 @@ static int hclge_set_default_loopback(struct hclge_dev *hdev); static void hclge_sync_mac_table(struct hclge_dev *hdev); static void hclge_restore_hw_table(struct hclge_dev *hdev); static void hclge_sync_promisc_mode(struct hclge_dev *hdev); -static int hclge_vf_vlan_filter_switch(struct hclge_vport *vport);

static struct hnae3_ae_algo ae_algo;

@@ -1305,9 +1304,6 @@ static void hclge_parse_cfg(struct hclge_cfg *cfg, struct hclge_desc *desc) HCLGE_CFG_SPEED_ABILITY_M, HCLGE_CFG_SPEED_ABILITY_S);

- cfg->vlan_mode_sel = hnae3_get_field(__le32_to_cpu(req->param[1]), - HCLGE_CFG_VLAN_MODE_M, - HCLGE_CFG_VLAN_MODE_S);

cfg->umv_space = hnae3_get_field(__le32_to_cpu(req->param[1]), HCLGE_CFG_UMV_TBL_SPACE_M, @@ -1410,7 +1406,6 @@ static int hclge_configure(struct hclge_dev *hdev) hdev->tc_max = cfg.tc_num; hdev->tm_info.hw_pfc_map = 0; hdev->wanted_umv_size = cfg.umv_space; - hdev->vlan_mode = cfg.vlan_mode_sel;

if (hnae3_dev_fd_supported(hdev)) { hdev->fd_en = true; @@ -8300,18 +8295,6 @@ static int hclge_do_ioctl(struct hnae3_handle *handle, struct ifreq *ifr, return phy_mii_ioctl(hdev->hw.mac.phydev, ifr, cmd); }

-#define HCLGE_FILTER_TYPE_VF 0 -#define HCLGE_FILTER_TYPE_PORT 1 -#define HCLGE_FILTER_FE_EGRESS_V1_B BIT(0) -#define HCLGE_FILTER_FE_NIC_INGRESS_B BIT(0) -#define HCLGE_FILTER_FE_NIC_EGRESS_B BIT(1) -#define HCLGE_FILTER_FE_ROCE_INGRESS_B BIT(2) -#define HCLGE_FILTER_FE_ROCE_EGRESS_B BIT(3) -#define HCLGE_FILTER_FE_EGRESS (HCLGE_FILTER_FE_NIC_EGRESS_B \ - | HCLGE_FILTER_FE_ROCE_EGRESS_B) -#define HCLGE_FILTER_FE_INGRESS (HCLGE_FILTER_FE_NIC_INGRESS_B \ - | HCLGE_FILTER_FE_ROCE_INGRESS_B) - static int hclge_set_vlan_filter_ctrl(struct hclge_dev *hdev, u8 vlan_type, u8 fe_type, bool filter_en, u8 vf_id) { @@ -8319,35 +8302,16 @@ static int hclge_set_vlan_filter_ctrl(struct hclge_dev *hdev, u8 vlan_type, struct hclge_desc desc; int ret;

- /* if vlan_mode set as dynamic mode, - * port vlan filter needn't to enable - */ - if (vlan_type == HCLGE_FILTER_TYPE_PORT && - hdev->vlan_mode == HCLGE_VLAN_DYNAMIC_MODE) - return 0; - - /* read current vlan filter parameter */ - hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_VLAN_FILTER_CTRL, true); + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_VLAN_FILTER_CTRL, false); req = (struct hclge_vlan_filter_ctrl_cmd *)desc.data; req->vlan_type = vlan_type; + req->vlan_fe = filter_en ? fe_type : 0; req->vf_id = vf_id;

- ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) { - dev_err(&hdev->pdev->dev, "failed to get vport%u vlan filter config, ret = %d.\n", - vf_id, ret); - return ret; - } - - /* modify and write new config parameter */ - hclge_cmd_reuse_desc(&desc, false); - req->vlan_fe = filter_en ? - (req->vlan_fe | fe_type) : (req->vlan_fe & ~fe_type); - ret = hclge_cmd_send(&hdev->hw, &desc, 1); if (ret) - dev_err(&hdev->pdev->dev, "failed to set vport%u vlan filter, ret = %d.\n", - vf_id, ret); + dev_err(&hdev->pdev->dev, + "set vlan filter fail, ret =%d.\n", ret);

return ret; } @@ -8493,41 +8457,6 @@ static int hclge_set_port_vlan_filter(struct hclge_dev *hdev, __be16 proto, return ret; }

-static bool hclge_need_update_port_vlan(struct hclge_dev *hdev, u16 vport_id, - u16 vlan_id, bool is_kill) -{ - /* vlan 0 may be added twice when 8021q module is enabled */ - if (!is_kill && !vlan_id && - test_bit(vport_id, hdev->vlan_table[vlan_id])) - return false; - - if (!is_kill && test_and_set_bit(vport_id, hdev->vlan_table[vlan_id])) { - dev_warn(&hdev->pdev->dev, - "Add port vlan failed, vport %u is already in vlan %u\n", - vport_id, vlan_id); - return false; - } - - /* if the vlan id is not in the port vlan table, just return 0, it's - * unnecessary to retry. - */ - if (is_kill && - !test_and_clear_bit(vport_id, hdev->vlan_table[vlan_id])) { - dev_warn(&hdev->pdev->dev, - "Delete port vlan failed, vport %u is not in vlan %u\n", - vport_id, vlan_id); - return false; - } - - /* if vlan mode set as HCLGE_VLAN_DYNAMIC_MODE, - * needn't to write the vlan tag to port vlan fitler - */ - if (hdev->vlan_mode == HCLGE_VLAN_DYNAMIC_MODE) - return false; - - return true; -} - static int hclge_set_vlan_filter_hw(struct hclge_dev *hdev, __be16 proto, u16 vport_id, u16 vlan_id, bool is_kill) @@ -8550,9 +8479,26 @@ static int hclge_set_vlan_filter_hw(struct hclge_dev *hdev, __be16 proto, return ret; }

- if (!hclge_need_update_port_vlan(hdev, vport_id, vlan_id, is_kill)) + /* vlan 0 may be added twice when 8021q module is enabled */ + if (!is_kill && !vlan_id && + test_bit(vport_id, hdev->vlan_table[vlan_id])) return 0;

+ if (!is_kill && test_and_set_bit(vport_id, hdev->vlan_table[vlan_id])) { + dev_err(&hdev->pdev->dev, + "Add port vlan failed, vport %u is already in vlan %u\n", + vport_id, vlan_id); + return -EINVAL; + } + + if (is_kill && + !test_and_clear_bit(vport_id, hdev->vlan_table[vlan_id])) { + dev_err(&hdev->pdev->dev, + "Delete port vlan failed, vlan %u is not in vport %u\n", + vlan_id, vport_id); + return -EINVAL; + } + for_each_set_bit(vport_idx, hdev->vlan_table[vlan_id], HCLGE_VPORT_NUM) vport_num++;

@@ -8644,7 +8590,7 @@ static int hclge_set_vlan_rx_offload_cfg(struct hclge_vport *vport)

static int hclge_vlan_offload_cfg(struct hclge_vport *vport, u16 port_base_vlan_state, - u16 vlan_tag, u8 qos) + u16 vlan_tag) { int ret;

@@ -8655,8 +8601,7 @@ static int hclge_vlan_offload_cfg(struct hclge_vport *vport, } else { vport->txvlan_cfg.accept_tag1 = false; vport->txvlan_cfg.insert_tag1_en = true; - vport->txvlan_cfg.default_tag1 = (qos << VLAN_PRIO_SHIFT) | - vlan_tag; + vport->txvlan_cfg.default_tag1 = vlan_tag; }

vport->txvlan_cfg.accept_untag1 = true; @@ -8743,12 +8688,6 @@ static int hclge_init_vlan_config(struct hclge_dev *hdev) /* for revision 0x21, vf vlan filter is per function */ for (i = 0; i < hdev->num_alloc_vport; i++) { vport = &hdev->vport[i]; - vport->vf_vlan_en = - hdev->vlan_mode == HCLGE_VLAN_DEFAULT_MODE; - - if (!vport->vf_vlan_en) - continue; - ret = hclge_set_vlan_filter_ctrl(hdev, HCLGE_FILTER_TYPE_VF, HCLGE_FILTER_FE_EGRESS, @@ -8786,15 +8725,13 @@ static int hclge_init_vlan_config(struct hclge_dev *hdev)

for (i = 0; i < hdev->num_alloc_vport; i++) { u16 vlan_tag; - u8 qos;

vport = &hdev->vport[i]; vlan_tag = vport->port_base_vlan_cfg.vlan_info.vlan_tag; - qos = vport->port_base_vlan_cfg.vlan_info.qos;

ret = hclge_vlan_offload_cfg(vport, vport->port_base_vlan_cfg.state, - vlan_tag, qos); + vlan_tag); if (ret) return ret; } @@ -8982,7 +8919,6 @@ void hclge_restore_vport_vlan_table(struct hclge_vport *vport) vlan->hd_tbl_status = true; } } - hclge_vf_vlan_filter_switch(vport);

mutex_unlock(&hdev->vport_lock); } @@ -9048,56 +8984,6 @@ int hclge_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable) return hclge_set_vlan_rx_offload_cfg(vport); }

-bool hclge_vf_vlan_need_enable(struct hclge_vport *vport) -{ -#define VLAN_CHECK_START_NUM 1 - - struct hclge_dev *hdev = vport->back; - u16 vlan_id; - - if (hdev->vlan_mode == HCLGE_VLAN_DEFAULT_MODE || - vport->port_base_vlan_cfg.state != HNAE3_PORT_BASE_VLAN_DISABLE) - return true; - - /* check all vlan tag in vf vlan table except vlan 0 */ - for (vlan_id = VLAN_CHECK_START_NUM; vlan_id < VLAN_N_VID; vlan_id++) - if (test_bit(vport->vport_id, hdev->vlan_table[vlan_id])) - return true; - - return false; -} - -static int hclge_vf_vlan_filter_switch(struct hclge_vport *vport) -{ - struct hnae3_handle *nic = &vport->nic; - struct hclge_dev *hdev = vport->back; - bool filter_en; - int ret; - - filter_en = hclge_vf_vlan_need_enable(vport); - - if (filter_en == vport->vf_vlan_en) - return 0; - - ret = hclge_set_vlan_filter_ctrl(hdev, HCLGE_FILTER_TYPE_VF, - HCLGE_FILTER_FE_EGRESS, - filter_en, vport->vport_id); - if (ret) { - dev_err(&hdev->pdev->dev, - "failed to %s vport%u vf vlan filter, ret = %d.\n", - filter_en ? "enable" : "disable", vport->vport_id, ret); - return ret; - } - - vport->vf_vlan_en = filter_en; - if (filter_en) - nic->netdev_flags |= HNAE3_VF_VLAN_EN; - else - nic->netdev_flags &= ~HNAE3_VF_VLAN_EN; - - return 0; -} - static int hclge_update_vlan_filter_entries(struct hclge_vport *vport, u16 port_base_vlan_state, struct hclge_vlan_info *new_info, @@ -9108,11 +8994,6 @@ static int hclge_update_vlan_filter_entries(struct hclge_vport *vport,

if (port_base_vlan_state == HNAE3_PORT_BASE_VLAN_ENABLE) { hclge_rm_vport_all_vlan_table(vport, false); - /* force clear vlan 0 */ - ret = hclge_set_vf_vlan_common(hdev, vport->vport_id, true, 0, - htons(ETH_P_8021Q)); - if (ret) - return ret; return hclge_set_vlan_filter_hw(hdev, htons(new_info->vlan_proto), vport->vport_id, @@ -9147,15 +9028,10 @@ int hclge_update_port_base_vlan_cfg(struct hclge_vport *vport, u16 state,

old_vlan_info = &vport->port_base_vlan_cfg.vlan_info;

- ret = hclge_vlan_offload_cfg(vport, state, vlan_info->vlan_tag, - vlan_info->qos); + ret = hclge_vlan_offload_cfg(vport, state, vlan_info->vlan_tag); if (ret) return ret;

- /* if needn't to update vlan tag, return */ - if (old_vlan_info->vlan_tag == vlan_info->vlan_tag) - goto update; - if (state == HNAE3_PORT_BASE_VLAN_MODIFY) { /* add new VLAN tag */ ret = hclge_set_vlan_filter_hw(hdev, @@ -9167,22 +9043,13 @@ int hclge_update_port_base_vlan_cfg(struct hclge_vport *vport, u16 state, return ret; vport->port_base_vlan_cfg.tbl_sta = false; /* remove old VLAN tag */ - if (old_vlan_info->vlan_tag == 0) - ret = hclge_set_vf_vlan_common(hdev, vport->vport_id, - true, 0, - htons(ETH_P_8021Q)); - else - ret = hclge_set_vlan_filter_hw(hdev, - htons(ETH_P_8021Q), - vport->vport_id, - old_vlan_info->vlan_tag, - true); - if (ret) { - dev_err(&hdev->pdev->dev, - "failed to clear vport%u port base vlan %u, ret = %d.\n", - vport->vport_id, old_vlan_info->vlan_tag, ret); + ret = hclge_set_vlan_filter_hw(hdev, + htons(old_vlan_info->vlan_proto), + vport->vport_id, + old_vlan_info->vlan_tag, + true); + if (ret) return ret; - }

goto update; } @@ -9210,27 +9077,25 @@ int hclge_update_port_base_vlan_cfg(struct hclge_vport *vport, u16 state, vport->port_base_vlan_cfg.vlan_info.vlan_proto = vlan_info->vlan_proto; vport->port_base_vlan_cfg.tbl_sta = true;

- return hclge_vf_vlan_filter_switch(vport); + return 0; }

static u16 hclge_get_port_base_vlan_state(struct hclge_vport *vport, enum hnae3_port_base_vlan_state state, - u16 vlan, u8 qos) + u16 vlan) { if (state == HNAE3_PORT_BASE_VLAN_DISABLE) { - if (!vlan && !qos) + if (!vlan) return HNAE3_PORT_BASE_VLAN_NOCHANGE; - - return HNAE3_PORT_BASE_VLAN_ENABLE; + else + return HNAE3_PORT_BASE_VLAN_ENABLE; } else { - if (!vlan && !qos) + if (!vlan) return HNAE3_PORT_BASE_VLAN_DISABLE; - - if (vport->port_base_vlan_cfg.vlan_info.vlan_tag == vlan && - vport->port_base_vlan_cfg.vlan_info.qos == qos) + else if (vport->port_base_vlan_cfg.vlan_info.vlan_tag == vlan) return HNAE3_PORT_BASE_VLAN_NOCHANGE; - - return HNAE3_PORT_BASE_VLAN_MODIFY; + else + return HNAE3_PORT_BASE_VLAN_MODIFY; } }

@@ -9258,7 +9123,7 @@ static int hclge_set_vf_vlan_filter(struct hnae3_handle *handle, int vfid,

state = hclge_get_port_base_vlan_state(vport, vport->port_base_vlan_cfg.state, - vlan, qos); + vlan); if (state == HNAE3_PORT_BASE_VLAN_NOCHANGE) return 0;

@@ -9266,45 +9131,14 @@ static int hclge_set_vf_vlan_filter(struct hnae3_handle *handle, int vfid, vlan_info.qos = qos; vlan_info.vlan_proto = ntohs(proto);

- ret = hclge_update_port_base_vlan_cfg(vport, state, &vlan_info); - if (ret) { - dev_err(&hdev->pdev->dev, - "update port base vlan for vf %d failed, ret = %d\n", - vfid, ret); - return ret; - } - - /* there is a timewindow for PF to know VF unalive, it may - * cause send mailbox fail, but it doesn't matter, VF will - * query it when reinit. - */ - if (test_bit(HCLGE_VPORT_STATE_ALIVE, &vport->state)) - (void)hclge_push_vf_port_base_vlan_info(&hdev->vport[0], + if (!test_bit(HCLGE_VPORT_STATE_ALIVE, &vport->state)) { + return hclge_update_port_base_vlan_cfg(vport, state, + &vlan_info); + } else { + ret = hclge_push_vf_port_base_vlan_info(&hdev->vport[0], vport->vport_id, state, &vlan_info); - - return 0; -} - -static void hclge_clear_vf_vlan(struct hclge_dev *hdev) -{ - struct hclge_vlan_info *vlan_info; - struct hclge_vport *vport; - int ret; - int vf; - - /* clear port base vlan for all vf */ - for (vf = HCLGE_VF_VPORT_START_NUM; vf < hdev->num_alloc_vport; vf++) { - vport = &hdev->vport[vf]; - vlan_info = &vport->port_base_vlan_cfg.vlan_info; - - ret = hclge_set_vlan_filter_hw(hdev, htons(ETH_P_8021Q), - vport->vport_id, - vlan_info->vlan_tag, true); - if (ret) - dev_err(&hdev->pdev->dev, - "failed to clear vf vlan for vf%d, ret = %d\n", - vf - HCLGE_VF_VPORT_START_NUM, ret); + return ret; } }

@@ -9351,14 +9185,7 @@ int hclge_set_vlan_filter(struct hnae3_handle *handle, __be16 proto, */ set_bit(vlan_id, vport->vlan_del_fail_bmap); } - - if (ret) { - dev_info(&hdev->pdev->dev, "failed to set vf vlan, ret = %d!\n", - ret); - return ret; - } - - return hclge_vf_vlan_filter_switch(vport); + return ret; }

static void hclge_sync_vlan_filter(struct hclge_dev *hdev) @@ -10815,7 +10642,6 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev) struct hclge_mac *mac = &hdev->hw.mac;

hclge_reset_vf_rate(hdev); - hclge_clear_vf_vlan(hdev); hclge_misc_affinity_teardown(hdev); hclge_state_uninit(hdev); hclge_uninit_vport_mac_table(hdev); @@ -11463,7 +11289,6 @@ static void hclge_sync_promisc_mode(struct hclge_dev *hdev) struct hclge_vport *vport = &hdev->vport[0]; struct hnae3_handle *handle = &vport->nic; u8 tmp_flags = 0; - bool vlan_en; int ret; int i;

@@ -11478,12 +11303,8 @@ static void hclge_sync_promisc_mode(struct hclge_dev *hdev) tmp_flags & HNAE3_MPE); if (!ret) { clear_bit(HCLGE_STATE_PROMISC_CHANGED, &hdev->state); - - vlan_en = (tmp_flags & HNAE3_USER_UPE) ? - false : hclge_vf_vlan_need_enable(vport); - - vport->vf_vlan_en = vlan_en; - hclge_enable_vlan_filter(handle, vlan_en); + hclge_enable_vlan_filter(handle, + tmp_flags & HNAE3_VLAN_FLTR); } }

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index 9719c1c39db6..01e596c216db 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -320,10 +320,17 @@ enum hclge_fc_mode { HCLGE_FC_DEFAULT };

-enum hclge_vlan_mode_sel { - HCLGE_VLAN_DEFAULT_MODE, - HCLGE_VLAN_DYNAMIC_MODE, -}; +#define HCLGE_FILTER_TYPE_VF 0 +#define HCLGE_FILTER_TYPE_PORT 1 +#define HCLGE_FILTER_FE_EGRESS_V1_B BIT(0) +#define HCLGE_FILTER_FE_NIC_INGRESS_B BIT(0) +#define HCLGE_FILTER_FE_NIC_EGRESS_B BIT(1) +#define HCLGE_FILTER_FE_ROCE_INGRESS_B BIT(2) +#define HCLGE_FILTER_FE_ROCE_EGRESS_B BIT(3) +#define HCLGE_FILTER_FE_EGRESS (HCLGE_FILTER_FE_NIC_EGRESS_B \ + | HCLGE_FILTER_FE_ROCE_EGRESS_B) +#define HCLGE_FILTER_FE_INGRESS (HCLGE_FILTER_FE_NIC_INGRESS_B \ + | HCLGE_FILTER_FE_ROCE_INGRESS_B)

enum hclge_link_fail_code { HCLGE_LF_NORMAL, @@ -365,7 +372,6 @@ struct hclge_cfg { u8 default_speed; u32 numa_node_map; u8 speed_ability; - u8 vlan_mode_sel; u16 umv_space; };

@@ -857,7 +863,6 @@ struct hclge_dev { enum HCLGE_FD_ACTIVE_RULE_TYPE fd_active_type; u8 fd_en;

- u8 vlan_mode;

u16 wanted_umv_size; /* max available unicast mac vlan space */ @@ -955,7 +960,6 @@ struct hclge_vport { u32 bw_limit; /* VSI BW Limit (0 = disabled) */ u8 dwrr;

- bool vf_vlan_en; unsigned long vlan_del_fail_bmap[BITS_TO_LONGS(VLAN_N_VID)]; struct hclge_port_base_vlan_config port_base_vlan_cfg; struct hclge_tx_vtag_cfg txvlan_cfg; @@ -1064,6 +1068,5 @@ int hclge_query_bd_num_cmd_send(struct hclge_dev *hdev, void hclge_report_hw_error(struct hclge_dev *hdev, enum hnae3_hw_error_type type); int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len); -bool hclge_vf_vlan_need_enable(struct hclge_vport *vport); int hclge_push_vf_link_status(struct hclge_vport *vport); #endif diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index c00fa95834bc..9ea6eb6de4db 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -3074,11 +3074,6 @@ static int hclgevf_reset_hdev(struct hclgevf_dev *hdev) return ret; }

- /* get current port based vlan state from PF */ - ret = hclgevf_get_port_base_vlan_filter_state(hdev); - if (ret) - return ret; - set_bit(HCLGEVF_STATE_PROMISC_CHANGED, &hdev->state);

dev_info(&hdev->pdev->dev, "Reset done\n");

From: Jian Shen shenjian15@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit 32e6d104c6fe category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

There are some features of VF depend on PF, so it's necessary for VF to know whether PF supports. For compatibility, modify the mailbox HCLGE_MBX_GET_TCINFO, extend its function, use to get the basic information of PF, including mailbox api version and PF capabilities.

Signed-off-by: Jian Shen shenjian15@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: Jakub Kicinski kuba@kernel.org Signed-off-by: Junxin Chen chenjunxin1@huawei.com --- .../net/ethernet/hisilicon/hns3/hclge_mbx.h | 9 ++++- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 3 ++ .../hisilicon/hns3/hns3pf/hclge_mbx.c | 19 +++++++---- .../hisilicon/hns3/hns3vf/hclgevf_main.c | 34 ++++++++++++------- .../hisilicon/hns3/hns3vf/hclgevf_main.h | 3 +- 5 files changed, 47 insertions(+), 21 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h b/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h index 0234b676b9bd..0d77f9677e0a 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h +++ b/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h @@ -20,7 +20,7 @@ enum HCLGE_MBX_OPCODE { HCLGE_MBX_API_NEGOTIATE, /* (VF -> PF) negotiate API version */ HCLGE_MBX_GET_QINFO, /* (VF -> PF) get queue config */ HCLGE_MBX_GET_QDEPTH, /* (VF -> PF) get queue depth */ - HCLGE_MBX_GET_TCINFO, /* (VF -> PF) get TC config */ + HCLGE_MBX_GET_BASIC_INFO, /* (VF -> PF) get basic info */ HCLGE_MBX_GET_RETA, /* (VF -> PF) get RETA */ HCLGE_MBX_GET_RSS_KEY, /* (VF -> PF) get RSS key */ HCLGE_MBX_GET_MAC_ADDR, /* (VF -> PF) get MAC addr */ @@ -86,6 +86,13 @@ struct hclge_ring_chain_param { u8 int_gl_index; };

+struct hclge_basic_info { + u8 hw_tc_map; + u8 rsv; + u16 mbx_api_version; + u32 pf_caps; +}; + struct hclgevf_mbx_resp_status { struct mutex mbx_mutex; /* protects against contending sync cmd resp */ u32 origin_mbx_msg; diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 20e86a779b45..e04f2947a1c6 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -78,6 +78,9 @@ #define hnae3_dev_vlan_fltr_mdf_supported(hdev) \ hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B)

+enum HNAE3_PF_CAP_BITS { + HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0, +}; #define ring_ptr_move_fw(ring, p) \ ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) #define ring_ptr_move_bw(ring, p) \ diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c index ae2e00ecf295..f3eb5eaadae0 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c @@ -457,16 +457,23 @@ static int hclge_set_vf_alive(struct hclge_vport *vport, return ret; }

-static void hclge_get_vf_tcinfo(struct hclge_vport *vport, - struct hclge_respond_to_vf_msg *resp_msg) +static void hclge_get_basic_info(struct hclge_vport *vport, + struct hclge_respond_to_vf_msg *resp_msg) { struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo; + struct hnae3_ae_dev *ae_dev = vport->back->ae_dev; + struct hclge_basic_info *basic_info; unsigned int i;

+ basic_info = (struct hclge_basic_info *)resp_msg->data; for (i = 0; i < kinfo->tc_info.num_tc; i++) - resp_msg->data[0] |= BIT(i); + basic_info->hw_tc_map |= BIT(i);

- resp_msg->len = sizeof(u8); + if (hnae3_get_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B)) + hnae3_set_bit(basic_info->pf_caps, + HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B, 1); + + resp_msg->len = HCLGE_MBX_MAX_RESP_DATA_SIZE; }

static void hclge_get_vf_queue_info(struct hclge_vport *vport, @@ -848,8 +855,8 @@ void hclge_mbx_handler(struct hclge_dev *hdev) case HCLGE_MBX_GET_QDEPTH: hclge_get_vf_queue_depth(vport, &resp_msg); break; - case HCLGE_MBX_GET_TCINFO: - hclge_get_vf_tcinfo(vport, &resp_msg); + case HCLGE_MBX_GET_BASIC_INFO: + hclge_get_basic_info(vport, &resp_msg); break; case HCLGE_MBX_GET_LINK_STATUS: ret = hclge_push_vf_link_status(vport); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index 9ea6eb6de4db..7f4de401d86e 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -238,23 +238,32 @@ static void hclgevf_build_send_msg(struct hclge_vf_to_pf_msg *msg, u8 code, } }

-static int hclgevf_get_tc_info(struct hclgevf_dev *hdev) +static int hclgevf_get_basic_info(struct hclgevf_dev *hdev) { + struct hnae3_ae_dev *ae_dev = hdev->ae_dev; + u8 resp_msg[HCLGE_MBX_MAX_RESP_DATA_SIZE]; + struct hclge_basic_info *basic_info; struct hclge_vf_to_pf_msg send_msg; - u8 resp_msg; + unsigned long caps; int status;

- hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_TCINFO, 0); - status = hclgevf_send_mbx_msg(hdev, &send_msg, true, &resp_msg, + hclgevf_build_send_msg(&send_msg, HCLGE_MBX_GET_BASIC_INFO, 0); + status = hclgevf_send_mbx_msg(hdev, &send_msg, true, resp_msg, sizeof(resp_msg)); if (status) { dev_err(&hdev->pdev->dev, - "VF request to get TC info from PF failed %d", - status); + "failed to get basic info from pf, ret = %d", status); return status; }

- hdev->hw_tc_map = resp_msg; + basic_info = (struct hclge_basic_info *)resp_msg; + + hdev->hw_tc_map = basic_info->hw_tc_map; + hdev->mbx_api_version = basic_info->mbx_api_version; + caps = basic_info->pf_caps; + if (test_bit(HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B, &caps)) + hnae3_set_bit(ae_dev->flag, + HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B, 1);

return 0; } @@ -2388,6 +2397,10 @@ static int hclgevf_configure(struct hclgevf_dev *hdev) { int ret;

+ ret = hclgevf_get_basic_info(hdev); + if (ret) + return ret; + /* get current port based vlan state from PF */ ret = hclgevf_get_port_base_vlan_filter_state(hdev); if (ret) @@ -2403,12 +2416,7 @@ static int hclgevf_configure(struct hclgevf_dev *hdev) if (ret) return ret;

- ret = hclgevf_get_pf_media_type(hdev); - if (ret) - return ret; - - /* get tc configuration from PF */ - return hclgevf_get_tc_info(hdev); + return hclgevf_get_pf_media_type(hdev); }

static int hclgevf_alloc_hdev(struct hnae3_ae_dev *ae_dev) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h index e0a4a7120e44..f2705d05ba32 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h @@ -283,7 +283,8 @@ struct hclgevf_dev { struct semaphore reset_sem; /* protect reset process */

u32 fw_version; - u16 num_tqps; /* num task queue pairs of this PF */ + u16 mbx_api_version; + u16 num_tqps; /* num task queue pairs of this VF */

u16 alloc_rss_size; /* allocated RSS task queue */ u16 rss_size_max; /* HW defined max RSS task queue */

From: Jian Shen shenjian15@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit 0ca821da86a5 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Add debugfs support for vlan configuraion. create a single file "vlan_config" for it, and query it by command "cat vlan_config", return the result to userspace.

The new display style is below: $ cat vlan_config I_PORT_VLAN_FILTER: on E_PORT_VLAN_FILTER: off FUNC_ID I_VF_VLAN_FILTER E_VF_VLAN_FILTER PORT_VLAN_FILTER_BYPASS pf off on off vf0 off on off FUNC_ID PVID ACCEPT_TAG1 ACCEPT_TAG2 ACCEPT_UNTAG1 ACCEPT_UNTAG2 pf 0 on on on on vf0 0 on on on on

Signed-off-by: Jian Shen shenjian15@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: Jakub Kicinski kuba@kernel.org Signed-off-by: Junxin Chen chenjunxin1@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 12 +- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 298 ++++++++++++++---- .../hisilicon/hns3/hns3pf/hclge_debugfs.h | 16 + 4 files changed, 266 insertions(+), 61 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index e04f2947a1c6..7e97dc83ffb9 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -218,6 +218,7 @@ enum hnae3_dbg_cmd { HNAE3_DBG_CMD_REG_TQP, HNAE3_DBG_CMD_REG_MAC, HNAE3_DBG_CMD_REG_DCB, + HNAE3_DBG_CMD_VLAN_CONFIG, HNAE3_DBG_CMD_QUEUE_MAP, HNAE3_DBG_CMD_RX_QUEUE_INFO, HNAE3_DBG_CMD_TX_QUEUE_INFO, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 602d9f0150e0..79f565639205 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -309,6 +309,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .buf_len = HNS3_DBG_READ_LEN, .init = hns3_dbg_common_file_init, }, + { + .name = "vlan_config", + .cmd = HNAE3_DBG_CMD_VLAN_CONFIG, + .dentry = HNS3_DBG_DENTRY_COMMON, + .buf_len = HNS3_DBG_READ_LEN, + .init = hns3_dbg_common_file_init, + }, };

static void hns3_dbg_fill_content(char *content, u16 len, @@ -723,11 +730,6 @@ static int hns3_dbg_tx_bd_info(struct hns3_dbg_data *d, char *buf, int len) static void hns3_dbg_help(struct hnae3_handle *h) { dev_info(&h->pdev->dev, "available commands\n"); - - if (!hns3_is_phys_func(h->pdev)) - return; - - dev_info(&h->pdev->dev, "dump vlan filter <func id>\n"); }

static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 00d474329a01..7caf17e54f3e 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -1970,6 +1970,242 @@ static void hclge_dbg_dump_mac_list(struct hclge_dev *hdev, char *buf, int len, } }

+static int hclge_get_vlan_rx_offload_cfg(struct hclge_dev *hdev, u8 vf_id, + struct hclge_dbg_vlan_cfg *vlan_cfg) +{ + struct hclge_vport_vtag_rx_cfg_cmd *req; + struct hclge_desc desc; + u16 bmap_index; + u8 rx_cfg; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_VLAN_PORT_RX_CFG, true); + + req = (struct hclge_vport_vtag_rx_cfg_cmd *)desc.data; + req->vf_offset = vf_id / HCLGE_VF_NUM_PER_CMD; + bmap_index = vf_id % HCLGE_VF_NUM_PER_CMD / HCLGE_VF_NUM_PER_BYTE; + req->vf_bitmap[bmap_index] = 1U << (vf_id % HCLGE_VF_NUM_PER_BYTE); + + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get vport%u rxvlan cfg, ret = %d\n", + vf_id, ret); + return ret; + } + + rx_cfg = req->vport_vlan_cfg; + vlan_cfg->strip_tag1 = hnae3_get_bit(rx_cfg, HCLGE_REM_TAG1_EN_B); + vlan_cfg->strip_tag2 = hnae3_get_bit(rx_cfg, HCLGE_REM_TAG2_EN_B); + vlan_cfg->pri_only1 = hnae3_get_bit(rx_cfg, HCLGE_SHOW_TAG1_EN_B); + vlan_cfg->pri_only2 = hnae3_get_bit(rx_cfg, HCLGE_SHOW_TAG2_EN_B); + + return 0; +} + +static int hclge_get_vlan_tx_offload_cfg(struct hclge_dev *hdev, u8 vf_id, + struct hclge_dbg_vlan_cfg *vlan_cfg) +{ + struct hclge_vport_vtag_tx_cfg_cmd *req; + struct hclge_desc desc; + u16 bmap_index; + u8 tx_cfg; + int ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_VLAN_PORT_TX_CFG, true); + req = (struct hclge_vport_vtag_tx_cfg_cmd *)desc.data; + req->vf_offset = vf_id / HCLGE_VF_NUM_PER_CMD; + bmap_index = vf_id % HCLGE_VF_NUM_PER_CMD / HCLGE_VF_NUM_PER_BYTE; + req->vf_bitmap[bmap_index] = 1U << (vf_id % HCLGE_VF_NUM_PER_BYTE); + + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to get vport%u txvlan cfg, ret = %d\n", + vf_id, ret); + return ret; + } + + tx_cfg = req->vport_vlan_cfg; + vlan_cfg->pvid = le16_to_cpu(req->def_vlan_tag1); + + vlan_cfg->accept_tag1 = hnae3_get_bit(tx_cfg, HCLGE_ACCEPT_TAG1_B); + vlan_cfg->accept_tag2 = hnae3_get_bit(tx_cfg, HCLGE_ACCEPT_TAG2_B); + vlan_cfg->accept_untag1 = hnae3_get_bit(tx_cfg, HCLGE_ACCEPT_UNTAG1_B); + vlan_cfg->accept_untag2 = hnae3_get_bit(tx_cfg, HCLGE_ACCEPT_UNTAG2_B); + vlan_cfg->insert_tag1 = hnae3_get_bit(tx_cfg, HCLGE_PORT_INS_TAG1_EN_B); + vlan_cfg->insert_tag2 = hnae3_get_bit(tx_cfg, HCLGE_PORT_INS_TAG2_EN_B); + + return 0; +} + +static int hclge_get_vlan_filter_config_cmd(struct hclge_dev *hdev, + u8 vlan_type, u8 vf_id, + struct hclge_desc *desc) +{ + struct hclge_vlan_filter_ctrl_cmd *req; + int ret; + + hclge_cmd_setup_basic_desc(desc, HCLGE_OPC_VLAN_FILTER_CTRL, true); + req = (struct hclge_vlan_filter_ctrl_cmd *)desc->data; + req->vlan_type = vlan_type; + req->vf_id = vf_id; + + ret = hclge_cmd_send(&hdev->hw, desc, 1); + if (ret) + dev_err(&hdev->pdev->dev, + "failed to get vport%u vlan filter config, ret = %d.\n", + vf_id, ret); + + return ret; +} + +static int hclge_get_vlan_filter_state(struct hclge_dev *hdev, u8 vlan_type, + u8 vf_id, u8 *vlan_fe) +{ + struct hclge_vlan_filter_ctrl_cmd *req; + struct hclge_desc desc; + int ret; + + ret = hclge_get_vlan_filter_config_cmd(hdev, vlan_type, vf_id, &desc); + if (ret) + return ret; + + req = (struct hclge_vlan_filter_ctrl_cmd *)desc.data; + *vlan_fe = req->vlan_fe; + + return 0; +} + +static const struct hclge_dbg_item vlan_filter_items[] = { + { "FUNC_ID", 2 }, + { "I_VF_VLAN_FILTER", 2 }, + { "E_VF_VLAN_FILTER", 2 }, +}; + +static const struct hclge_dbg_item vlan_offload_items[] = { + { "FUNC_ID", 2 }, + { "PVID", 4 }, + { "ACCEPT_TAG1", 2 }, + { "ACCEPT_TAG2", 2 }, + { "ACCEPT_UNTAG1", 2 }, + { "ACCEPT_UNTAG2", 2 }, + { "INSERT_TAG1", 2 }, + { "INSERT_TAG2", 2 }, + { "STRIP_TAG1", 2 }, + { "STRIP_TAG2", 2 }, + { "PRI_ONLY_TAG1", 2 }, + { "PRI_ONLY_TAG2", 0 } +}; + +static int hclge_dbg_dump_vlan_filter_config(struct hclge_dev *hdev, char *buf, + int len, int *pos) +{ + char content[HCLGE_DBG_VLAN_FLTR_INFO_LEN], str_id[HCLGE_DBG_ID_LEN]; + const char *result[ARRAY_SIZE(vlan_filter_items)]; + u8 i, j, vlan_fe, ingress, egress; + u8 func_num = pci_num_vf(hdev->pdev) + 1; /* pf and enabled vf num */ + int ret; + + ret = hclge_get_vlan_filter_state(hdev, HCLGE_FILTER_TYPE_PORT, 0, + &vlan_fe); + if (ret) + return ret; + ingress = vlan_fe & HCLGE_FILTER_FE_NIC_INGRESS_B; + egress = vlan_fe & HCLGE_FILTER_FE_NIC_EGRESS_B ? 1 : 0; + + *pos += scnprintf(buf, len, "I_PORT_VLAN_FILTER: %s\n", + state_str[ingress]); + *pos += scnprintf(buf + *pos, len - *pos, "E_PORT_VLAN_FILTER: %s\n", + state_str[egress]); + + hclge_dbg_fill_content(content, sizeof(content), vlan_filter_items, + NULL, ARRAY_SIZE(vlan_filter_items)); + *pos += scnprintf(buf + *pos, len - *pos, "%s", content); + + for (i = 0; i < func_num; i++) { + ret = hclge_get_vlan_filter_state(hdev, HCLGE_FILTER_TYPE_VF, i, + &vlan_fe); + if (ret) + return ret; + + ingress = vlan_fe & HCLGE_FILTER_FE_NIC_INGRESS_B; + egress = vlan_fe & HCLGE_FILTER_FE_NIC_EGRESS_B ? 1 : 0; + j = 0; + result[j++] = hclge_dbg_get_func_id_str(str_id, i); + result[j++] = state_str[ingress]; + result[j++] = state_str[egress]; + hclge_dbg_fill_content(content, sizeof(content), + vlan_filter_items, result, + ARRAY_SIZE(vlan_filter_items)); + *pos += scnprintf(buf + *pos, len - *pos, "%s", content); + } + *pos += scnprintf(buf + *pos, len - *pos, "\n"); + + return 0; +} + +static int hclge_dbg_dump_vlan_offload_config(struct hclge_dev *hdev, char *buf, + int len, int *pos) +{ + char str_id[HCLGE_DBG_ID_LEN], str_pvid[HCLGE_DBG_ID_LEN]; + const char *result[ARRAY_SIZE(vlan_offload_items)]; + char content[HCLGE_DBG_VLAN_OFFLOAD_INFO_LEN]; + u8 func_num = pci_num_vf(hdev->pdev) + 1; /* pf and enabled vf num */ + struct hclge_dbg_vlan_cfg vlan_cfg; + int ret; + u8 i, j; + + hclge_dbg_fill_content(content, sizeof(content), vlan_offload_items, + NULL, ARRAY_SIZE(vlan_offload_items)); + *pos += scnprintf(buf + *pos, len - *pos, "%s", content); + + for (i = 0; i < func_num; i++) { + ret = hclge_get_vlan_tx_offload_cfg(hdev, i, &vlan_cfg); + if (ret) + return ret; + + ret = hclge_get_vlan_rx_offload_cfg(hdev, i, &vlan_cfg); + if (ret) + return ret; + + sprintf(str_pvid, "%u", vlan_cfg.pvid); + j = 0; + result[j++] = hclge_dbg_get_func_id_str(str_id, i); + result[j++] = str_pvid; + result[j++] = state_str[vlan_cfg.accept_tag1]; + result[j++] = state_str[vlan_cfg.accept_tag2]; + result[j++] = state_str[vlan_cfg.accept_untag1]; + result[j++] = state_str[vlan_cfg.accept_untag2]; + result[j++] = state_str[vlan_cfg.insert_tag1]; + result[j++] = state_str[vlan_cfg.insert_tag2]; + result[j++] = state_str[vlan_cfg.strip_tag1]; + result[j++] = state_str[vlan_cfg.strip_tag2]; + result[j++] = state_str[vlan_cfg.pri_only1]; + result[j++] = state_str[vlan_cfg.pri_only2]; + + hclge_dbg_fill_content(content, sizeof(content), + vlan_offload_items, result, + ARRAY_SIZE(vlan_offload_items)); + *pos += scnprintf(buf + *pos, len - *pos, "%s", content); + } + + return 0; +} + +static int hclge_dbg_dump_vlan_config(struct hclge_dev *hdev, char *buf, + int len) +{ + int pos = 0; + int ret; + + ret = hclge_dbg_dump_vlan_filter_config(hdev, buf, len, &pos); + if (ret) + return ret; + + return hclge_dbg_dump_vlan_offload_config(hdev, buf, len, &pos); +} + static int hclge_dbg_dump_mac_uc(struct hclge_dev *hdev, char *buf, int len) { hclge_dbg_dump_mac_list(hdev, buf, len, true); @@ -2014,67 +2250,13 @@ static int hclge_dbg_dump_umv_info(struct hclge_dev *hdev, char *buf, int len) return 0; }

-static void hclge_dbg_dump_vlan_filter(struct hclge_dev *hdev, - const char *cmd_buf) -{ - struct hclge_vlan_filter_ctrl_cmd *req; - struct hclge_vport *vport; - struct hclge_desc desc; - u32 vf_id; - int ret; - - ret = kstrtouint(cmd_buf, 0, &vf_id); - if (ret < 0) { - dev_err(&hdev->pdev->dev, - "dump vlan filter: bad command string, ret=%d\n", ret); - return; - } - - if (vf_id >= hdev->num_alloc_vport) { - dev_err(&hdev->pdev->dev, - "vf id(%u) is out of range(0-%u)\n", vf_id, - hdev->num_alloc_vport - 1); - return; - } - - hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_VLAN_FILTER_CTRL, true); - req = (struct hclge_vlan_filter_ctrl_cmd *)desc.data; - req->vf_id = vf_id; - ret = hclge_cmd_send(&hdev->hw, &desc, 1); - if (ret) { - dev_err(&hdev->pdev->dev, - "failed to get vlan filter config, ret=%d\n", ret); - return; - } - - vport = &hdev->vport[vf_id]; - - dev_info(&hdev->pdev->dev, "vf_id:%u\n", req->vf_id); - dev_info(&hdev->pdev->dev, "vlan_type:%u\n", req->vlan_type); - dev_info(&hdev->pdev->dev, "vlan_fe:%u\n", req->vlan_fe); - dev_info(&hdev->pdev->dev, "netdev_flags:%x\n", - vport->nic.netdev_flags); - dev_info(&hdev->pdev->dev, "port_base_vlan_cfg_state:%u\n", - vport->port_base_vlan_cfg.state); -} - int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) { -#define DUMP_VLAN_FILTER "dump vlan filter" - struct hclge_vport *vport = hclge_get_vport(handle); struct hclge_dev *hdev = vport->back;

- if (strncmp(cmd_buf, DUMP_VLAN_FILTER, - strlen(DUMP_VLAN_FILTER)) == 0) { - hclge_dbg_dump_vlan_filter(hdev, - &cmd_buf[sizeof(DUMP_VLAN_FILTER)]); - } else { - dev_info(&hdev->pdev->dev, "unknown command\n"); - return -EINVAL; - } - - return 0; + dev_info(&hdev->pdev->dev, "unknown command\n"); + return -EINVAL; }

static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { @@ -2210,6 +2392,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { .cmd = HNAE3_DBG_CMD_UMV_INFO, .dbg_dump = hclge_dbg_dump_umv_info, }, + { + .cmd = HNAE3_DBG_CMD_VLAN_CONFIG, + .dbg_dump = hclge_dbg_dump_vlan_config, + }, };

int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h index 72990b9253d4..bca998abf39f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h @@ -754,6 +754,8 @@ static const struct hclge_dbg_dfx_message hclge_dbg_tqp_reg[] = { };

#define HCLGE_DBG_INFO_LEN 256 +#define HCLGE_DBG_VLAN_FLTR_INFO_LEN 256 +#define HCLGE_DBG_VLAN_OFFLOAD_INFO_LEN 512 #define HCLGE_DBG_ID_LEN 16 #define HCLGE_DBG_ITEM_NAME_LEN 32 #define HCLGE_DBG_DATA_STR_LEN 32 @@ -766,4 +768,18 @@ struct hclge_dbg_item { u16 interval; /* blank numbers after the item */ };

+struct hclge_dbg_vlan_cfg { + u16 pvid; + u8 accept_tag1; + u8 accept_tag2; + u8 accept_untag1; + u8 accept_untag2; + u8 insert_tag1; + u8 insert_tag2; + u8 strip_tag1; + u8 strip_tag2; + u8 pri_only1; + u8 pri_only2; +}; + #endif

From: Jian Shen shenjian15@huawei.com

dirver inclusion category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------------------------------------------------

HCLGE_FLAG_MQPRIO_ENABLE is supposed to set when enable multiple TCs with tc mqprio, and HCLGE_FLAG_DCB_ENABLE is supposed to set when enable multiple TCs with ets. But the driver mixed the flags when updating the tm configuration.

Furtherly, PFC should be available when HCLGE_FLAG_MQPRIO_ENABLE too, so remove the unnecessary limitation.

Fixes: 5a5c90917467 ("net: hns3: add support for tc mqprio offload")

Signed-off-by: Jian Shen shenjian15@huawei.com Reviewed-by: Guangbin Huang huangguangbin2@huawei.com Reviewed-by: Peng Li lipeng321@huawei.com Reviewed-by: Yufeng Mo moyufeng@huawei.com Signed-off-by: Junxin Chen chenjunxin1@huawei.com --- .../hisilicon/hns3/hns3pf/hclge_dcb.c | 7 +++-- .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 31 +++---------------- 2 files changed, 10 insertions(+), 28 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c index bbeccbece129..ce5e40b33c49 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c @@ -225,6 +225,10 @@ static int hclge_ieee_setets(struct hnae3_handle *h, struct ieee_ets *ets) }

hclge_tm_schd_info_update(hdev, num_tc); + if (num_tc > 1) + hdev->flag |= HCLGE_FLAG_DCB_ENABLE; + else + hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE;

ret = hclge_ieee_ets_to_tm_info(hdev, ets); if (ret) @@ -295,8 +299,7 @@ static int hclge_ieee_setpfc(struct hnae3_handle *h, struct ieee_pfc *pfc) u8 i, j, pfc_map, *prio_tc; int ret;

- if (!(hdev->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) || - hdev->flag & HCLGE_FLAG_MQPRIO_ENABLE) + if (!(hdev->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) return -EINVAL;

if (pfc->pfc_en == hdev->tm_info.pfc_en) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c index 3df4694c140e..dca1ac9cdb43 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c @@ -686,14 +686,6 @@ static void hclge_tm_tc_info_init(struct hclge_dev *hdev) for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) hdev->tm_info.prio_tc[i] = (i >= hdev->tm_info.num_tc) ? 0 : i; - - /* DCB is enabled if we have more than 1 TC or pfc_en is - * non-zero. - */ - if (hdev->tm_info.num_tc > 1 || hdev->tm_info.pfc_en) - hdev->flag |= HCLGE_FLAG_DCB_ENABLE; - else - hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE; }

static void hclge_tm_pg_info_init(struct hclge_dev *hdev) @@ -721,12 +713,12 @@ static void hclge_tm_pg_info_init(struct hclge_dev *hdev) } }

-static void hclge_pfc_info_init(struct hclge_dev *hdev) +void hclge_tm_pfc_info_update(struct hclge_dev *hdev) { - if (!(hdev->flag & HCLGE_FLAG_DCB_ENABLE)) { + if (hdev->tm_info.num_tc == 1 && !hdev->tm_info.pfc_en) { if (hdev->fc_mode_last_time == HCLGE_FC_PFC) dev_warn(&hdev->pdev->dev, - "DCB is disable, but last mode is FC_PFC\n"); + "Only 1 tc used, but last mode is FC_PFC\n");

hdev->tm_info.fc_mode = hdev->fc_mode_last_time; } else if (hdev->tm_info.fc_mode != HCLGE_FC_PFC) { @@ -747,7 +739,7 @@ static void hclge_tm_schd_info_init(struct hclge_dev *hdev)

hclge_tm_vport_info_update(hdev);

- hclge_pfc_info_init(hdev); + hclge_tm_pfc_info_update(hdev); }

static int hclge_tm_pg_to_pri_map(struct hclge_dev *hdev) @@ -1476,19 +1468,6 @@ void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc) hclge_tm_schd_info_init(hdev); }

-void hclge_tm_pfc_info_update(struct hclge_dev *hdev) -{ - /* DCB is enabled if we have more than 1 TC or pfc_en is - * non-zero. - */ - if (hdev->tm_info.num_tc > 1 || hdev->tm_info.pfc_en) - hdev->flag |= HCLGE_FLAG_DCB_ENABLE; - else - hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE; - - hclge_pfc_info_init(hdev); -} - int hclge_tm_init_hw(struct hclge_dev *hdev, bool init) { int ret; @@ -1534,7 +1513,7 @@ int hclge_tm_vport_map_update(struct hclge_dev *hdev) if (ret) return ret;

- if (!(hdev->flag & HCLGE_FLAG_DCB_ENABLE)) + if (hdev->tm_info.num_tc == 1 && !hdev->tm_info.pfc_en) return 0;

return hclge_tm_bp_setup(hdev);

From: Yufeng Mo moyufeng@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit b4689aaf18633ff1b9ce37b09e226a7964ce9751 category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

Currently, all debugfs commands have been reconstructed, and the debugfs file node cmd is useless. So remove this debugfs file node.

Signed-off-by: Yufeng Mo moyufeng@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: David S. Miller davem@davemloft.net Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 - .../ethernet/hisilicon/hns3/hns3_debugfs.c | 98 ------------------- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 9 -- .../hisilicon/hns3/hns3pf/hclge_main.c | 1 - .../hisilicon/hns3/hns3pf/hclge_main.h | 1 - 5 files changed, 110 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 57de0bdb52e4..4fc9cdfe67da 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -593,7 +593,6 @@ struct hnae3_ae_ops { void (*enable_fd)(struct hnae3_handle *handle, bool enable); int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id, u16 flow_id, struct flow_keys *fkeys); - int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf); int (*dbg_read_cmd)(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, char *buf, int len); pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 79f565639205..27719f3fab02 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -727,94 +727,6 @@ static int hns3_dbg_tx_bd_info(struct hns3_dbg_data *d, char *buf, int len) return 0; }

-static void hns3_dbg_help(struct hnae3_handle *h) -{ - dev_info(&h->pdev->dev, "available commands\n"); -} - -static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer, - size_t count, loff_t *ppos) -{ - int uncopy_bytes; - char *buf; - int len; - - if (*ppos != 0) - return 0; - - if (count < HNS3_DBG_READ_LEN) - return -ENOSPC; - - buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL); - if (!buf) - return -ENOMEM; - - len = scnprintf(buf, HNS3_DBG_READ_LEN, "%s\n", - "Please echo help to cmd to get help information"); - uncopy_bytes = copy_to_user(buffer, buf, len); - - kfree(buf); - - if (uncopy_bytes) - return -EFAULT; - - return (*ppos = len); -} - -static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, - size_t count, loff_t *ppos) -{ - struct hnae3_handle *handle = filp->private_data; - struct hns3_nic_priv *priv = handle->priv; - char *cmd_buf, *cmd_buf_tmp; - int uncopied_bytes; - int ret = 0; - - if (*ppos != 0) - return 0; - - /* Judge if the instance is being reset. */ - if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) || - test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) - return 0; - - if (count > HNS3_DBG_WRITE_LEN) - return -ENOSPC; - - cmd_buf = kzalloc(count + 1, GFP_KERNEL); - if (!cmd_buf) - return count; - - uncopied_bytes = copy_from_user(cmd_buf, buffer, count); - if (uncopied_bytes) { - kfree(cmd_buf); - return -EFAULT; - } - - cmd_buf[count] = '\0'; - - cmd_buf_tmp = strchr(cmd_buf, '\n'); - if (cmd_buf_tmp) { - *cmd_buf_tmp = '\0'; - count = cmd_buf_tmp - cmd_buf + 1; - } - - if (strncmp(cmd_buf, "help", 4) == 0) - hns3_dbg_help(handle); - else if (handle->ae_algo->ops->dbg_run_cmd) - ret = handle->ae_algo->ops->dbg_run_cmd(handle, cmd_buf); - else - ret = -EOPNOTSUPP; - - if (ret) - hns3_dbg_help(handle); - - kfree(cmd_buf); - cmd_buf = NULL; - - return count; -} - static int hns3_dbg_get_cmd_index(struct hns3_dbg_data *dbg_data, u32 *index) { u32 i; @@ -937,13 +849,6 @@ static ssize_t hns3_dbg_read(struct file *filp, char __user *buffer, return ret; }

-static const struct file_operations hns3_dbg_cmd_fops = { - .owner = THIS_MODULE, - .open = simple_open, - .read = hns3_dbg_cmd_read, - .write = hns3_dbg_cmd_write, -}; - static const struct file_operations hns3_dbg_fops = { .owner = THIS_MODULE, .open = simple_open, @@ -1006,9 +911,6 @@ int hns3_dbg_init(struct hnae3_handle *handle) debugfs_create_dir(name, hns3_dbgfs_root); handle->hnae3_dbgfs = hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry;

- debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle, - &hns3_dbg_cmd_fops); - for (i = 0; i < HNS3_DBG_DENTRY_COMMON; i++) hns3_dbg_dentry[i].dentry = debugfs_create_dir(hns3_dbg_dentry[i].name, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 7caf17e54f3e..be554063971f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -2250,15 +2250,6 @@ static int hclge_dbg_dump_umv_info(struct hclge_dev *hdev, char *buf, int len) return 0; }

-int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf) -{ - struct hclge_vport *vport = hclge_get_vport(handle); - struct hclge_dev *hdev = vport->back; - - dev_info(&hdev->pdev->dev, "unknown command\n"); - return -EINVAL; -} - static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { { .cmd = HNAE3_DBG_CMD_TM_PRI, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 50457b2068a1..d01194e4b6b4 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -11639,7 +11639,6 @@ struct hnae3_ae_ops hclge_ops = { .restore_fd_rules = hclge_restore_fd_entries, .enable_fd = hclge_enable_fd, .add_arfs_entry = hclge_add_fd_entry_by_arfs, - .dbg_run_cmd = hclge_dbg_run_cmd, .dbg_read_cmd = hclge_dbg_read_cmd, .handle_hw_ras_error = hclge_handle_hw_ras_error, .get_hw_reset_stat = hclge_get_hw_reset_stat, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index bc080f609b56..99fa4a2f32b7 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -1045,7 +1045,6 @@ int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id); int hclge_vport_start(struct hclge_vport *vport); void hclge_vport_stop(struct hclge_vport *vport); int hclge_set_vport_mtu(struct hclge_vport *vport, int new_mtu); -int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf); int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, char *buf, int len); u16 hclge_covert_handle_qid_global(struct hnae3_handle *handle, u16 queue_id);

From: Jian Shen shenjian15@huawei.com

mainline inclusion from mainline-v5.14-rc3 commit 184cd221a863 category: bugfix bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

For hardware limitation, port VLAN filter is port level, and effective for all the functions of the port. So if not support port VLAN bypass, it's necessary to disable the port VLAN filter, in order to support function level VLAN filter control.

Fixes: 2ba306627f59 ("net: hns3: add support for modify VLAN filter state") Signed-off-by: Jian Shen shenjian15@huawei.com Signed-off-by: Guangbin Huang huangguangbin2@huawei.com Signed-off-by: Jakub Kicinski kuba@kernel.org Signed-off-by: Junxin Chen chenjunxin1@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index d01194e4b6b4..37c27fc03318 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -8351,10 +8351,14 @@ static int hclge_set_vport_vlan_filter(struct hclge_vport *vport, bool enable) if (ret) return ret;

- if (!vport->vport_id) + if (!vport->vport_id) { + if (hnae3_dev_vlan_fltr_mdf_supported(hdev)) + enable = false; + ret = hclge_set_vlan_filter_ctrl(hdev, HCLGE_FILTER_TYPE_PORT, HCLGE_FILTER_FE_INGRESS, enable, 0); + }

return ret; }

From: Jian Shen shenjian15@huawei.com

mainline inclusion from mainline-v5.14-rc1 commit b44eb28d44a65370e77d0bcd9a87cee3fa1daaca category: feature bugzilla: NA CVE: NA DTS: DTS2021090315802

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i...

----------------------------------------------------------------------

Currently, option "qos" is igored by HNS3 driver for command "ip link set ethx vf <vf id> vlan <vlan id> qos <qos value>". Add support for it.

Signed-off-by: Jian Shen shenjian15@huawei.com Signed-off-by: Huazhong Tan tanhuazhong@huawei.com Signed-off-by: Jakub Kicinski kuba@kernel.org Reviewed-by: Yongxin Li liyongxin1@huawei.com Signed-off-by: Junxin Chen chenjunxin1@huawei.com --- .../hisilicon/hns3/hns3pf/hclge_main.c | 92 ++++++++++++------- 1 file changed, 59 insertions(+), 33 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index 1ff22a92f86c..98a1d3d2870a 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -8681,7 +8681,7 @@ static int hclge_set_vlan_rx_offload_cfg(struct hclge_vport *vport)

static int hclge_vlan_offload_cfg(struct hclge_vport *vport, u16 port_base_vlan_state, - u16 vlan_tag) + u16 vlan_tag, u8 qos) { int ret;

@@ -8692,7 +8692,8 @@ static int hclge_vlan_offload_cfg(struct hclge_vport *vport, } else { vport->txvlan_cfg.accept_tag1 = false; vport->txvlan_cfg.insert_tag1_en = true; - vport->txvlan_cfg.default_tag1 = vlan_tag; + vport->txvlan_cfg.default_tag1 = (qos << VLAN_PRIO_SHIFT) | + vlan_tag; }

vport->txvlan_cfg.accept_untag1 = true; @@ -8815,13 +8816,15 @@ static int hclge_init_vlan_config(struct hclge_dev *hdev)

for (i = 0; i < hdev->num_alloc_vport; i++) { u16 vlan_tag; + u8 qos;

vport = &hdev->vport[i]; vlan_tag = vport->port_base_vlan_cfg.vlan_info.vlan_tag; + qos = vport->port_base_vlan_cfg.vlan_info.qos;

ret = hclge_vlan_offload_cfg(vport, vport->port_base_vlan_cfg.state, - vlan_tag); + vlan_tag, qos); if (ret) return ret; } @@ -9092,6 +9095,10 @@ static int hclge_update_vlan_filter_entries(struct hclge_vport *vport,

if (port_base_vlan_state == HNAE3_PORT_BASE_VLAN_ENABLE) { hclge_rm_vport_all_vlan_table(vport, false); + /* force clear VLAN 0 */ + ret = hclge_set_vf_vlan_common(hdev, vport->vport_id, true, 0); + if (ret) + return ret; return hclge_set_vlan_filter_hw(hdev, htons(new_info->vlan_proto), vport->vport_id, @@ -9115,6 +9122,18 @@ static int hclge_update_vlan_filter_entries(struct hclge_vport *vport, return hclge_add_vport_all_vlan_table(vport); }

+static bool hclge_need_update_vlan_filter(const struct hclge_vlan_info *new_cfg, + const struct hclge_vlan_info *old_cfg) +{ + if (new_cfg->vlan_tag != old_cfg->vlan_tag) + return true; + + if (new_cfg->vlan_tag == 0 && (new_cfg->qos == 0 || old_cfg->qos == 0)) + return true; + + return false; +} + int hclge_update_port_base_vlan_cfg(struct hclge_vport *vport, u16 state, struct hclge_vlan_info *vlan_info) { @@ -9125,10 +9144,14 @@ int hclge_update_port_base_vlan_cfg(struct hclge_vport *vport, u16 state,

old_vlan_info = &vport->port_base_vlan_cfg.vlan_info;

- ret = hclge_vlan_offload_cfg(vport, state, vlan_info->vlan_tag); + ret = hclge_vlan_offload_cfg(vport, state, vlan_info->vlan_tag, + vlan_info->qos); if (ret) return ret;

+ if (!hclge_need_update_vlan_filter(vlan_info, old_vlan_info)) + goto out; + if (state == HNAE3_PORT_BASE_VLAN_MODIFY) { /* add new VLAN tag */ ret = hclge_set_vlan_filter_hw(hdev, @@ -9140,15 +9163,23 @@ int hclge_update_port_base_vlan_cfg(struct hclge_vport *vport, u16 state, return ret; vport->port_base_vlan_cfg.tbl_sta = false; /* remove old VLAN tag */ - ret = hclge_set_vlan_filter_hw(hdev, - htons(old_vlan_info->vlan_proto), - vport->vport_id, - old_vlan_info->vlan_tag, - true); - if (ret) + if (old_vlan_info->vlan_tag == 0) + ret = hclge_set_vf_vlan_common(hdev, vport->vport_id, + true, 0); + else + ret = hclge_set_vlan_filter_hw(hdev, + htons(ETH_P_8021Q), + vport->vport_id, + old_vlan_info->vlan_tag, + true); + if (ret) { + dev_err(&hdev->pdev->dev, + "failed to clear vport%u port base vlan %u, ret = %d.\n", + vport->vport_id, old_vlan_info->vlan_tag, ret); return ret; + }

- goto update; + goto out; }

ret = hclge_update_vlan_filter_entries(vport, state, vlan_info, @@ -9156,22 +9187,15 @@ int hclge_update_port_base_vlan_cfg(struct hclge_vport *vport, u16 state, if (ret) return ret;

-update: +out: vport->port_base_vlan_cfg.state = state; if (state == HNAE3_PORT_BASE_VLAN_DISABLE) nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_DISABLE; else nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_ENABLE;

- vport->port_base_vlan_cfg.old_vlan_info.vlan_tag = - old_vlan_info->vlan_tag; - vport->port_base_vlan_cfg.old_vlan_info.qos = - old_vlan_info->qos; - vport->port_base_vlan_cfg.old_vlan_info.vlan_proto = - old_vlan_info->vlan_proto; - vport->port_base_vlan_cfg.vlan_info.vlan_tag = vlan_info->vlan_tag; - vport->port_base_vlan_cfg.vlan_info.qos = vlan_info->qos; - vport->port_base_vlan_cfg.vlan_info.vlan_proto = vlan_info->vlan_proto; + vport->port_base_vlan_cfg.old_vlan_info = *old_vlan_info; + vport->port_base_vlan_cfg.vlan_info = *vlan_info; vport->port_base_vlan_cfg.tbl_sta = true; hclge_set_vport_vlan_fltr_change(vport);

@@ -9180,21 +9204,23 @@ int hclge_update_port_base_vlan_cfg(struct hclge_vport *vport, u16 state,

static u16 hclge_get_port_base_vlan_state(struct hclge_vport *vport, enum hnae3_port_base_vlan_state state, - u16 vlan) + u16 vlan, u8 qos) { if (state == HNAE3_PORT_BASE_VLAN_DISABLE) { - if (!vlan) + if (!vlan && !qos) return HNAE3_PORT_BASE_VLAN_NOCHANGE; - else - return HNAE3_PORT_BASE_VLAN_ENABLE; - } else { - if (!vlan) - return HNAE3_PORT_BASE_VLAN_DISABLE; - else if (vport->port_base_vlan_cfg.vlan_info.vlan_tag == vlan) - return HNAE3_PORT_BASE_VLAN_NOCHANGE; - else - return HNAE3_PORT_BASE_VLAN_MODIFY; + + return HNAE3_PORT_BASE_VLAN_ENABLE; } + + if (!vlan && !qos) + return HNAE3_PORT_BASE_VLAN_DISABLE; + + if (vport->port_base_vlan_cfg.vlan_info.vlan_tag == vlan && + vport->port_base_vlan_cfg.vlan_info.qos == qos) + return HNAE3_PORT_BASE_VLAN_NOCHANGE; + + return HNAE3_PORT_BASE_VLAN_MODIFY; }

static int hclge_set_vf_vlan_filter(struct hnae3_handle *handle, int vfid, @@ -9221,7 +9247,7 @@ static int hclge_set_vf_vlan_filter(struct hnae3_handle *handle, int vfid,

state = hclge_get_port_base_vlan_state(vport, vport->port_base_vlan_cfg.state, - vlan); + vlan, qos); if (state == HNAE3_PORT_BASE_VLAN_NOCHANGE) return 0;

driver inclusion category: bugfix bugzilla: NA CVE: NA DTS: DTS2021090115298

----------------------------

The hardware can not handle short tunnel frames below or equal to 64 bytes, and will cause vlan tag missing problem.

This patch pads packet size to 65 bytes for tunnel frames to fix this bug.

Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index d5d56ed103c0..04c181d9b4b8 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -61,6 +61,7 @@ MODULE_PARM_DESC(debug, " Network interface message level setting"); #define HNS3_OUTER_VLAN_TAG 2

#define HNS3_MIN_TX_LEN 33U +#define HNS3_MIN_TUN_PKT_LEN 65U

/* hns3_pci_tbl - PCI Device ID Table * @@ -898,8 +899,13 @@ static int hns3_set_l2l3l4(struct sk_buff *skb, u8 ol4_proto, l4.tcp->doff); break; case IPPROTO_UDP: - if (hns3_tunnel_csum_bug(skb)) + if (hns3_tunnel_csum_bug(skb)) { + int ret = skb_put_padto(skb, HNS3_MIN_TUN_PKT_LEN); + if (ret) + return ret; + return skb_checksum_help(skb); + }

hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1); hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,

driver inclusion category: bugfix bugzilla: NA CVE: NA DTS: DTS2021090217421

----------------------------

When fully configure VLANs for a VF, then unload the VF while triggering a reset to PF, will cause a kernel crash because the irq is already uninit.

[ 293.177579] ------------[ cut here ]------------ [ 293.183502] kernel BUG at drivers/pci/msi.c:352! [ 293.189547] Internal error: Oops - BUG: 0 [#1] SMP [ 293.195910] Modules linked in: 8021q garp mrp hclgevf devlink xt_CHECKSUM ipt_MASQUERADE xt_conntrack ipt_REJECT nf_reject_ipv4 ip6table_mangle ip6table_nat nf_nat_ipv6 iptable_mangle iptable_nat nf_nat_ipv4 nf_nat nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 libcrc32c ebtable_filter ebtables ip6table_filter ip6_tables iptable_filter tun bridge stp llc rfkill vfat fat ib_isert iscsi_target_mod ib_srpt target_core_mod ib_srp scsi_transport_srp ib_ipoib ib_umad rpcrdma sunrpc rdma_ucm ib_uverbs ib_iser rdma_cm iw_cm ib_cm libiscsi scsi_transport_iscsi ipmi_ssif aes_ce_blk crypto_simd cryptd hns_roce_hw_v2 aes_ce_cipher ghash_ce hns_roce sha2_ce sha256_arm64 ses sha1_ce ib_core enclosure sbsa_gwdt uio_pdrv_genirq uio sg ipmi_si ipmi_devintf ipmi_msghandler spi_dw_mmio sch_fq_codel ip_tables ext4 mbcache [ 293.302197] jbd2 sd_mod realtek hisi_sas_v3_hw hclge hisi_sas_main libsas ahci scsi_transport_sas libahci ixgbe hns3 libata hnae3 host_edma_drv mdio dm_mirror dm_region_hash dm_log dm_mod [ 293.334208] Process kworker/0:4 (pid: 684, stack limit = 0x000000009f218975) [ 293.346841] CPU: 0 PID: 684 Comm: kworker/0:4 Kdump: loaded Not tainted 4.19.90-2106.3.0.0095.oe1.aarch64 #1 [ 293.368467] Hardware name: Huawei TaiShan 2280 V2/BC82AMDC, BIOS 2280-V2 CS V5.B170.01 06/30/2021 [ 293.390124] Workqueue: hclgevf hclgevf_service_task [hclgevf] [ 293.402627] pstate: 80c00009 (Nzcv daif +PAN +UAO) [ 293.414324] pc : free_msi_irqs+0x19c/0x1b8 [ 293.425429] lr : free_msi_irqs+0x18c/0x1b8 [ 293.436545] sp : ffff00002716fbb0 [ 293.446950] x29: ffff00002716fbb0 x28: 0000000000000000 [ 293.459519] x27: 0000000000000000 x26: ffff45b91ea16b00 [ 293.472183] x25: 0000000000000000 x24: ffffa587b08f4700 [ 293.484717] x23: ffffc591ac30e000 x22: ffffa587b08f8428 [ 293.497190] x21: ffffc591ac30e300 x20: 0000000000000000 [ 293.509594] x19: ffffa58a062a8300 x18: 0000000000000000 [ 293.521949] x17: 0000000000000000 x16: ffff45b91dcc3f48 [ 293.534013] x15: 0000000000000000 x14: 0000000000000000 [ 293.545883] x13: 0000000000000040 x12: 0000000000000228 [ 293.557508] x11: 0000000000000020 x10: 0000000000000040 [ 293.568889] x9 : ffff45b91ea1e190 x8 : ffffc591802d0000 [ 293.580123] x7 : ffffc591802d0148 x6 : 0000000000000120 [ 293.591190] x5 : ffffc591802d0000 x4 : 0000000000000000 [ 293.602015] x3 : 0000000000000000 x2 : 0000000000000000 [ 293.612624] x1 : 00000000000004a4 x0 : ffffa58a1e0c6b80 [ 293.623028] Call trace: [ 293.630340] free_msi_irqs+0x19c/0x1b8 [ 293.638849] pci_disable_msix+0x118/0x140 [ 293.647452] pci_free_irq_vectors+0x20/0x38 [ 293.656081] hclgevf_uninit_msi+0x44/0x58 [hclgevf] [ 293.665309] hclgevf_reset_rebuild+0x1ac/0x2e0 [hclgevf] [ 293.674866] hclgevf_reset+0x358/0x400 [hclgevf] [ 293.683545] hclgevf_reset_service_task+0xd0/0x1b0 [hclgevf] [ 293.693325] hclgevf_service_task+0x4c/0x2e8 [hclgevf] [ 293.702307] process_one_work+0x1b0/0x448 [ 293.710034] worker_thread+0x54/0x468 [ 293.717331] kthread+0x134/0x138 [ 293.724114] ret_from_fork+0x10/0x18 [ 293.731324] Code: f940b000 b4ffff00 a903e7b8 f90017b6 (d4210000)

This patch fixes the problem by waiting for the VF reset done while unloading the VF.

Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c index 89ea550b0734..4122eaf2619b 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c @@ -2896,6 +2896,8 @@ static void hclgevf_uninit_client_instance(struct hnae3_client *client,

/* un-init roce, if it exists */ if (hdev->roce_client) { + while (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) + msleep(100); hdev->roce_client->ops->uninit_instance(&hdev->roce, 0); hdev->roce_client = NULL; hdev->roce.client = NULL; @@ -2905,6 +2907,8 @@ static void hclgevf_uninit_client_instance(struct hnae3_client *client, if (client->ops->uninit_instance && hdev->nic_client && client->type != HNAE3_CLIENT_ROCE) { clear_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state); + while (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state)) + msleep(100);

client->ops->uninit_instance(&hdev->nic, 0); hdev->nic_client = NULL;

From: Jian Shen shenjian15@huawei.com

driver inclusion category: bugfix bugzilla: NA CVE: NA DTS: DTS202104230KVXE8P1K00

----------------------------

Currently, in function hns3_nic_set_real_num_queue(), the driver doesn't report the queue count and offset for disabled tc. If user enables multiple TCs, but only maps user priorities to partial of them, it may cause the queue range of the unmapped TC being displayed abnormally.

Fix it by removing the tc enable checking, ensure the queue count is not zero.

With this change, the tc_en is useless now, so remove it.

Fixes: a75a8efa00c5 ("net: hns3: Fix tc setup when netdev is first up")

Signed-off-by: Jian Shen shenjian15@huawei.com Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 - drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 11 ++--------- .../net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c | 5 ----- drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 2 -- 4 files changed, 2 insertions(+), 17 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 4fc9cdfe67da..084935221a86 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -681,7 +681,6 @@ struct hnae3_tc_info { u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ u16 tqp_count[HNAE3_MAX_TC]; u16 tqp_offset[HNAE3_MAX_TC]; - unsigned long tc_en; /* bitmap of TC enabled */ u8 num_tc; /* Total number of enabled TCs */ bool mqprio_active; }; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index 04c181d9b4b8..ffb4bfc5061d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -286,13 +286,9 @@ static int hns3_nic_set_real_num_queue(struct net_device *netdev) return ret; }

- for (i = 0; i < HNAE3_MAX_TC; i++) { - if (!test_bit(i, &tc_info->tc_en)) - continue; - + for (i = 0; i < tc_info->num_tc; i++) netdev_set_tc_queue(netdev, i, tc_info->tqp_count[i], tc_info->tqp_offset[i]); - } }

ret = netif_set_real_num_tx_queues(netdev, queue_size); @@ -3997,12 +3993,9 @@ static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv) struct hnae3_tc_info *tc_info = &kinfo->tc_info; int i;

- for (i = 0; i < HNAE3_MAX_TC; i++) { + for (i = 0; i < tc_info->num_tc; i++) { int j;

- if (!test_bit(i, &tc_info->tc_en)) - continue; - for (j = 0; j < tc_info->tqp_count[i]; j++) { struct hnae3_queue *q;

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c index 623a39c7c173..45ee832e6feb 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c @@ -426,8 +426,6 @@ static int hclge_mqprio_qopt_check(struct hclge_dev *hdev, static void hclge_sync_mqprio_qopt(struct hnae3_tc_info *tc_info, struct tc_mqprio_qopt_offload *mqprio_qopt) { - int i; - memset(tc_info, 0, sizeof(*tc_info)); tc_info->num_tc = mqprio_qopt->qopt.num_tc; memcpy(tc_info->prio_tc, mqprio_qopt->qopt.prio_tc_map, @@ -436,9 +434,6 @@ static void hclge_sync_mqprio_qopt(struct hnae3_tc_info *tc_info, FIELD_SIZEOF(struct hnae3_tc_info, tqp_count)); memcpy(tc_info->tqp_offset, mqprio_qopt->qopt.offset, FIELD_SIZEOF(struct hnae3_tc_info, tqp_offset)); - - for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) - set_bit(tc_info->prio_tc[i], &tc_info->tc_en); }

static int hclge_config_tc(struct hclge_dev *hdev, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c index dca1ac9cdb43..95392df34a61 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c @@ -644,12 +644,10 @@ static void hclge_tm_vport_tc_info_update(struct hclge_vport *vport)

for (i = 0; i < HNAE3_MAX_TC; i++) { if (hdev->hw_tc_map & BIT(i) && i < kinfo->tc_info.num_tc) { - set_bit(i, &kinfo->tc_info.tc_en); kinfo->tc_info.tqp_offset[i] = i * kinfo->rss_size; kinfo->tc_info.tqp_count[i] = kinfo->rss_size; } else { /* Set to default queue if TC is disable */ - clear_bit(i, &kinfo->tc_info.tc_en); kinfo->tc_info.tqp_offset[i] = 0; kinfo->tc_info.tqp_count[i] = 1; }

driver inclusion category: bugfix bugzilla: NA CVE: NA DTS: DTS2021090315802

----------------------------

The type of desc.date is __le32, must change to cpu endian before use.

Signed-off-by: Yonglong Liu liuyonglong@huawei.com --- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 31 +++++++++---------- 1 file changed, 14 insertions(+), 17 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index be554063971f..7ae5a49b73bf 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -391,7 +391,7 @@ static int hclge_dbg_dump_mac(struct hclge_dev *hdev, char *buf, int len) static int hclge_dbg_dump_dcb_qset(struct hclge_dev *hdev, char *buf, int len, int *pos) { - struct hclge_dbg_bitmap_cmd *bitmap; + struct hclge_dbg_bitmap_cmd req; struct hclge_desc desc; u16 qset_id, qset_num; int ret; @@ -408,12 +408,12 @@ static int hclge_dbg_dump_dcb_qset(struct hclge_dev *hdev, char *buf, int len, if (ret) return ret;

- bitmap = (struct hclge_dbg_bitmap_cmd *)&desc.data[1]; + req.bitmap = (u8)le32_to_cpu(desc.data[1]);

*pos += scnprintf(buf + *pos, len - *pos, "%04u %#x %#x %#x %#x\n", - qset_id, bitmap->bit0, bitmap->bit1, - bitmap->bit2, bitmap->bit3); + qset_id, req.bit0, req.bit1, req.bit2, + req.bit3); }

return 0; @@ -422,7 +422,7 @@ static int hclge_dbg_dump_dcb_qset(struct hclge_dev *hdev, char *buf, int len, static int hclge_dbg_dump_dcb_pri(struct hclge_dev *hdev, char *buf, int len, int *pos) { - struct hclge_dbg_bitmap_cmd *bitmap; + struct hclge_dbg_bitmap_cmd req; struct hclge_desc desc; u8 pri_id, pri_num; int ret; @@ -439,12 +439,11 @@ static int hclge_dbg_dump_dcb_pri(struct hclge_dev *hdev, char *buf, int len, if (ret) return ret;

- bitmap = (struct hclge_dbg_bitmap_cmd *)&desc.data[1]; + req.bitmap = (u8)le32_to_cpu(desc.data[1]);

*pos += scnprintf(buf + *pos, len - *pos, "%03u %#x %#x %#x\n", - pri_id, bitmap->bit0, bitmap->bit1, - bitmap->bit2); + pri_id, req.bit0, req.bit1, req.bit2); }

return 0; @@ -453,7 +452,7 @@ static int hclge_dbg_dump_dcb_pri(struct hclge_dev *hdev, char *buf, int len, static int hclge_dbg_dump_dcb_pg(struct hclge_dev *hdev, char *buf, int len, int *pos) { - struct hclge_dbg_bitmap_cmd *bitmap; + struct hclge_dbg_bitmap_cmd req; struct hclge_desc desc; u8 pg_id; int ret; @@ -466,12 +465,11 @@ static int hclge_dbg_dump_dcb_pg(struct hclge_dev *hdev, char *buf, int len, if (ret) return ret;

- bitmap = (struct hclge_dbg_bitmap_cmd *)&desc.data[1]; + req.bitmap = (u8)le32_to_cpu(desc.data[1]);

*pos += scnprintf(buf + *pos, len - *pos, "%03u %#x %#x %#x\n", - pg_id, bitmap->bit0, bitmap->bit1, - bitmap->bit2); + pg_id, req.bit0, req.bit1, req.bit2); }

return 0; @@ -511,7 +509,7 @@ static int hclge_dbg_dump_dcb_queue(struct hclge_dev *hdev, char *buf, int len, static int hclge_dbg_dump_dcb_port(struct hclge_dev *hdev, char *buf, int len, int *pos) { - struct hclge_dbg_bitmap_cmd *bitmap; + struct hclge_dbg_bitmap_cmd req; struct hclge_desc desc; u8 port_id = 0; int ret; @@ -521,12 +519,11 @@ static int hclge_dbg_dump_dcb_port(struct hclge_dev *hdev, char *buf, int len, if (ret) return ret;

- bitmap = (struct hclge_dbg_bitmap_cmd *)&desc.data[1]; + req.bitmap = (u8)le32_to_cpu(desc.data[1]);

- *pos += scnprintf(buf + *pos, len - *pos, "port_mask: %#x\n", - bitmap->bit0); + *pos += scnprintf(buf + *pos, len - *pos, "port_mask: %#x\n", req.bit0); *pos += scnprintf(buf + *pos, len - *pos, "port_shaping_pass: %#x\n", - bitmap->bit1); + req.bit1);

return 0; }